x86-64, numa: Put pgtable to local node memory
[deliverable/linux.git] / arch / x86 / mm / amdtopology_64.c
CommitLineData
3aa88cdf 1/*
eec1d4fa 2 * AMD NUMA support.
1da177e4 3 * Discover the memory map and associated nodes.
3aa88cdf 4 *
eec1d4fa 5 * This version reads it directly from the AMD northbridge.
3aa88cdf 6 *
1da177e4
LT
7 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
8 */
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/string.h>
12#include <linux/module.h>
13#include <linux/nodemask.h>
a9ce6bc1
YL
14#include <linux/memblock.h>
15
1da177e4
LT
16#include <asm/io.h>
17#include <linux/pci_ids.h>
cbf9bd60 18#include <linux/acpi.h>
1da177e4
LT
19#include <asm/types.h>
20#include <asm/mmzone.h>
21#include <asm/proto.h>
22#include <asm/e820.h>
23#include <asm/pci-direct.h>
24#include <asm/numa.h>
cbf9bd60
YL
25#include <asm/mpspec.h>
26#include <asm/apic.h>
23ac4ae8 27#include <asm/amd_nb.h>
1da177e4 28
8ee2debc
DR
29static struct bootnode __initdata nodes[8];
30static nodemask_t __initdata nodes_parsed = NODE_MASK_NONE;
31
1da177e4
LT
32static __init int find_northbridge(void)
33{
3aa88cdf 34 int num;
1da177e4 35
3aa88cdf 36 for (num = 0; num < 32; num++) {
1da177e4 37 u32 header;
3aa88cdf
CM
38
39 header = read_pci_config(0, num, 0, 0x00);
bb4a1d64
JD
40 if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
41 header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
42 header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
3aa88cdf 43 continue;
1da177e4 44
3aa88cdf 45 header = read_pci_config(0, num, 1, 0x00);
bb4a1d64
JD
46 if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
47 header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
48 header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
3aa88cdf
CM
49 continue;
50 return num;
51 }
1da177e4 52
3aa88cdf 53 return -1;
1da177e4
LT
54}
55
cbf9bd60
YL
56static __init void early_get_boot_cpu_id(void)
57{
58 /*
f6e9456c 59 * need to get the APIC ID of the BSP so can use that to
eec1d4fa 60 * create apicid_to_node in amd_scan_nodes()
cbf9bd60 61 */
a4caa18e 62#ifdef CONFIG_X86_MPPARSE
cbf9bd60
YL
63 /*
64 * get boot-time SMP configuration:
65 */
66 if (smp_found_config)
67 early_get_smp_config();
a4caa18e 68#endif
cbf9bd60
YL
69 early_init_lapic_mapping();
70}
71
eec1d4fa 72int __init amd_get_nodes(struct bootnode *physnodes)
3aa88cdf 73{
8ee2debc
DR
74 int i;
75 int ret = 0;
76
77 for_each_node_mask(i, nodes_parsed) {
78 physnodes[ret].start = nodes[i].start;
79 physnodes[ret].end = nodes[i].end;
80 ret++;
81 }
82 return ret;
83}
84
eec1d4fa 85int __init amd_numa_init(unsigned long start_pfn, unsigned long end_pfn)
8ee2debc
DR
86{
87 unsigned long start = PFN_PHYS(start_pfn);
88 unsigned long end = PFN_PHYS(end_pfn);
89 unsigned numnodes;
1da177e4 90 unsigned long prevbase;
8ee2debc 91 int i, nb, found = 0;
d34c0895 92 u32 nodeid, reg;
1da177e4 93
0637a70a
AK
94 if (!early_pci_allowed())
95 return -1;
96
3aa88cdf
CM
97 nb = find_northbridge();
98 if (nb < 0)
1da177e4
LT
99 return nb;
100
1af5ba51 101 pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
1da177e4 102
3aa88cdf 103 reg = read_pci_config(0, nb, 0, 0x60);
1da177e4 104 numnodes = ((reg >> 4) & 0xF) + 1;
3bea9c97
AK
105 if (numnodes <= 1)
106 return -1;
1da177e4 107
8ee2debc 108 pr_info("Number of physical nodes %d\n", numnodes);
1da177e4 109
1da177e4 110 prevbase = 0;
3aa88cdf
CM
111 for (i = 0; i < 8; i++) {
112 unsigned long base, limit;
3aa88cdf 113
1da177e4
LT
114 base = read_pci_config(0, nb, 1, 0x40 + i*8);
115 limit = read_pci_config(0, nb, 1, 0x44 + i*8);
116
3aa88cdf 117 nodeid = limit & 7;
3aa88cdf 118 if ((base & 3) == 0) {
1da177e4 119 if (i < numnodes)
1af5ba51 120 pr_info("Skipping disabled node %d\n", i);
1da177e4 121 continue;
3aa88cdf 122 }
1da177e4 123 if (nodeid >= numnodes) {
1af5ba51
DR
124 pr_info("Ignoring excess node %d (%lx:%lx)\n", nodeid,
125 base, limit);
1da177e4 126 continue;
3aa88cdf 127 }
1da177e4 128
3aa88cdf 129 if (!limit) {
1af5ba51
DR
130 pr_info("Skipping node entry %d (base %lx)\n",
131 i, base);
1da177e4
LT
132 continue;
133 }
134 if ((base >> 8) & 3 || (limit >> 8) & 3) {
1af5ba51
DR
135 pr_err("Node %d using interleaving mode %lx/%lx\n",
136 nodeid, (base >> 8) & 3, (limit >> 8) & 3);
3aa88cdf
CM
137 return -1;
138 }
8ee2debc 139 if (node_isset(nodeid, nodes_parsed)) {
1af5ba51
DR
140 pr_info("Node %d already present, skipping\n",
141 nodeid);
1da177e4
LT
142 continue;
143 }
144
3aa88cdf
CM
145 limit >>= 16;
146 limit <<= 24;
1da177e4 147 limit |= (1<<24)-1;
ffd10a2b 148 limit++;
1da177e4 149
8ee2debc
DR
150 if (limit > end)
151 limit = end;
1da177e4 152 if (limit <= base)
3aa88cdf
CM
153 continue;
154
1da177e4 155 base >>= 16;
3aa88cdf
CM
156 base <<= 24;
157
158 if (base < start)
159 base = start;
160 if (limit > end)
161 limit = end;
162 if (limit == base) {
1af5ba51 163 pr_err("Empty node %d\n", nodeid);
3aa88cdf 164 continue;
1da177e4 165 }
3aa88cdf 166 if (limit < base) {
1af5ba51 167 pr_err("Node %d bogus settings %lx-%lx.\n",
3aa88cdf 168 nodeid, base, limit);
1da177e4 169 continue;
3aa88cdf
CM
170 }
171
1da177e4 172 /* Could sort here, but pun for now. Should not happen anyroads. */
3aa88cdf 173 if (prevbase > base) {
1af5ba51 174 pr_err("Node map not sorted %lx,%lx\n",
3aa88cdf 175 prevbase, base);
1da177e4
LT
176 return -1;
177 }
3aa88cdf 178
1af5ba51
DR
179 pr_info("Node %d MemBase %016lx Limit %016lx\n",
180 nodeid, base, limit);
3aa88cdf 181
1da177e4 182 found++;
3aa88cdf
CM
183
184 nodes[nodeid].start = base;
1da177e4
LT
185 nodes[nodeid].end = limit;
186
187 prevbase = base;
188
8ee2debc 189 node_set(nodeid, nodes_parsed);
3aa88cdf 190 }
1da177e4
LT
191
192 if (!found)
3aa88cdf 193 return -1;
8ee2debc
DR
194 return 0;
195}
1da177e4 196
eec1d4fa 197int __init amd_scan_nodes(void)
8ee2debc
DR
198{
199 unsigned int bits;
200 unsigned int cores;
201 unsigned int apicid_base;
202 int i;
203
204 BUG_ON(nodes_empty(nodes_parsed));
205 node_possible_map = nodes_parsed;
6ec6e0d9 206 memnode_shift = compute_hash_shift(nodes, 8, NULL);
3aa88cdf 207 if (memnode_shift < 0) {
1af5ba51 208 pr_err("No NUMA node hash function found. Contact maintainer\n");
3aa88cdf
CM
209 return -1;
210 }
1af5ba51 211 pr_info("Using node hash shift of %d\n", memnode_shift);
1da177e4 212
3f6e5a12
YL
213 /* use the coreid bits from early_identify_cpu */
214 bits = boot_cpu_data.x86_coreid_bits;
215 cores = (1<<bits);
cbf9bd60 216 apicid_base = 0;
f6e9456c 217 /* get the APIC ID of the BSP early for systems with apicid lifting */
cbf9bd60
YL
218 early_get_boot_cpu_id();
219 if (boot_cpu_physical_apicid > 0) {
1af5ba51 220 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
cbf9bd60
YL
221 apicid_base = boot_cpu_physical_apicid;
222 }
3f6e5a12 223
1411e0ec 224 for_each_node_mask(i, node_possible_map)
a9ce6bc1 225 memblock_x86_register_active_regions(i,
40bcc69b
YL
226 nodes[i].start >> PAGE_SHIFT,
227 nodes[i].end >> PAGE_SHIFT);
1411e0ec
YL
228 init_memory_mapping_high();
229 for_each_node_mask(i, node_possible_map) {
230 int j;
231
40bcc69b
YL
232 for (j = apicid_base; j < cores + apicid_base; j++)
233 apicid_to_node[(i << bits) + j] = i;
234 setup_node_bootmem(i, nodes[i].start, nodes[i].end);
1da177e4
LT
235 }
236
237 numa_init_array();
238 return 0;
3aa88cdf 239}
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