Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1995 Linus Torvalds |
2d4a7167 | 3 | * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs. |
1da177e4 | 4 | */ |
1da177e4 | 5 | #include <linux/interrupt.h> |
2d4a7167 IM |
6 | #include <linux/mmiotrace.h> |
7 | #include <linux/bootmem.h> | |
1da177e4 | 8 | #include <linux/compiler.h> |
c61e211d | 9 | #include <linux/highmem.h> |
0f2fbdcb | 10 | #include <linux/kprobes.h> |
ab2bf0c1 | 11 | #include <linux/uaccess.h> |
2d4a7167 IM |
12 | #include <linux/vmalloc.h> |
13 | #include <linux/vt_kern.h> | |
14 | #include <linux/signal.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/string.h> | |
18 | #include <linux/module.h> | |
1eeb66a1 | 19 | #include <linux/kdebug.h> |
2d4a7167 | 20 | #include <linux/errno.h> |
7c9f8861 | 21 | #include <linux/magic.h> |
2d4a7167 IM |
22 | #include <linux/sched.h> |
23 | #include <linux/types.h> | |
24 | #include <linux/init.h> | |
25 | #include <linux/mman.h> | |
26 | #include <linux/tty.h> | |
27 | #include <linux/smp.h> | |
28 | #include <linux/mm.h> | |
29 | ||
30 | #include <asm-generic/sections.h> | |
1da177e4 | 31 | |
1da177e4 | 32 | #include <asm/tlbflush.h> |
2d4a7167 IM |
33 | #include <asm/pgalloc.h> |
34 | #include <asm/segment.h> | |
35 | #include <asm/system.h> | |
1da177e4 | 36 | #include <asm/proto.h> |
70ef5641 | 37 | #include <asm/traps.h> |
2d4a7167 | 38 | #include <asm/desc.h> |
1da177e4 | 39 | |
33cb5243 | 40 | /* |
2d4a7167 IM |
41 | * Page fault error code bits: |
42 | * | |
43 | * bit 0 == 0: no page found 1: protection fault | |
44 | * bit 1 == 0: read access 1: write access | |
45 | * bit 2 == 0: kernel-mode access 1: user-mode access | |
46 | * bit 3 == 1: use of reserved bit detected | |
47 | * bit 4 == 1: fault was an instruction fetch | |
33cb5243 | 48 | */ |
2d4a7167 IM |
49 | enum x86_pf_error_code { |
50 | ||
51 | PF_PROT = 1 << 0, | |
52 | PF_WRITE = 1 << 1, | |
53 | PF_USER = 1 << 2, | |
54 | PF_RSVD = 1 << 3, | |
55 | PF_INSTR = 1 << 4, | |
56 | }; | |
66c58156 | 57 | |
0fd0e3da | 58 | static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr) |
86069782 | 59 | { |
fd3fdf11 | 60 | #ifdef CONFIG_MMIOTRACE |
0fd0e3da PP |
61 | if (unlikely(is_kmmio_active())) |
62 | if (kmmio_handler(regs, addr) == 1) | |
63 | return -1; | |
86069782 | 64 | #endif |
0fd0e3da | 65 | return 0; |
86069782 PP |
66 | } |
67 | ||
74a0b576 | 68 | static inline int notify_page_fault(struct pt_regs *regs) |
1bd858a5 | 69 | { |
33cb5243 | 70 | #ifdef CONFIG_KPROBES |
74a0b576 CH |
71 | int ret = 0; |
72 | ||
73 | /* kprobe_running() needs smp_processor_id() */ | |
f8c2ee22 | 74 | if (!user_mode_vm(regs)) { |
74a0b576 CH |
75 | preempt_disable(); |
76 | if (kprobe_running() && kprobe_fault_handler(regs, 14)) | |
77 | ret = 1; | |
78 | preempt_enable(); | |
79 | } | |
1bd858a5 | 80 | |
74a0b576 | 81 | return ret; |
74a0b576 | 82 | #else |
74a0b576 | 83 | return 0; |
74a0b576 | 84 | #endif |
33cb5243 | 85 | } |
1bd858a5 | 86 | |
1dc85be0 | 87 | /* |
2d4a7167 IM |
88 | * Prefetch quirks: |
89 | * | |
90 | * 32-bit mode: | |
91 | * | |
92 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | |
93 | * Check that here and ignore it. | |
1dc85be0 | 94 | * |
2d4a7167 | 95 | * 64-bit mode: |
1dc85be0 | 96 | * |
2d4a7167 IM |
97 | * Sometimes the CPU reports invalid exceptions on prefetch. |
98 | * Check that here and ignore it. | |
99 | * | |
100 | * Opcode checker based on code by Richard Brunner. | |
1dc85be0 | 101 | */ |
2d4a7167 IM |
102 | static int |
103 | is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr) | |
33cb5243 | 104 | { |
2d4a7167 | 105 | unsigned char *max_instr; |
ab2bf0c1 | 106 | unsigned char *instr; |
1da177e4 | 107 | int scan_more = 1; |
33cb5243 | 108 | int prefetch = 0; |
1da177e4 | 109 | |
3085354d IM |
110 | /* |
111 | * If it was a exec (instruction fetch) fault on NX page, then | |
112 | * do not ignore the fault: | |
113 | */ | |
66c58156 | 114 | if (error_code & PF_INSTR) |
1da177e4 | 115 | return 0; |
1dc85be0 | 116 | |
f2857ce9 | 117 | instr = (unsigned char *)convert_ip_to_linear(current, regs); |
f1290ec9 | 118 | max_instr = instr + 15; |
1da177e4 | 119 | |
76381fee | 120 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) |
1da177e4 LT |
121 | return 0; |
122 | ||
33cb5243 | 123 | while (scan_more && instr < max_instr) { |
1da177e4 LT |
124 | unsigned char instr_hi; |
125 | unsigned char instr_lo; | |
2d4a7167 | 126 | unsigned char opcode; |
1da177e4 | 127 | |
ab2bf0c1 | 128 | if (probe_kernel_address(instr, opcode)) |
33cb5243 | 129 | break; |
1da177e4 | 130 | |
33cb5243 HH |
131 | instr_hi = opcode & 0xf0; |
132 | instr_lo = opcode & 0x0f; | |
1da177e4 LT |
133 | instr++; |
134 | ||
33cb5243 | 135 | switch (instr_hi) { |
1da177e4 LT |
136 | case 0x20: |
137 | case 0x30: | |
33cb5243 HH |
138 | /* |
139 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | |
140 | * In X86_64 long mode, the CPU will signal invalid | |
141 | * opcode if some of these prefixes are present so | |
142 | * X86_64 will never get here anyway | |
143 | */ | |
1da177e4 LT |
144 | scan_more = ((instr_lo & 7) == 0x6); |
145 | break; | |
33cb5243 | 146 | #ifdef CONFIG_X86_64 |
1da177e4 | 147 | case 0x40: |
33cb5243 HH |
148 | /* |
149 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | |
150 | * Need to figure out under what instruction mode the | |
151 | * instruction was issued. Could check the LDT for lm, | |
152 | * but for now it's good enough to assume that long | |
153 | * mode only uses well known segments or kernel. | |
154 | */ | |
76381fee | 155 | scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS); |
1da177e4 | 156 | break; |
33cb5243 | 157 | #endif |
1da177e4 LT |
158 | case 0x60: |
159 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | |
160 | scan_more = (instr_lo & 0xC) == 0x4; | |
33cb5243 | 161 | break; |
1da177e4 | 162 | case 0xF0: |
1dc85be0 | 163 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ |
1da177e4 | 164 | scan_more = !instr_lo || (instr_lo>>1) == 1; |
33cb5243 | 165 | break; |
1da177e4 LT |
166 | case 0x00: |
167 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | |
168 | scan_more = 0; | |
f2857ce9 | 169 | |
ab2bf0c1 | 170 | if (probe_kernel_address(instr, opcode)) |
1da177e4 LT |
171 | break; |
172 | prefetch = (instr_lo == 0xF) && | |
173 | (opcode == 0x0D || opcode == 0x18); | |
33cb5243 | 174 | break; |
1da177e4 LT |
175 | default: |
176 | scan_more = 0; | |
177 | break; | |
33cb5243 | 178 | } |
1da177e4 LT |
179 | } |
180 | return prefetch; | |
181 | } | |
182 | ||
2d4a7167 IM |
183 | static void |
184 | force_sig_info_fault(int si_signo, int si_code, unsigned long address, | |
185 | struct task_struct *tsk) | |
c4aba4a8 HH |
186 | { |
187 | siginfo_t info; | |
188 | ||
2d4a7167 IM |
189 | info.si_signo = si_signo; |
190 | info.si_errno = 0; | |
191 | info.si_code = si_code; | |
192 | info.si_addr = (void __user *)address; | |
193 | ||
c4aba4a8 HH |
194 | force_sig_info(si_signo, &info, tsk); |
195 | } | |
196 | ||
1156e098 | 197 | #ifdef CONFIG_X86_64 |
33cb5243 HH |
198 | static int bad_address(void *p) |
199 | { | |
1da177e4 | 200 | unsigned long dummy; |
2d4a7167 | 201 | |
ab2bf0c1 | 202 | return probe_kernel_address((unsigned long *)p, dummy); |
33cb5243 | 203 | } |
1156e098 | 204 | #endif |
1da177e4 | 205 | |
cae30f82 | 206 | static void dump_pagetable(unsigned long address) |
1da177e4 | 207 | { |
1156e098 HH |
208 | #ifdef CONFIG_X86_32 |
209 | __typeof__(pte_val(__pte(0))) page; | |
210 | ||
211 | page = read_cr3(); | |
212 | page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT]; | |
2d4a7167 | 213 | |
1156e098 HH |
214 | #ifdef CONFIG_X86_PAE |
215 | printk("*pdpt = %016Lx ", page); | |
216 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
217 | && page & _PAGE_PRESENT) { | |
218 | page &= PAGE_MASK; | |
219 | page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT) | |
2d4a7167 | 220 | & (PTRS_PER_PMD - 1)]; |
1156e098 HH |
221 | printk(KERN_CONT "*pde = %016Lx ", page); |
222 | page &= ~_PAGE_NX; | |
223 | } | |
224 | #else | |
225 | printk("*pde = %08lx ", page); | |
226 | #endif | |
227 | ||
228 | /* | |
229 | * We must not directly access the pte in the highpte | |
230 | * case if the page table is located in highmem. | |
231 | * And let's rather not kmap-atomic the pte, just in case | |
2d4a7167 | 232 | * it's allocated already: |
1156e098 HH |
233 | */ |
234 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
235 | && (page & _PAGE_PRESENT) | |
236 | && !(page & _PAGE_PSE)) { | |
2d4a7167 | 237 | |
1156e098 HH |
238 | page &= PAGE_MASK; |
239 | page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT) | |
2d4a7167 | 240 | & (PTRS_PER_PTE - 1)]; |
1156e098 HH |
241 | printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page); |
242 | } | |
243 | ||
244 | printk("\n"); | |
245 | #else /* CONFIG_X86_64 */ | |
1da177e4 LT |
246 | pgd_t *pgd; |
247 | pud_t *pud; | |
248 | pmd_t *pmd; | |
249 | pte_t *pte; | |
250 | ||
f51c9452 | 251 | pgd = (pgd_t *)read_cr3(); |
1da177e4 | 252 | |
33cb5243 | 253 | pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); |
2d4a7167 | 254 | |
1da177e4 | 255 | pgd += pgd_index(address); |
2d4a7167 IM |
256 | if (bad_address(pgd)) |
257 | goto bad; | |
258 | ||
d646bce4 | 259 | printk("PGD %lx ", pgd_val(*pgd)); |
2d4a7167 IM |
260 | |
261 | if (!pgd_present(*pgd)) | |
262 | goto out; | |
1da177e4 | 263 | |
d2ae5b5f | 264 | pud = pud_offset(pgd, address); |
2d4a7167 IM |
265 | if (bad_address(pud)) |
266 | goto bad; | |
267 | ||
1da177e4 | 268 | printk("PUD %lx ", pud_val(*pud)); |
b5360222 | 269 | if (!pud_present(*pud) || pud_large(*pud)) |
2d4a7167 | 270 | goto out; |
1da177e4 LT |
271 | |
272 | pmd = pmd_offset(pud, address); | |
2d4a7167 IM |
273 | if (bad_address(pmd)) |
274 | goto bad; | |
275 | ||
1da177e4 | 276 | printk("PMD %lx ", pmd_val(*pmd)); |
2d4a7167 IM |
277 | if (!pmd_present(*pmd) || pmd_large(*pmd)) |
278 | goto out; | |
1da177e4 LT |
279 | |
280 | pte = pte_offset_kernel(pmd, address); | |
2d4a7167 IM |
281 | if (bad_address(pte)) |
282 | goto bad; | |
283 | ||
33cb5243 | 284 | printk("PTE %lx", pte_val(*pte)); |
2d4a7167 | 285 | out: |
1da177e4 LT |
286 | printk("\n"); |
287 | return; | |
288 | bad: | |
289 | printk("BAD\n"); | |
1156e098 HH |
290 | #endif |
291 | } | |
292 | ||
293 | #ifdef CONFIG_X86_32 | |
294 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |
295 | { | |
296 | unsigned index = pgd_index(address); | |
297 | pgd_t *pgd_k; | |
298 | pud_t *pud, *pud_k; | |
299 | pmd_t *pmd, *pmd_k; | |
300 | ||
301 | pgd += index; | |
302 | pgd_k = init_mm.pgd + index; | |
303 | ||
304 | if (!pgd_present(*pgd_k)) | |
305 | return NULL; | |
306 | ||
307 | /* | |
308 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | |
309 | * and redundant with the set_pmd() on non-PAE. As would | |
310 | * set_pud. | |
311 | */ | |
1156e098 HH |
312 | pud = pud_offset(pgd, address); |
313 | pud_k = pud_offset(pgd_k, address); | |
314 | if (!pud_present(*pud_k)) | |
315 | return NULL; | |
316 | ||
317 | pmd = pmd_offset(pud, address); | |
318 | pmd_k = pmd_offset(pud_k, address); | |
319 | if (!pmd_present(*pmd_k)) | |
320 | return NULL; | |
2d4a7167 | 321 | |
1156e098 HH |
322 | if (!pmd_present(*pmd)) { |
323 | set_pmd(pmd, *pmd_k); | |
324 | arch_flush_lazy_mmu_mode(); | |
2d4a7167 | 325 | } else { |
1156e098 | 326 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); |
2d4a7167 IM |
327 | } |
328 | ||
1156e098 | 329 | return pmd_k; |
1da177e4 | 330 | } |
1156e098 | 331 | #endif |
1da177e4 | 332 | |
1dc85be0 | 333 | #ifdef CONFIG_X86_64 |
33cb5243 | 334 | static const char errata93_warning[] = |
1da177e4 LT |
335 | KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n" |
336 | KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n" | |
337 | KERN_ERR "******* Please consider a BIOS update.\n" | |
338 | KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n"; | |
fdfe8aa8 | 339 | #endif |
1da177e4 | 340 | |
2d4a7167 IM |
341 | /* |
342 | * Workaround for K8 erratum #93 & buggy BIOS. | |
343 | * | |
344 | * BIOS SMM functions are required to use a specific workaround | |
345 | * to avoid corruption of the 64bit RIP register on C stepping K8. | |
346 | * | |
347 | * A lot of BIOS that didn't get tested properly miss this. | |
348 | * | |
349 | * The OS sees this as a page fault with the upper 32bits of RIP cleared. | |
350 | * Try to work around it here. | |
351 | * | |
352 | * Note we only handle faults in kernel here. | |
353 | * Does nothing on 32-bit. | |
fdfe8aa8 | 354 | */ |
33cb5243 | 355 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
1da177e4 | 356 | { |
fdfe8aa8 | 357 | #ifdef CONFIG_X86_64 |
2d4a7167 IM |
358 | static int once; |
359 | ||
65ea5b03 | 360 | if (address != regs->ip) |
1da177e4 | 361 | return 0; |
2d4a7167 | 362 | |
33cb5243 | 363 | if ((address >> 32) != 0) |
1da177e4 | 364 | return 0; |
2d4a7167 | 365 | |
1da177e4 | 366 | address |= 0xffffffffUL << 32; |
33cb5243 HH |
367 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
368 | (address >= MODULES_VADDR && address <= MODULES_END)) { | |
2d4a7167 | 369 | if (!once) { |
33cb5243 | 370 | printk(errata93_warning); |
2d4a7167 | 371 | once = 1; |
1da177e4 | 372 | } |
65ea5b03 | 373 | regs->ip = address; |
1da177e4 LT |
374 | return 1; |
375 | } | |
fdfe8aa8 | 376 | #endif |
1da177e4 | 377 | return 0; |
33cb5243 | 378 | } |
1da177e4 | 379 | |
35f3266f | 380 | /* |
2d4a7167 IM |
381 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps |
382 | * to illegal addresses >4GB. | |
383 | * | |
384 | * We catch this in the page fault handler because these addresses | |
385 | * are not reachable. Just detect this case and return. Any code | |
35f3266f HH |
386 | * segment in LDT is compatibility mode. |
387 | */ | |
388 | static int is_errata100(struct pt_regs *regs, unsigned long address) | |
389 | { | |
390 | #ifdef CONFIG_X86_64 | |
2d4a7167 | 391 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32)) |
35f3266f HH |
392 | return 1; |
393 | #endif | |
394 | return 0; | |
395 | } | |
396 | ||
29caf2f9 HH |
397 | static int is_f00f_bug(struct pt_regs *regs, unsigned long address) |
398 | { | |
399 | #ifdef CONFIG_X86_F00F_BUG | |
400 | unsigned long nr; | |
2d4a7167 | 401 | |
29caf2f9 | 402 | /* |
2d4a7167 | 403 | * Pentium F0 0F C7 C8 bug workaround: |
29caf2f9 HH |
404 | */ |
405 | if (boot_cpu_data.f00f_bug) { | |
406 | nr = (address - idt_descr.address) >> 3; | |
407 | ||
408 | if (nr == 6) { | |
409 | do_invalid_op(regs, 0); | |
410 | return 1; | |
411 | } | |
412 | } | |
413 | #endif | |
414 | return 0; | |
415 | } | |
416 | ||
2d4a7167 IM |
417 | static void |
418 | show_fault_oops(struct pt_regs *regs, unsigned long error_code, | |
419 | unsigned long address) | |
b3279c7f | 420 | { |
1156e098 HH |
421 | #ifdef CONFIG_X86_32 |
422 | if (!oops_may_print()) | |
423 | return; | |
fd40d6e3 | 424 | #endif |
1156e098 HH |
425 | |
426 | #ifdef CONFIG_X86_PAE | |
427 | if (error_code & PF_INSTR) { | |
93809be8 | 428 | unsigned int level; |
2d4a7167 | 429 | |
1156e098 HH |
430 | pte_t *pte = lookup_address(address, &level); |
431 | ||
2d4a7167 | 432 | if (pte && pte_present(*pte) && !pte_exec(*pte)) { |
1156e098 HH |
433 | printk(KERN_CRIT "kernel tried to execute " |
434 | "NX-protected page - exploit attempt? " | |
350b4da7 | 435 | "(uid: %d)\n", current_uid()); |
2d4a7167 | 436 | } |
1156e098 HH |
437 | } |
438 | #endif | |
1156e098 | 439 | |
19f0dda9 | 440 | printk(KERN_ALERT "BUG: unable to handle kernel "); |
b3279c7f | 441 | if (address < PAGE_SIZE) |
19f0dda9 | 442 | printk(KERN_CONT "NULL pointer dereference"); |
b3279c7f | 443 | else |
19f0dda9 | 444 | printk(KERN_CONT "paging request"); |
2d4a7167 | 445 | |
f294a8ce | 446 | printk(KERN_CONT " at %p\n", (void *) address); |
19f0dda9 | 447 | printk(KERN_ALERT "IP:"); |
b3279c7f | 448 | printk_address(regs->ip, 1); |
2d4a7167 | 449 | |
b3279c7f HH |
450 | dump_pagetable(address); |
451 | } | |
452 | ||
1156e098 | 453 | #ifdef CONFIG_X86_64 |
2d4a7167 IM |
454 | static noinline void |
455 | pgtable_bad(struct pt_regs *regs, unsigned long error_code, | |
456 | unsigned long address) | |
1da177e4 | 457 | { |
2d4a7167 IM |
458 | struct task_struct *tsk; |
459 | unsigned long flags; | |
460 | int sig; | |
461 | ||
462 | flags = oops_begin(); | |
463 | tsk = current; | |
464 | sig = SIGKILL; | |
1209140c | 465 | |
1da177e4 | 466 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
92181f19 | 467 | tsk->comm, address); |
1da177e4 | 468 | dump_pagetable(address); |
2d4a7167 IM |
469 | |
470 | tsk->thread.cr2 = address; | |
471 | tsk->thread.trap_no = 14; | |
472 | tsk->thread.error_code = error_code; | |
473 | ||
22f5991c | 474 | if (__die("Bad pagetable", regs, error_code)) |
874d93d1 | 475 | sig = 0; |
2d4a7167 | 476 | |
874d93d1 | 477 | oops_end(flags, regs, sig); |
1da177e4 | 478 | } |
1156e098 | 479 | #endif |
1da177e4 | 480 | |
2d4a7167 IM |
481 | static noinline void |
482 | no_context(struct pt_regs *regs, unsigned long error_code, | |
483 | unsigned long address) | |
92181f19 NP |
484 | { |
485 | struct task_struct *tsk = current; | |
19803078 IM |
486 | unsigned long *stackend; |
487 | ||
92181f19 NP |
488 | #ifdef CONFIG_X86_64 |
489 | unsigned long flags; | |
490 | int sig; | |
491 | #endif | |
492 | ||
2d4a7167 | 493 | /* Are we prepared to handle this kernel fault? */ |
92181f19 NP |
494 | if (fixup_exception(regs)) |
495 | return; | |
496 | ||
497 | /* | |
2d4a7167 IM |
498 | * 32-bit: |
499 | * | |
500 | * Valid to do another page fault here, because if this fault | |
501 | * had been triggered by is_prefetch fixup_exception would have | |
502 | * handled it. | |
503 | * | |
504 | * 64-bit: | |
92181f19 | 505 | * |
2d4a7167 | 506 | * Hall of shame of CPU/BIOS bugs. |
92181f19 NP |
507 | */ |
508 | if (is_prefetch(regs, error_code, address)) | |
509 | return; | |
510 | ||
511 | if (is_errata93(regs, address)) | |
512 | return; | |
513 | ||
514 | /* | |
515 | * Oops. The kernel tried to access some bad page. We'll have to | |
2d4a7167 | 516 | * terminate things with extreme prejudice: |
92181f19 NP |
517 | */ |
518 | #ifdef CONFIG_X86_32 | |
519 | bust_spinlocks(1); | |
520 | #else | |
521 | flags = oops_begin(); | |
522 | #endif | |
523 | ||
524 | show_fault_oops(regs, error_code, address); | |
525 | ||
2d4a7167 | 526 | stackend = end_of_stack(tsk); |
19803078 IM |
527 | if (*stackend != STACK_END_MAGIC) |
528 | printk(KERN_ALERT "Thread overran stack, or stack corrupted\n"); | |
529 | ||
92181f19 NP |
530 | tsk->thread.cr2 = address; |
531 | tsk->thread.trap_no = 14; | |
532 | tsk->thread.error_code = error_code; | |
533 | ||
534 | #ifdef CONFIG_X86_32 | |
535 | die("Oops", regs, error_code); | |
536 | bust_spinlocks(0); | |
537 | do_exit(SIGKILL); | |
538 | #else | |
539 | sig = SIGKILL; | |
540 | if (__die("Oops", regs, error_code)) | |
541 | sig = 0; | |
2d4a7167 | 542 | |
92181f19 NP |
543 | /* Executive summary in case the body of the oops scrolled away */ |
544 | printk(KERN_EMERG "CR2: %016lx\n", address); | |
2d4a7167 | 545 | |
92181f19 NP |
546 | oops_end(flags, regs, sig); |
547 | #endif | |
548 | } | |
549 | ||
2d4a7167 IM |
550 | /* |
551 | * Print out info about fatal segfaults, if the show_unhandled_signals | |
552 | * sysctl is set: | |
553 | */ | |
554 | static inline void | |
555 | show_signal_msg(struct pt_regs *regs, unsigned long error_code, | |
556 | unsigned long address, struct task_struct *tsk) | |
557 | { | |
558 | if (!unhandled_signal(tsk, SIGSEGV)) | |
559 | return; | |
560 | ||
561 | if (!printk_ratelimit()) | |
562 | return; | |
563 | ||
564 | printk(KERN_CONT "%s%s[%d]: segfault at %lx ip %p sp %p error %lx", | |
565 | task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, | |
566 | tsk->comm, task_pid_nr(tsk), address, | |
567 | (void *)regs->ip, (void *)regs->sp, error_code); | |
568 | ||
569 | print_vma_addr(KERN_CONT " in ", regs->ip); | |
570 | ||
571 | printk(KERN_CONT "\n"); | |
572 | } | |
573 | ||
574 | static void | |
575 | __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
576 | unsigned long address, int si_code) | |
92181f19 NP |
577 | { |
578 | struct task_struct *tsk = current; | |
579 | ||
580 | /* User mode accesses just cause a SIGSEGV */ | |
581 | if (error_code & PF_USER) { | |
582 | /* | |
2d4a7167 | 583 | * It's possible to have interrupts off here: |
92181f19 NP |
584 | */ |
585 | local_irq_enable(); | |
586 | ||
587 | /* | |
588 | * Valid to do another page fault here because this one came | |
2d4a7167 | 589 | * from user space: |
92181f19 NP |
590 | */ |
591 | if (is_prefetch(regs, error_code, address)) | |
592 | return; | |
593 | ||
594 | if (is_errata100(regs, address)) | |
595 | return; | |
596 | ||
2d4a7167 IM |
597 | if (unlikely(show_unhandled_signals)) |
598 | show_signal_msg(regs, error_code, address, tsk); | |
599 | ||
600 | /* Kernel addresses are always protection faults: */ | |
601 | tsk->thread.cr2 = address; | |
602 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | |
603 | tsk->thread.trap_no = 14; | |
92181f19 | 604 | |
92181f19 | 605 | force_sig_info_fault(SIGSEGV, si_code, address, tsk); |
2d4a7167 | 606 | |
92181f19 NP |
607 | return; |
608 | } | |
609 | ||
610 | if (is_f00f_bug(regs, address)) | |
611 | return; | |
612 | ||
613 | no_context(regs, error_code, address); | |
614 | } | |
615 | ||
2d4a7167 IM |
616 | static noinline void |
617 | bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code, | |
618 | unsigned long address) | |
92181f19 NP |
619 | { |
620 | __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR); | |
621 | } | |
622 | ||
2d4a7167 IM |
623 | static void |
624 | __bad_area(struct pt_regs *regs, unsigned long error_code, | |
625 | unsigned long address, int si_code) | |
92181f19 NP |
626 | { |
627 | struct mm_struct *mm = current->mm; | |
628 | ||
629 | /* | |
630 | * Something tried to access memory that isn't in our memory map.. | |
631 | * Fix it, but check if it's kernel or user first.. | |
632 | */ | |
633 | up_read(&mm->mmap_sem); | |
634 | ||
635 | __bad_area_nosemaphore(regs, error_code, address, si_code); | |
636 | } | |
637 | ||
2d4a7167 IM |
638 | static noinline void |
639 | bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
640 | { |
641 | __bad_area(regs, error_code, address, SEGV_MAPERR); | |
642 | } | |
643 | ||
2d4a7167 IM |
644 | static noinline void |
645 | bad_area_access_error(struct pt_regs *regs, unsigned long error_code, | |
646 | unsigned long address) | |
92181f19 NP |
647 | { |
648 | __bad_area(regs, error_code, address, SEGV_ACCERR); | |
649 | } | |
650 | ||
651 | /* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */ | |
2d4a7167 IM |
652 | static void |
653 | out_of_memory(struct pt_regs *regs, unsigned long error_code, | |
654 | unsigned long address) | |
92181f19 NP |
655 | { |
656 | /* | |
657 | * We ran out of memory, call the OOM killer, and return the userspace | |
2d4a7167 | 658 | * (which will retry the fault, or kill us if we got oom-killed): |
92181f19 NP |
659 | */ |
660 | up_read(¤t->mm->mmap_sem); | |
2d4a7167 | 661 | |
92181f19 NP |
662 | pagefault_out_of_memory(); |
663 | } | |
664 | ||
2d4a7167 IM |
665 | static void |
666 | do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address) | |
92181f19 NP |
667 | { |
668 | struct task_struct *tsk = current; | |
669 | struct mm_struct *mm = tsk->mm; | |
670 | ||
671 | up_read(&mm->mmap_sem); | |
672 | ||
2d4a7167 | 673 | /* Kernel mode? Handle exceptions or die: */ |
92181f19 NP |
674 | if (!(error_code & PF_USER)) |
675 | no_context(regs, error_code, address); | |
2d4a7167 | 676 | |
92181f19 | 677 | #ifdef CONFIG_X86_32 |
2d4a7167 | 678 | /* User space => ok to do another page fault: */ |
92181f19 NP |
679 | if (is_prefetch(regs, error_code, address)) |
680 | return; | |
681 | #endif | |
2d4a7167 IM |
682 | |
683 | tsk->thread.cr2 = address; | |
684 | tsk->thread.error_code = error_code; | |
685 | tsk->thread.trap_no = 14; | |
686 | ||
92181f19 NP |
687 | force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); |
688 | } | |
689 | ||
2d4a7167 IM |
690 | static noinline void |
691 | mm_fault_error(struct pt_regs *regs, unsigned long error_code, | |
692 | unsigned long address, unsigned int fault) | |
92181f19 | 693 | { |
2d4a7167 | 694 | if (fault & VM_FAULT_OOM) { |
92181f19 | 695 | out_of_memory(regs, error_code, address); |
2d4a7167 IM |
696 | } else { |
697 | if (fault & VM_FAULT_SIGBUS) | |
698 | do_sigbus(regs, error_code, address); | |
699 | else | |
700 | BUG(); | |
701 | } | |
92181f19 NP |
702 | } |
703 | ||
d8b57bb7 TG |
704 | static int spurious_fault_check(unsigned long error_code, pte_t *pte) |
705 | { | |
706 | if ((error_code & PF_WRITE) && !pte_write(*pte)) | |
707 | return 0; | |
2d4a7167 | 708 | |
d8b57bb7 TG |
709 | if ((error_code & PF_INSTR) && !pte_exec(*pte)) |
710 | return 0; | |
711 | ||
712 | return 1; | |
713 | } | |
714 | ||
5b727a3b | 715 | /* |
2d4a7167 IM |
716 | * Handle a spurious fault caused by a stale TLB entry. |
717 | * | |
718 | * This allows us to lazily refresh the TLB when increasing the | |
719 | * permissions of a kernel page (RO -> RW or NX -> X). Doing it | |
720 | * eagerly is very expensive since that implies doing a full | |
721 | * cross-processor TLB flush, even if no stale TLB entries exist | |
722 | * on other processors. | |
723 | * | |
5b727a3b JF |
724 | * There are no security implications to leaving a stale TLB when |
725 | * increasing the permissions on a page. | |
726 | */ | |
2d4a7167 IM |
727 | static noinline int |
728 | spurious_fault(unsigned long error_code, unsigned long address) | |
5b727a3b JF |
729 | { |
730 | pgd_t *pgd; | |
731 | pud_t *pud; | |
732 | pmd_t *pmd; | |
733 | pte_t *pte; | |
3c3e5694 | 734 | int ret; |
5b727a3b JF |
735 | |
736 | /* Reserved-bit violation or user access to kernel space? */ | |
737 | if (error_code & (PF_USER | PF_RSVD)) | |
738 | return 0; | |
739 | ||
740 | pgd = init_mm.pgd + pgd_index(address); | |
741 | if (!pgd_present(*pgd)) | |
742 | return 0; | |
743 | ||
744 | pud = pud_offset(pgd, address); | |
745 | if (!pud_present(*pud)) | |
746 | return 0; | |
747 | ||
d8b57bb7 TG |
748 | if (pud_large(*pud)) |
749 | return spurious_fault_check(error_code, (pte_t *) pud); | |
750 | ||
5b727a3b JF |
751 | pmd = pmd_offset(pud, address); |
752 | if (!pmd_present(*pmd)) | |
753 | return 0; | |
754 | ||
d8b57bb7 TG |
755 | if (pmd_large(*pmd)) |
756 | return spurious_fault_check(error_code, (pte_t *) pmd); | |
757 | ||
5b727a3b JF |
758 | pte = pte_offset_kernel(pmd, address); |
759 | if (!pte_present(*pte)) | |
760 | return 0; | |
761 | ||
3c3e5694 SR |
762 | ret = spurious_fault_check(error_code, pte); |
763 | if (!ret) | |
764 | return 0; | |
765 | ||
766 | /* | |
2d4a7167 IM |
767 | * Make sure we have permissions in PMD. |
768 | * If not, then there's a bug in the page tables: | |
3c3e5694 SR |
769 | */ |
770 | ret = spurious_fault_check(error_code, (pte_t *) pmd); | |
771 | WARN_ONCE(!ret, "PMD has incorrect permission bits\n"); | |
2d4a7167 | 772 | |
3c3e5694 | 773 | return ret; |
5b727a3b JF |
774 | } |
775 | ||
1da177e4 | 776 | /* |
2d4a7167 IM |
777 | * 32-bit: |
778 | * | |
779 | * Handle a fault on the vmalloc or module mapping area | |
f8c2ee22 | 780 | * |
2d4a7167 IM |
781 | * 64-bit: |
782 | * | |
783 | * Handle a fault on the vmalloc area | |
3b9ba4d5 AK |
784 | * |
785 | * This assumes no large pages in there. | |
1da177e4 | 786 | */ |
92181f19 | 787 | static noinline int vmalloc_fault(unsigned long address) |
1da177e4 | 788 | { |
fdfe8aa8 HH |
789 | #ifdef CONFIG_X86_32 |
790 | unsigned long pgd_paddr; | |
791 | pmd_t *pmd_k; | |
792 | pte_t *pte_k; | |
b29c701d | 793 | |
2d4a7167 | 794 | /* Make sure we are in vmalloc area: */ |
b29c701d HN |
795 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) |
796 | return -1; | |
797 | ||
fdfe8aa8 HH |
798 | /* |
799 | * Synchronize this task's top level page-table | |
800 | * with the 'reference' page table. | |
801 | * | |
802 | * Do _not_ use "current" here. We might be inside | |
803 | * an interrupt in the middle of a task switch.. | |
804 | */ | |
805 | pgd_paddr = read_cr3(); | |
806 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | |
807 | if (!pmd_k) | |
808 | return -1; | |
2d4a7167 | 809 | |
fdfe8aa8 HH |
810 | pte_k = pte_offset_kernel(pmd_k, address); |
811 | if (!pte_present(*pte_k)) | |
812 | return -1; | |
2d4a7167 | 813 | |
fdfe8aa8 HH |
814 | return 0; |
815 | #else | |
1da177e4 LT |
816 | pgd_t *pgd, *pgd_ref; |
817 | pud_t *pud, *pud_ref; | |
818 | pmd_t *pmd, *pmd_ref; | |
819 | pte_t *pte, *pte_ref; | |
820 | ||
2d4a7167 | 821 | /* Make sure we are in vmalloc area: */ |
cf89ec92 HH |
822 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) |
823 | return -1; | |
824 | ||
2d4a7167 IM |
825 | /* |
826 | * Copy kernel mappings over when needed. This can also | |
827 | * happen within a race in page table update. In the later | |
828 | * case just flush: | |
829 | */ | |
f313e123 | 830 | pgd = pgd_offset(current->active_mm, address); |
1da177e4 LT |
831 | pgd_ref = pgd_offset_k(address); |
832 | if (pgd_none(*pgd_ref)) | |
833 | return -1; | |
2d4a7167 | 834 | |
1da177e4 LT |
835 | if (pgd_none(*pgd)) |
836 | set_pgd(pgd, *pgd_ref); | |
8c914cb7 | 837 | else |
46a82b2d | 838 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); |
1da177e4 | 839 | |
2d4a7167 IM |
840 | /* |
841 | * Below here mismatches are bugs because these lower tables | |
842 | * are shared: | |
843 | */ | |
1da177e4 LT |
844 | |
845 | pud = pud_offset(pgd, address); | |
846 | pud_ref = pud_offset(pgd_ref, address); | |
847 | if (pud_none(*pud_ref)) | |
848 | return -1; | |
2d4a7167 | 849 | |
46a82b2d | 850 | if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref)) |
1da177e4 | 851 | BUG(); |
2d4a7167 | 852 | |
1da177e4 LT |
853 | pmd = pmd_offset(pud, address); |
854 | pmd_ref = pmd_offset(pud_ref, address); | |
855 | if (pmd_none(*pmd_ref)) | |
856 | return -1; | |
2d4a7167 | 857 | |
1da177e4 LT |
858 | if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref)) |
859 | BUG(); | |
2d4a7167 | 860 | |
1da177e4 LT |
861 | pte_ref = pte_offset_kernel(pmd_ref, address); |
862 | if (!pte_present(*pte_ref)) | |
863 | return -1; | |
2d4a7167 | 864 | |
1da177e4 | 865 | pte = pte_offset_kernel(pmd, address); |
2d4a7167 IM |
866 | |
867 | /* | |
868 | * Don't use pte_page here, because the mappings can point | |
869 | * outside mem_map, and the NUMA hash lookup cannot handle | |
870 | * that: | |
871 | */ | |
3b9ba4d5 | 872 | if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref)) |
1da177e4 | 873 | BUG(); |
2d4a7167 | 874 | |
1da177e4 | 875 | return 0; |
fdfe8aa8 | 876 | #endif |
1da177e4 LT |
877 | } |
878 | ||
abd4f750 | 879 | int show_unhandled_signals = 1; |
1da177e4 | 880 | |
2d4a7167 IM |
881 | static inline int |
882 | access_error(unsigned long error_code, int write, struct vm_area_struct *vma) | |
92181f19 NP |
883 | { |
884 | if (write) { | |
2d4a7167 | 885 | /* write, present and write, not present: */ |
92181f19 NP |
886 | if (unlikely(!(vma->vm_flags & VM_WRITE))) |
887 | return 1; | |
2d4a7167 | 888 | return 0; |
92181f19 NP |
889 | } |
890 | ||
2d4a7167 IM |
891 | /* read, present: */ |
892 | if (unlikely(error_code & PF_PROT)) | |
893 | return 1; | |
894 | ||
895 | /* read, not present: */ | |
896 | if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE)))) | |
897 | return 1; | |
898 | ||
92181f19 NP |
899 | return 0; |
900 | } | |
901 | ||
0973a06c HS |
902 | static int fault_in_kernel_space(unsigned long address) |
903 | { | |
904 | #ifdef CONFIG_X86_32 | |
905 | return address >= TASK_SIZE; | |
2d4a7167 | 906 | #else |
0973a06c | 907 | return address >= TASK_SIZE64; |
2d4a7167 | 908 | #endif |
0973a06c HS |
909 | } |
910 | ||
1da177e4 LT |
911 | /* |
912 | * This routine handles page faults. It determines the address, | |
913 | * and the problem, and then passes it off to one of the appropriate | |
914 | * routines. | |
1da177e4 | 915 | */ |
f8c2ee22 HH |
916 | #ifdef CONFIG_X86_64 |
917 | asmlinkage | |
918 | #endif | |
919 | void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code) | |
1da177e4 | 920 | { |
2d4a7167 | 921 | struct vm_area_struct *vma; |
1da177e4 | 922 | struct task_struct *tsk; |
2d4a7167 | 923 | unsigned long address; |
1da177e4 | 924 | struct mm_struct *mm; |
92181f19 | 925 | int write; |
f8c2ee22 | 926 | int fault; |
1da177e4 | 927 | |
a9ba9a3b AV |
928 | tsk = current; |
929 | mm = tsk->mm; | |
2d4a7167 | 930 | |
a9ba9a3b AV |
931 | prefetchw(&mm->mmap_sem); |
932 | ||
2d4a7167 | 933 | /* Get the faulting address: */ |
f51c9452 | 934 | address = read_cr2(); |
1da177e4 | 935 | |
0fd0e3da | 936 | if (unlikely(kmmio_fault(regs, address))) |
86069782 | 937 | return; |
1da177e4 LT |
938 | |
939 | /* | |
940 | * We fault-in kernel-space virtual memory on-demand. The | |
941 | * 'reference' page table is init_mm.pgd. | |
942 | * | |
943 | * NOTE! We MUST NOT take any locks for this case. We may | |
944 | * be in an interrupt or a critical region, and should | |
945 | * only copy the information from the master page table, | |
946 | * nothing more. | |
947 | * | |
948 | * This verifies that the fault happens in kernel space | |
949 | * (error_code & 4) == 0, and that the fault was not a | |
8b1bde93 | 950 | * protection error (error_code & 9) == 0. |
1da177e4 | 951 | */ |
0973a06c | 952 | if (unlikely(fault_in_kernel_space(address))) { |
f8c2ee22 HH |
953 | if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) && |
954 | vmalloc_fault(address) >= 0) | |
955 | return; | |
5b727a3b | 956 | |
2d4a7167 | 957 | /* Can handle a stale RO->RW TLB: */ |
92181f19 | 958 | if (spurious_fault(error_code, address)) |
5b727a3b JF |
959 | return; |
960 | ||
2d4a7167 | 961 | /* kprobes don't want to hook the spurious faults: */ |
9be260a6 MH |
962 | if (notify_page_fault(regs)) |
963 | return; | |
f8c2ee22 HH |
964 | /* |
965 | * Don't take the mm semaphore here. If we fixup a prefetch | |
2d4a7167 | 966 | * fault we could otherwise deadlock: |
f8c2ee22 | 967 | */ |
92181f19 | 968 | bad_area_nosemaphore(regs, error_code, address); |
2d4a7167 | 969 | |
92181f19 | 970 | return; |
f8c2ee22 HH |
971 | } |
972 | ||
2d4a7167 | 973 | /* kprobes don't want to hook the spurious faults: */ |
f8a6b2b9 | 974 | if (unlikely(notify_page_fault(regs))) |
9be260a6 | 975 | return; |
f8c2ee22 | 976 | /* |
891cffbd LT |
977 | * It's safe to allow irq's after cr2 has been saved and the |
978 | * vmalloc fault has been handled. | |
979 | * | |
980 | * User-mode registers count as a user access even for any | |
2d4a7167 | 981 | * potential system fault or CPU buglet: |
f8c2ee22 | 982 | */ |
891cffbd LT |
983 | if (user_mode_vm(regs)) { |
984 | local_irq_enable(); | |
985 | error_code |= PF_USER; | |
2d4a7167 IM |
986 | } else { |
987 | if (regs->flags & X86_EFLAGS_IF) | |
988 | local_irq_enable(); | |
989 | } | |
8c914cb7 | 990 | |
891cffbd | 991 | #ifdef CONFIG_X86_64 |
66c58156 | 992 | if (unlikely(error_code & PF_RSVD)) |
92181f19 | 993 | pgtable_bad(regs, error_code, address); |
891cffbd | 994 | #endif |
1da177e4 LT |
995 | |
996 | /* | |
2d4a7167 IM |
997 | * If we're in an interrupt, have no user context or are running |
998 | * in an atomic region then we must not take the fault: | |
1da177e4 | 999 | */ |
92181f19 NP |
1000 | if (unlikely(in_atomic() || !mm)) { |
1001 | bad_area_nosemaphore(regs, error_code, address); | |
1002 | return; | |
1003 | } | |
1da177e4 | 1004 | |
3a1dfe6e IM |
1005 | /* |
1006 | * When running in the kernel we expect faults to occur only to | |
2d4a7167 IM |
1007 | * addresses in user space. All other faults represent errors in |
1008 | * the kernel and should generate an OOPS. Unfortunately, in the | |
1009 | * case of an erroneous fault occurring in a code path which already | |
1010 | * holds mmap_sem we will deadlock attempting to validate the fault | |
1011 | * against the address space. Luckily the kernel only validly | |
1012 | * references user space from well defined areas of code, which are | |
1013 | * listed in the exceptions table. | |
1da177e4 LT |
1014 | * |
1015 | * As the vast majority of faults will be valid we will only perform | |
2d4a7167 IM |
1016 | * the source reference check when there is a possibility of a |
1017 | * deadlock. Attempt to lock the address space, if we cannot we then | |
1018 | * validate the source. If this is invalid we can skip the address | |
1019 | * space check, thus avoiding the deadlock: | |
1da177e4 | 1020 | */ |
92181f19 | 1021 | if (unlikely(!down_read_trylock(&mm->mmap_sem))) { |
66c58156 | 1022 | if ((error_code & PF_USER) == 0 && |
92181f19 NP |
1023 | !search_exception_tables(regs->ip)) { |
1024 | bad_area_nosemaphore(regs, error_code, address); | |
1025 | return; | |
1026 | } | |
1da177e4 | 1027 | down_read(&mm->mmap_sem); |
01006074 PZ |
1028 | } else { |
1029 | /* | |
2d4a7167 IM |
1030 | * The above down_read_trylock() might have succeeded in |
1031 | * which case we'll have missed the might_sleep() from | |
1032 | * down_read(): | |
01006074 PZ |
1033 | */ |
1034 | might_sleep(); | |
1da177e4 LT |
1035 | } |
1036 | ||
1037 | vma = find_vma(mm, address); | |
92181f19 NP |
1038 | if (unlikely(!vma)) { |
1039 | bad_area(regs, error_code, address); | |
1040 | return; | |
1041 | } | |
1042 | if (likely(vma->vm_start <= address)) | |
1da177e4 | 1043 | goto good_area; |
92181f19 NP |
1044 | if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) { |
1045 | bad_area(regs, error_code, address); | |
1046 | return; | |
1047 | } | |
33cb5243 | 1048 | if (error_code & PF_USER) { |
6f4d368e HH |
1049 | /* |
1050 | * Accessing the stack below %sp is always a bug. | |
1051 | * The large cushion allows instructions like enter | |
2d4a7167 | 1052 | * and pusha to work. ("enter $65535, $31" pushes |
6f4d368e | 1053 | * 32 pointers and then decrements %sp by 65535.) |
03fdc2c2 | 1054 | */ |
92181f19 NP |
1055 | if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) { |
1056 | bad_area(regs, error_code, address); | |
1057 | return; | |
1058 | } | |
1da177e4 | 1059 | } |
92181f19 NP |
1060 | if (unlikely(expand_stack(vma, address))) { |
1061 | bad_area(regs, error_code, address); | |
1062 | return; | |
1063 | } | |
1064 | ||
1065 | /* | |
1066 | * Ok, we have a good vm_area for this memory access, so | |
1067 | * we can handle it.. | |
1068 | */ | |
1da177e4 | 1069 | good_area: |
92181f19 | 1070 | write = error_code & PF_WRITE; |
2d4a7167 | 1071 | |
92181f19 NP |
1072 | if (unlikely(access_error(error_code, write, vma))) { |
1073 | bad_area_access_error(regs, error_code, address); | |
1074 | return; | |
1da177e4 LT |
1075 | } |
1076 | ||
1077 | /* | |
1078 | * If for any reason at all we couldn't handle the fault, | |
1079 | * make sure we exit gracefully rather than endlessly redo | |
2d4a7167 | 1080 | * the fault: |
1da177e4 | 1081 | */ |
83c54070 | 1082 | fault = handle_mm_fault(mm, vma, address, write); |
2d4a7167 | 1083 | |
83c54070 | 1084 | if (unlikely(fault & VM_FAULT_ERROR)) { |
92181f19 NP |
1085 | mm_fault_error(regs, error_code, address, fault); |
1086 | return; | |
1da177e4 | 1087 | } |
2d4a7167 | 1088 | |
83c54070 NP |
1089 | if (fault & VM_FAULT_MAJOR) |
1090 | tsk->maj_flt++; | |
1091 | else | |
1092 | tsk->min_flt++; | |
d729ab35 HH |
1093 | |
1094 | #ifdef CONFIG_X86_32 | |
1095 | /* | |
1096 | * Did it hit the DOS screen memory VA from vm86 mode? | |
1097 | */ | |
1098 | if (v8086_mode(regs)) { | |
1099 | unsigned long bit = (address - 0xA0000) >> PAGE_SHIFT; | |
1100 | if (bit < 32) | |
1101 | tsk->thread.screen_bitmap |= 1 << bit; | |
1102 | } | |
1103 | #endif | |
1da177e4 | 1104 | up_read(&mm->mmap_sem); |
1da177e4 | 1105 | } |
9e43e1b7 | 1106 | |
8c914cb7 | 1107 | DEFINE_SPINLOCK(pgd_lock); |
2bff7383 | 1108 | LIST_HEAD(pgd_list); |
8c914cb7 JB |
1109 | |
1110 | void vmalloc_sync_all(void) | |
1111 | { | |
1156e098 HH |
1112 | unsigned long address; |
1113 | ||
cc643d46 | 1114 | #ifdef CONFIG_X86_32 |
1156e098 HH |
1115 | if (SHARED_KERNEL_PMD) |
1116 | return; | |
1117 | ||
cc643d46 JB |
1118 | for (address = VMALLOC_START & PMD_MASK; |
1119 | address >= TASK_SIZE && address < FIXADDR_TOP; | |
1120 | address += PMD_SIZE) { | |
2d4a7167 | 1121 | |
67350a5c JF |
1122 | unsigned long flags; |
1123 | struct page *page; | |
1124 | ||
1125 | spin_lock_irqsave(&pgd_lock, flags); | |
1126 | list_for_each_entry(page, &pgd_list, lru) { | |
2d4a7167 | 1127 | if (!vmalloc_sync_one(page_address(page), address)) |
67350a5c | 1128 | break; |
1156e098 | 1129 | } |
67350a5c | 1130 | spin_unlock_irqrestore(&pgd_lock, flags); |
1156e098 HH |
1131 | } |
1132 | #else /* CONFIG_X86_64 */ | |
cc643d46 JB |
1133 | for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END; |
1134 | address += PGDIR_SIZE) { | |
2d4a7167 | 1135 | |
67350a5c JF |
1136 | const pgd_t *pgd_ref = pgd_offset_k(address); |
1137 | unsigned long flags; | |
1138 | struct page *page; | |
1139 | ||
1140 | if (pgd_none(*pgd_ref)) | |
1141 | continue; | |
2d4a7167 | 1142 | |
67350a5c JF |
1143 | spin_lock_irqsave(&pgd_lock, flags); |
1144 | list_for_each_entry(page, &pgd_list, lru) { | |
1145 | pgd_t *pgd; | |
1146 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | |
1147 | if (pgd_none(*pgd)) | |
1148 | set_pgd(pgd, *pgd_ref); | |
1149 | else | |
1150 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); | |
8c914cb7 | 1151 | } |
67350a5c | 1152 | spin_unlock_irqrestore(&pgd_lock, flags); |
8c914cb7 | 1153 | } |
1156e098 | 1154 | #endif |
8c914cb7 | 1155 | } |