Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1995 Linus Torvalds |
3 | * Copyright (C) 2001,2002 Andi Kleen, SuSE Labs. | |
4 | */ | |
5 | ||
1da177e4 LT |
6 | #include <linux/signal.h> |
7 | #include <linux/sched.h> | |
8 | #include <linux/kernel.h> | |
9 | #include <linux/errno.h> | |
10 | #include <linux/string.h> | |
11 | #include <linux/types.h> | |
12 | #include <linux/ptrace.h> | |
13 | #include <linux/mman.h> | |
14 | #include <linux/mm.h> | |
15 | #include <linux/smp.h> | |
1da177e4 LT |
16 | #include <linux/interrupt.h> |
17 | #include <linux/init.h> | |
18 | #include <linux/tty.h> | |
19 | #include <linux/vt_kern.h> /* For unblank_screen() */ | |
20 | #include <linux/compiler.h> | |
c61e211d HH |
21 | #include <linux/highmem.h> |
22 | #include <linux/bootmem.h> /* for max_low_pfn */ | |
1eeb66a1 | 23 | #include <linux/vmalloc.h> |
1da177e4 | 24 | #include <linux/module.h> |
0f2fbdcb | 25 | #include <linux/kprobes.h> |
ab2bf0c1 | 26 | #include <linux/uaccess.h> |
1eeb66a1 | 27 | #include <linux/kdebug.h> |
1da177e4 LT |
28 | |
29 | #include <asm/system.h> | |
c61e211d HH |
30 | #include <asm/desc.h> |
31 | #include <asm/segment.h> | |
1da177e4 LT |
32 | #include <asm/pgalloc.h> |
33 | #include <asm/smp.h> | |
34 | #include <asm/tlbflush.h> | |
35 | #include <asm/proto.h> | |
1da177e4 | 36 | #include <asm-generic/sections.h> |
1da177e4 | 37 | |
33cb5243 HH |
38 | /* |
39 | * Page fault error code bits | |
40 | * bit 0 == 0 means no page found, 1 means protection fault | |
41 | * bit 1 == 0 means read, 1 means write | |
42 | * bit 2 == 0 means kernel, 1 means user-mode | |
43 | * bit 3 == 1 means use of reserved bit detected | |
44 | * bit 4 == 1 means fault was an instruction fetch | |
45 | */ | |
8a19da7b | 46 | #define PF_PROT (1<<0) |
66c58156 | 47 | #define PF_WRITE (1<<1) |
8a19da7b IM |
48 | #define PF_USER (1<<2) |
49 | #define PF_RSVD (1<<3) | |
66c58156 AK |
50 | #define PF_INSTR (1<<4) |
51 | ||
74a0b576 | 52 | static inline int notify_page_fault(struct pt_regs *regs) |
1bd858a5 | 53 | { |
33cb5243 | 54 | #ifdef CONFIG_KPROBES |
74a0b576 CH |
55 | int ret = 0; |
56 | ||
57 | /* kprobe_running() needs smp_processor_id() */ | |
f8c2ee22 HH |
58 | #ifdef CONFIG_X86_32 |
59 | if (!user_mode_vm(regs)) { | |
60 | #else | |
74a0b576 | 61 | if (!user_mode(regs)) { |
f8c2ee22 | 62 | #endif |
74a0b576 CH |
63 | preempt_disable(); |
64 | if (kprobe_running() && kprobe_fault_handler(regs, 14)) | |
65 | ret = 1; | |
66 | preempt_enable(); | |
67 | } | |
1bd858a5 | 68 | |
74a0b576 | 69 | return ret; |
74a0b576 | 70 | #else |
74a0b576 | 71 | return 0; |
74a0b576 | 72 | #endif |
33cb5243 | 73 | } |
1bd858a5 | 74 | |
1dc85be0 HH |
75 | /* |
76 | * X86_32 | |
77 | * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch. | |
78 | * Check that here and ignore it. | |
79 | * | |
80 | * X86_64 | |
81 | * Sometimes the CPU reports invalid exceptions on prefetch. | |
82 | * Check that here and ignore it. | |
83 | * | |
84 | * Opcode checker based on code by Richard Brunner | |
85 | */ | |
86 | static int is_prefetch(struct pt_regs *regs, unsigned long addr, | |
87 | unsigned long error_code) | |
33cb5243 | 88 | { |
ab2bf0c1 | 89 | unsigned char *instr; |
1da177e4 | 90 | int scan_more = 1; |
33cb5243 | 91 | int prefetch = 0; |
f1290ec9 | 92 | unsigned char *max_instr; |
1da177e4 | 93 | |
1dc85be0 | 94 | #ifdef CONFIG_X86_32 |
b406ac61 | 95 | if (!(__supported_pte_mask & _PAGE_NX)) |
1dc85be0 | 96 | return 0; |
b406ac61 HH |
97 | #endif |
98 | ||
c61e211d | 99 | /* If it was a exec fault on NX page, ignore */ |
66c58156 | 100 | if (error_code & PF_INSTR) |
1da177e4 | 101 | return 0; |
1dc85be0 | 102 | |
f2857ce9 | 103 | instr = (unsigned char *)convert_ip_to_linear(current, regs); |
f1290ec9 | 104 | max_instr = instr + 15; |
1da177e4 | 105 | |
76381fee | 106 | if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE) |
1da177e4 LT |
107 | return 0; |
108 | ||
33cb5243 | 109 | while (scan_more && instr < max_instr) { |
1da177e4 LT |
110 | unsigned char opcode; |
111 | unsigned char instr_hi; | |
112 | unsigned char instr_lo; | |
113 | ||
ab2bf0c1 | 114 | if (probe_kernel_address(instr, opcode)) |
33cb5243 | 115 | break; |
1da177e4 | 116 | |
33cb5243 HH |
117 | instr_hi = opcode & 0xf0; |
118 | instr_lo = opcode & 0x0f; | |
1da177e4 LT |
119 | instr++; |
120 | ||
33cb5243 | 121 | switch (instr_hi) { |
1da177e4 LT |
122 | case 0x20: |
123 | case 0x30: | |
33cb5243 HH |
124 | /* |
125 | * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes. | |
126 | * In X86_64 long mode, the CPU will signal invalid | |
127 | * opcode if some of these prefixes are present so | |
128 | * X86_64 will never get here anyway | |
129 | */ | |
1da177e4 LT |
130 | scan_more = ((instr_lo & 7) == 0x6); |
131 | break; | |
33cb5243 | 132 | #ifdef CONFIG_X86_64 |
1da177e4 | 133 | case 0x40: |
33cb5243 HH |
134 | /* |
135 | * In AMD64 long mode 0x40..0x4F are valid REX prefixes | |
136 | * Need to figure out under what instruction mode the | |
137 | * instruction was issued. Could check the LDT for lm, | |
138 | * but for now it's good enough to assume that long | |
139 | * mode only uses well known segments or kernel. | |
140 | */ | |
76381fee | 141 | scan_more = (!user_mode(regs)) || (regs->cs == __USER_CS); |
1da177e4 | 142 | break; |
33cb5243 | 143 | #endif |
1da177e4 LT |
144 | case 0x60: |
145 | /* 0x64 thru 0x67 are valid prefixes in all modes. */ | |
146 | scan_more = (instr_lo & 0xC) == 0x4; | |
33cb5243 | 147 | break; |
1da177e4 | 148 | case 0xF0: |
1dc85be0 | 149 | /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */ |
1da177e4 | 150 | scan_more = !instr_lo || (instr_lo>>1) == 1; |
33cb5243 | 151 | break; |
1da177e4 LT |
152 | case 0x00: |
153 | /* Prefetch instruction is 0x0F0D or 0x0F18 */ | |
154 | scan_more = 0; | |
f2857ce9 | 155 | |
ab2bf0c1 | 156 | if (probe_kernel_address(instr, opcode)) |
1da177e4 LT |
157 | break; |
158 | prefetch = (instr_lo == 0xF) && | |
159 | (opcode == 0x0D || opcode == 0x18); | |
33cb5243 | 160 | break; |
1da177e4 LT |
161 | default: |
162 | scan_more = 0; | |
163 | break; | |
33cb5243 | 164 | } |
1da177e4 LT |
165 | } |
166 | return prefetch; | |
167 | } | |
168 | ||
c4aba4a8 HH |
169 | static void force_sig_info_fault(int si_signo, int si_code, |
170 | unsigned long address, struct task_struct *tsk) | |
171 | { | |
172 | siginfo_t info; | |
173 | ||
174 | info.si_signo = si_signo; | |
175 | info.si_errno = 0; | |
176 | info.si_code = si_code; | |
177 | info.si_addr = (void __user *)address; | |
178 | force_sig_info(si_signo, &info, tsk); | |
179 | } | |
180 | ||
1156e098 | 181 | #ifdef CONFIG_X86_64 |
33cb5243 HH |
182 | static int bad_address(void *p) |
183 | { | |
1da177e4 | 184 | unsigned long dummy; |
ab2bf0c1 | 185 | return probe_kernel_address((unsigned long *)p, dummy); |
33cb5243 | 186 | } |
1156e098 | 187 | #endif |
1da177e4 LT |
188 | |
189 | void dump_pagetable(unsigned long address) | |
190 | { | |
1156e098 HH |
191 | #ifdef CONFIG_X86_32 |
192 | __typeof__(pte_val(__pte(0))) page; | |
193 | ||
194 | page = read_cr3(); | |
195 | page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT]; | |
196 | #ifdef CONFIG_X86_PAE | |
197 | printk("*pdpt = %016Lx ", page); | |
198 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
199 | && page & _PAGE_PRESENT) { | |
200 | page &= PAGE_MASK; | |
201 | page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT) | |
202 | & (PTRS_PER_PMD - 1)]; | |
203 | printk(KERN_CONT "*pde = %016Lx ", page); | |
204 | page &= ~_PAGE_NX; | |
205 | } | |
206 | #else | |
207 | printk("*pde = %08lx ", page); | |
208 | #endif | |
209 | ||
210 | /* | |
211 | * We must not directly access the pte in the highpte | |
212 | * case if the page table is located in highmem. | |
213 | * And let's rather not kmap-atomic the pte, just in case | |
214 | * it's allocated already. | |
215 | */ | |
216 | if ((page >> PAGE_SHIFT) < max_low_pfn | |
217 | && (page & _PAGE_PRESENT) | |
218 | && !(page & _PAGE_PSE)) { | |
219 | page &= PAGE_MASK; | |
220 | page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT) | |
221 | & (PTRS_PER_PTE - 1)]; | |
222 | printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page); | |
223 | } | |
224 | ||
225 | printk("\n"); | |
226 | #else /* CONFIG_X86_64 */ | |
1da177e4 LT |
227 | pgd_t *pgd; |
228 | pud_t *pud; | |
229 | pmd_t *pmd; | |
230 | pte_t *pte; | |
231 | ||
f51c9452 | 232 | pgd = (pgd_t *)read_cr3(); |
1da177e4 | 233 | |
33cb5243 | 234 | pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK); |
1da177e4 | 235 | pgd += pgd_index(address); |
1da177e4 | 236 | if (bad_address(pgd)) goto bad; |
d646bce4 | 237 | printk("PGD %lx ", pgd_val(*pgd)); |
33cb5243 | 238 | if (!pgd_present(*pgd)) goto ret; |
1da177e4 | 239 | |
d2ae5b5f | 240 | pud = pud_offset(pgd, address); |
1da177e4 LT |
241 | if (bad_address(pud)) goto bad; |
242 | printk("PUD %lx ", pud_val(*pud)); | |
b5360222 AK |
243 | if (!pud_present(*pud) || pud_large(*pud)) |
244 | goto ret; | |
1da177e4 LT |
245 | |
246 | pmd = pmd_offset(pud, address); | |
247 | if (bad_address(pmd)) goto bad; | |
248 | printk("PMD %lx ", pmd_val(*pmd)); | |
b1992df3 | 249 | if (!pmd_present(*pmd) || pmd_large(*pmd)) goto ret; |
1da177e4 LT |
250 | |
251 | pte = pte_offset_kernel(pmd, address); | |
252 | if (bad_address(pte)) goto bad; | |
33cb5243 | 253 | printk("PTE %lx", pte_val(*pte)); |
1da177e4 LT |
254 | ret: |
255 | printk("\n"); | |
256 | return; | |
257 | bad: | |
258 | printk("BAD\n"); | |
1156e098 HH |
259 | #endif |
260 | } | |
261 | ||
262 | #ifdef CONFIG_X86_32 | |
263 | static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) | |
264 | { | |
265 | unsigned index = pgd_index(address); | |
266 | pgd_t *pgd_k; | |
267 | pud_t *pud, *pud_k; | |
268 | pmd_t *pmd, *pmd_k; | |
269 | ||
270 | pgd += index; | |
271 | pgd_k = init_mm.pgd + index; | |
272 | ||
273 | if (!pgd_present(*pgd_k)) | |
274 | return NULL; | |
275 | ||
276 | /* | |
277 | * set_pgd(pgd, *pgd_k); here would be useless on PAE | |
278 | * and redundant with the set_pmd() on non-PAE. As would | |
279 | * set_pud. | |
280 | */ | |
281 | ||
282 | pud = pud_offset(pgd, address); | |
283 | pud_k = pud_offset(pgd_k, address); | |
284 | if (!pud_present(*pud_k)) | |
285 | return NULL; | |
286 | ||
287 | pmd = pmd_offset(pud, address); | |
288 | pmd_k = pmd_offset(pud_k, address); | |
289 | if (!pmd_present(*pmd_k)) | |
290 | return NULL; | |
291 | if (!pmd_present(*pmd)) { | |
292 | set_pmd(pmd, *pmd_k); | |
293 | arch_flush_lazy_mmu_mode(); | |
294 | } else | |
295 | BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | |
296 | return pmd_k; | |
1da177e4 | 297 | } |
1156e098 | 298 | #endif |
1da177e4 | 299 | |
1dc85be0 | 300 | #ifdef CONFIG_X86_64 |
33cb5243 | 301 | static const char errata93_warning[] = |
1da177e4 LT |
302 | KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n" |
303 | KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n" | |
304 | KERN_ERR "******* Please consider a BIOS update.\n" | |
305 | KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n"; | |
fdfe8aa8 | 306 | #endif |
1da177e4 LT |
307 | |
308 | /* Workaround for K8 erratum #93 & buggy BIOS. | |
309 | BIOS SMM functions are required to use a specific workaround | |
33cb5243 HH |
310 | to avoid corruption of the 64bit RIP register on C stepping K8. |
311 | A lot of BIOS that didn't get tested properly miss this. | |
1da177e4 LT |
312 | The OS sees this as a page fault with the upper 32bits of RIP cleared. |
313 | Try to work around it here. | |
fdfe8aa8 HH |
314 | Note we only handle faults in kernel here. |
315 | Does nothing for X86_32 | |
316 | */ | |
33cb5243 | 317 | static int is_errata93(struct pt_regs *regs, unsigned long address) |
1da177e4 | 318 | { |
fdfe8aa8 | 319 | #ifdef CONFIG_X86_64 |
1da177e4 | 320 | static int warned; |
65ea5b03 | 321 | if (address != regs->ip) |
1da177e4 | 322 | return 0; |
33cb5243 | 323 | if ((address >> 32) != 0) |
1da177e4 LT |
324 | return 0; |
325 | address |= 0xffffffffUL << 32; | |
33cb5243 HH |
326 | if ((address >= (u64)_stext && address <= (u64)_etext) || |
327 | (address >= MODULES_VADDR && address <= MODULES_END)) { | |
1da177e4 | 328 | if (!warned) { |
33cb5243 | 329 | printk(errata93_warning); |
1da177e4 LT |
330 | warned = 1; |
331 | } | |
65ea5b03 | 332 | regs->ip = address; |
1da177e4 LT |
333 | return 1; |
334 | } | |
fdfe8aa8 | 335 | #endif |
1da177e4 | 336 | return 0; |
33cb5243 | 337 | } |
1da177e4 | 338 | |
35f3266f HH |
339 | /* |
340 | * Work around K8 erratum #100 K8 in compat mode occasionally jumps to illegal | |
341 | * addresses >4GB. We catch this in the page fault handler because these | |
342 | * addresses are not reachable. Just detect this case and return. Any code | |
343 | * segment in LDT is compatibility mode. | |
344 | */ | |
345 | static int is_errata100(struct pt_regs *regs, unsigned long address) | |
346 | { | |
347 | #ifdef CONFIG_X86_64 | |
348 | if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && | |
349 | (address >> 32)) | |
350 | return 1; | |
351 | #endif | |
352 | return 0; | |
353 | } | |
354 | ||
29caf2f9 HH |
355 | void do_invalid_op(struct pt_regs *, unsigned long); |
356 | ||
357 | static int is_f00f_bug(struct pt_regs *regs, unsigned long address) | |
358 | { | |
359 | #ifdef CONFIG_X86_F00F_BUG | |
360 | unsigned long nr; | |
361 | /* | |
362 | * Pentium F0 0F C7 C8 bug workaround. | |
363 | */ | |
364 | if (boot_cpu_data.f00f_bug) { | |
365 | nr = (address - idt_descr.address) >> 3; | |
366 | ||
367 | if (nr == 6) { | |
368 | do_invalid_op(regs, 0); | |
369 | return 1; | |
370 | } | |
371 | } | |
372 | #endif | |
373 | return 0; | |
374 | } | |
375 | ||
b3279c7f HH |
376 | static void show_fault_oops(struct pt_regs *regs, unsigned long error_code, |
377 | unsigned long address) | |
378 | { | |
1156e098 HH |
379 | #ifdef CONFIG_X86_32 |
380 | if (!oops_may_print()) | |
381 | return; | |
fd40d6e3 | 382 | #endif |
1156e098 HH |
383 | |
384 | #ifdef CONFIG_X86_PAE | |
385 | if (error_code & PF_INSTR) { | |
93809be8 | 386 | unsigned int level; |
1156e098 HH |
387 | pte_t *pte = lookup_address(address, &level); |
388 | ||
389 | if (pte && pte_present(*pte) && !pte_exec(*pte)) | |
390 | printk(KERN_CRIT "kernel tried to execute " | |
391 | "NX-protected page - exploit attempt? " | |
392 | "(uid: %d)\n", current->uid); | |
393 | } | |
394 | #endif | |
1156e098 | 395 | |
19f0dda9 | 396 | printk(KERN_ALERT "BUG: unable to handle kernel "); |
b3279c7f | 397 | if (address < PAGE_SIZE) |
19f0dda9 | 398 | printk(KERN_CONT "NULL pointer dereference"); |
b3279c7f | 399 | else |
19f0dda9 | 400 | printk(KERN_CONT "paging request"); |
fd40d6e3 HH |
401 | #ifdef CONFIG_X86_32 |
402 | printk(KERN_CONT " at %08lx\n", address); | |
403 | #else | |
19f0dda9 | 404 | printk(KERN_CONT " at %016lx\n", address); |
fd40d6e3 | 405 | #endif |
19f0dda9 | 406 | printk(KERN_ALERT "IP:"); |
b3279c7f HH |
407 | printk_address(regs->ip, 1); |
408 | dump_pagetable(address); | |
409 | } | |
410 | ||
1156e098 | 411 | #ifdef CONFIG_X86_64 |
1da177e4 LT |
412 | static noinline void pgtable_bad(unsigned long address, struct pt_regs *regs, |
413 | unsigned long error_code) | |
414 | { | |
1209140c | 415 | unsigned long flags = oops_begin(); |
6e3f3617 | 416 | struct task_struct *tsk; |
1209140c | 417 | |
1da177e4 LT |
418 | printk(KERN_ALERT "%s: Corrupted page table at address %lx\n", |
419 | current->comm, address); | |
420 | dump_pagetable(address); | |
6e3f3617 JB |
421 | tsk = current; |
422 | tsk->thread.cr2 = address; | |
423 | tsk->thread.trap_no = 14; | |
424 | tsk->thread.error_code = error_code; | |
22f5991c JB |
425 | if (__die("Bad pagetable", regs, error_code)) |
426 | regs = NULL; | |
427 | oops_end(flags, regs, SIGKILL); | |
1da177e4 | 428 | } |
1156e098 | 429 | #endif |
1da177e4 | 430 | |
5b727a3b JF |
431 | /* |
432 | * Handle a spurious fault caused by a stale TLB entry. This allows | |
433 | * us to lazily refresh the TLB when increasing the permissions of a | |
434 | * kernel page (RO -> RW or NX -> X). Doing it eagerly is very | |
435 | * expensive since that implies doing a full cross-processor TLB | |
436 | * flush, even if no stale TLB entries exist on other processors. | |
437 | * There are no security implications to leaving a stale TLB when | |
438 | * increasing the permissions on a page. | |
439 | */ | |
440 | static int spurious_fault(unsigned long address, | |
441 | unsigned long error_code) | |
442 | { | |
443 | pgd_t *pgd; | |
444 | pud_t *pud; | |
445 | pmd_t *pmd; | |
446 | pte_t *pte; | |
447 | ||
448 | /* Reserved-bit violation or user access to kernel space? */ | |
449 | if (error_code & (PF_USER | PF_RSVD)) | |
450 | return 0; | |
451 | ||
452 | pgd = init_mm.pgd + pgd_index(address); | |
453 | if (!pgd_present(*pgd)) | |
454 | return 0; | |
455 | ||
456 | pud = pud_offset(pgd, address); | |
457 | if (!pud_present(*pud)) | |
458 | return 0; | |
459 | ||
460 | pmd = pmd_offset(pud, address); | |
461 | if (!pmd_present(*pmd)) | |
462 | return 0; | |
463 | ||
464 | pte = pte_offset_kernel(pmd, address); | |
465 | if (!pte_present(*pte)) | |
466 | return 0; | |
467 | ||
468 | if ((error_code & PF_WRITE) && !pte_write(*pte)) | |
469 | return 0; | |
470 | if ((error_code & PF_INSTR) && !pte_exec(*pte)) | |
471 | return 0; | |
472 | ||
473 | return 1; | |
474 | } | |
475 | ||
1da177e4 | 476 | /* |
f8c2ee22 HH |
477 | * X86_32 |
478 | * Handle a fault on the vmalloc or module mapping area | |
479 | * | |
480 | * X86_64 | |
f95190b2 | 481 | * Handle a fault on the vmalloc area |
3b9ba4d5 AK |
482 | * |
483 | * This assumes no large pages in there. | |
1da177e4 LT |
484 | */ |
485 | static int vmalloc_fault(unsigned long address) | |
486 | { | |
fdfe8aa8 HH |
487 | #ifdef CONFIG_X86_32 |
488 | unsigned long pgd_paddr; | |
489 | pmd_t *pmd_k; | |
490 | pte_t *pte_k; | |
491 | /* | |
492 | * Synchronize this task's top level page-table | |
493 | * with the 'reference' page table. | |
494 | * | |
495 | * Do _not_ use "current" here. We might be inside | |
496 | * an interrupt in the middle of a task switch.. | |
497 | */ | |
498 | pgd_paddr = read_cr3(); | |
499 | pmd_k = vmalloc_sync_one(__va(pgd_paddr), address); | |
500 | if (!pmd_k) | |
501 | return -1; | |
502 | pte_k = pte_offset_kernel(pmd_k, address); | |
503 | if (!pte_present(*pte_k)) | |
504 | return -1; | |
505 | return 0; | |
506 | #else | |
1da177e4 LT |
507 | pgd_t *pgd, *pgd_ref; |
508 | pud_t *pud, *pud_ref; | |
509 | pmd_t *pmd, *pmd_ref; | |
510 | pte_t *pte, *pte_ref; | |
511 | ||
cf89ec92 HH |
512 | /* Make sure we are in vmalloc area */ |
513 | if (!(address >= VMALLOC_START && address < VMALLOC_END)) | |
514 | return -1; | |
515 | ||
1da177e4 LT |
516 | /* Copy kernel mappings over when needed. This can also |
517 | happen within a race in page table update. In the later | |
518 | case just flush. */ | |
519 | ||
520 | pgd = pgd_offset(current->mm ?: &init_mm, address); | |
521 | pgd_ref = pgd_offset_k(address); | |
522 | if (pgd_none(*pgd_ref)) | |
523 | return -1; | |
524 | if (pgd_none(*pgd)) | |
525 | set_pgd(pgd, *pgd_ref); | |
8c914cb7 | 526 | else |
46a82b2d | 527 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); |
1da177e4 LT |
528 | |
529 | /* Below here mismatches are bugs because these lower tables | |
530 | are shared */ | |
531 | ||
532 | pud = pud_offset(pgd, address); | |
533 | pud_ref = pud_offset(pgd_ref, address); | |
534 | if (pud_none(*pud_ref)) | |
535 | return -1; | |
46a82b2d | 536 | if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref)) |
1da177e4 LT |
537 | BUG(); |
538 | pmd = pmd_offset(pud, address); | |
539 | pmd_ref = pmd_offset(pud_ref, address); | |
540 | if (pmd_none(*pmd_ref)) | |
541 | return -1; | |
542 | if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref)) | |
543 | BUG(); | |
544 | pte_ref = pte_offset_kernel(pmd_ref, address); | |
545 | if (!pte_present(*pte_ref)) | |
546 | return -1; | |
547 | pte = pte_offset_kernel(pmd, address); | |
3b9ba4d5 AK |
548 | /* Don't use pte_page here, because the mappings can point |
549 | outside mem_map, and the NUMA hash lookup cannot handle | |
550 | that. */ | |
551 | if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref)) | |
1da177e4 | 552 | BUG(); |
1da177e4 | 553 | return 0; |
fdfe8aa8 | 554 | #endif |
1da177e4 LT |
555 | } |
556 | ||
abd4f750 | 557 | int show_unhandled_signals = 1; |
1da177e4 LT |
558 | |
559 | /* | |
560 | * This routine handles page faults. It determines the address, | |
561 | * and the problem, and then passes it off to one of the appropriate | |
562 | * routines. | |
1da177e4 | 563 | */ |
f8c2ee22 HH |
564 | #ifdef CONFIG_X86_64 |
565 | asmlinkage | |
566 | #endif | |
567 | void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code) | |
1da177e4 LT |
568 | { |
569 | struct task_struct *tsk; | |
570 | struct mm_struct *mm; | |
33cb5243 | 571 | struct vm_area_struct *vma; |
1da177e4 | 572 | unsigned long address; |
f8c2ee22 HH |
573 | int write, si_code; |
574 | int fault; | |
575 | #ifdef CONFIG_X86_64 | |
1209140c | 576 | unsigned long flags; |
f8c2ee22 | 577 | #endif |
1da177e4 | 578 | |
143a5d32 PZ |
579 | /* |
580 | * We can fault from pretty much anywhere, with unknown IRQ state. | |
581 | */ | |
582 | trace_hardirqs_fixup(); | |
583 | ||
a9ba9a3b AV |
584 | tsk = current; |
585 | mm = tsk->mm; | |
586 | prefetchw(&mm->mmap_sem); | |
587 | ||
1da177e4 | 588 | /* get the address */ |
f51c9452 | 589 | address = read_cr2(); |
1da177e4 | 590 | |
c4aba4a8 | 591 | si_code = SEGV_MAPERR; |
1da177e4 | 592 | |
608566b4 HH |
593 | if (notify_page_fault(regs)) |
594 | return; | |
1da177e4 LT |
595 | |
596 | /* | |
597 | * We fault-in kernel-space virtual memory on-demand. The | |
598 | * 'reference' page table is init_mm.pgd. | |
599 | * | |
600 | * NOTE! We MUST NOT take any locks for this case. We may | |
601 | * be in an interrupt or a critical region, and should | |
602 | * only copy the information from the master page table, | |
603 | * nothing more. | |
604 | * | |
605 | * This verifies that the fault happens in kernel space | |
606 | * (error_code & 4) == 0, and that the fault was not a | |
8b1bde93 | 607 | * protection error (error_code & 9) == 0. |
1da177e4 | 608 | */ |
f8c2ee22 HH |
609 | #ifdef CONFIG_X86_32 |
610 | if (unlikely(address >= TASK_SIZE)) { | |
cf89ec92 HH |
611 | #else |
612 | if (unlikely(address >= TASK_SIZE64)) { | |
613 | #endif | |
f8c2ee22 HH |
614 | if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) && |
615 | vmalloc_fault(address) >= 0) | |
616 | return; | |
5b727a3b JF |
617 | |
618 | /* Can handle a stale RO->RW TLB */ | |
619 | if (spurious_fault(address, error_code)) | |
620 | return; | |
621 | ||
f8c2ee22 HH |
622 | /* |
623 | * Don't take the mm semaphore here. If we fixup a prefetch | |
624 | * fault we could otherwise deadlock. | |
625 | */ | |
626 | goto bad_area_nosemaphore; | |
627 | } | |
628 | ||
cf89ec92 HH |
629 | |
630 | #ifdef CONFIG_X86_32 | |
f8c2ee22 HH |
631 | /* It's safe to allow irq's after cr2 has been saved and the vmalloc |
632 | fault has been handled. */ | |
633 | if (regs->flags & (X86_EFLAGS_IF|VM_MASK)) | |
634 | local_irq_enable(); | |
635 | ||
636 | /* | |
637 | * If we're in an interrupt, have no user context or are running in an | |
638 | * atomic region then we must not take the fault. | |
639 | */ | |
640 | if (in_atomic() || !mm) | |
641 | goto bad_area_nosemaphore; | |
642 | #else /* CONFIG_X86_64 */ | |
65ea5b03 | 643 | if (likely(regs->flags & X86_EFLAGS_IF)) |
8c914cb7 JB |
644 | local_irq_enable(); |
645 | ||
66c58156 | 646 | if (unlikely(error_code & PF_RSVD)) |
1da177e4 LT |
647 | pgtable_bad(address, regs, error_code); |
648 | ||
649 | /* | |
33cb5243 HH |
650 | * If we're in an interrupt, have no user context or are running in an |
651 | * atomic region then we must not take the fault. | |
1da177e4 LT |
652 | */ |
653 | if (unlikely(in_atomic() || !mm)) | |
654 | goto bad_area_nosemaphore; | |
655 | ||
dbe3ed1c LT |
656 | /* |
657 | * User-mode registers count as a user access even for any | |
658 | * potential system fault or CPU buglet. | |
659 | */ | |
660 | if (user_mode_vm(regs)) | |
661 | error_code |= PF_USER; | |
f8c2ee22 HH |
662 | again: |
663 | #endif | |
1da177e4 LT |
664 | /* When running in the kernel we expect faults to occur only to |
665 | * addresses in user space. All other faults represent errors in the | |
676b1855 | 666 | * kernel and should generate an OOPS. Unfortunately, in the case of an |
80f7228b | 667 | * erroneous fault occurring in a code path which already holds mmap_sem |
1da177e4 LT |
668 | * we will deadlock attempting to validate the fault against the |
669 | * address space. Luckily the kernel only validly references user | |
670 | * space from well defined areas of code, which are listed in the | |
671 | * exceptions table. | |
672 | * | |
673 | * As the vast majority of faults will be valid we will only perform | |
676b1855 | 674 | * the source reference check when there is a possibility of a deadlock. |
1da177e4 LT |
675 | * Attempt to lock the address space, if we cannot we then validate the |
676 | * source. If this is invalid we can skip the address space check, | |
677 | * thus avoiding the deadlock. | |
678 | */ | |
679 | if (!down_read_trylock(&mm->mmap_sem)) { | |
66c58156 | 680 | if ((error_code & PF_USER) == 0 && |
65ea5b03 | 681 | !search_exception_tables(regs->ip)) |
1da177e4 LT |
682 | goto bad_area_nosemaphore; |
683 | down_read(&mm->mmap_sem); | |
684 | } | |
685 | ||
686 | vma = find_vma(mm, address); | |
687 | if (!vma) | |
688 | goto bad_area; | |
f8c2ee22 | 689 | if (vma->vm_start <= address) |
1da177e4 LT |
690 | goto good_area; |
691 | if (!(vma->vm_flags & VM_GROWSDOWN)) | |
692 | goto bad_area; | |
33cb5243 | 693 | if (error_code & PF_USER) { |
6f4d368e HH |
694 | /* |
695 | * Accessing the stack below %sp is always a bug. | |
696 | * The large cushion allows instructions like enter | |
697 | * and pusha to work. ("enter $65535,$31" pushes | |
698 | * 32 pointers and then decrements %sp by 65535.) | |
03fdc2c2 | 699 | */ |
65ea5b03 | 700 | if (address + 65536 + 32 * sizeof(unsigned long) < regs->sp) |
1da177e4 LT |
701 | goto bad_area; |
702 | } | |
703 | if (expand_stack(vma, address)) | |
704 | goto bad_area; | |
705 | /* | |
706 | * Ok, we have a good vm_area for this memory access, so | |
707 | * we can handle it.. | |
708 | */ | |
709 | good_area: | |
c4aba4a8 | 710 | si_code = SEGV_ACCERR; |
1da177e4 | 711 | write = 0; |
66c58156 | 712 | switch (error_code & (PF_PROT|PF_WRITE)) { |
33cb5243 HH |
713 | default: /* 3: write, present */ |
714 | /* fall through */ | |
715 | case PF_WRITE: /* write, not present */ | |
716 | if (!(vma->vm_flags & VM_WRITE)) | |
717 | goto bad_area; | |
718 | write++; | |
719 | break; | |
720 | case PF_PROT: /* read, present */ | |
721 | goto bad_area; | |
722 | case 0: /* read, not present */ | |
723 | if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) | |
1da177e4 | 724 | goto bad_area; |
1da177e4 LT |
725 | } |
726 | ||
f8c2ee22 HH |
727 | #ifdef CONFIG_X86_32 |
728 | survive: | |
729 | #endif | |
1da177e4 LT |
730 | /* |
731 | * If for any reason at all we couldn't handle the fault, | |
732 | * make sure we exit gracefully rather than endlessly redo | |
733 | * the fault. | |
734 | */ | |
83c54070 NP |
735 | fault = handle_mm_fault(mm, vma, address, write); |
736 | if (unlikely(fault & VM_FAULT_ERROR)) { | |
737 | if (fault & VM_FAULT_OOM) | |
738 | goto out_of_memory; | |
739 | else if (fault & VM_FAULT_SIGBUS) | |
740 | goto do_sigbus; | |
741 | BUG(); | |
1da177e4 | 742 | } |
83c54070 NP |
743 | if (fault & VM_FAULT_MAJOR) |
744 | tsk->maj_flt++; | |
745 | else | |
746 | tsk->min_flt++; | |
d729ab35 HH |
747 | |
748 | #ifdef CONFIG_X86_32 | |
749 | /* | |
750 | * Did it hit the DOS screen memory VA from vm86 mode? | |
751 | */ | |
752 | if (v8086_mode(regs)) { | |
753 | unsigned long bit = (address - 0xA0000) >> PAGE_SHIFT; | |
754 | if (bit < 32) | |
755 | tsk->thread.screen_bitmap |= 1 << bit; | |
756 | } | |
757 | #endif | |
1da177e4 LT |
758 | up_read(&mm->mmap_sem); |
759 | return; | |
760 | ||
761 | /* | |
762 | * Something tried to access memory that isn't in our memory map.. | |
763 | * Fix it, but check if it's kernel or user first.. | |
764 | */ | |
765 | bad_area: | |
766 | up_read(&mm->mmap_sem); | |
767 | ||
768 | bad_area_nosemaphore: | |
1da177e4 | 769 | /* User mode accesses just cause a SIGSEGV */ |
66c58156 | 770 | if (error_code & PF_USER) { |
e5e3c84b SR |
771 | /* |
772 | * It's possible to have interrupts off here. | |
773 | */ | |
774 | local_irq_enable(); | |
775 | ||
1156e098 HH |
776 | /* |
777 | * Valid to do another page fault here because this one came | |
778 | * from user space. | |
779 | */ | |
1da177e4 LT |
780 | if (is_prefetch(regs, address, error_code)) |
781 | return; | |
782 | ||
35f3266f | 783 | if (is_errata100(regs, address)) |
1da177e4 LT |
784 | return; |
785 | ||
abd4f750 MAS |
786 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
787 | printk_ratelimit()) { | |
1da177e4 | 788 | printk( |
6f4d368e | 789 | #ifdef CONFIG_X86_32 |
edcd8119 | 790 | "%s%s[%d]: segfault at %lx ip %08lx sp %08lx error %lx", |
6f4d368e | 791 | #else |
03252919 | 792 | "%s%s[%d]: segfault at %lx ip %lx sp %lx error %lx", |
6f4d368e HH |
793 | #endif |
794 | task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG, | |
795 | tsk->comm, task_pid_nr(tsk), address, regs->ip, | |
796 | regs->sp, error_code); | |
03252919 AK |
797 | print_vma_addr(" in ", regs->ip); |
798 | printk("\n"); | |
1da177e4 | 799 | } |
33cb5243 | 800 | |
1da177e4 LT |
801 | tsk->thread.cr2 = address; |
802 | /* Kernel addresses are always protection faults */ | |
803 | tsk->thread.error_code = error_code | (address >= TASK_SIZE); | |
804 | tsk->thread.trap_no = 14; | |
c4aba4a8 | 805 | force_sig_info_fault(SIGSEGV, si_code, address, tsk); |
1da177e4 LT |
806 | return; |
807 | } | |
808 | ||
29caf2f9 HH |
809 | if (is_f00f_bug(regs, address)) |
810 | return; | |
811 | ||
1da177e4 | 812 | no_context: |
1da177e4 | 813 | /* Are we prepared to handle this kernel fault? */ |
33cb5243 | 814 | if (fixup_exception(regs)) |
1da177e4 | 815 | return; |
1da177e4 | 816 | |
33cb5243 | 817 | /* |
f8c2ee22 HH |
818 | * X86_32 |
819 | * Valid to do another page fault here, because if this fault | |
820 | * had been triggered by is_prefetch fixup_exception would have | |
821 | * handled it. | |
822 | * | |
823 | * X86_64 | |
1da177e4 LT |
824 | * Hall of shame of CPU/BIOS bugs. |
825 | */ | |
33cb5243 HH |
826 | if (is_prefetch(regs, address, error_code)) |
827 | return; | |
1da177e4 LT |
828 | |
829 | if (is_errata93(regs, address)) | |
33cb5243 | 830 | return; |
1da177e4 LT |
831 | |
832 | /* | |
833 | * Oops. The kernel tried to access some bad page. We'll have to | |
834 | * terminate things with extreme prejudice. | |
835 | */ | |
f8c2ee22 HH |
836 | #ifdef CONFIG_X86_32 |
837 | bust_spinlocks(1); | |
fd40d6e3 HH |
838 | #else |
839 | flags = oops_begin(); | |
840 | #endif | |
f8c2ee22 HH |
841 | |
842 | show_fault_oops(regs, error_code, address); | |
1da177e4 | 843 | |
f8c2ee22 HH |
844 | tsk->thread.cr2 = address; |
845 | tsk->thread.trap_no = 14; | |
846 | tsk->thread.error_code = error_code; | |
fd40d6e3 HH |
847 | |
848 | #ifdef CONFIG_X86_32 | |
f8c2ee22 HH |
849 | die("Oops", regs, error_code); |
850 | bust_spinlocks(0); | |
851 | do_exit(SIGKILL); | |
fd40d6e3 | 852 | #else |
22f5991c JB |
853 | if (__die("Oops", regs, error_code)) |
854 | regs = NULL; | |
1da177e4 LT |
855 | /* Executive summary in case the body of the oops scrolled away */ |
856 | printk(KERN_EMERG "CR2: %016lx\n", address); | |
22f5991c | 857 | oops_end(flags, regs, SIGKILL); |
f8c2ee22 | 858 | #endif |
1da177e4 LT |
859 | |
860 | /* | |
861 | * We ran out of memory, or some other thing happened to us that made | |
862 | * us unable to handle the page fault gracefully. | |
863 | */ | |
864 | out_of_memory: | |
865 | up_read(&mm->mmap_sem); | |
f8c2ee22 HH |
866 | if (is_global_init(tsk)) { |
867 | yield(); | |
fd40d6e3 | 868 | #ifdef CONFIG_X86_32 |
f8c2ee22 HH |
869 | down_read(&mm->mmap_sem); |
870 | goto survive; | |
f8c2ee22 | 871 | #else |
1da177e4 | 872 | goto again; |
f8c2ee22 | 873 | #endif |
fd40d6e3 HH |
874 | } |
875 | ||
1da177e4 | 876 | printk("VM: killing process %s\n", tsk->comm); |
318aa296 | 877 | if (error_code & PF_USER) |
021daae2 | 878 | do_group_exit(SIGKILL); |
1da177e4 LT |
879 | goto no_context; |
880 | ||
881 | do_sigbus: | |
882 | up_read(&mm->mmap_sem); | |
883 | ||
884 | /* Kernel mode? Handle exceptions or die */ | |
66c58156 | 885 | if (!(error_code & PF_USER)) |
1da177e4 | 886 | goto no_context; |
f8c2ee22 HH |
887 | #ifdef CONFIG_X86_32 |
888 | /* User space => ok to do another page fault */ | |
889 | if (is_prefetch(regs, address, error_code)) | |
890 | return; | |
891 | #endif | |
1da177e4 LT |
892 | tsk->thread.cr2 = address; |
893 | tsk->thread.error_code = error_code; | |
894 | tsk->thread.trap_no = 14; | |
c4aba4a8 | 895 | force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk); |
1da177e4 | 896 | } |
9e43e1b7 | 897 | |
8c914cb7 | 898 | DEFINE_SPINLOCK(pgd_lock); |
2bff7383 | 899 | LIST_HEAD(pgd_list); |
8c914cb7 JB |
900 | |
901 | void vmalloc_sync_all(void) | |
902 | { | |
1156e098 HH |
903 | #ifdef CONFIG_X86_32 |
904 | /* | |
905 | * Note that races in the updates of insync and start aren't | |
906 | * problematic: insync can only get set bits added, and updates to | |
907 | * start are only improving performance (without affecting correctness | |
908 | * if undone). | |
909 | */ | |
910 | static DECLARE_BITMAP(insync, PTRS_PER_PGD); | |
911 | static unsigned long start = TASK_SIZE; | |
912 | unsigned long address; | |
913 | ||
914 | if (SHARED_KERNEL_PMD) | |
915 | return; | |
916 | ||
917 | BUILD_BUG_ON(TASK_SIZE & ~PGDIR_MASK); | |
918 | for (address = start; address >= TASK_SIZE; address += PGDIR_SIZE) { | |
919 | if (!test_bit(pgd_index(address), insync)) { | |
920 | unsigned long flags; | |
921 | struct page *page; | |
922 | ||
923 | spin_lock_irqsave(&pgd_lock, flags); | |
e3ed910d | 924 | list_for_each_entry(page, &pgd_list, lru) { |
1156e098 | 925 | if (!vmalloc_sync_one(page_address(page), |
e3ed910d | 926 | address)) |
1156e098 | 927 | break; |
e3ed910d | 928 | } |
1156e098 HH |
929 | spin_unlock_irqrestore(&pgd_lock, flags); |
930 | if (!page) | |
931 | set_bit(pgd_index(address), insync); | |
932 | } | |
933 | if (address == start && test_bit(pgd_index(address), insync)) | |
934 | start = address + PGDIR_SIZE; | |
935 | } | |
936 | #else /* CONFIG_X86_64 */ | |
6f4d368e HH |
937 | /* |
938 | * Note that races in the updates of insync and start aren't | |
939 | * problematic: insync can only get set bits added, and updates to | |
940 | * start are only improving performance (without affecting correctness | |
941 | * if undone). | |
942 | */ | |
8c914cb7 JB |
943 | static DECLARE_BITMAP(insync, PTRS_PER_PGD); |
944 | static unsigned long start = VMALLOC_START & PGDIR_MASK; | |
945 | unsigned long address; | |
946 | ||
947 | for (address = start; address <= VMALLOC_END; address += PGDIR_SIZE) { | |
948 | if (!test_bit(pgd_index(address), insync)) { | |
949 | const pgd_t *pgd_ref = pgd_offset_k(address); | |
950 | struct page *page; | |
951 | ||
952 | if (pgd_none(*pgd_ref)) | |
953 | continue; | |
954 | spin_lock(&pgd_lock); | |
2bff7383 | 955 | list_for_each_entry(page, &pgd_list, lru) { |
8c914cb7 JB |
956 | pgd_t *pgd; |
957 | pgd = (pgd_t *)page_address(page) + pgd_index(address); | |
958 | if (pgd_none(*pgd)) | |
959 | set_pgd(pgd, *pgd_ref); | |
960 | else | |
46a82b2d | 961 | BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref)); |
8c914cb7 JB |
962 | } |
963 | spin_unlock(&pgd_lock); | |
964 | set_bit(pgd_index(address), insync); | |
965 | } | |
966 | if (address == start) | |
967 | start = address + PGDIR_SIZE; | |
968 | } | |
969 | /* Check that there is no need to do the same for the modules area. */ | |
970 | BUILD_BUG_ON(!(MODULES_VADDR > __START_KERNEL)); | |
33cb5243 | 971 | BUILD_BUG_ON(!(((MODULES_END - 1) & PGDIR_MASK) == |
8c914cb7 | 972 | (__START_KERNEL & PGDIR_MASK))); |
1156e098 | 973 | #endif |
8c914cb7 | 974 | } |