x86, mm: fault.c, reorder functions
[deliverable/linux.git] / arch / x86 / mm / fault.c
CommitLineData
1da177e4 1/*
1da177e4 2 * Copyright (C) 1995 Linus Torvalds
2d4a7167 3 * Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs.
1da177e4 4 */
1da177e4 5#include <linux/interrupt.h>
2d4a7167
IM
6#include <linux/mmiotrace.h>
7#include <linux/bootmem.h>
1da177e4 8#include <linux/compiler.h>
c61e211d 9#include <linux/highmem.h>
0f2fbdcb 10#include <linux/kprobes.h>
ab2bf0c1 11#include <linux/uaccess.h>
2d4a7167
IM
12#include <linux/vmalloc.h>
13#include <linux/vt_kern.h>
14#include <linux/signal.h>
15#include <linux/kernel.h>
16#include <linux/ptrace.h>
17#include <linux/string.h>
18#include <linux/module.h>
1eeb66a1 19#include <linux/kdebug.h>
2d4a7167 20#include <linux/errno.h>
7c9f8861 21#include <linux/magic.h>
2d4a7167
IM
22#include <linux/sched.h>
23#include <linux/types.h>
24#include <linux/init.h>
25#include <linux/mman.h>
26#include <linux/tty.h>
27#include <linux/smp.h>
28#include <linux/mm.h>
29
30#include <asm-generic/sections.h>
1da177e4 31
1da177e4 32#include <asm/tlbflush.h>
2d4a7167
IM
33#include <asm/pgalloc.h>
34#include <asm/segment.h>
35#include <asm/system.h>
1da177e4 36#include <asm/proto.h>
70ef5641 37#include <asm/traps.h>
2d4a7167 38#include <asm/desc.h>
1da177e4 39
33cb5243 40/*
2d4a7167
IM
41 * Page fault error code bits:
42 *
43 * bit 0 == 0: no page found 1: protection fault
44 * bit 1 == 0: read access 1: write access
45 * bit 2 == 0: kernel-mode access 1: user-mode access
46 * bit 3 == 1: use of reserved bit detected
47 * bit 4 == 1: fault was an instruction fetch
33cb5243 48 */
2d4a7167
IM
49enum x86_pf_error_code {
50
51 PF_PROT = 1 << 0,
52 PF_WRITE = 1 << 1,
53 PF_USER = 1 << 2,
54 PF_RSVD = 1 << 3,
55 PF_INSTR = 1 << 4,
56};
66c58156 57
b814d41f
IM
58/*
59 * (returns 0 if mmiotrace is disabled)
60 */
0fd0e3da 61static inline int kmmio_fault(struct pt_regs *regs, unsigned long addr)
86069782 62{
0fd0e3da
PP
63 if (unlikely(is_kmmio_active()))
64 if (kmmio_handler(regs, addr) == 1)
65 return -1;
0fd0e3da 66 return 0;
86069782
PP
67}
68
74a0b576 69static inline int notify_page_fault(struct pt_regs *regs)
1bd858a5 70{
74a0b576
CH
71 int ret = 0;
72
73 /* kprobe_running() needs smp_processor_id() */
b1801812 74 if (kprobes_built_in() && !user_mode_vm(regs)) {
74a0b576
CH
75 preempt_disable();
76 if (kprobe_running() && kprobe_fault_handler(regs, 14))
77 ret = 1;
78 preempt_enable();
79 }
1bd858a5 80
74a0b576 81 return ret;
33cb5243 82}
1bd858a5 83
1dc85be0 84/*
2d4a7167
IM
85 * Prefetch quirks:
86 *
87 * 32-bit mode:
88 *
89 * Sometimes AMD Athlon/Opteron CPUs report invalid exceptions on prefetch.
90 * Check that here and ignore it.
1dc85be0 91 *
2d4a7167 92 * 64-bit mode:
1dc85be0 93 *
2d4a7167
IM
94 * Sometimes the CPU reports invalid exceptions on prefetch.
95 * Check that here and ignore it.
96 *
97 * Opcode checker based on code by Richard Brunner.
1dc85be0 98 */
107a0367
IM
99static inline int
100check_prefetch_opcode(struct pt_regs *regs, unsigned char *instr,
101 unsigned char opcode, int *prefetch)
102{
103 unsigned char instr_hi = opcode & 0xf0;
104 unsigned char instr_lo = opcode & 0x0f;
105
106 switch (instr_hi) {
107 case 0x20:
108 case 0x30:
109 /*
110 * Values 0x26,0x2E,0x36,0x3E are valid x86 prefixes.
111 * In X86_64 long mode, the CPU will signal invalid
112 * opcode if some of these prefixes are present so
113 * X86_64 will never get here anyway
114 */
115 return ((instr_lo & 7) == 0x6);
116#ifdef CONFIG_X86_64
117 case 0x40:
118 /*
119 * In AMD64 long mode 0x40..0x4F are valid REX prefixes
120 * Need to figure out under what instruction mode the
121 * instruction was issued. Could check the LDT for lm,
122 * but for now it's good enough to assume that long
123 * mode only uses well known segments or kernel.
124 */
125 return (!user_mode(regs)) || (regs->cs == __USER_CS);
126#endif
127 case 0x60:
128 /* 0x64 thru 0x67 are valid prefixes in all modes. */
129 return (instr_lo & 0xC) == 0x4;
130 case 0xF0:
131 /* 0xF0, 0xF2, 0xF3 are valid prefixes in all modes. */
132 return !instr_lo || (instr_lo>>1) == 1;
133 case 0x00:
134 /* Prefetch instruction is 0x0F0D or 0x0F18 */
135 if (probe_kernel_address(instr, opcode))
136 return 0;
137
138 *prefetch = (instr_lo == 0xF) &&
139 (opcode == 0x0D || opcode == 0x18);
140 return 0;
141 default:
142 return 0;
143 }
144}
145
2d4a7167
IM
146static int
147is_prefetch(struct pt_regs *regs, unsigned long error_code, unsigned long addr)
33cb5243 148{
2d4a7167 149 unsigned char *max_instr;
ab2bf0c1 150 unsigned char *instr;
33cb5243 151 int prefetch = 0;
1da177e4 152
3085354d
IM
153 /*
154 * If it was a exec (instruction fetch) fault on NX page, then
155 * do not ignore the fault:
156 */
66c58156 157 if (error_code & PF_INSTR)
1da177e4 158 return 0;
1dc85be0 159
107a0367 160 instr = (void *)convert_ip_to_linear(current, regs);
f1290ec9 161 max_instr = instr + 15;
1da177e4 162
76381fee 163 if (user_mode(regs) && instr >= (unsigned char *)TASK_SIZE)
1da177e4
LT
164 return 0;
165
107a0367 166 while (instr < max_instr) {
2d4a7167 167 unsigned char opcode;
1da177e4 168
ab2bf0c1 169 if (probe_kernel_address(instr, opcode))
33cb5243 170 break;
1da177e4 171
1da177e4
LT
172 instr++;
173
107a0367 174 if (!check_prefetch_opcode(regs, instr, opcode, &prefetch))
1da177e4 175 break;
1da177e4
LT
176 }
177 return prefetch;
178}
179
2d4a7167
IM
180static void
181force_sig_info_fault(int si_signo, int si_code, unsigned long address,
182 struct task_struct *tsk)
c4aba4a8
HH
183{
184 siginfo_t info;
185
2d4a7167
IM
186 info.si_signo = si_signo;
187 info.si_errno = 0;
188 info.si_code = si_code;
189 info.si_addr = (void __user *)address;
190
c4aba4a8
HH
191 force_sig_info(si_signo, &info, tsk);
192}
193
f2f13a85
IM
194DEFINE_SPINLOCK(pgd_lock);
195LIST_HEAD(pgd_list);
196
197#ifdef CONFIG_X86_32
198static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
33cb5243 199{
f2f13a85
IM
200 unsigned index = pgd_index(address);
201 pgd_t *pgd_k;
202 pud_t *pud, *pud_k;
203 pmd_t *pmd, *pmd_k;
2d4a7167 204
f2f13a85
IM
205 pgd += index;
206 pgd_k = init_mm.pgd + index;
207
208 if (!pgd_present(*pgd_k))
209 return NULL;
210
211 /*
212 * set_pgd(pgd, *pgd_k); here would be useless on PAE
213 * and redundant with the set_pmd() on non-PAE. As would
214 * set_pud.
215 */
216 pud = pud_offset(pgd, address);
217 pud_k = pud_offset(pgd_k, address);
218 if (!pud_present(*pud_k))
219 return NULL;
220
221 pmd = pmd_offset(pud, address);
222 pmd_k = pmd_offset(pud_k, address);
223 if (!pmd_present(*pmd_k))
224 return NULL;
225
226 if (!pmd_present(*pmd)) {
227 set_pmd(pmd, *pmd_k);
228 arch_flush_lazy_mmu_mode();
229 } else {
230 BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
231 }
232
233 return pmd_k;
234}
235
236void vmalloc_sync_all(void)
237{
238 unsigned long address;
239
240 if (SHARED_KERNEL_PMD)
241 return;
242
243 for (address = VMALLOC_START & PMD_MASK;
244 address >= TASK_SIZE && address < FIXADDR_TOP;
245 address += PMD_SIZE) {
246
247 unsigned long flags;
248 struct page *page;
249
250 spin_lock_irqsave(&pgd_lock, flags);
251 list_for_each_entry(page, &pgd_list, lru) {
252 if (!vmalloc_sync_one(page_address(page), address))
253 break;
254 }
255 spin_unlock_irqrestore(&pgd_lock, flags);
256 }
257}
258
259/*
260 * 32-bit:
261 *
262 * Handle a fault on the vmalloc or module mapping area
263 */
264static noinline int vmalloc_fault(unsigned long address)
265{
266 unsigned long pgd_paddr;
267 pmd_t *pmd_k;
268 pte_t *pte_k;
269
270 /* Make sure we are in vmalloc area: */
271 if (!(address >= VMALLOC_START && address < VMALLOC_END))
272 return -1;
273
274 /*
275 * Synchronize this task's top level page-table
276 * with the 'reference' page table.
277 *
278 * Do _not_ use "current" here. We might be inside
279 * an interrupt in the middle of a task switch..
280 */
281 pgd_paddr = read_cr3();
282 pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
283 if (!pmd_k)
284 return -1;
285
286 pte_k = pte_offset_kernel(pmd_k, address);
287 if (!pte_present(*pte_k))
288 return -1;
289
290 return 0;
291}
292
293/*
294 * Did it hit the DOS screen memory VA from vm86 mode?
295 */
296static inline void
297check_v8086_mode(struct pt_regs *regs, unsigned long address,
298 struct task_struct *tsk)
299{
300 unsigned long bit;
301
302 if (!v8086_mode(regs))
303 return;
304
305 bit = (address - 0xA0000) >> PAGE_SHIFT;
306 if (bit < 32)
307 tsk->thread.screen_bitmap |= 1 << bit;
33cb5243 308}
1da177e4 309
cae30f82 310static void dump_pagetable(unsigned long address)
1da177e4 311{
1156e098
HH
312 __typeof__(pte_val(__pte(0))) page;
313
314 page = read_cr3();
315 page = ((__typeof__(page) *) __va(page))[address >> PGDIR_SHIFT];
2d4a7167 316
1156e098
HH
317#ifdef CONFIG_X86_PAE
318 printk("*pdpt = %016Lx ", page);
319 if ((page >> PAGE_SHIFT) < max_low_pfn
320 && page & _PAGE_PRESENT) {
321 page &= PAGE_MASK;
322 page = ((__typeof__(page) *) __va(page))[(address >> PMD_SHIFT)
2d4a7167 323 & (PTRS_PER_PMD - 1)];
1156e098
HH
324 printk(KERN_CONT "*pde = %016Lx ", page);
325 page &= ~_PAGE_NX;
326 }
327#else
328 printk("*pde = %08lx ", page);
329#endif
330
331 /*
332 * We must not directly access the pte in the highpte
333 * case if the page table is located in highmem.
334 * And let's rather not kmap-atomic the pte, just in case
2d4a7167 335 * it's allocated already:
1156e098
HH
336 */
337 if ((page >> PAGE_SHIFT) < max_low_pfn
338 && (page & _PAGE_PRESENT)
339 && !(page & _PAGE_PSE)) {
2d4a7167 340
1156e098
HH
341 page &= PAGE_MASK;
342 page = ((__typeof__(page) *) __va(page))[(address >> PAGE_SHIFT)
2d4a7167 343 & (PTRS_PER_PTE - 1)];
1156e098
HH
344 printk("*pte = %0*Lx ", sizeof(page)*2, (u64)page);
345 }
346
347 printk("\n");
f2f13a85
IM
348}
349
350#else /* CONFIG_X86_64: */
351
352void vmalloc_sync_all(void)
353{
354 unsigned long address;
355
356 for (address = VMALLOC_START & PGDIR_MASK; address <= VMALLOC_END;
357 address += PGDIR_SIZE) {
358
359 const pgd_t *pgd_ref = pgd_offset_k(address);
360 unsigned long flags;
361 struct page *page;
362
363 if (pgd_none(*pgd_ref))
364 continue;
365
366 spin_lock_irqsave(&pgd_lock, flags);
367 list_for_each_entry(page, &pgd_list, lru) {
368 pgd_t *pgd;
369 pgd = (pgd_t *)page_address(page) + pgd_index(address);
370 if (pgd_none(*pgd))
371 set_pgd(pgd, *pgd_ref);
372 else
373 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
374 }
375 spin_unlock_irqrestore(&pgd_lock, flags);
376 }
377}
378
379/*
380 * 64-bit:
381 *
382 * Handle a fault on the vmalloc area
383 *
384 * This assumes no large pages in there.
385 */
386static noinline int vmalloc_fault(unsigned long address)
387{
388 pgd_t *pgd, *pgd_ref;
389 pud_t *pud, *pud_ref;
390 pmd_t *pmd, *pmd_ref;
391 pte_t *pte, *pte_ref;
392
393 /* Make sure we are in vmalloc area: */
394 if (!(address >= VMALLOC_START && address < VMALLOC_END))
395 return -1;
396
397 /*
398 * Copy kernel mappings over when needed. This can also
399 * happen within a race in page table update. In the later
400 * case just flush:
401 */
402 pgd = pgd_offset(current->active_mm, address);
403 pgd_ref = pgd_offset_k(address);
404 if (pgd_none(*pgd_ref))
405 return -1;
406
407 if (pgd_none(*pgd))
408 set_pgd(pgd, *pgd_ref);
409 else
410 BUG_ON(pgd_page_vaddr(*pgd) != pgd_page_vaddr(*pgd_ref));
411
412 /*
413 * Below here mismatches are bugs because these lower tables
414 * are shared:
415 */
416
417 pud = pud_offset(pgd, address);
418 pud_ref = pud_offset(pgd_ref, address);
419 if (pud_none(*pud_ref))
420 return -1;
421
422 if (pud_none(*pud) || pud_page_vaddr(*pud) != pud_page_vaddr(*pud_ref))
423 BUG();
424
425 pmd = pmd_offset(pud, address);
426 pmd_ref = pmd_offset(pud_ref, address);
427 if (pmd_none(*pmd_ref))
428 return -1;
429
430 if (pmd_none(*pmd) || pmd_page(*pmd) != pmd_page(*pmd_ref))
431 BUG();
432
433 pte_ref = pte_offset_kernel(pmd_ref, address);
434 if (!pte_present(*pte_ref))
435 return -1;
436
437 pte = pte_offset_kernel(pmd, address);
438
439 /*
440 * Don't use pte_page here, because the mappings can point
441 * outside mem_map, and the NUMA hash lookup cannot handle
442 * that:
443 */
444 if (!pte_present(*pte) || pte_pfn(*pte) != pte_pfn(*pte_ref))
445 BUG();
446
447 return 0;
448}
449
450static const char errata93_warning[] =
451KERN_ERR "******* Your BIOS seems to not contain a fix for K8 errata #93\n"
452KERN_ERR "******* Working around it, but it may cause SEGVs or burn power.\n"
453KERN_ERR "******* Please consider a BIOS update.\n"
454KERN_ERR "******* Disabling USB legacy in the BIOS may also help.\n";
455
456/*
457 * No vm86 mode in 64-bit mode:
458 */
459static inline void
460check_v8086_mode(struct pt_regs *regs, unsigned long address,
461 struct task_struct *tsk)
462{
463}
464
465static int bad_address(void *p)
466{
467 unsigned long dummy;
468
469 return probe_kernel_address((unsigned long *)p, dummy);
470}
471
472static void dump_pagetable(unsigned long address)
473{
1da177e4
LT
474 pgd_t *pgd;
475 pud_t *pud;
476 pmd_t *pmd;
477 pte_t *pte;
478
f51c9452 479 pgd = (pgd_t *)read_cr3();
1da177e4 480
33cb5243 481 pgd = __va((unsigned long)pgd & PHYSICAL_PAGE_MASK);
2d4a7167 482
1da177e4 483 pgd += pgd_index(address);
2d4a7167
IM
484 if (bad_address(pgd))
485 goto bad;
486
d646bce4 487 printk("PGD %lx ", pgd_val(*pgd));
2d4a7167
IM
488
489 if (!pgd_present(*pgd))
490 goto out;
1da177e4 491
d2ae5b5f 492 pud = pud_offset(pgd, address);
2d4a7167
IM
493 if (bad_address(pud))
494 goto bad;
495
1da177e4 496 printk("PUD %lx ", pud_val(*pud));
b5360222 497 if (!pud_present(*pud) || pud_large(*pud))
2d4a7167 498 goto out;
1da177e4
LT
499
500 pmd = pmd_offset(pud, address);
2d4a7167
IM
501 if (bad_address(pmd))
502 goto bad;
503
1da177e4 504 printk("PMD %lx ", pmd_val(*pmd));
2d4a7167
IM
505 if (!pmd_present(*pmd) || pmd_large(*pmd))
506 goto out;
1da177e4
LT
507
508 pte = pte_offset_kernel(pmd, address);
2d4a7167
IM
509 if (bad_address(pte))
510 goto bad;
511
33cb5243 512 printk("PTE %lx", pte_val(*pte));
2d4a7167 513out:
1da177e4
LT
514 printk("\n");
515 return;
516bad:
517 printk("BAD\n");
8c938f9f
IM
518}
519
f2f13a85 520#endif /* CONFIG_X86_64 */
1da177e4 521
2d4a7167
IM
522/*
523 * Workaround for K8 erratum #93 & buggy BIOS.
524 *
525 * BIOS SMM functions are required to use a specific workaround
526 * to avoid corruption of the 64bit RIP register on C stepping K8.
527 *
528 * A lot of BIOS that didn't get tested properly miss this.
529 *
530 * The OS sees this as a page fault with the upper 32bits of RIP cleared.
531 * Try to work around it here.
532 *
533 * Note we only handle faults in kernel here.
534 * Does nothing on 32-bit.
fdfe8aa8 535 */
33cb5243 536static int is_errata93(struct pt_regs *regs, unsigned long address)
1da177e4 537{
fdfe8aa8 538#ifdef CONFIG_X86_64
2d4a7167
IM
539 static int once;
540
65ea5b03 541 if (address != regs->ip)
1da177e4 542 return 0;
2d4a7167 543
33cb5243 544 if ((address >> 32) != 0)
1da177e4 545 return 0;
2d4a7167 546
1da177e4 547 address |= 0xffffffffUL << 32;
33cb5243
HH
548 if ((address >= (u64)_stext && address <= (u64)_etext) ||
549 (address >= MODULES_VADDR && address <= MODULES_END)) {
2d4a7167 550 if (!once) {
33cb5243 551 printk(errata93_warning);
2d4a7167 552 once = 1;
1da177e4 553 }
65ea5b03 554 regs->ip = address;
1da177e4
LT
555 return 1;
556 }
fdfe8aa8 557#endif
1da177e4 558 return 0;
33cb5243 559}
1da177e4 560
35f3266f 561/*
2d4a7167
IM
562 * Work around K8 erratum #100 K8 in compat mode occasionally jumps
563 * to illegal addresses >4GB.
564 *
565 * We catch this in the page fault handler because these addresses
566 * are not reachable. Just detect this case and return. Any code
35f3266f
HH
567 * segment in LDT is compatibility mode.
568 */
569static int is_errata100(struct pt_regs *regs, unsigned long address)
570{
571#ifdef CONFIG_X86_64
2d4a7167 572 if ((regs->cs == __USER32_CS || (regs->cs & (1<<2))) && (address >> 32))
35f3266f
HH
573 return 1;
574#endif
575 return 0;
576}
577
29caf2f9
HH
578static int is_f00f_bug(struct pt_regs *regs, unsigned long address)
579{
580#ifdef CONFIG_X86_F00F_BUG
581 unsigned long nr;
2d4a7167 582
29caf2f9 583 /*
2d4a7167 584 * Pentium F0 0F C7 C8 bug workaround:
29caf2f9
HH
585 */
586 if (boot_cpu_data.f00f_bug) {
587 nr = (address - idt_descr.address) >> 3;
588
589 if (nr == 6) {
590 do_invalid_op(regs, 0);
591 return 1;
592 }
593 }
594#endif
595 return 0;
596}
597
2d4a7167
IM
598static void
599show_fault_oops(struct pt_regs *regs, unsigned long error_code,
600 unsigned long address)
b3279c7f 601{
1156e098
HH
602#ifdef CONFIG_X86_32
603 if (!oops_may_print())
604 return;
fd40d6e3 605#endif
1156e098
HH
606
607#ifdef CONFIG_X86_PAE
608 if (error_code & PF_INSTR) {
93809be8 609 unsigned int level;
2d4a7167 610
1156e098
HH
611 pte_t *pte = lookup_address(address, &level);
612
2d4a7167 613 if (pte && pte_present(*pte) && !pte_exec(*pte)) {
1156e098
HH
614 printk(KERN_CRIT "kernel tried to execute "
615 "NX-protected page - exploit attempt? "
350b4da7 616 "(uid: %d)\n", current_uid());
2d4a7167 617 }
1156e098
HH
618 }
619#endif
1156e098 620
19f0dda9 621 printk(KERN_ALERT "BUG: unable to handle kernel ");
b3279c7f 622 if (address < PAGE_SIZE)
19f0dda9 623 printk(KERN_CONT "NULL pointer dereference");
b3279c7f 624 else
19f0dda9 625 printk(KERN_CONT "paging request");
2d4a7167 626
f294a8ce 627 printk(KERN_CONT " at %p\n", (void *) address);
19f0dda9 628 printk(KERN_ALERT "IP:");
b3279c7f 629 printk_address(regs->ip, 1);
2d4a7167 630
b3279c7f
HH
631 dump_pagetable(address);
632}
633
2d4a7167
IM
634static noinline void
635pgtable_bad(struct pt_regs *regs, unsigned long error_code,
636 unsigned long address)
1da177e4 637{
2d4a7167
IM
638 struct task_struct *tsk;
639 unsigned long flags;
640 int sig;
641
642 flags = oops_begin();
643 tsk = current;
644 sig = SIGKILL;
1209140c 645
1da177e4 646 printk(KERN_ALERT "%s: Corrupted page table at address %lx\n",
92181f19 647 tsk->comm, address);
1da177e4 648 dump_pagetable(address);
2d4a7167
IM
649
650 tsk->thread.cr2 = address;
651 tsk->thread.trap_no = 14;
652 tsk->thread.error_code = error_code;
653
22f5991c 654 if (__die("Bad pagetable", regs, error_code))
874d93d1 655 sig = 0;
2d4a7167 656
874d93d1 657 oops_end(flags, regs, sig);
1da177e4
LT
658}
659
2d4a7167
IM
660static noinline void
661no_context(struct pt_regs *regs, unsigned long error_code,
662 unsigned long address)
92181f19
NP
663{
664 struct task_struct *tsk = current;
19803078
IM
665 unsigned long *stackend;
666
92181f19
NP
667#ifdef CONFIG_X86_64
668 unsigned long flags;
669 int sig;
670#endif
671
2d4a7167 672 /* Are we prepared to handle this kernel fault? */
92181f19
NP
673 if (fixup_exception(regs))
674 return;
675
676 /*
2d4a7167
IM
677 * 32-bit:
678 *
679 * Valid to do another page fault here, because if this fault
680 * had been triggered by is_prefetch fixup_exception would have
681 * handled it.
682 *
683 * 64-bit:
92181f19 684 *
2d4a7167 685 * Hall of shame of CPU/BIOS bugs.
92181f19
NP
686 */
687 if (is_prefetch(regs, error_code, address))
688 return;
689
690 if (is_errata93(regs, address))
691 return;
692
693 /*
694 * Oops. The kernel tried to access some bad page. We'll have to
2d4a7167 695 * terminate things with extreme prejudice:
92181f19
NP
696 */
697#ifdef CONFIG_X86_32
698 bust_spinlocks(1);
699#else
700 flags = oops_begin();
701#endif
702
703 show_fault_oops(regs, error_code, address);
704
2d4a7167 705 stackend = end_of_stack(tsk);
19803078
IM
706 if (*stackend != STACK_END_MAGIC)
707 printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
708
92181f19
NP
709 tsk->thread.cr2 = address;
710 tsk->thread.trap_no = 14;
711 tsk->thread.error_code = error_code;
712
713#ifdef CONFIG_X86_32
714 die("Oops", regs, error_code);
715 bust_spinlocks(0);
716 do_exit(SIGKILL);
717#else
718 sig = SIGKILL;
719 if (__die("Oops", regs, error_code))
720 sig = 0;
2d4a7167 721
92181f19
NP
722 /* Executive summary in case the body of the oops scrolled away */
723 printk(KERN_EMERG "CR2: %016lx\n", address);
2d4a7167 724
92181f19
NP
725 oops_end(flags, regs, sig);
726#endif
727}
728
2d4a7167
IM
729/*
730 * Print out info about fatal segfaults, if the show_unhandled_signals
731 * sysctl is set:
732 */
733static inline void
734show_signal_msg(struct pt_regs *regs, unsigned long error_code,
735 unsigned long address, struct task_struct *tsk)
736{
737 if (!unhandled_signal(tsk, SIGSEGV))
738 return;
739
740 if (!printk_ratelimit())
741 return;
742
743 printk(KERN_CONT "%s%s[%d]: segfault at %lx ip %p sp %p error %lx",
744 task_pid_nr(tsk) > 1 ? KERN_INFO : KERN_EMERG,
745 tsk->comm, task_pid_nr(tsk), address,
746 (void *)regs->ip, (void *)regs->sp, error_code);
747
748 print_vma_addr(KERN_CONT " in ", regs->ip);
749
750 printk(KERN_CONT "\n");
751}
752
753static void
754__bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
755 unsigned long address, int si_code)
92181f19
NP
756{
757 struct task_struct *tsk = current;
758
759 /* User mode accesses just cause a SIGSEGV */
760 if (error_code & PF_USER) {
761 /*
2d4a7167 762 * It's possible to have interrupts off here:
92181f19
NP
763 */
764 local_irq_enable();
765
766 /*
767 * Valid to do another page fault here because this one came
2d4a7167 768 * from user space:
92181f19
NP
769 */
770 if (is_prefetch(regs, error_code, address))
771 return;
772
773 if (is_errata100(regs, address))
774 return;
775
2d4a7167
IM
776 if (unlikely(show_unhandled_signals))
777 show_signal_msg(regs, error_code, address, tsk);
778
779 /* Kernel addresses are always protection faults: */
780 tsk->thread.cr2 = address;
781 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
782 tsk->thread.trap_no = 14;
92181f19 783
92181f19 784 force_sig_info_fault(SIGSEGV, si_code, address, tsk);
2d4a7167 785
92181f19
NP
786 return;
787 }
788
789 if (is_f00f_bug(regs, address))
790 return;
791
792 no_context(regs, error_code, address);
793}
794
2d4a7167
IM
795static noinline void
796bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
797 unsigned long address)
92181f19
NP
798{
799 __bad_area_nosemaphore(regs, error_code, address, SEGV_MAPERR);
800}
801
2d4a7167
IM
802static void
803__bad_area(struct pt_regs *regs, unsigned long error_code,
804 unsigned long address, int si_code)
92181f19
NP
805{
806 struct mm_struct *mm = current->mm;
807
808 /*
809 * Something tried to access memory that isn't in our memory map..
810 * Fix it, but check if it's kernel or user first..
811 */
812 up_read(&mm->mmap_sem);
813
814 __bad_area_nosemaphore(regs, error_code, address, si_code);
815}
816
2d4a7167
IM
817static noinline void
818bad_area(struct pt_regs *regs, unsigned long error_code, unsigned long address)
92181f19
NP
819{
820 __bad_area(regs, error_code, address, SEGV_MAPERR);
821}
822
2d4a7167
IM
823static noinline void
824bad_area_access_error(struct pt_regs *regs, unsigned long error_code,
825 unsigned long address)
92181f19
NP
826{
827 __bad_area(regs, error_code, address, SEGV_ACCERR);
828}
829
830/* TODO: fixup for "mm-invoke-oom-killer-from-page-fault.patch" */
2d4a7167
IM
831static void
832out_of_memory(struct pt_regs *regs, unsigned long error_code,
833 unsigned long address)
92181f19
NP
834{
835 /*
836 * We ran out of memory, call the OOM killer, and return the userspace
2d4a7167 837 * (which will retry the fault, or kill us if we got oom-killed):
92181f19
NP
838 */
839 up_read(&current->mm->mmap_sem);
2d4a7167 840
92181f19
NP
841 pagefault_out_of_memory();
842}
843
2d4a7167
IM
844static void
845do_sigbus(struct pt_regs *regs, unsigned long error_code, unsigned long address)
92181f19
NP
846{
847 struct task_struct *tsk = current;
848 struct mm_struct *mm = tsk->mm;
849
850 up_read(&mm->mmap_sem);
851
2d4a7167 852 /* Kernel mode? Handle exceptions or die: */
92181f19
NP
853 if (!(error_code & PF_USER))
854 no_context(regs, error_code, address);
2d4a7167 855
92181f19 856#ifdef CONFIG_X86_32
2d4a7167 857 /* User space => ok to do another page fault: */
92181f19
NP
858 if (is_prefetch(regs, error_code, address))
859 return;
860#endif
2d4a7167
IM
861
862 tsk->thread.cr2 = address;
863 tsk->thread.error_code = error_code;
864 tsk->thread.trap_no = 14;
865
92181f19
NP
866 force_sig_info_fault(SIGBUS, BUS_ADRERR, address, tsk);
867}
868
2d4a7167
IM
869static noinline void
870mm_fault_error(struct pt_regs *regs, unsigned long error_code,
871 unsigned long address, unsigned int fault)
92181f19 872{
2d4a7167 873 if (fault & VM_FAULT_OOM) {
92181f19 874 out_of_memory(regs, error_code, address);
2d4a7167
IM
875 } else {
876 if (fault & VM_FAULT_SIGBUS)
877 do_sigbus(regs, error_code, address);
878 else
879 BUG();
880 }
92181f19
NP
881}
882
d8b57bb7
TG
883static int spurious_fault_check(unsigned long error_code, pte_t *pte)
884{
885 if ((error_code & PF_WRITE) && !pte_write(*pte))
886 return 0;
2d4a7167 887
d8b57bb7
TG
888 if ((error_code & PF_INSTR) && !pte_exec(*pte))
889 return 0;
890
891 return 1;
892}
893
5b727a3b 894/*
2d4a7167
IM
895 * Handle a spurious fault caused by a stale TLB entry.
896 *
897 * This allows us to lazily refresh the TLB when increasing the
898 * permissions of a kernel page (RO -> RW or NX -> X). Doing it
899 * eagerly is very expensive since that implies doing a full
900 * cross-processor TLB flush, even if no stale TLB entries exist
901 * on other processors.
902 *
5b727a3b
JF
903 * There are no security implications to leaving a stale TLB when
904 * increasing the permissions on a page.
905 */
2d4a7167
IM
906static noinline int
907spurious_fault(unsigned long error_code, unsigned long address)
5b727a3b
JF
908{
909 pgd_t *pgd;
910 pud_t *pud;
911 pmd_t *pmd;
912 pte_t *pte;
3c3e5694 913 int ret;
5b727a3b
JF
914
915 /* Reserved-bit violation or user access to kernel space? */
916 if (error_code & (PF_USER | PF_RSVD))
917 return 0;
918
919 pgd = init_mm.pgd + pgd_index(address);
920 if (!pgd_present(*pgd))
921 return 0;
922
923 pud = pud_offset(pgd, address);
924 if (!pud_present(*pud))
925 return 0;
926
d8b57bb7
TG
927 if (pud_large(*pud))
928 return spurious_fault_check(error_code, (pte_t *) pud);
929
5b727a3b
JF
930 pmd = pmd_offset(pud, address);
931 if (!pmd_present(*pmd))
932 return 0;
933
d8b57bb7
TG
934 if (pmd_large(*pmd))
935 return spurious_fault_check(error_code, (pte_t *) pmd);
936
5b727a3b
JF
937 pte = pte_offset_kernel(pmd, address);
938 if (!pte_present(*pte))
939 return 0;
940
3c3e5694
SR
941 ret = spurious_fault_check(error_code, pte);
942 if (!ret)
943 return 0;
944
945 /*
2d4a7167
IM
946 * Make sure we have permissions in PMD.
947 * If not, then there's a bug in the page tables:
3c3e5694
SR
948 */
949 ret = spurious_fault_check(error_code, (pte_t *) pmd);
950 WARN_ONCE(!ret, "PMD has incorrect permission bits\n");
2d4a7167 951
3c3e5694 952 return ret;
5b727a3b
JF
953}
954
abd4f750 955int show_unhandled_signals = 1;
1da177e4 956
2d4a7167
IM
957static inline int
958access_error(unsigned long error_code, int write, struct vm_area_struct *vma)
92181f19
NP
959{
960 if (write) {
2d4a7167 961 /* write, present and write, not present: */
92181f19
NP
962 if (unlikely(!(vma->vm_flags & VM_WRITE)))
963 return 1;
2d4a7167 964 return 0;
92181f19
NP
965 }
966
2d4a7167
IM
967 /* read, present: */
968 if (unlikely(error_code & PF_PROT))
969 return 1;
970
971 /* read, not present: */
972 if (unlikely(!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))))
973 return 1;
974
92181f19
NP
975 return 0;
976}
977
0973a06c
HS
978static int fault_in_kernel_space(unsigned long address)
979{
980#ifdef CONFIG_X86_32
981 return address >= TASK_SIZE;
2d4a7167 982#else
0973a06c 983 return address >= TASK_SIZE64;
2d4a7167 984#endif
0973a06c
HS
985}
986
1da177e4
LT
987/*
988 * This routine handles page faults. It determines the address,
989 * and the problem, and then passes it off to one of the appropriate
990 * routines.
1da177e4 991 */
f8c2ee22
HH
992#ifdef CONFIG_X86_64
993asmlinkage
994#endif
995void __kprobes do_page_fault(struct pt_regs *regs, unsigned long error_code)
1da177e4 996{
2d4a7167 997 struct vm_area_struct *vma;
1da177e4 998 struct task_struct *tsk;
2d4a7167 999 unsigned long address;
1da177e4 1000 struct mm_struct *mm;
92181f19 1001 int write;
f8c2ee22 1002 int fault;
1da177e4 1003
a9ba9a3b
AV
1004 tsk = current;
1005 mm = tsk->mm;
2d4a7167 1006
a9ba9a3b
AV
1007 prefetchw(&mm->mmap_sem);
1008
2d4a7167 1009 /* Get the faulting address: */
f51c9452 1010 address = read_cr2();
1da177e4 1011
0fd0e3da 1012 if (unlikely(kmmio_fault(regs, address)))
86069782 1013 return;
1da177e4
LT
1014
1015 /*
1016 * We fault-in kernel-space virtual memory on-demand. The
1017 * 'reference' page table is init_mm.pgd.
1018 *
1019 * NOTE! We MUST NOT take any locks for this case. We may
1020 * be in an interrupt or a critical region, and should
1021 * only copy the information from the master page table,
1022 * nothing more.
1023 *
1024 * This verifies that the fault happens in kernel space
1025 * (error_code & 4) == 0, and that the fault was not a
8b1bde93 1026 * protection error (error_code & 9) == 0.
1da177e4 1027 */
0973a06c 1028 if (unlikely(fault_in_kernel_space(address))) {
f8c2ee22
HH
1029 if (!(error_code & (PF_RSVD|PF_USER|PF_PROT)) &&
1030 vmalloc_fault(address) >= 0)
1031 return;
5b727a3b 1032
2d4a7167 1033 /* Can handle a stale RO->RW TLB: */
92181f19 1034 if (spurious_fault(error_code, address))
5b727a3b
JF
1035 return;
1036
2d4a7167 1037 /* kprobes don't want to hook the spurious faults: */
9be260a6
MH
1038 if (notify_page_fault(regs))
1039 return;
f8c2ee22
HH
1040 /*
1041 * Don't take the mm semaphore here. If we fixup a prefetch
2d4a7167 1042 * fault we could otherwise deadlock:
f8c2ee22 1043 */
92181f19 1044 bad_area_nosemaphore(regs, error_code, address);
2d4a7167 1045
92181f19 1046 return;
f8c2ee22
HH
1047 }
1048
2d4a7167 1049 /* kprobes don't want to hook the spurious faults: */
f8a6b2b9 1050 if (unlikely(notify_page_fault(regs)))
9be260a6 1051 return;
f8c2ee22 1052 /*
891cffbd
LT
1053 * It's safe to allow irq's after cr2 has been saved and the
1054 * vmalloc fault has been handled.
1055 *
1056 * User-mode registers count as a user access even for any
2d4a7167 1057 * potential system fault or CPU buglet:
f8c2ee22 1058 */
891cffbd
LT
1059 if (user_mode_vm(regs)) {
1060 local_irq_enable();
1061 error_code |= PF_USER;
2d4a7167
IM
1062 } else {
1063 if (regs->flags & X86_EFLAGS_IF)
1064 local_irq_enable();
1065 }
8c914cb7 1066
66c58156 1067 if (unlikely(error_code & PF_RSVD))
92181f19 1068 pgtable_bad(regs, error_code, address);
1da177e4
LT
1069
1070 /*
2d4a7167
IM
1071 * If we're in an interrupt, have no user context or are running
1072 * in an atomic region then we must not take the fault:
1da177e4 1073 */
92181f19
NP
1074 if (unlikely(in_atomic() || !mm)) {
1075 bad_area_nosemaphore(regs, error_code, address);
1076 return;
1077 }
1da177e4 1078
3a1dfe6e
IM
1079 /*
1080 * When running in the kernel we expect faults to occur only to
2d4a7167
IM
1081 * addresses in user space. All other faults represent errors in
1082 * the kernel and should generate an OOPS. Unfortunately, in the
1083 * case of an erroneous fault occurring in a code path which already
1084 * holds mmap_sem we will deadlock attempting to validate the fault
1085 * against the address space. Luckily the kernel only validly
1086 * references user space from well defined areas of code, which are
1087 * listed in the exceptions table.
1da177e4
LT
1088 *
1089 * As the vast majority of faults will be valid we will only perform
2d4a7167
IM
1090 * the source reference check when there is a possibility of a
1091 * deadlock. Attempt to lock the address space, if we cannot we then
1092 * validate the source. If this is invalid we can skip the address
1093 * space check, thus avoiding the deadlock:
1da177e4 1094 */
92181f19 1095 if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
66c58156 1096 if ((error_code & PF_USER) == 0 &&
92181f19
NP
1097 !search_exception_tables(regs->ip)) {
1098 bad_area_nosemaphore(regs, error_code, address);
1099 return;
1100 }
1da177e4 1101 down_read(&mm->mmap_sem);
01006074
PZ
1102 } else {
1103 /*
2d4a7167
IM
1104 * The above down_read_trylock() might have succeeded in
1105 * which case we'll have missed the might_sleep() from
1106 * down_read():
01006074
PZ
1107 */
1108 might_sleep();
1da177e4
LT
1109 }
1110
1111 vma = find_vma(mm, address);
92181f19
NP
1112 if (unlikely(!vma)) {
1113 bad_area(regs, error_code, address);
1114 return;
1115 }
1116 if (likely(vma->vm_start <= address))
1da177e4 1117 goto good_area;
92181f19
NP
1118 if (unlikely(!(vma->vm_flags & VM_GROWSDOWN))) {
1119 bad_area(regs, error_code, address);
1120 return;
1121 }
33cb5243 1122 if (error_code & PF_USER) {
6f4d368e
HH
1123 /*
1124 * Accessing the stack below %sp is always a bug.
1125 * The large cushion allows instructions like enter
2d4a7167 1126 * and pusha to work. ("enter $65535, $31" pushes
6f4d368e 1127 * 32 pointers and then decrements %sp by 65535.)
03fdc2c2 1128 */
92181f19
NP
1129 if (unlikely(address + 65536 + 32 * sizeof(unsigned long) < regs->sp)) {
1130 bad_area(regs, error_code, address);
1131 return;
1132 }
1da177e4 1133 }
92181f19
NP
1134 if (unlikely(expand_stack(vma, address))) {
1135 bad_area(regs, error_code, address);
1136 return;
1137 }
1138
1139 /*
1140 * Ok, we have a good vm_area for this memory access, so
1141 * we can handle it..
1142 */
1da177e4 1143good_area:
92181f19 1144 write = error_code & PF_WRITE;
2d4a7167 1145
92181f19
NP
1146 if (unlikely(access_error(error_code, write, vma))) {
1147 bad_area_access_error(regs, error_code, address);
1148 return;
1da177e4
LT
1149 }
1150
1151 /*
1152 * If for any reason at all we couldn't handle the fault,
1153 * make sure we exit gracefully rather than endlessly redo
2d4a7167 1154 * the fault:
1da177e4 1155 */
83c54070 1156 fault = handle_mm_fault(mm, vma, address, write);
2d4a7167 1157
83c54070 1158 if (unlikely(fault & VM_FAULT_ERROR)) {
92181f19
NP
1159 mm_fault_error(regs, error_code, address, fault);
1160 return;
1da177e4 1161 }
2d4a7167 1162
83c54070
NP
1163 if (fault & VM_FAULT_MAJOR)
1164 tsk->maj_flt++;
1165 else
1166 tsk->min_flt++;
d729ab35 1167
8c938f9f
IM
1168 check_v8086_mode(regs, address, tsk);
1169
1da177e4 1170 up_read(&mm->mmap_sem);
1da177e4 1171}
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