Commit | Line | Data |
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5a0e3ad6 | 1 | #include <linux/gfp.h> |
2c1b284e | 2 | #include <linux/initrd.h> |
540aca06 | 3 | #include <linux/ioport.h> |
e5b2bb55 | 4 | #include <linux/swap.h> |
a9ce6bc1 | 5 | #include <linux/memblock.h> |
17623915 | 6 | #include <linux/bootmem.h> /* for max_low_pfn */ |
540aca06 | 7 | |
e5b2bb55 | 8 | #include <asm/cacheflush.h> |
f765090a | 9 | #include <asm/e820.h> |
4fcb2083 | 10 | #include <asm/init.h> |
e5b2bb55 | 11 | #include <asm/page.h> |
540aca06 | 12 | #include <asm/page_types.h> |
e5b2bb55 | 13 | #include <asm/sections.h> |
49834396 | 14 | #include <asm/setup.h> |
f765090a | 15 | #include <asm/tlbflush.h> |
9518e0e4 | 16 | #include <asm/tlb.h> |
76c06927 | 17 | #include <asm/proto.h> |
17623915 | 18 | #include <asm/dma.h> /* for MAX_DMA_PFN */ |
cd745be8 | 19 | #include <asm/microcode.h> |
0483e1fa | 20 | #include <asm/kaslr.h> |
9518e0e4 | 21 | |
d17d8f9d DH |
22 | /* |
23 | * We need to define the tracepoints somewhere, and tlb.c | |
24 | * is only compied when SMP=y. | |
25 | */ | |
26 | #define CREATE_TRACE_POINTS | |
27 | #include <trace/events/tlb.h> | |
28 | ||
5c51bdbe YL |
29 | #include "mm_internal.h" |
30 | ||
281d4078 JG |
31 | /* |
32 | * Tables translating between page_cache_type_t and pte encoding. | |
c709feda | 33 | * |
d5dc861b TK |
34 | * The default values are defined statically as minimal supported mode; |
35 | * WC and WT fall back to UC-. pat_init() updates these values to support | |
36 | * more cache modes, WC and WT, when it is safe to do so. See pat_init() | |
37 | * for the details. Note, __early_ioremap() used during early boot-time | |
38 | * takes pgprot_t (pte encoding) and does not use these tables. | |
c709feda IM |
39 | * |
40 | * Index into __cachemode2pte_tbl[] is the cachemode. | |
41 | * | |
42 | * Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte | |
43 | * (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2. | |
281d4078 JG |
44 | */ |
45 | uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = { | |
c709feda | 46 | [_PAGE_CACHE_MODE_WB ] = 0 | 0 , |
9cd25aac | 47 | [_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD, |
c709feda IM |
48 | [_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD, |
49 | [_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD, | |
50 | [_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD, | |
51 | [_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD, | |
281d4078 | 52 | }; |
31bb7723 | 53 | EXPORT_SYMBOL(__cachemode2pte_tbl); |
c709feda | 54 | |
281d4078 | 55 | uint8_t __pte2cachemode_tbl[8] = { |
c709feda | 56 | [__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB, |
9cd25aac | 57 | [__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS, |
c709feda IM |
58 | [__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS, |
59 | [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC, | |
60 | [__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB, | |
9cd25aac | 61 | [__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS, |
c709feda | 62 | [__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS, |
281d4078 JG |
63 | [__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC, |
64 | }; | |
31bb7723 | 65 | EXPORT_SYMBOL(__pte2cachemode_tbl); |
281d4078 | 66 | |
cf470659 YL |
67 | static unsigned long __initdata pgt_buf_start; |
68 | static unsigned long __initdata pgt_buf_end; | |
69 | static unsigned long __initdata pgt_buf_top; | |
f765090a | 70 | |
9985b4c6 YL |
71 | static unsigned long min_pfn_mapped; |
72 | ||
c9b3234a YL |
73 | static bool __initdata can_use_brk_pgt = true; |
74 | ||
ddd3509d SS |
75 | /* |
76 | * Pages returned are already directly mapped. | |
77 | * | |
78 | * Changing that is likely to break Xen, see commit: | |
79 | * | |
80 | * 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve | |
81 | * | |
82 | * for detailed information. | |
83 | */ | |
22c8ca2a | 84 | __ref void *alloc_low_pages(unsigned int num) |
5c51bdbe YL |
85 | { |
86 | unsigned long pfn; | |
22c8ca2a | 87 | int i; |
5c51bdbe | 88 | |
5c51bdbe | 89 | if (after_bootmem) { |
22c8ca2a | 90 | unsigned int order; |
5c51bdbe | 91 | |
22c8ca2a YL |
92 | order = get_order((unsigned long)num << PAGE_SHIFT); |
93 | return (void *)__get_free_pages(GFP_ATOMIC | __GFP_NOTRACK | | |
94 | __GFP_ZERO, order); | |
5c51bdbe | 95 | } |
5c51bdbe | 96 | |
c9b3234a | 97 | if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) { |
5c51bdbe YL |
98 | unsigned long ret; |
99 | if (min_pfn_mapped >= max_pfn_mapped) | |
d4dd100f | 100 | panic("alloc_low_pages: ran out of memory"); |
5c51bdbe YL |
101 | ret = memblock_find_in_range(min_pfn_mapped << PAGE_SHIFT, |
102 | max_pfn_mapped << PAGE_SHIFT, | |
22c8ca2a | 103 | PAGE_SIZE * num , PAGE_SIZE); |
5c51bdbe | 104 | if (!ret) |
d4dd100f | 105 | panic("alloc_low_pages: can not alloc memory"); |
22c8ca2a | 106 | memblock_reserve(ret, PAGE_SIZE * num); |
5c51bdbe | 107 | pfn = ret >> PAGE_SHIFT; |
22c8ca2a YL |
108 | } else { |
109 | pfn = pgt_buf_end; | |
110 | pgt_buf_end += num; | |
c9b3234a YL |
111 | printk(KERN_DEBUG "BRK [%#010lx, %#010lx] PGTABLE\n", |
112 | pfn << PAGE_SHIFT, (pgt_buf_end << PAGE_SHIFT) - 1); | |
22c8ca2a YL |
113 | } |
114 | ||
115 | for (i = 0; i < num; i++) { | |
116 | void *adr; | |
117 | ||
118 | adr = __va((pfn + i) << PAGE_SHIFT); | |
119 | clear_page(adr); | |
120 | } | |
5c51bdbe | 121 | |
22c8ca2a | 122 | return __va(pfn << PAGE_SHIFT); |
5c51bdbe YL |
123 | } |
124 | ||
527bf129 YL |
125 | /* need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS */ |
126 | #define INIT_PGT_BUF_SIZE (6 * PAGE_SIZE) | |
8d57470d YL |
127 | RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE); |
128 | void __init early_alloc_pgt_buf(void) | |
129 | { | |
130 | unsigned long tables = INIT_PGT_BUF_SIZE; | |
131 | phys_addr_t base; | |
132 | ||
133 | base = __pa(extend_brk(tables, PAGE_SIZE)); | |
134 | ||
135 | pgt_buf_start = base >> PAGE_SHIFT; | |
136 | pgt_buf_end = pgt_buf_start; | |
137 | pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT); | |
138 | } | |
139 | ||
f765090a PE |
140 | int after_bootmem; |
141 | ||
10971ab2 | 142 | early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES); |
148b2098 | 143 | |
844ab6f9 JS |
144 | struct map_range { |
145 | unsigned long start; | |
146 | unsigned long end; | |
147 | unsigned page_size_mask; | |
148 | }; | |
149 | ||
fa62aafe | 150 | static int page_size_mask; |
f765090a | 151 | |
22ddfcaa | 152 | static void __init probe_page_size_mask(void) |
fa62aafe | 153 | { |
288cf3c6 | 154 | #if !defined(CONFIG_KMEMCHECK) |
fa62aafe | 155 | /* |
288cf3c6 CB |
156 | * For CONFIG_KMEMCHECK or pagealloc debugging, identity mapping will |
157 | * use small pages. | |
fa62aafe YL |
158 | * This will simplify cpa(), which otherwise needs to support splitting |
159 | * large pages into small in interrupt context, etc. | |
160 | */ | |
16bf9226 | 161 | if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled()) |
fa62aafe YL |
162 | page_size_mask |= 1 << PG_LEVEL_2M; |
163 | #endif | |
164 | ||
165 | /* Enable PSE if available */ | |
16bf9226 | 166 | if (boot_cpu_has(X86_FEATURE_PSE)) |
375074cc | 167 | cr4_set_bits_and_update_boot(X86_CR4_PSE); |
fa62aafe YL |
168 | |
169 | /* Enable PGE if available */ | |
c109bf95 | 170 | if (boot_cpu_has(X86_FEATURE_PGE)) { |
375074cc | 171 | cr4_set_bits_and_update_boot(X86_CR4_PGE); |
fa62aafe | 172 | __supported_pte_mask |= _PAGE_GLOBAL; |
0cdb81be JB |
173 | } else |
174 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
e61980a7 IM |
175 | |
176 | /* Enable 1 GB linear kernel mappings if available: */ | |
b8291adc | 177 | if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) { |
e61980a7 IM |
178 | printk(KERN_INFO "Using GB pages for direct mapping\n"); |
179 | page_size_mask |= 1 << PG_LEVEL_1G; | |
180 | } else { | |
181 | direct_gbpages = 0; | |
182 | } | |
fa62aafe | 183 | } |
279b706b | 184 | |
f765090a PE |
185 | #ifdef CONFIG_X86_32 |
186 | #define NR_RANGE_MR 3 | |
187 | #else /* CONFIG_X86_64 */ | |
188 | #define NR_RANGE_MR 5 | |
189 | #endif | |
190 | ||
dc9dd5cc JB |
191 | static int __meminit save_mr(struct map_range *mr, int nr_range, |
192 | unsigned long start_pfn, unsigned long end_pfn, | |
193 | unsigned long page_size_mask) | |
f765090a PE |
194 | { |
195 | if (start_pfn < end_pfn) { | |
196 | if (nr_range >= NR_RANGE_MR) | |
197 | panic("run out of range for init_memory_mapping\n"); | |
198 | mr[nr_range].start = start_pfn<<PAGE_SHIFT; | |
199 | mr[nr_range].end = end_pfn<<PAGE_SHIFT; | |
200 | mr[nr_range].page_size_mask = page_size_mask; | |
201 | nr_range++; | |
202 | } | |
203 | ||
204 | return nr_range; | |
205 | } | |
206 | ||
aeebe84c YL |
207 | /* |
208 | * adjust the page_size_mask for small range to go with | |
209 | * big page size instead small one if nearby are ram too. | |
210 | */ | |
211 | static void __init_refok adjust_range_page_size_mask(struct map_range *mr, | |
212 | int nr_range) | |
213 | { | |
214 | int i; | |
215 | ||
216 | for (i = 0; i < nr_range; i++) { | |
217 | if ((page_size_mask & (1<<PG_LEVEL_2M)) && | |
218 | !(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) { | |
219 | unsigned long start = round_down(mr[i].start, PMD_SIZE); | |
220 | unsigned long end = round_up(mr[i].end, PMD_SIZE); | |
221 | ||
222 | #ifdef CONFIG_X86_32 | |
223 | if ((end >> PAGE_SHIFT) > max_low_pfn) | |
224 | continue; | |
225 | #endif | |
226 | ||
227 | if (memblock_is_region_memory(start, end - start)) | |
228 | mr[i].page_size_mask |= 1<<PG_LEVEL_2M; | |
229 | } | |
230 | if ((page_size_mask & (1<<PG_LEVEL_1G)) && | |
231 | !(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) { | |
232 | unsigned long start = round_down(mr[i].start, PUD_SIZE); | |
233 | unsigned long end = round_up(mr[i].end, PUD_SIZE); | |
234 | ||
235 | if (memblock_is_region_memory(start, end - start)) | |
236 | mr[i].page_size_mask |= 1<<PG_LEVEL_1G; | |
237 | } | |
238 | } | |
239 | } | |
240 | ||
f15e0518 DH |
241 | static const char *page_size_string(struct map_range *mr) |
242 | { | |
243 | static const char str_1g[] = "1G"; | |
244 | static const char str_2m[] = "2M"; | |
245 | static const char str_4m[] = "4M"; | |
246 | static const char str_4k[] = "4k"; | |
247 | ||
248 | if (mr->page_size_mask & (1<<PG_LEVEL_1G)) | |
249 | return str_1g; | |
250 | /* | |
251 | * 32-bit without PAE has a 4M large page size. | |
252 | * PG_LEVEL_2M is misnamed, but we can at least | |
253 | * print out the right size in the string. | |
254 | */ | |
255 | if (IS_ENABLED(CONFIG_X86_32) && | |
256 | !IS_ENABLED(CONFIG_X86_PAE) && | |
257 | mr->page_size_mask & (1<<PG_LEVEL_2M)) | |
258 | return str_4m; | |
259 | ||
260 | if (mr->page_size_mask & (1<<PG_LEVEL_2M)) | |
261 | return str_2m; | |
262 | ||
263 | return str_4k; | |
264 | } | |
265 | ||
4e33e065 YL |
266 | static int __meminit split_mem_range(struct map_range *mr, int nr_range, |
267 | unsigned long start, | |
268 | unsigned long end) | |
f765090a | 269 | { |
2e8059ed | 270 | unsigned long start_pfn, end_pfn, limit_pfn; |
1829ae9a | 271 | unsigned long pfn; |
4e33e065 | 272 | int i; |
f765090a | 273 | |
2e8059ed YL |
274 | limit_pfn = PFN_DOWN(end); |
275 | ||
f765090a | 276 | /* head if not big page alignment ? */ |
1829ae9a | 277 | pfn = start_pfn = PFN_DOWN(start); |
f765090a PE |
278 | #ifdef CONFIG_X86_32 |
279 | /* | |
280 | * Don't use a large page for the first 2/4MB of memory | |
281 | * because there are often fixed size MTRRs in there | |
282 | * and overlapping MTRRs into large pages can cause | |
283 | * slowdowns. | |
284 | */ | |
1829ae9a | 285 | if (pfn == 0) |
84d77001 | 286 | end_pfn = PFN_DOWN(PMD_SIZE); |
f765090a | 287 | else |
1829ae9a | 288 | end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 289 | #else /* CONFIG_X86_64 */ |
1829ae9a | 290 | end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 291 | #endif |
2e8059ed YL |
292 | if (end_pfn > limit_pfn) |
293 | end_pfn = limit_pfn; | |
f765090a PE |
294 | if (start_pfn < end_pfn) { |
295 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); | |
1829ae9a | 296 | pfn = end_pfn; |
f765090a PE |
297 | } |
298 | ||
299 | /* big page (2M) range */ | |
1829ae9a | 300 | start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 301 | #ifdef CONFIG_X86_32 |
2e8059ed | 302 | end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); |
f765090a | 303 | #else /* CONFIG_X86_64 */ |
1829ae9a | 304 | end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE)); |
2e8059ed YL |
305 | if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE))) |
306 | end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); | |
f765090a PE |
307 | #endif |
308 | ||
309 | if (start_pfn < end_pfn) { | |
310 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, | |
311 | page_size_mask & (1<<PG_LEVEL_2M)); | |
1829ae9a | 312 | pfn = end_pfn; |
f765090a PE |
313 | } |
314 | ||
315 | #ifdef CONFIG_X86_64 | |
316 | /* big page (1G) range */ | |
1829ae9a | 317 | start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE)); |
2e8059ed | 318 | end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE)); |
f765090a PE |
319 | if (start_pfn < end_pfn) { |
320 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, | |
321 | page_size_mask & | |
322 | ((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G))); | |
1829ae9a | 323 | pfn = end_pfn; |
f765090a PE |
324 | } |
325 | ||
326 | /* tail is not big page (1G) alignment */ | |
1829ae9a | 327 | start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE)); |
2e8059ed | 328 | end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE)); |
f765090a PE |
329 | if (start_pfn < end_pfn) { |
330 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, | |
331 | page_size_mask & (1<<PG_LEVEL_2M)); | |
1829ae9a | 332 | pfn = end_pfn; |
f765090a PE |
333 | } |
334 | #endif | |
335 | ||
336 | /* tail is not big page (2M) alignment */ | |
1829ae9a | 337 | start_pfn = pfn; |
2e8059ed | 338 | end_pfn = limit_pfn; |
f765090a PE |
339 | nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0); |
340 | ||
7de3d66b YL |
341 | if (!after_bootmem) |
342 | adjust_range_page_size_mask(mr, nr_range); | |
343 | ||
f765090a PE |
344 | /* try to merge same page size and continuous */ |
345 | for (i = 0; nr_range > 1 && i < nr_range - 1; i++) { | |
346 | unsigned long old_start; | |
347 | if (mr[i].end != mr[i+1].start || | |
348 | mr[i].page_size_mask != mr[i+1].page_size_mask) | |
349 | continue; | |
350 | /* move it */ | |
351 | old_start = mr[i].start; | |
352 | memmove(&mr[i], &mr[i+1], | |
353 | (nr_range - 1 - i) * sizeof(struct map_range)); | |
354 | mr[i--].start = old_start; | |
355 | nr_range--; | |
356 | } | |
357 | ||
358 | for (i = 0; i < nr_range; i++) | |
c9cdaeb2 | 359 | pr_debug(" [mem %#010lx-%#010lx] page %s\n", |
365811d6 | 360 | mr[i].start, mr[i].end - 1, |
f15e0518 | 361 | page_size_string(&mr[i])); |
f765090a | 362 | |
4e33e065 YL |
363 | return nr_range; |
364 | } | |
365 | ||
0e691cf8 YL |
366 | struct range pfn_mapped[E820_X_MAX]; |
367 | int nr_pfn_mapped; | |
66520ebc JS |
368 | |
369 | static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn) | |
370 | { | |
371 | nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_X_MAX, | |
372 | nr_pfn_mapped, start_pfn, end_pfn); | |
373 | nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_X_MAX); | |
374 | ||
375 | max_pfn_mapped = max(max_pfn_mapped, end_pfn); | |
376 | ||
377 | if (start_pfn < (1UL<<(32-PAGE_SHIFT))) | |
378 | max_low_pfn_mapped = max(max_low_pfn_mapped, | |
379 | min(end_pfn, 1UL<<(32-PAGE_SHIFT))); | |
380 | } | |
381 | ||
382 | bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn) | |
383 | { | |
384 | int i; | |
385 | ||
386 | for (i = 0; i < nr_pfn_mapped; i++) | |
387 | if ((start_pfn >= pfn_mapped[i].start) && | |
388 | (end_pfn <= pfn_mapped[i].end)) | |
389 | return true; | |
390 | ||
391 | return false; | |
392 | } | |
393 | ||
4e33e065 YL |
394 | /* |
395 | * Setup the direct mapping of the physical memory at PAGE_OFFSET. | |
396 | * This runs before bootmem is initialized and gets pages directly from | |
397 | * the physical memory. To access them they are temporarily mapped. | |
398 | */ | |
399 | unsigned long __init_refok init_memory_mapping(unsigned long start, | |
400 | unsigned long end) | |
401 | { | |
402 | struct map_range mr[NR_RANGE_MR]; | |
403 | unsigned long ret = 0; | |
404 | int nr_range, i; | |
405 | ||
c9cdaeb2 | 406 | pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n", |
4e33e065 YL |
407 | start, end - 1); |
408 | ||
409 | memset(mr, 0, sizeof(mr)); | |
410 | nr_range = split_mem_range(mr, 0, start, end); | |
411 | ||
f765090a PE |
412 | for (i = 0; i < nr_range; i++) |
413 | ret = kernel_physical_mapping_init(mr[i].start, mr[i].end, | |
414 | mr[i].page_size_mask); | |
f765090a | 415 | |
66520ebc JS |
416 | add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT); |
417 | ||
c14fa0b6 YL |
418 | return ret >> PAGE_SHIFT; |
419 | } | |
420 | ||
66520ebc | 421 | /* |
cf8b166d ZY |
422 | * We need to iterate through the E820 memory map and create direct mappings |
423 | * for only E820_RAM and E820_KERN_RESERVED regions. We cannot simply | |
424 | * create direct mappings for all pfns from [0 to max_low_pfn) and | |
425 | * [4GB to max_pfn) because of possible memory holes in high addresses | |
426 | * that cannot be marked as UC by fixed/variable range MTRRs. | |
427 | * Depending on the alignment of E820 ranges, this may possibly result | |
428 | * in using smaller size (i.e. 4K instead of 2M or 1G) page tables. | |
429 | * | |
430 | * init_mem_mapping() calls init_range_memory_mapping() with big range. | |
431 | * That range would have hole in the middle or ends, and only ram parts | |
432 | * will be mapped in init_range_memory_mapping(). | |
66520ebc | 433 | */ |
8d57470d | 434 | static unsigned long __init init_range_memory_mapping( |
b8fd39c0 YL |
435 | unsigned long r_start, |
436 | unsigned long r_end) | |
66520ebc JS |
437 | { |
438 | unsigned long start_pfn, end_pfn; | |
8d57470d | 439 | unsigned long mapped_ram_size = 0; |
66520ebc JS |
440 | int i; |
441 | ||
66520ebc | 442 | for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) { |
b8fd39c0 YL |
443 | u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end); |
444 | u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end); | |
445 | if (start >= end) | |
66520ebc JS |
446 | continue; |
447 | ||
c9b3234a YL |
448 | /* |
449 | * if it is overlapping with brk pgt, we need to | |
450 | * alloc pgt buf from memblock instead. | |
451 | */ | |
452 | can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >= | |
453 | min(end, (u64)pgt_buf_top<<PAGE_SHIFT); | |
f763ad1d | 454 | init_memory_mapping(start, end); |
8d57470d | 455 | mapped_ram_size += end - start; |
c9b3234a | 456 | can_use_brk_pgt = true; |
66520ebc | 457 | } |
8d57470d YL |
458 | |
459 | return mapped_ram_size; | |
66520ebc JS |
460 | } |
461 | ||
6979287a YL |
462 | static unsigned long __init get_new_step_size(unsigned long step_size) |
463 | { | |
464 | /* | |
132978b9 | 465 | * Initial mapped size is PMD_SIZE (2M). |
6979287a YL |
466 | * We can not set step_size to be PUD_SIZE (1G) yet. |
467 | * In worse case, when we cross the 1G boundary, and | |
468 | * PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k) | |
132978b9 JB |
469 | * to map 1G range with PTE. Hence we use one less than the |
470 | * difference of page table level shifts. | |
6979287a | 471 | * |
132978b9 JB |
472 | * Don't need to worry about overflow in the top-down case, on 32bit, |
473 | * when step_size is 0, round_down() returns 0 for start, and that | |
474 | * turns it into 0x100000000ULL. | |
475 | * In the bottom-up case, round_up(x, 0) returns 0 though too, which | |
476 | * needs to be taken into consideration by the code below. | |
6979287a | 477 | */ |
132978b9 | 478 | return step_size << (PMD_SHIFT - PAGE_SHIFT - 1); |
6979287a YL |
479 | } |
480 | ||
0167d7d8 TC |
481 | /** |
482 | * memory_map_top_down - Map [map_start, map_end) top down | |
483 | * @map_start: start address of the target memory range | |
484 | * @map_end: end address of the target memory range | |
485 | * | |
486 | * This function will setup direct mapping for memory range | |
487 | * [map_start, map_end) in top-down. That said, the page tables | |
488 | * will be allocated at the end of the memory, and we map the | |
489 | * memory in top-down. | |
490 | */ | |
491 | static void __init memory_map_top_down(unsigned long map_start, | |
492 | unsigned long map_end) | |
c14fa0b6 | 493 | { |
0167d7d8 | 494 | unsigned long real_end, start, last_start; |
8d57470d YL |
495 | unsigned long step_size; |
496 | unsigned long addr; | |
497 | unsigned long mapped_ram_size = 0; | |
ab951937 | 498 | |
98e7a989 | 499 | /* xen has big range in reserved near end of ram, skip it at first.*/ |
0167d7d8 | 500 | addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE); |
8d57470d YL |
501 | real_end = addr + PMD_SIZE; |
502 | ||
503 | /* step_size need to be small so pgt_buf from BRK could cover it */ | |
504 | step_size = PMD_SIZE; | |
505 | max_pfn_mapped = 0; /* will get exact value next */ | |
506 | min_pfn_mapped = real_end >> PAGE_SHIFT; | |
507 | last_start = start = real_end; | |
cf8b166d ZY |
508 | |
509 | /* | |
510 | * We start from the top (end of memory) and go to the bottom. | |
511 | * The memblock_find_in_range() gets us a block of RAM from the | |
512 | * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages | |
513 | * for page table. | |
514 | */ | |
0167d7d8 | 515 | while (last_start > map_start) { |
8d57470d YL |
516 | if (last_start > step_size) { |
517 | start = round_down(last_start - 1, step_size); | |
0167d7d8 TC |
518 | if (start < map_start) |
519 | start = map_start; | |
8d57470d | 520 | } else |
0167d7d8 | 521 | start = map_start; |
132978b9 | 522 | mapped_ram_size += init_range_memory_mapping(start, |
8d57470d YL |
523 | last_start); |
524 | last_start = start; | |
525 | min_pfn_mapped = last_start >> PAGE_SHIFT; | |
132978b9 | 526 | if (mapped_ram_size >= step_size) |
6979287a | 527 | step_size = get_new_step_size(step_size); |
8d57470d YL |
528 | } |
529 | ||
0167d7d8 TC |
530 | if (real_end < map_end) |
531 | init_range_memory_mapping(real_end, map_end); | |
532 | } | |
533 | ||
b959ed6c TC |
534 | /** |
535 | * memory_map_bottom_up - Map [map_start, map_end) bottom up | |
536 | * @map_start: start address of the target memory range | |
537 | * @map_end: end address of the target memory range | |
538 | * | |
539 | * This function will setup direct mapping for memory range | |
540 | * [map_start, map_end) in bottom-up. Since we have limited the | |
541 | * bottom-up allocation above the kernel, the page tables will | |
542 | * be allocated just above the kernel and we map the memory | |
543 | * in [map_start, map_end) in bottom-up. | |
544 | */ | |
545 | static void __init memory_map_bottom_up(unsigned long map_start, | |
546 | unsigned long map_end) | |
547 | { | |
132978b9 | 548 | unsigned long next, start; |
b959ed6c TC |
549 | unsigned long mapped_ram_size = 0; |
550 | /* step_size need to be small so pgt_buf from BRK could cover it */ | |
551 | unsigned long step_size = PMD_SIZE; | |
552 | ||
553 | start = map_start; | |
554 | min_pfn_mapped = start >> PAGE_SHIFT; | |
555 | ||
556 | /* | |
557 | * We start from the bottom (@map_start) and go to the top (@map_end). | |
558 | * The memblock_find_in_range() gets us a block of RAM from the | |
559 | * end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages | |
560 | * for page table. | |
561 | */ | |
562 | while (start < map_end) { | |
132978b9 | 563 | if (step_size && map_end - start > step_size) { |
b959ed6c TC |
564 | next = round_up(start + 1, step_size); |
565 | if (next > map_end) | |
566 | next = map_end; | |
132978b9 | 567 | } else { |
b959ed6c | 568 | next = map_end; |
132978b9 | 569 | } |
b959ed6c | 570 | |
132978b9 | 571 | mapped_ram_size += init_range_memory_mapping(start, next); |
b959ed6c TC |
572 | start = next; |
573 | ||
132978b9 | 574 | if (mapped_ram_size >= step_size) |
b959ed6c | 575 | step_size = get_new_step_size(step_size); |
b959ed6c TC |
576 | } |
577 | } | |
578 | ||
0167d7d8 TC |
579 | void __init init_mem_mapping(void) |
580 | { | |
581 | unsigned long end; | |
582 | ||
583 | probe_page_size_mask(); | |
584 | ||
585 | #ifdef CONFIG_X86_64 | |
586 | end = max_pfn << PAGE_SHIFT; | |
587 | #else | |
588 | end = max_low_pfn << PAGE_SHIFT; | |
589 | #endif | |
590 | ||
591 | /* the ISA range is always mapped regardless of memory holes */ | |
592 | init_memory_mapping(0, ISA_END_ADDRESS); | |
593 | ||
b234e8a0 TG |
594 | /* Init the trampoline, possibly with KASLR memory offset */ |
595 | init_trampoline(); | |
596 | ||
b959ed6c TC |
597 | /* |
598 | * If the allocation is in bottom-up direction, we setup direct mapping | |
599 | * in bottom-up, otherwise we setup direct mapping in top-down. | |
600 | */ | |
601 | if (memblock_bottom_up()) { | |
602 | unsigned long kernel_end = __pa_symbol(_end); | |
603 | ||
604 | /* | |
605 | * we need two separate calls here. This is because we want to | |
606 | * allocate page tables above the kernel. So we first map | |
607 | * [kernel_end, end) to make memory above the kernel be mapped | |
608 | * as soon as possible. And then use page tables allocated above | |
609 | * the kernel to map [ISA_END_ADDRESS, kernel_end). | |
610 | */ | |
611 | memory_map_bottom_up(kernel_end, end); | |
612 | memory_map_bottom_up(ISA_END_ADDRESS, kernel_end); | |
613 | } else { | |
614 | memory_map_top_down(ISA_END_ADDRESS, end); | |
615 | } | |
8d57470d | 616 | |
f763ad1d YL |
617 | #ifdef CONFIG_X86_64 |
618 | if (max_pfn > max_low_pfn) { | |
619 | /* can we preseve max_low_pfn ?*/ | |
620 | max_low_pfn = max_pfn; | |
621 | } | |
719272c4 YL |
622 | #else |
623 | early_ioremap_page_table_range_init(); | |
8170e6be PA |
624 | #endif |
625 | ||
719272c4 YL |
626 | load_cr3(swapper_pg_dir); |
627 | __flush_tlb_all(); | |
719272c4 | 628 | |
c14fa0b6 | 629 | early_memtest(0, max_pfn_mapped << PAGE_SHIFT); |
22ddfcaa | 630 | } |
e5b2bb55 | 631 | |
540aca06 PE |
632 | /* |
633 | * devmem_is_allowed() checks to see if /dev/mem access to a certain address | |
634 | * is valid. The argument is a physical page number. | |
635 | * | |
636 | * | |
637 | * On x86, access has to be given to the first megabyte of ram because that area | |
801a5591 | 638 | * contains BIOS code and data regions used by X and dosemu and similar apps. |
540aca06 PE |
639 | * Access has to be given to non-kernel-ram areas as well, these contain the PCI |
640 | * mmio resources as well as potential bios/acpi data regions. | |
641 | */ | |
642 | int devmem_is_allowed(unsigned long pagenr) | |
643 | { | |
73e8f3d7 | 644 | if (pagenr < 256) |
540aca06 PE |
645 | return 1; |
646 | if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) | |
647 | return 0; | |
648 | if (!page_is_ram(pagenr)) | |
649 | return 1; | |
650 | return 0; | |
651 | } | |
652 | ||
e5b2bb55 PE |
653 | void free_init_pages(char *what, unsigned long begin, unsigned long end) |
654 | { | |
c967da6a | 655 | unsigned long begin_aligned, end_aligned; |
e5b2bb55 | 656 | |
c967da6a YL |
657 | /* Make sure boundaries are page aligned */ |
658 | begin_aligned = PAGE_ALIGN(begin); | |
659 | end_aligned = end & PAGE_MASK; | |
660 | ||
661 | if (WARN_ON(begin_aligned != begin || end_aligned != end)) { | |
662 | begin = begin_aligned; | |
663 | end = end_aligned; | |
664 | } | |
665 | ||
666 | if (begin >= end) | |
e5b2bb55 PE |
667 | return; |
668 | ||
669 | /* | |
670 | * If debugging page accesses then do not free this memory but | |
671 | * mark them not present - any buggy init-section access will | |
672 | * create a kernel page fault: | |
673 | */ | |
a75e1f63 CB |
674 | if (debug_pagealloc_enabled()) { |
675 | pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n", | |
676 | begin, end - 1); | |
677 | set_memory_np(begin, (end - begin) >> PAGE_SHIFT); | |
678 | } else { | |
679 | /* | |
680 | * We just marked the kernel text read only above, now that | |
681 | * we are going to free part of that, we need to make that | |
682 | * writeable and non-executable first. | |
683 | */ | |
684 | set_memory_nx(begin, (end - begin) >> PAGE_SHIFT); | |
685 | set_memory_rw(begin, (end - begin) >> PAGE_SHIFT); | |
e5b2bb55 | 686 | |
a75e1f63 CB |
687 | free_reserved_area((void *)begin, (void *)end, |
688 | POISON_FREE_INITMEM, what); | |
689 | } | |
e5b2bb55 PE |
690 | } |
691 | ||
692 | void free_initmem(void) | |
693 | { | |
c88442ec | 694 | free_init_pages("unused kernel", |
e5b2bb55 PE |
695 | (unsigned long)(&__init_begin), |
696 | (unsigned long)(&__init_end)); | |
697 | } | |
731ddea6 PE |
698 | |
699 | #ifdef CONFIG_BLK_DEV_INITRD | |
0d26d1d8 | 700 | void __init free_initrd_mem(unsigned long start, unsigned long end) |
731ddea6 | 701 | { |
cd745be8 FY |
702 | /* |
703 | * Remember, initrd memory may contain microcode or other useful things. | |
704 | * Before we lose initrd mem, we need to find a place to hold them | |
705 | * now that normal virtual memory is enabled. | |
706 | */ | |
707 | save_microcode_in_initrd(); | |
cd745be8 | 708 | |
c967da6a YL |
709 | /* |
710 | * end could be not aligned, and We can not align that, | |
711 | * decompresser could be confused by aligned initrd_end | |
712 | * We already reserve the end partial page before in | |
713 | * - i386_start_kernel() | |
714 | * - x86_64_start_kernel() | |
715 | * - relocate_initrd() | |
716 | * So here We can do PAGE_ALIGN() safely to get partial page to be freed | |
717 | */ | |
c88442ec | 718 | free_init_pages("initrd", start, PAGE_ALIGN(end)); |
731ddea6 PE |
719 | } |
720 | #endif | |
17623915 PE |
721 | |
722 | void __init zone_sizes_init(void) | |
723 | { | |
724 | unsigned long max_zone_pfns[MAX_NR_ZONES]; | |
725 | ||
726 | memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); | |
727 | ||
728 | #ifdef CONFIG_ZONE_DMA | |
c072b90c | 729 | max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn); |
17623915 PE |
730 | #endif |
731 | #ifdef CONFIG_ZONE_DMA32 | |
c072b90c | 732 | max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn); |
17623915 PE |
733 | #endif |
734 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | |
735 | #ifdef CONFIG_HIGHMEM | |
736 | max_zone_pfns[ZONE_HIGHMEM] = max_pfn; | |
737 | #endif | |
738 | ||
739 | free_area_init_nodes(max_zone_pfns); | |
740 | } | |
741 | ||
1e02ce4c AL |
742 | DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = { |
743 | #ifdef CONFIG_SMP | |
744 | .active_mm = &init_mm, | |
745 | .state = 0, | |
746 | #endif | |
747 | .cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */ | |
748 | }; | |
749 | EXPORT_SYMBOL_GPL(cpu_tlbstate); | |
750 | ||
bd809af1 JG |
751 | void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache) |
752 | { | |
753 | /* entry 0 MUST be WB (hardwired to speed up translations) */ | |
754 | BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB); | |
755 | ||
756 | __cachemode2pte_tbl[cache] = __cm_idx2pte(entry); | |
757 | __pte2cachemode_tbl[entry] = cache; | |
758 | } |