Merge tag 'edac_for_4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
[deliverable/linux.git] / arch / x86 / mm / init_64.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
a2531293 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
1da177e4
LT
9#include <linux/signal.h>
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/ptrace.h>
16#include <linux/mman.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/smp.h>
20#include <linux/init.h>
11034d55 21#include <linux/initrd.h>
1da177e4
LT
22#include <linux/pagemap.h>
23#include <linux/bootmem.h>
a9ce6bc1 24#include <linux/memblock.h>
1da177e4 25#include <linux/proc_fs.h>
59170891 26#include <linux/pci.h>
6fb14755 27#include <linux/pfn.h>
c9cf5528 28#include <linux/poison.h>
17a941d8 29#include <linux/dma-mapping.h>
44df75e6 30#include <linux/module.h>
a63fdc51 31#include <linux/memory.h>
44df75e6 32#include <linux/memory_hotplug.h>
ae32b129 33#include <linux/nmi.h>
5a0e3ad6 34#include <linux/gfp.h>
2f96b8c1 35#include <linux/kcore.h>
1da177e4
LT
36
37#include <asm/processor.h>
46eaa670 38#include <asm/bios_ebda.h>
1da177e4
LT
39#include <asm/uaccess.h>
40#include <asm/pgtable.h>
41#include <asm/pgalloc.h>
42#include <asm/dma.h>
43#include <asm/fixmap.h>
44#include <asm/e820.h>
45#include <asm/apic.h>
46#include <asm/tlb.h>
47#include <asm/mmu_context.h>
48#include <asm/proto.h>
49#include <asm/smp.h>
2bc0414e 50#include <asm/sections.h>
718fc13b 51#include <asm/kdebug.h>
aaa64e04 52#include <asm/numa.h>
7bfeab9a 53#include <asm/cacheflush.h>
4fcb2083 54#include <asm/init.h>
e5f15b45 55#include <asm/setup.h>
1da177e4 56
5c51bdbe
YL
57#include "mm_internal.h"
58
aece2785
YL
59static void ident_pmd_init(unsigned long pmd_flag, pmd_t *pmd_page,
60 unsigned long addr, unsigned long end)
61{
62 addr &= PMD_MASK;
63 for (; addr < end; addr += PMD_SIZE) {
64 pmd_t *pmd = pmd_page + pmd_index(addr);
65
66 if (!pmd_present(*pmd))
67 set_pmd(pmd, __pmd(addr | pmd_flag));
68 }
69}
70static int ident_pud_init(struct x86_mapping_info *info, pud_t *pud_page,
71 unsigned long addr, unsigned long end)
72{
73 unsigned long next;
74
75 for (; addr < end; addr = next) {
76 pud_t *pud = pud_page + pud_index(addr);
77 pmd_t *pmd;
78
79 next = (addr & PUD_MASK) + PUD_SIZE;
80 if (next > end)
81 next = end;
82
83 if (pud_present(*pud)) {
84 pmd = pmd_offset(pud, 0);
85 ident_pmd_init(info->pmd_flag, pmd, addr, next);
86 continue;
87 }
88 pmd = (pmd_t *)info->alloc_pgt_page(info->context);
89 if (!pmd)
90 return -ENOMEM;
91 ident_pmd_init(info->pmd_flag, pmd, addr, next);
92 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
93 }
94
95 return 0;
96}
97
98int kernel_ident_mapping_init(struct x86_mapping_info *info, pgd_t *pgd_page,
99 unsigned long addr, unsigned long end)
100{
101 unsigned long next;
102 int result;
103 int off = info->kernel_mapping ? pgd_index(__PAGE_OFFSET) : 0;
104
105 for (; addr < end; addr = next) {
106 pgd_t *pgd = pgd_page + pgd_index(addr) + off;
107 pud_t *pud;
108
109 next = (addr & PGDIR_MASK) + PGDIR_SIZE;
110 if (next > end)
111 next = end;
112
113 if (pgd_present(*pgd)) {
114 pud = pud_offset(pgd, 0);
115 result = ident_pud_init(info, pud, addr, next);
116 if (result)
117 return result;
118 continue;
119 }
120
121 pud = (pud_t *)info->alloc_pgt_page(info->context);
122 if (!pud)
123 return -ENOMEM;
124 result = ident_pud_init(info, pud, addr, next);
125 if (result)
126 return result;
127 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE));
128 }
129
130 return 0;
131}
132
1da177e4
LT
133/*
134 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
135 * physical space so we can cache the place of the first one and move
136 * around without checking the pgd every time.
137 */
138
f955371c 139pteval_t __supported_pte_mask __read_mostly = ~0;
bd220a24
YL
140EXPORT_SYMBOL_GPL(__supported_pte_mask);
141
bd220a24
YL
142int force_personality32;
143
deed05b7
IM
144/*
145 * noexec32=on|off
146 * Control non executable heap for 32bit processes.
147 * To control the stack too use noexec=off
148 *
149 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
150 * off PROT_READ implies PROT_EXEC
151 */
bd220a24
YL
152static int __init nonx32_setup(char *str)
153{
154 if (!strcmp(str, "on"))
155 force_personality32 &= ~READ_IMPLIES_EXEC;
156 else if (!strcmp(str, "off"))
157 force_personality32 |= READ_IMPLIES_EXEC;
158 return 1;
159}
160__setup("noexec32=", nonx32_setup);
161
6afb5157
HL
162/*
163 * When memory was added/removed make sure all the processes MM have
164 * suitable PGD entries in the local PGD level page.
165 */
9661d5bc 166void sync_global_pgds(unsigned long start, unsigned long end, int removed)
6afb5157 167{
44235dcd
JF
168 unsigned long address;
169
170 for (address = start; address <= end; address += PGDIR_SIZE) {
171 const pgd_t *pgd_ref = pgd_offset_k(address);
44235dcd
JF
172 struct page *page;
173
9661d5bc
YI
174 /*
175 * When it is called after memory hot remove, pgd_none()
176 * returns true. In this case (removed == 1), we must clear
177 * the PGD entries in the local PGD level page.
178 */
179 if (pgd_none(*pgd_ref) && !removed)
44235dcd
JF
180 continue;
181
a79e53d8 182 spin_lock(&pgd_lock);
44235dcd 183 list_for_each_entry(page, &pgd_list, lru) {
be354f40 184 pgd_t *pgd;
617d34d9
JF
185 spinlock_t *pgt_lock;
186
44235dcd 187 pgd = (pgd_t *)page_address(page) + pgd_index(address);
a79e53d8 188 /* the pgt_lock only for Xen */
617d34d9
JF
189 pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
190 spin_lock(pgt_lock);
191
9661d5bc 192 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
44235dcd
JF
193 BUG_ON(pgd_page_vaddr(*pgd)
194 != pgd_page_vaddr(*pgd_ref));
617d34d9 195
9661d5bc
YI
196 if (removed) {
197 if (pgd_none(*pgd_ref) && !pgd_none(*pgd))
198 pgd_clear(pgd);
199 } else {
200 if (pgd_none(*pgd))
201 set_pgd(pgd, *pgd_ref);
202 }
203
617d34d9 204 spin_unlock(pgt_lock);
44235dcd 205 }
a79e53d8 206 spin_unlock(&pgd_lock);
44235dcd 207 }
6afb5157
HL
208}
209
8d6ea967
MS
210/*
211 * NOTE: This function is marked __ref because it calls __init function
212 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
213 */
214static __ref void *spp_getpage(void)
14a62c34 215{
1da177e4 216 void *ptr;
14a62c34 217
1da177e4 218 if (after_bootmem)
9e730237 219 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
1da177e4
LT
220 else
221 ptr = alloc_bootmem_pages(PAGE_SIZE);
14a62c34
TG
222
223 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
224 panic("set_pte_phys: cannot allocate page data %s\n",
225 after_bootmem ? "after bootmem" : "");
226 }
1da177e4 227
10f22dde 228 pr_debug("spp_getpage %p\n", ptr);
14a62c34 229
1da177e4 230 return ptr;
14a62c34 231}
1da177e4 232
f254f390 233static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
1da177e4 234{
458a3e64
TH
235 if (pgd_none(*pgd)) {
236 pud_t *pud = (pud_t *)spp_getpage();
237 pgd_populate(&init_mm, pgd, pud);
238 if (pud != pud_offset(pgd, 0))
239 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
240 pud, pud_offset(pgd, 0));
241 }
242 return pud_offset(pgd, vaddr);
243}
1da177e4 244
f254f390 245static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
458a3e64 246{
1da177e4 247 if (pud_none(*pud)) {
458a3e64 248 pmd_t *pmd = (pmd_t *) spp_getpage();
bb23e403 249 pud_populate(&init_mm, pud, pmd);
458a3e64 250 if (pmd != pmd_offset(pud, 0))
10f22dde 251 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
458a3e64 252 pmd, pmd_offset(pud, 0));
1da177e4 253 }
458a3e64
TH
254 return pmd_offset(pud, vaddr);
255}
256
f254f390 257static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
458a3e64 258{
1da177e4 259 if (pmd_none(*pmd)) {
458a3e64 260 pte_t *pte = (pte_t *) spp_getpage();
bb23e403 261 pmd_populate_kernel(&init_mm, pmd, pte);
458a3e64 262 if (pte != pte_offset_kernel(pmd, 0))
10f22dde 263 printk(KERN_ERR "PAGETABLE BUG #02!\n");
1da177e4 264 }
458a3e64
TH
265 return pte_offset_kernel(pmd, vaddr);
266}
267
268void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
269{
270 pud_t *pud;
271 pmd_t *pmd;
272 pte_t *pte;
273
274 pud = pud_page + pud_index(vaddr);
275 pmd = fill_pmd(pud, vaddr);
276 pte = fill_pte(pmd, vaddr);
1da177e4 277
1da177e4
LT
278 set_pte(pte, new_pte);
279
280 /*
281 * It's enough to flush this one mapping.
282 * (PGE mappings get flushed as well)
283 */
284 __flush_tlb_one(vaddr);
285}
286
458a3e64 287void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
0814e0ba
EH
288{
289 pgd_t *pgd;
290 pud_t *pud_page;
291
292 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
293
294 pgd = pgd_offset_k(vaddr);
295 if (pgd_none(*pgd)) {
296 printk(KERN_ERR
297 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
298 return;
299 }
300 pud_page = (pud_t*)pgd_page_vaddr(*pgd);
301 set_pte_vaddr_pud(pud_page, vaddr, pteval);
302}
303
458a3e64 304pmd_t * __init populate_extra_pmd(unsigned long vaddr)
11124411
TH
305{
306 pgd_t *pgd;
307 pud_t *pud;
308
309 pgd = pgd_offset_k(vaddr);
458a3e64
TH
310 pud = fill_pud(pgd, vaddr);
311 return fill_pmd(pud, vaddr);
312}
313
314pte_t * __init populate_extra_pte(unsigned long vaddr)
315{
316 pmd_t *pmd;
11124411 317
458a3e64
TH
318 pmd = populate_extra_pmd(vaddr);
319 return fill_pte(pmd, vaddr);
11124411
TH
320}
321
3a9e189d
JS
322/*
323 * Create large page table mappings for a range of physical addresses.
324 */
325static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
2df58b6d 326 enum page_cache_mode cache)
3a9e189d
JS
327{
328 pgd_t *pgd;
329 pud_t *pud;
330 pmd_t *pmd;
2df58b6d 331 pgprot_t prot;
3a9e189d 332
2df58b6d
JG
333 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
334 pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
3a9e189d
JS
335 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
336 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
337 pgd = pgd_offset_k((unsigned long)__va(phys));
338 if (pgd_none(*pgd)) {
339 pud = (pud_t *) spp_getpage();
340 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
341 _PAGE_USER));
342 }
343 pud = pud_offset(pgd, (unsigned long)__va(phys));
344 if (pud_none(*pud)) {
345 pmd = (pmd_t *) spp_getpage();
346 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
347 _PAGE_USER));
348 }
349 pmd = pmd_offset(pud, phys);
350 BUG_ON(!pmd_none(*pmd));
351 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
352 }
353}
354
355void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
356{
2df58b6d 357 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
3a9e189d
JS
358}
359
360void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
361{
2df58b6d 362 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
3a9e189d
JS
363}
364
31eedd82 365/*
88f3aec7
IM
366 * The head.S code sets up the kernel high mapping:
367 *
368 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
31eedd82 369 *
1e3b3081 370 * phys_base holds the negative offset to the kernel, which is added
31eedd82
TG
371 * to the compile time generated pmds. This results in invalid pmds up
372 * to the point where we hit the physaddr 0 mapping.
373 *
e5f15b45
YL
374 * We limit the mappings to the region from _text to _brk_end. _brk_end
375 * is rounded up to the 2MB boundary. This catches the invalid pmds as
31eedd82
TG
376 * well, as they are located before _text:
377 */
378void __init cleanup_highmap(void)
379{
380 unsigned long vaddr = __START_KERNEL_map;
10054230 381 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
e5f15b45 382 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
31eedd82 383 pmd_t *pmd = level2_kernel_pgt;
31eedd82 384
10054230
YL
385 /*
386 * Native path, max_pfn_mapped is not set yet.
387 * Xen has valid max_pfn_mapped set in
388 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
389 */
390 if (max_pfn_mapped)
391 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
392
e5f15b45 393 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
2884f110 394 if (pmd_none(*pmd))
31eedd82
TG
395 continue;
396 if (vaddr < (unsigned long) _text || vaddr > end)
397 set_pmd(pmd, __pmd(0));
398 }
399}
400
7b16eb89 401static unsigned long __meminit
b27a43c1
SS
402phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
403 pgprot_t prot)
4f9c11dd 404{
eceb3632 405 unsigned long pages = 0, next;
7b16eb89 406 unsigned long last_map_addr = end;
4f9c11dd 407 int i;
7b16eb89 408
4f9c11dd
JF
409 pte_t *pte = pte_page + pte_index(addr);
410
eceb3632
YL
411 for (i = pte_index(addr); i < PTRS_PER_PTE; i++, addr = next, pte++) {
412 next = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 413 if (addr >= end) {
eceb3632
YL
414 if (!after_bootmem &&
415 !e820_any_mapped(addr & PAGE_MASK, next, E820_RAM) &&
416 !e820_any_mapped(addr & PAGE_MASK, next, E820_RESERVED_KERN))
417 set_pte(pte, __pte(0));
418 continue;
4f9c11dd
JF
419 }
420
b27a43c1
SS
421 /*
422 * We will re-use the existing mapping.
423 * Xen for example has some special requirements, like mapping
424 * pagetable pages as RO. So assume someone who pre-setup
425 * these mappings are more intelligent.
426 */
3afa3949 427 if (pte_val(*pte)) {
876ee61a
JB
428 if (!after_bootmem)
429 pages++;
4f9c11dd 430 continue;
3afa3949 431 }
4f9c11dd
JF
432
433 if (0)
434 printk(" pte=%p addr=%lx pte=%016lx\n",
435 pte, addr, pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL).pte);
4f9c11dd 436 pages++;
b27a43c1 437 set_pte(pte, pfn_pte(addr >> PAGE_SHIFT, prot));
7b16eb89 438 last_map_addr = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 439 }
a2699e47 440
4f9c11dd 441 update_page_count(PG_LEVEL_4K, pages);
7b16eb89
YL
442
443 return last_map_addr;
4f9c11dd
JF
444}
445
cc615032 446static unsigned long __meminit
b50efd2a 447phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
b27a43c1 448 unsigned long page_size_mask, pgprot_t prot)
44df75e6 449{
20167d34 450 unsigned long pages = 0, next;
7b16eb89 451 unsigned long last_map_addr = end;
ce0c0e50 452
6ad91658 453 int i = pmd_index(address);
44df75e6 454
20167d34 455 for (; i < PTRS_PER_PMD; i++, address = next) {
6ad91658 456 pmd_t *pmd = pmd_page + pmd_index(address);
4f9c11dd 457 pte_t *pte;
b27a43c1 458 pgprot_t new_prot = prot;
44df75e6 459
eceb3632 460 next = (address & PMD_MASK) + PMD_SIZE;
5f51e139 461 if (address >= end) {
eceb3632
YL
462 if (!after_bootmem &&
463 !e820_any_mapped(address & PMD_MASK, next, E820_RAM) &&
464 !e820_any_mapped(address & PMD_MASK, next, E820_RESERVED_KERN))
465 set_pmd(pmd, __pmd(0));
466 continue;
44df75e6 467 }
6ad91658 468
4f9c11dd 469 if (pmd_val(*pmd)) {
8ae3a5a8
JB
470 if (!pmd_large(*pmd)) {
471 spin_lock(&init_mm.page_table_lock);
973dc4f3 472 pte = (pte_t *)pmd_page_vaddr(*pmd);
4b239f45 473 last_map_addr = phys_pte_init(pte, address,
b27a43c1 474 end, prot);
8ae3a5a8 475 spin_unlock(&init_mm.page_table_lock);
a2699e47 476 continue;
8ae3a5a8 477 }
b27a43c1
SS
478 /*
479 * If we are ok with PG_LEVEL_2M mapping, then we will
480 * use the existing mapping,
481 *
482 * Otherwise, we will split the large page mapping but
483 * use the same existing protection bits except for
484 * large page, so that we don't violate Intel's TLB
485 * Application note (317080) which says, while changing
486 * the page sizes, new and old translations should
487 * not differ with respect to page frame and
488 * attributes.
489 */
3afa3949 490 if (page_size_mask & (1 << PG_LEVEL_2M)) {
876ee61a
JB
491 if (!after_bootmem)
492 pages++;
20167d34 493 last_map_addr = next;
b27a43c1 494 continue;
3afa3949 495 }
b27a43c1 496 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
4f9c11dd
JF
497 }
498
b50efd2a 499 if (page_size_mask & (1<<PG_LEVEL_2M)) {
4f9c11dd 500 pages++;
8ae3a5a8 501 spin_lock(&init_mm.page_table_lock);
4f9c11dd 502 set_pte((pte_t *)pmd,
960ddb4f 503 pfn_pte((address & PMD_MASK) >> PAGE_SHIFT,
b27a43c1 504 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
8ae3a5a8 505 spin_unlock(&init_mm.page_table_lock);
20167d34 506 last_map_addr = next;
6ad91658 507 continue;
4f9c11dd 508 }
6ad91658 509
868bf4d6 510 pte = alloc_low_page();
b27a43c1 511 last_map_addr = phys_pte_init(pte, address, end, new_prot);
4f9c11dd 512
8ae3a5a8 513 spin_lock(&init_mm.page_table_lock);
868bf4d6 514 pmd_populate_kernel(&init_mm, pmd, pte);
8ae3a5a8 515 spin_unlock(&init_mm.page_table_lock);
44df75e6 516 }
ce0c0e50 517 update_page_count(PG_LEVEL_2M, pages);
7b16eb89 518 return last_map_addr;
44df75e6
MT
519}
520
cc615032 521static unsigned long __meminit
b50efd2a
YL
522phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
523 unsigned long page_size_mask)
14a62c34 524{
20167d34 525 unsigned long pages = 0, next;
cc615032 526 unsigned long last_map_addr = end;
6ad91658 527 int i = pud_index(addr);
44df75e6 528
20167d34 529 for (; i < PTRS_PER_PUD; i++, addr = next) {
6ad91658 530 pud_t *pud = pud_page + pud_index(addr);
1da177e4 531 pmd_t *pmd;
b27a43c1 532 pgprot_t prot = PAGE_KERNEL;
1da177e4 533
20167d34 534 next = (addr & PUD_MASK) + PUD_SIZE;
eceb3632
YL
535 if (addr >= end) {
536 if (!after_bootmem &&
537 !e820_any_mapped(addr & PUD_MASK, next, E820_RAM) &&
538 !e820_any_mapped(addr & PUD_MASK, next, E820_RESERVED_KERN))
539 set_pud(pud, __pud(0));
1da177e4 540 continue;
14a62c34 541 }
1da177e4 542
6ad91658 543 if (pud_val(*pud)) {
a2699e47 544 if (!pud_large(*pud)) {
973dc4f3 545 pmd = pmd_offset(pud, 0);
4b239f45 546 last_map_addr = phys_pmd_init(pmd, addr, end,
b27a43c1 547 page_size_mask, prot);
4b239f45 548 __flush_tlb_all();
a2699e47
SS
549 continue;
550 }
b27a43c1
SS
551 /*
552 * If we are ok with PG_LEVEL_1G mapping, then we will
553 * use the existing mapping.
554 *
555 * Otherwise, we will split the gbpage mapping but use
556 * the same existing protection bits except for large
557 * page, so that we don't violate Intel's TLB
558 * Application note (317080) which says, while changing
559 * the page sizes, new and old translations should
560 * not differ with respect to page frame and
561 * attributes.
562 */
3afa3949 563 if (page_size_mask & (1 << PG_LEVEL_1G)) {
876ee61a
JB
564 if (!after_bootmem)
565 pages++;
20167d34 566 last_map_addr = next;
b27a43c1 567 continue;
3afa3949 568 }
b27a43c1 569 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
ef925766
AK
570 }
571
b50efd2a 572 if (page_size_mask & (1<<PG_LEVEL_1G)) {
ce0c0e50 573 pages++;
8ae3a5a8 574 spin_lock(&init_mm.page_table_lock);
ef925766 575 set_pte((pte_t *)pud,
960ddb4f
YL
576 pfn_pte((addr & PUD_MASK) >> PAGE_SHIFT,
577 PAGE_KERNEL_LARGE));
8ae3a5a8 578 spin_unlock(&init_mm.page_table_lock);
20167d34 579 last_map_addr = next;
6ad91658
KM
580 continue;
581 }
582
868bf4d6 583 pmd = alloc_low_page();
b27a43c1
SS
584 last_map_addr = phys_pmd_init(pmd, addr, end, page_size_mask,
585 prot);
8ae3a5a8
JB
586
587 spin_lock(&init_mm.page_table_lock);
868bf4d6 588 pud_populate(&init_mm, pud, pmd);
44df75e6 589 spin_unlock(&init_mm.page_table_lock);
1da177e4 590 }
1a2b4412 591 __flush_tlb_all();
a2699e47 592
ce0c0e50 593 update_page_count(PG_LEVEL_1G, pages);
cc615032 594
1a0db38e 595 return last_map_addr;
14a62c34 596}
1da177e4 597
41d840e2 598unsigned long __meminit
f765090a
PE
599kernel_physical_mapping_init(unsigned long start,
600 unsigned long end,
601 unsigned long page_size_mask)
14a62c34 602{
9b861528 603 bool pgd_changed = false;
b50efd2a 604 unsigned long next, last_map_addr = end;
9b861528 605 unsigned long addr;
1da177e4
LT
606
607 start = (unsigned long)__va(start);
608 end = (unsigned long)__va(end);
1c5f50ee 609 addr = start;
1da177e4
LT
610
611 for (; start < end; start = next) {
44df75e6
MT
612 pgd_t *pgd = pgd_offset_k(start);
613 pud_t *pud;
614
c2bdee59 615 next = (start & PGDIR_MASK) + PGDIR_SIZE;
4f9c11dd
JF
616
617 if (pgd_val(*pgd)) {
973dc4f3 618 pud = (pud_t *)pgd_page_vaddr(*pgd);
4b239f45 619 last_map_addr = phys_pud_init(pud, __pa(start),
b50efd2a 620 __pa(end), page_size_mask);
4f9c11dd
JF
621 continue;
622 }
623
868bf4d6 624 pud = alloc_low_page();
c2bdee59 625 last_map_addr = phys_pud_init(pud, __pa(start), __pa(end),
b50efd2a 626 page_size_mask);
8ae3a5a8
JB
627
628 spin_lock(&init_mm.page_table_lock);
868bf4d6 629 pgd_populate(&init_mm, pgd, pud);
8ae3a5a8 630 spin_unlock(&init_mm.page_table_lock);
9b861528 631 pgd_changed = true;
14a62c34 632 }
9b861528
HL
633
634 if (pgd_changed)
9661d5bc 635 sync_global_pgds(addr, end - 1, 0);
9b861528 636
a2699e47 637 __flush_tlb_all();
1da177e4 638
b50efd2a
YL
639 return last_map_addr;
640}
7b16eb89 641
2b97690f 642#ifndef CONFIG_NUMA
d8fc3afc 643void __init initmem_init(void)
1f75d7e3 644{
e7e8de59 645 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
1f75d7e3 646}
3551f88f 647#endif
1f75d7e3 648
1da177e4
LT
649void __init paging_init(void)
650{
3551f88f 651 sparse_memory_present_with_active_regions(MAX_NUMNODES);
44df75e6 652 sparse_init();
44b57280
YL
653
654 /*
655 * clear the default setting with node 0
656 * note: don't use nodes_clear here, that is really clearing when
657 * numa support is not compiled in, and later node_set_state
658 * will not set it back.
659 */
4b0ef1fe
LJ
660 node_clear_state(0, N_MEMORY);
661 if (N_MEMORY != N_NORMAL_MEMORY)
662 node_clear_state(0, N_NORMAL_MEMORY);
44b57280 663
4c0b2e5f 664 zone_sizes_init();
1da177e4 665}
1da177e4 666
44df75e6
MT
667/*
668 * Memory hotplug specific functions
44df75e6 669 */
bc02af93 670#ifdef CONFIG_MEMORY_HOTPLUG
ea085417
SZ
671/*
672 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
673 * updating.
674 */
675static void update_end_of_memory_vars(u64 start, u64 size)
676{
677 unsigned long end_pfn = PFN_UP(start + size);
678
679 if (end_pfn > max_pfn) {
680 max_pfn = end_pfn;
681 max_low_pfn = end_pfn;
682 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
683 }
684}
685
9d99aaa3
AK
686/*
687 * Memory is added always to NORMAL zone. This means you will never get
688 * additional DMA/DMA32 memory.
689 */
bc02af93 690int arch_add_memory(int nid, u64 start, u64 size)
44df75e6 691{
bc02af93 692 struct pglist_data *pgdat = NODE_DATA(nid);
9bfc4113
WN
693 struct zone *zone = pgdat->node_zones +
694 zone_for_memory(nid, start, size, ZONE_NORMAL);
66520ebc 695 unsigned long start_pfn = start >> PAGE_SHIFT;
44df75e6
MT
696 unsigned long nr_pages = size >> PAGE_SHIFT;
697 int ret;
698
66520ebc 699 init_memory_mapping(start, start + size);
45e0b78b 700
c04fc586 701 ret = __add_pages(nid, zone, start_pfn, nr_pages);
fe8b868e 702 WARN_ON_ONCE(ret);
44df75e6 703
ea085417
SZ
704 /* update max_pfn, max_low_pfn and high_memory */
705 update_end_of_memory_vars(start, size);
706
44df75e6 707 return ret;
44df75e6 708}
bc02af93 709EXPORT_SYMBOL_GPL(arch_add_memory);
44df75e6 710
ae9aae9e
WC
711#define PAGE_INUSE 0xFD
712
713static void __meminit free_pagetable(struct page *page, int order)
714{
ae9aae9e
WC
715 unsigned long magic;
716 unsigned int nr_pages = 1 << order;
717
718 /* bootmem page has reserved flag */
719 if (PageReserved(page)) {
720 __ClearPageReserved(page);
ae9aae9e
WC
721
722 magic = (unsigned long)page->lru.next;
723 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
724 while (nr_pages--)
725 put_page_bootmem(page++);
726 } else
170a5a7e
JL
727 while (nr_pages--)
728 free_reserved_page(page++);
ae9aae9e
WC
729 } else
730 free_pages((unsigned long)page_address(page), order);
ae9aae9e
WC
731}
732
733static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
734{
735 pte_t *pte;
736 int i;
737
738 for (i = 0; i < PTRS_PER_PTE; i++) {
739 pte = pte_start + i;
740 if (pte_val(*pte))
741 return;
742 }
743
744 /* free a pte talbe */
745 free_pagetable(pmd_page(*pmd), 0);
746 spin_lock(&init_mm.page_table_lock);
747 pmd_clear(pmd);
748 spin_unlock(&init_mm.page_table_lock);
749}
750
751static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
752{
753 pmd_t *pmd;
754 int i;
755
756 for (i = 0; i < PTRS_PER_PMD; i++) {
757 pmd = pmd_start + i;
758 if (pmd_val(*pmd))
759 return;
760 }
761
762 /* free a pmd talbe */
763 free_pagetable(pud_page(*pud), 0);
764 spin_lock(&init_mm.page_table_lock);
765 pud_clear(pud);
766 spin_unlock(&init_mm.page_table_lock);
767}
768
769/* Return true if pgd is changed, otherwise return false. */
770static bool __meminit free_pud_table(pud_t *pud_start, pgd_t *pgd)
771{
772 pud_t *pud;
773 int i;
774
775 for (i = 0; i < PTRS_PER_PUD; i++) {
776 pud = pud_start + i;
777 if (pud_val(*pud))
778 return false;
779 }
780
781 /* free a pud table */
782 free_pagetable(pgd_page(*pgd), 0);
783 spin_lock(&init_mm.page_table_lock);
784 pgd_clear(pgd);
785 spin_unlock(&init_mm.page_table_lock);
786
787 return true;
788}
789
790static void __meminit
791remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
792 bool direct)
793{
794 unsigned long next, pages = 0;
795 pte_t *pte;
796 void *page_addr;
797 phys_addr_t phys_addr;
798
799 pte = pte_start + pte_index(addr);
800 for (; addr < end; addr = next, pte++) {
801 next = (addr + PAGE_SIZE) & PAGE_MASK;
802 if (next > end)
803 next = end;
804
805 if (!pte_present(*pte))
806 continue;
807
808 /*
809 * We mapped [0,1G) memory as identity mapping when
810 * initializing, in arch/x86/kernel/head_64.S. These
811 * pagetables cannot be removed.
812 */
813 phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
814 if (phys_addr < (phys_addr_t)0x40000000)
815 return;
816
817 if (IS_ALIGNED(addr, PAGE_SIZE) &&
818 IS_ALIGNED(next, PAGE_SIZE)) {
819 /*
820 * Do not free direct mapping pages since they were
821 * freed when offlining, or simplely not in use.
822 */
823 if (!direct)
824 free_pagetable(pte_page(*pte), 0);
825
826 spin_lock(&init_mm.page_table_lock);
827 pte_clear(&init_mm, addr, pte);
828 spin_unlock(&init_mm.page_table_lock);
829
830 /* For non-direct mapping, pages means nothing. */
831 pages++;
832 } else {
833 /*
834 * If we are here, we are freeing vmemmap pages since
835 * direct mapped memory ranges to be freed are aligned.
836 *
837 * If we are not removing the whole page, it means
838 * other page structs in this page are being used and
839 * we canot remove them. So fill the unused page_structs
840 * with 0xFD, and remove the page when it is wholly
841 * filled with 0xFD.
842 */
843 memset((void *)addr, PAGE_INUSE, next - addr);
844
845 page_addr = page_address(pte_page(*pte));
846 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
847 free_pagetable(pte_page(*pte), 0);
848
849 spin_lock(&init_mm.page_table_lock);
850 pte_clear(&init_mm, addr, pte);
851 spin_unlock(&init_mm.page_table_lock);
852 }
853 }
854 }
855
856 /* Call free_pte_table() in remove_pmd_table(). */
857 flush_tlb_all();
858 if (direct)
859 update_page_count(PG_LEVEL_4K, -pages);
860}
861
862static void __meminit
863remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
864 bool direct)
865{
866 unsigned long next, pages = 0;
867 pte_t *pte_base;
868 pmd_t *pmd;
869 void *page_addr;
870
871 pmd = pmd_start + pmd_index(addr);
872 for (; addr < end; addr = next, pmd++) {
873 next = pmd_addr_end(addr, end);
874
875 if (!pmd_present(*pmd))
876 continue;
877
878 if (pmd_large(*pmd)) {
879 if (IS_ALIGNED(addr, PMD_SIZE) &&
880 IS_ALIGNED(next, PMD_SIZE)) {
881 if (!direct)
882 free_pagetable(pmd_page(*pmd),
883 get_order(PMD_SIZE));
884
885 spin_lock(&init_mm.page_table_lock);
886 pmd_clear(pmd);
887 spin_unlock(&init_mm.page_table_lock);
888 pages++;
889 } else {
890 /* If here, we are freeing vmemmap pages. */
891 memset((void *)addr, PAGE_INUSE, next - addr);
892
893 page_addr = page_address(pmd_page(*pmd));
894 if (!memchr_inv(page_addr, PAGE_INUSE,
895 PMD_SIZE)) {
896 free_pagetable(pmd_page(*pmd),
897 get_order(PMD_SIZE));
898
899 spin_lock(&init_mm.page_table_lock);
900 pmd_clear(pmd);
901 spin_unlock(&init_mm.page_table_lock);
902 }
903 }
904
905 continue;
906 }
907
908 pte_base = (pte_t *)pmd_page_vaddr(*pmd);
909 remove_pte_table(pte_base, addr, next, direct);
910 free_pte_table(pte_base, pmd);
911 }
912
913 /* Call free_pmd_table() in remove_pud_table(). */
914 if (direct)
915 update_page_count(PG_LEVEL_2M, -pages);
916}
917
918static void __meminit
919remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
920 bool direct)
921{
922 unsigned long next, pages = 0;
923 pmd_t *pmd_base;
924 pud_t *pud;
925 void *page_addr;
926
927 pud = pud_start + pud_index(addr);
928 for (; addr < end; addr = next, pud++) {
929 next = pud_addr_end(addr, end);
930
931 if (!pud_present(*pud))
932 continue;
933
934 if (pud_large(*pud)) {
935 if (IS_ALIGNED(addr, PUD_SIZE) &&
936 IS_ALIGNED(next, PUD_SIZE)) {
937 if (!direct)
938 free_pagetable(pud_page(*pud),
939 get_order(PUD_SIZE));
940
941 spin_lock(&init_mm.page_table_lock);
942 pud_clear(pud);
943 spin_unlock(&init_mm.page_table_lock);
944 pages++;
945 } else {
946 /* If here, we are freeing vmemmap pages. */
947 memset((void *)addr, PAGE_INUSE, next - addr);
948
949 page_addr = page_address(pud_page(*pud));
950 if (!memchr_inv(page_addr, PAGE_INUSE,
951 PUD_SIZE)) {
952 free_pagetable(pud_page(*pud),
953 get_order(PUD_SIZE));
954
955 spin_lock(&init_mm.page_table_lock);
956 pud_clear(pud);
957 spin_unlock(&init_mm.page_table_lock);
958 }
959 }
960
961 continue;
962 }
963
964 pmd_base = (pmd_t *)pud_page_vaddr(*pud);
965 remove_pmd_table(pmd_base, addr, next, direct);
966 free_pmd_table(pmd_base, pud);
967 }
968
969 if (direct)
970 update_page_count(PG_LEVEL_1G, -pages);
971}
972
973/* start and end are both virtual address. */
974static void __meminit
975remove_pagetable(unsigned long start, unsigned long end, bool direct)
976{
977 unsigned long next;
5255e0a7 978 unsigned long addr;
ae9aae9e
WC
979 pgd_t *pgd;
980 pud_t *pud;
981 bool pgd_changed = false;
982
5255e0a7
YI
983 for (addr = start; addr < end; addr = next) {
984 next = pgd_addr_end(addr, end);
ae9aae9e 985
5255e0a7 986 pgd = pgd_offset_k(addr);
ae9aae9e
WC
987 if (!pgd_present(*pgd))
988 continue;
989
990 pud = (pud_t *)pgd_page_vaddr(*pgd);
5255e0a7 991 remove_pud_table(pud, addr, next, direct);
ae9aae9e
WC
992 if (free_pud_table(pud, pgd))
993 pgd_changed = true;
994 }
995
996 if (pgd_changed)
9661d5bc 997 sync_global_pgds(start, end - 1, 1);
ae9aae9e
WC
998
999 flush_tlb_all();
1000}
1001
0aad818b 1002void __ref vmemmap_free(unsigned long start, unsigned long end)
0197518c 1003{
0197518c
TC
1004 remove_pagetable(start, end, false);
1005}
1006
587ff8c4 1007#ifdef CONFIG_MEMORY_HOTREMOVE
bbcab878
TC
1008static void __meminit
1009kernel_physical_mapping_remove(unsigned long start, unsigned long end)
1010{
1011 start = (unsigned long)__va(start);
1012 end = (unsigned long)__va(end);
1013
1014 remove_pagetable(start, end, true);
1015}
1016
24d335ca
WC
1017int __ref arch_remove_memory(u64 start, u64 size)
1018{
1019 unsigned long start_pfn = start >> PAGE_SHIFT;
1020 unsigned long nr_pages = size >> PAGE_SHIFT;
1021 struct zone *zone;
1022 int ret;
1023
1024 zone = page_zone(pfn_to_page(start_pfn));
bbcab878 1025 kernel_physical_mapping_remove(start, start + size);
24d335ca
WC
1026 ret = __remove_pages(zone, start_pfn, nr_pages);
1027 WARN_ON_ONCE(ret);
1028
1029 return ret;
1030}
1031#endif
45e0b78b
KM
1032#endif /* CONFIG_MEMORY_HOTPLUG */
1033
81ac3ad9 1034static struct kcore_list kcore_vsyscall;
1da177e4 1035
94b43c3d
YL
1036static void __init register_page_bootmem_info(void)
1037{
1038#ifdef CONFIG_NUMA
1039 int i;
1040
1041 for_each_online_node(i)
1042 register_page_bootmem_info_node(NODE_DATA(i));
1043#endif
1044}
1045
1da177e4
LT
1046void __init mem_init(void)
1047{
0dc243ae 1048 pci_iommu_alloc();
1da177e4 1049
48ddb154 1050 /* clear_bss() already clear the empty_zero_page */
1da177e4 1051
94b43c3d 1052 register_page_bootmem_info();
bced0e32
JL
1053
1054 /* this will put all memory onto the freelists */
0c988534 1055 free_all_bootmem();
1da177e4
LT
1056 after_bootmem = 1;
1057
1da177e4 1058 /* Register memory areas for /proc/kcore */
f40c3300
AL
1059 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR,
1060 PAGE_SIZE, KCORE_OTHER);
1da177e4 1061
46a84132 1062 mem_init_print_info(NULL);
1da177e4
LT
1063}
1064
67df197b 1065#ifdef CONFIG_DEBUG_RODATA
edeed305
AV
1066const int rodata_test_data = 0xC3;
1067EXPORT_SYMBOL_GPL(rodata_test_data);
67df197b 1068
502f6604 1069int kernel_set_to_readonly;
16239630
SR
1070
1071void set_kernel_text_rw(void)
1072{
b9af7c0d 1073 unsigned long start = PFN_ALIGN(_text);
e7d23dde 1074 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
1075
1076 if (!kernel_set_to_readonly)
1077 return;
1078
1079 pr_debug("Set kernel text: %lx - %lx for read write\n",
1080 start, end);
1081
e7d23dde
SS
1082 /*
1083 * Make the kernel identity mapping for text RW. Kernel text
1084 * mapping will always be RO. Refer to the comment in
1085 * static_protections() in pageattr.c
1086 */
16239630
SR
1087 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
1088}
1089
1090void set_kernel_text_ro(void)
1091{
b9af7c0d 1092 unsigned long start = PFN_ALIGN(_text);
e7d23dde 1093 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
1094
1095 if (!kernel_set_to_readonly)
1096 return;
1097
1098 pr_debug("Set kernel text: %lx - %lx for read only\n",
1099 start, end);
1100
e7d23dde
SS
1101 /*
1102 * Set the kernel identity mapping for text RO.
1103 */
16239630
SR
1104 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1105}
1106
67df197b
AV
1107void mark_rodata_ro(void)
1108{
74e08179 1109 unsigned long start = PFN_ALIGN(_text);
fc8d7826 1110 unsigned long rodata_start = PFN_ALIGN(__start_rodata);
74e08179 1111 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
fc8d7826
AD
1112 unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
1113 unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
45e2a9d4 1114 unsigned long all_end;
8f0f996e 1115
6fb14755 1116 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
e3ebadd9 1117 (end - start) >> 10);
984bb80d
AV
1118 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1119
16239630
SR
1120 kernel_set_to_readonly = 1;
1121
984bb80d 1122 /*
72212675
YL
1123 * The rodata/data/bss/brk section (but not the kernel text!)
1124 * should also be not-executable.
45e2a9d4
KC
1125 *
1126 * We align all_end to PMD_SIZE because the existing mapping
1127 * is a full PMD. If we would align _brk_end to PAGE_SIZE we
1128 * split the PMD and the reminder between _brk_end and the end
1129 * of the PMD will remain mapped executable.
1130 *
1131 * Any PMD which was setup after the one which covers _brk_end
1132 * has been zapped already via cleanup_highmem().
984bb80d 1133 */
45e2a9d4 1134 all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
72212675 1135 set_memory_nx(rodata_start, (all_end - rodata_start) >> PAGE_SHIFT);
67df197b 1136
1a487252
AV
1137 rodata_test();
1138
0c42f392 1139#ifdef CONFIG_CPA_DEBUG
10f22dde 1140 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
6d238cc4 1141 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
0c42f392 1142
10f22dde 1143 printk(KERN_INFO "Testing CPA: again\n");
6d238cc4 1144 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
0c42f392 1145#endif
74e08179 1146
c88442ec 1147 free_init_pages("unused kernel",
fc8d7826
AD
1148 (unsigned long) __va(__pa_symbol(text_end)),
1149 (unsigned long) __va(__pa_symbol(rodata_start)));
c88442ec 1150 free_init_pages("unused kernel",
fc8d7826
AD
1151 (unsigned long) __va(__pa_symbol(rodata_end)),
1152 (unsigned long) __va(__pa_symbol(_sdata)));
67df197b 1153}
4e4eee0e 1154
67df197b
AV
1155#endif
1156
14a62c34
TG
1157int kern_addr_valid(unsigned long addr)
1158{
1da177e4 1159 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
14a62c34
TG
1160 pgd_t *pgd;
1161 pud_t *pud;
1162 pmd_t *pmd;
1163 pte_t *pte;
1da177e4
LT
1164
1165 if (above != 0 && above != -1UL)
14a62c34
TG
1166 return 0;
1167
1da177e4
LT
1168 pgd = pgd_offset_k(addr);
1169 if (pgd_none(*pgd))
1170 return 0;
1171
1172 pud = pud_offset(pgd, addr);
1173 if (pud_none(*pud))
14a62c34 1174 return 0;
1da177e4 1175
0ee364eb
MG
1176 if (pud_large(*pud))
1177 return pfn_valid(pud_pfn(*pud));
1178
1da177e4
LT
1179 pmd = pmd_offset(pud, addr);
1180 if (pmd_none(*pmd))
1181 return 0;
14a62c34 1182
1da177e4
LT
1183 if (pmd_large(*pmd))
1184 return pfn_valid(pmd_pfn(*pmd));
1185
1186 pte = pte_offset_kernel(pmd, addr);
1187 if (pte_none(*pte))
1188 return 0;
14a62c34 1189
1da177e4
LT
1190 return pfn_valid(pte_pfn(*pte));
1191}
1192
982792c7 1193static unsigned long probe_memory_block_size(void)
1dc41aa6 1194{
982792c7
YL
1195 /* start from 2g */
1196 unsigned long bz = 1UL<<31;
1197
bdee237c
DB
1198 if (totalram_pages >= (64ULL << (30 - PAGE_SHIFT))) {
1199 pr_info("Using 2GB memory block size for large-memory system\n");
1dc41aa6
NF
1200 return 2UL * 1024 * 1024 * 1024;
1201 }
1dc41aa6 1202
982792c7
YL
1203 /* less than 64g installed */
1204 if ((max_pfn << PAGE_SHIFT) < (16UL << 32))
1205 return MIN_MEMORY_BLOCK_SIZE;
1206
1207 /* get the tail size */
1208 while (bz > MIN_MEMORY_BLOCK_SIZE) {
1209 if (!((max_pfn << PAGE_SHIFT) & (bz - 1)))
1210 break;
1211 bz >>= 1;
1212 }
1213
1214 printk(KERN_DEBUG "memory block size : %ldMB\n", bz >> 20);
1215
1216 return bz;
1217}
1218
1219static unsigned long memory_block_size_probed;
1220unsigned long memory_block_size_bytes(void)
1221{
1222 if (!memory_block_size_probed)
1223 memory_block_size_probed = probe_memory_block_size();
1224
1225 return memory_block_size_probed;
1226}
1227
0889eba5
CL
1228#ifdef CONFIG_SPARSEMEM_VMEMMAP
1229/*
1230 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
1231 */
c2b91e2e
YL
1232static long __meminitdata addr_start, addr_end;
1233static void __meminitdata *p_start, *p_end;
1234static int __meminitdata node_start;
1235
e8216da5
JW
1236static int __meminit vmemmap_populate_hugepages(unsigned long start,
1237 unsigned long end, int node)
0889eba5 1238{
0aad818b 1239 unsigned long addr;
0889eba5
CL
1240 unsigned long next;
1241 pgd_t *pgd;
1242 pud_t *pud;
1243 pmd_t *pmd;
1244
0aad818b 1245 for (addr = start; addr < end; addr = next) {
e8216da5 1246 next = pmd_addr_end(addr, end);
0889eba5
CL
1247
1248 pgd = vmemmap_pgd_populate(addr, node);
1249 if (!pgd)
1250 return -ENOMEM;
14a62c34 1251
0889eba5
CL
1252 pud = vmemmap_pud_populate(pgd, addr, node);
1253 if (!pud)
1254 return -ENOMEM;
1255
e8216da5
JW
1256 pmd = pmd_offset(pud, addr);
1257 if (pmd_none(*pmd)) {
e8216da5 1258 void *p;
14a62c34 1259
e8216da5 1260 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
8e2cdbcb
JW
1261 if (p) {
1262 pte_t entry;
1263
1264 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
1265 PAGE_KERNEL_LARGE);
1266 set_pmd(pmd, __pmd(pte_val(entry)));
1267
1268 /* check to see if we have contiguous blocks */
1269 if (p_end != p || node_start != node) {
1270 if (p_start)
1271 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1272 addr_start, addr_end-1, p_start, p_end-1, node_start);
1273 addr_start = addr;
1274 node_start = node;
1275 p_start = p;
1276 }
7c934d39 1277
8e2cdbcb
JW
1278 addr_end = addr + PMD_SIZE;
1279 p_end = p + PMD_SIZE;
1280 continue;
1281 }
1282 } else if (pmd_large(*pmd)) {
e8216da5 1283 vmemmap_verify((pte_t *)pmd, node, addr, next);
8e2cdbcb
JW
1284 continue;
1285 }
1286 pr_warn_once("vmemmap: falling back to regular page backing\n");
1287 if (vmemmap_populate_basepages(addr, next, node))
1288 return -ENOMEM;
0889eba5 1289 }
0889eba5
CL
1290 return 0;
1291}
c2b91e2e 1292
e8216da5
JW
1293int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
1294{
1295 int err;
1296
1297 if (cpu_has_pse)
1298 err = vmemmap_populate_hugepages(start, end, node);
1299 else
1300 err = vmemmap_populate_basepages(start, end, node);
1301 if (!err)
9661d5bc 1302 sync_global_pgds(start, end - 1, 0);
e8216da5
JW
1303 return err;
1304}
1305
46723bfa
YI
1306#if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
1307void register_page_bootmem_memmap(unsigned long section_nr,
1308 struct page *start_page, unsigned long size)
1309{
1310 unsigned long addr = (unsigned long)start_page;
1311 unsigned long end = (unsigned long)(start_page + size);
1312 unsigned long next;
1313 pgd_t *pgd;
1314 pud_t *pud;
1315 pmd_t *pmd;
1316 unsigned int nr_pages;
1317 struct page *page;
1318
1319 for (; addr < end; addr = next) {
1320 pte_t *pte = NULL;
1321
1322 pgd = pgd_offset_k(addr);
1323 if (pgd_none(*pgd)) {
1324 next = (addr + PAGE_SIZE) & PAGE_MASK;
1325 continue;
1326 }
1327 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
1328
1329 pud = pud_offset(pgd, addr);
1330 if (pud_none(*pud)) {
1331 next = (addr + PAGE_SIZE) & PAGE_MASK;
1332 continue;
1333 }
1334 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
1335
1336 if (!cpu_has_pse) {
1337 next = (addr + PAGE_SIZE) & PAGE_MASK;
1338 pmd = pmd_offset(pud, addr);
1339 if (pmd_none(*pmd))
1340 continue;
1341 get_page_bootmem(section_nr, pmd_page(*pmd),
1342 MIX_SECTION_INFO);
1343
1344 pte = pte_offset_kernel(pmd, addr);
1345 if (pte_none(*pte))
1346 continue;
1347 get_page_bootmem(section_nr, pte_page(*pte),
1348 SECTION_INFO);
1349 } else {
1350 next = pmd_addr_end(addr, end);
1351
1352 pmd = pmd_offset(pud, addr);
1353 if (pmd_none(*pmd))
1354 continue;
1355
1356 nr_pages = 1 << (get_order(PMD_SIZE));
1357 page = pmd_page(*pmd);
1358 while (nr_pages--)
1359 get_page_bootmem(section_nr, page++,
1360 SECTION_INFO);
1361 }
1362 }
1363}
1364#endif
1365
c2b91e2e
YL
1366void __meminit vmemmap_populate_print_last(void)
1367{
1368 if (p_start) {
1369 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1370 addr_start, addr_end-1, p_start, p_end-1, node_start);
1371 p_start = NULL;
1372 p_end = NULL;
1373 node_start = 0;
1374 }
1375}
0889eba5 1376#endif
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