x86/mm/hotplug: Modify PGD entry when removing memory
[deliverable/linux.git] / arch / x86 / mm / init_64.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
a2531293 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
1da177e4
LT
9#include <linux/signal.h>
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/ptrace.h>
16#include <linux/mman.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/smp.h>
20#include <linux/init.h>
11034d55 21#include <linux/initrd.h>
1da177e4
LT
22#include <linux/pagemap.h>
23#include <linux/bootmem.h>
a9ce6bc1 24#include <linux/memblock.h>
1da177e4 25#include <linux/proc_fs.h>
59170891 26#include <linux/pci.h>
6fb14755 27#include <linux/pfn.h>
c9cf5528 28#include <linux/poison.h>
17a941d8 29#include <linux/dma-mapping.h>
44df75e6 30#include <linux/module.h>
a63fdc51 31#include <linux/memory.h>
44df75e6 32#include <linux/memory_hotplug.h>
ae32b129 33#include <linux/nmi.h>
5a0e3ad6 34#include <linux/gfp.h>
2f96b8c1 35#include <linux/kcore.h>
1da177e4
LT
36
37#include <asm/processor.h>
46eaa670 38#include <asm/bios_ebda.h>
1da177e4
LT
39#include <asm/uaccess.h>
40#include <asm/pgtable.h>
41#include <asm/pgalloc.h>
42#include <asm/dma.h>
43#include <asm/fixmap.h>
44#include <asm/e820.h>
45#include <asm/apic.h>
46#include <asm/tlb.h>
47#include <asm/mmu_context.h>
48#include <asm/proto.h>
49#include <asm/smp.h>
2bc0414e 50#include <asm/sections.h>
718fc13b 51#include <asm/kdebug.h>
aaa64e04 52#include <asm/numa.h>
7bfeab9a 53#include <asm/cacheflush.h>
4fcb2083 54#include <asm/init.h>
1dc41aa6 55#include <asm/uv/uv.h>
e5f15b45 56#include <asm/setup.h>
1da177e4 57
5c51bdbe
YL
58#include "mm_internal.h"
59
aece2785
YL
60static void ident_pmd_init(unsigned long pmd_flag, pmd_t *pmd_page,
61 unsigned long addr, unsigned long end)
62{
63 addr &= PMD_MASK;
64 for (; addr < end; addr += PMD_SIZE) {
65 pmd_t *pmd = pmd_page + pmd_index(addr);
66
67 if (!pmd_present(*pmd))
68 set_pmd(pmd, __pmd(addr | pmd_flag));
69 }
70}
71static int ident_pud_init(struct x86_mapping_info *info, pud_t *pud_page,
72 unsigned long addr, unsigned long end)
73{
74 unsigned long next;
75
76 for (; addr < end; addr = next) {
77 pud_t *pud = pud_page + pud_index(addr);
78 pmd_t *pmd;
79
80 next = (addr & PUD_MASK) + PUD_SIZE;
81 if (next > end)
82 next = end;
83
84 if (pud_present(*pud)) {
85 pmd = pmd_offset(pud, 0);
86 ident_pmd_init(info->pmd_flag, pmd, addr, next);
87 continue;
88 }
89 pmd = (pmd_t *)info->alloc_pgt_page(info->context);
90 if (!pmd)
91 return -ENOMEM;
92 ident_pmd_init(info->pmd_flag, pmd, addr, next);
93 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
94 }
95
96 return 0;
97}
98
99int kernel_ident_mapping_init(struct x86_mapping_info *info, pgd_t *pgd_page,
100 unsigned long addr, unsigned long end)
101{
102 unsigned long next;
103 int result;
104 int off = info->kernel_mapping ? pgd_index(__PAGE_OFFSET) : 0;
105
106 for (; addr < end; addr = next) {
107 pgd_t *pgd = pgd_page + pgd_index(addr) + off;
108 pud_t *pud;
109
110 next = (addr & PGDIR_MASK) + PGDIR_SIZE;
111 if (next > end)
112 next = end;
113
114 if (pgd_present(*pgd)) {
115 pud = pud_offset(pgd, 0);
116 result = ident_pud_init(info, pud, addr, next);
117 if (result)
118 return result;
119 continue;
120 }
121
122 pud = (pud_t *)info->alloc_pgt_page(info->context);
123 if (!pud)
124 return -ENOMEM;
125 result = ident_pud_init(info, pud, addr, next);
126 if (result)
127 return result;
128 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE));
129 }
130
131 return 0;
132}
133
00d1c5e0
IM
134static int __init parse_direct_gbpages_off(char *arg)
135{
136 direct_gbpages = 0;
137 return 0;
138}
139early_param("nogbpages", parse_direct_gbpages_off);
140
141static int __init parse_direct_gbpages_on(char *arg)
142{
143 direct_gbpages = 1;
144 return 0;
145}
146early_param("gbpages", parse_direct_gbpages_on);
147
1da177e4
LT
148/*
149 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
150 * physical space so we can cache the place of the first one and move
151 * around without checking the pgd every time.
152 */
153
be43d728 154pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
bd220a24
YL
155EXPORT_SYMBOL_GPL(__supported_pte_mask);
156
bd220a24
YL
157int force_personality32;
158
deed05b7
IM
159/*
160 * noexec32=on|off
161 * Control non executable heap for 32bit processes.
162 * To control the stack too use noexec=off
163 *
164 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
165 * off PROT_READ implies PROT_EXEC
166 */
bd220a24
YL
167static int __init nonx32_setup(char *str)
168{
169 if (!strcmp(str, "on"))
170 force_personality32 &= ~READ_IMPLIES_EXEC;
171 else if (!strcmp(str, "off"))
172 force_personality32 |= READ_IMPLIES_EXEC;
173 return 1;
174}
175__setup("noexec32=", nonx32_setup);
176
6afb5157
HL
177/*
178 * When memory was added/removed make sure all the processes MM have
179 * suitable PGD entries in the local PGD level page.
180 */
9661d5bc 181void sync_global_pgds(unsigned long start, unsigned long end, int removed)
6afb5157 182{
44235dcd
JF
183 unsigned long address;
184
185 for (address = start; address <= end; address += PGDIR_SIZE) {
186 const pgd_t *pgd_ref = pgd_offset_k(address);
44235dcd
JF
187 struct page *page;
188
9661d5bc
YI
189 /*
190 * When it is called after memory hot remove, pgd_none()
191 * returns true. In this case (removed == 1), we must clear
192 * the PGD entries in the local PGD level page.
193 */
194 if (pgd_none(*pgd_ref) && !removed)
44235dcd
JF
195 continue;
196
a79e53d8 197 spin_lock(&pgd_lock);
44235dcd 198 list_for_each_entry(page, &pgd_list, lru) {
be354f40 199 pgd_t *pgd;
617d34d9
JF
200 spinlock_t *pgt_lock;
201
44235dcd 202 pgd = (pgd_t *)page_address(page) + pgd_index(address);
a79e53d8 203 /* the pgt_lock only for Xen */
617d34d9
JF
204 pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
205 spin_lock(pgt_lock);
206
9661d5bc 207 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
44235dcd
JF
208 BUG_ON(pgd_page_vaddr(*pgd)
209 != pgd_page_vaddr(*pgd_ref));
617d34d9 210
9661d5bc
YI
211 if (removed) {
212 if (pgd_none(*pgd_ref) && !pgd_none(*pgd))
213 pgd_clear(pgd);
214 } else {
215 if (pgd_none(*pgd))
216 set_pgd(pgd, *pgd_ref);
217 }
218
617d34d9 219 spin_unlock(pgt_lock);
44235dcd 220 }
a79e53d8 221 spin_unlock(&pgd_lock);
44235dcd 222 }
6afb5157
HL
223}
224
8d6ea967
MS
225/*
226 * NOTE: This function is marked __ref because it calls __init function
227 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
228 */
229static __ref void *spp_getpage(void)
14a62c34 230{
1da177e4 231 void *ptr;
14a62c34 232
1da177e4 233 if (after_bootmem)
9e730237 234 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
1da177e4
LT
235 else
236 ptr = alloc_bootmem_pages(PAGE_SIZE);
14a62c34
TG
237
238 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
239 panic("set_pte_phys: cannot allocate page data %s\n",
240 after_bootmem ? "after bootmem" : "");
241 }
1da177e4 242
10f22dde 243 pr_debug("spp_getpage %p\n", ptr);
14a62c34 244
1da177e4 245 return ptr;
14a62c34 246}
1da177e4 247
f254f390 248static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
1da177e4 249{
458a3e64
TH
250 if (pgd_none(*pgd)) {
251 pud_t *pud = (pud_t *)spp_getpage();
252 pgd_populate(&init_mm, pgd, pud);
253 if (pud != pud_offset(pgd, 0))
254 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
255 pud, pud_offset(pgd, 0));
256 }
257 return pud_offset(pgd, vaddr);
258}
1da177e4 259
f254f390 260static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
458a3e64 261{
1da177e4 262 if (pud_none(*pud)) {
458a3e64 263 pmd_t *pmd = (pmd_t *) spp_getpage();
bb23e403 264 pud_populate(&init_mm, pud, pmd);
458a3e64 265 if (pmd != pmd_offset(pud, 0))
10f22dde 266 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
458a3e64 267 pmd, pmd_offset(pud, 0));
1da177e4 268 }
458a3e64
TH
269 return pmd_offset(pud, vaddr);
270}
271
f254f390 272static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
458a3e64 273{
1da177e4 274 if (pmd_none(*pmd)) {
458a3e64 275 pte_t *pte = (pte_t *) spp_getpage();
bb23e403 276 pmd_populate_kernel(&init_mm, pmd, pte);
458a3e64 277 if (pte != pte_offset_kernel(pmd, 0))
10f22dde 278 printk(KERN_ERR "PAGETABLE BUG #02!\n");
1da177e4 279 }
458a3e64
TH
280 return pte_offset_kernel(pmd, vaddr);
281}
282
283void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
284{
285 pud_t *pud;
286 pmd_t *pmd;
287 pte_t *pte;
288
289 pud = pud_page + pud_index(vaddr);
290 pmd = fill_pmd(pud, vaddr);
291 pte = fill_pte(pmd, vaddr);
1da177e4 292
1da177e4
LT
293 set_pte(pte, new_pte);
294
295 /*
296 * It's enough to flush this one mapping.
297 * (PGE mappings get flushed as well)
298 */
299 __flush_tlb_one(vaddr);
300}
301
458a3e64 302void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
0814e0ba
EH
303{
304 pgd_t *pgd;
305 pud_t *pud_page;
306
307 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
308
309 pgd = pgd_offset_k(vaddr);
310 if (pgd_none(*pgd)) {
311 printk(KERN_ERR
312 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
313 return;
314 }
315 pud_page = (pud_t*)pgd_page_vaddr(*pgd);
316 set_pte_vaddr_pud(pud_page, vaddr, pteval);
317}
318
458a3e64 319pmd_t * __init populate_extra_pmd(unsigned long vaddr)
11124411
TH
320{
321 pgd_t *pgd;
322 pud_t *pud;
323
324 pgd = pgd_offset_k(vaddr);
458a3e64
TH
325 pud = fill_pud(pgd, vaddr);
326 return fill_pmd(pud, vaddr);
327}
328
329pte_t * __init populate_extra_pte(unsigned long vaddr)
330{
331 pmd_t *pmd;
11124411 332
458a3e64
TH
333 pmd = populate_extra_pmd(vaddr);
334 return fill_pte(pmd, vaddr);
11124411
TH
335}
336
3a9e189d
JS
337/*
338 * Create large page table mappings for a range of physical addresses.
339 */
340static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
341 pgprot_t prot)
342{
343 pgd_t *pgd;
344 pud_t *pud;
345 pmd_t *pmd;
346
347 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
348 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
349 pgd = pgd_offset_k((unsigned long)__va(phys));
350 if (pgd_none(*pgd)) {
351 pud = (pud_t *) spp_getpage();
352 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
353 _PAGE_USER));
354 }
355 pud = pud_offset(pgd, (unsigned long)__va(phys));
356 if (pud_none(*pud)) {
357 pmd = (pmd_t *) spp_getpage();
358 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
359 _PAGE_USER));
360 }
361 pmd = pmd_offset(pud, phys);
362 BUG_ON(!pmd_none(*pmd));
363 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
364 }
365}
366
367void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
368{
369 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE);
370}
371
372void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
373{
374 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE_NOCACHE);
375}
376
31eedd82 377/*
88f3aec7
IM
378 * The head.S code sets up the kernel high mapping:
379 *
380 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
31eedd82 381 *
1e3b3081 382 * phys_base holds the negative offset to the kernel, which is added
31eedd82
TG
383 * to the compile time generated pmds. This results in invalid pmds up
384 * to the point where we hit the physaddr 0 mapping.
385 *
e5f15b45
YL
386 * We limit the mappings to the region from _text to _brk_end. _brk_end
387 * is rounded up to the 2MB boundary. This catches the invalid pmds as
31eedd82
TG
388 * well, as they are located before _text:
389 */
390void __init cleanup_highmap(void)
391{
392 unsigned long vaddr = __START_KERNEL_map;
10054230 393 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
e5f15b45 394 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
31eedd82 395 pmd_t *pmd = level2_kernel_pgt;
31eedd82 396
10054230
YL
397 /*
398 * Native path, max_pfn_mapped is not set yet.
399 * Xen has valid max_pfn_mapped set in
400 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
401 */
402 if (max_pfn_mapped)
403 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
404
e5f15b45 405 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
2884f110 406 if (pmd_none(*pmd))
31eedd82
TG
407 continue;
408 if (vaddr < (unsigned long) _text || vaddr > end)
409 set_pmd(pmd, __pmd(0));
410 }
411}
412
7b16eb89 413static unsigned long __meminit
b27a43c1
SS
414phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
415 pgprot_t prot)
4f9c11dd 416{
eceb3632 417 unsigned long pages = 0, next;
7b16eb89 418 unsigned long last_map_addr = end;
4f9c11dd 419 int i;
7b16eb89 420
4f9c11dd
JF
421 pte_t *pte = pte_page + pte_index(addr);
422
eceb3632
YL
423 for (i = pte_index(addr); i < PTRS_PER_PTE; i++, addr = next, pte++) {
424 next = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 425 if (addr >= end) {
eceb3632
YL
426 if (!after_bootmem &&
427 !e820_any_mapped(addr & PAGE_MASK, next, E820_RAM) &&
428 !e820_any_mapped(addr & PAGE_MASK, next, E820_RESERVED_KERN))
429 set_pte(pte, __pte(0));
430 continue;
4f9c11dd
JF
431 }
432
b27a43c1
SS
433 /*
434 * We will re-use the existing mapping.
435 * Xen for example has some special requirements, like mapping
436 * pagetable pages as RO. So assume someone who pre-setup
437 * these mappings are more intelligent.
438 */
3afa3949 439 if (pte_val(*pte)) {
876ee61a
JB
440 if (!after_bootmem)
441 pages++;
4f9c11dd 442 continue;
3afa3949 443 }
4f9c11dd
JF
444
445 if (0)
446 printk(" pte=%p addr=%lx pte=%016lx\n",
447 pte, addr, pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL).pte);
4f9c11dd 448 pages++;
b27a43c1 449 set_pte(pte, pfn_pte(addr >> PAGE_SHIFT, prot));
7b16eb89 450 last_map_addr = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 451 }
a2699e47 452
4f9c11dd 453 update_page_count(PG_LEVEL_4K, pages);
7b16eb89
YL
454
455 return last_map_addr;
4f9c11dd
JF
456}
457
cc615032 458static unsigned long __meminit
b50efd2a 459phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
b27a43c1 460 unsigned long page_size_mask, pgprot_t prot)
44df75e6 461{
20167d34 462 unsigned long pages = 0, next;
7b16eb89 463 unsigned long last_map_addr = end;
ce0c0e50 464
6ad91658 465 int i = pmd_index(address);
44df75e6 466
20167d34 467 for (; i < PTRS_PER_PMD; i++, address = next) {
6ad91658 468 pmd_t *pmd = pmd_page + pmd_index(address);
4f9c11dd 469 pte_t *pte;
b27a43c1 470 pgprot_t new_prot = prot;
44df75e6 471
eceb3632 472 next = (address & PMD_MASK) + PMD_SIZE;
5f51e139 473 if (address >= end) {
eceb3632
YL
474 if (!after_bootmem &&
475 !e820_any_mapped(address & PMD_MASK, next, E820_RAM) &&
476 !e820_any_mapped(address & PMD_MASK, next, E820_RESERVED_KERN))
477 set_pmd(pmd, __pmd(0));
478 continue;
44df75e6 479 }
6ad91658 480
4f9c11dd 481 if (pmd_val(*pmd)) {
8ae3a5a8
JB
482 if (!pmd_large(*pmd)) {
483 spin_lock(&init_mm.page_table_lock);
973dc4f3 484 pte = (pte_t *)pmd_page_vaddr(*pmd);
4b239f45 485 last_map_addr = phys_pte_init(pte, address,
b27a43c1 486 end, prot);
8ae3a5a8 487 spin_unlock(&init_mm.page_table_lock);
a2699e47 488 continue;
8ae3a5a8 489 }
b27a43c1
SS
490 /*
491 * If we are ok with PG_LEVEL_2M mapping, then we will
492 * use the existing mapping,
493 *
494 * Otherwise, we will split the large page mapping but
495 * use the same existing protection bits except for
496 * large page, so that we don't violate Intel's TLB
497 * Application note (317080) which says, while changing
498 * the page sizes, new and old translations should
499 * not differ with respect to page frame and
500 * attributes.
501 */
3afa3949 502 if (page_size_mask & (1 << PG_LEVEL_2M)) {
876ee61a
JB
503 if (!after_bootmem)
504 pages++;
20167d34 505 last_map_addr = next;
b27a43c1 506 continue;
3afa3949 507 }
b27a43c1 508 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
4f9c11dd
JF
509 }
510
b50efd2a 511 if (page_size_mask & (1<<PG_LEVEL_2M)) {
4f9c11dd 512 pages++;
8ae3a5a8 513 spin_lock(&init_mm.page_table_lock);
4f9c11dd 514 set_pte((pte_t *)pmd,
960ddb4f 515 pfn_pte((address & PMD_MASK) >> PAGE_SHIFT,
b27a43c1 516 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
8ae3a5a8 517 spin_unlock(&init_mm.page_table_lock);
20167d34 518 last_map_addr = next;
6ad91658 519 continue;
4f9c11dd 520 }
6ad91658 521
868bf4d6 522 pte = alloc_low_page();
b27a43c1 523 last_map_addr = phys_pte_init(pte, address, end, new_prot);
4f9c11dd 524
8ae3a5a8 525 spin_lock(&init_mm.page_table_lock);
868bf4d6 526 pmd_populate_kernel(&init_mm, pmd, pte);
8ae3a5a8 527 spin_unlock(&init_mm.page_table_lock);
44df75e6 528 }
ce0c0e50 529 update_page_count(PG_LEVEL_2M, pages);
7b16eb89 530 return last_map_addr;
44df75e6
MT
531}
532
cc615032 533static unsigned long __meminit
b50efd2a
YL
534phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
535 unsigned long page_size_mask)
14a62c34 536{
20167d34 537 unsigned long pages = 0, next;
cc615032 538 unsigned long last_map_addr = end;
6ad91658 539 int i = pud_index(addr);
44df75e6 540
20167d34 541 for (; i < PTRS_PER_PUD; i++, addr = next) {
6ad91658 542 pud_t *pud = pud_page + pud_index(addr);
1da177e4 543 pmd_t *pmd;
b27a43c1 544 pgprot_t prot = PAGE_KERNEL;
1da177e4 545
20167d34 546 next = (addr & PUD_MASK) + PUD_SIZE;
eceb3632
YL
547 if (addr >= end) {
548 if (!after_bootmem &&
549 !e820_any_mapped(addr & PUD_MASK, next, E820_RAM) &&
550 !e820_any_mapped(addr & PUD_MASK, next, E820_RESERVED_KERN))
551 set_pud(pud, __pud(0));
1da177e4 552 continue;
14a62c34 553 }
1da177e4 554
6ad91658 555 if (pud_val(*pud)) {
a2699e47 556 if (!pud_large(*pud)) {
973dc4f3 557 pmd = pmd_offset(pud, 0);
4b239f45 558 last_map_addr = phys_pmd_init(pmd, addr, end,
b27a43c1 559 page_size_mask, prot);
4b239f45 560 __flush_tlb_all();
a2699e47
SS
561 continue;
562 }
b27a43c1
SS
563 /*
564 * If we are ok with PG_LEVEL_1G mapping, then we will
565 * use the existing mapping.
566 *
567 * Otherwise, we will split the gbpage mapping but use
568 * the same existing protection bits except for large
569 * page, so that we don't violate Intel's TLB
570 * Application note (317080) which says, while changing
571 * the page sizes, new and old translations should
572 * not differ with respect to page frame and
573 * attributes.
574 */
3afa3949 575 if (page_size_mask & (1 << PG_LEVEL_1G)) {
876ee61a
JB
576 if (!after_bootmem)
577 pages++;
20167d34 578 last_map_addr = next;
b27a43c1 579 continue;
3afa3949 580 }
b27a43c1 581 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
ef925766
AK
582 }
583
b50efd2a 584 if (page_size_mask & (1<<PG_LEVEL_1G)) {
ce0c0e50 585 pages++;
8ae3a5a8 586 spin_lock(&init_mm.page_table_lock);
ef925766 587 set_pte((pte_t *)pud,
960ddb4f
YL
588 pfn_pte((addr & PUD_MASK) >> PAGE_SHIFT,
589 PAGE_KERNEL_LARGE));
8ae3a5a8 590 spin_unlock(&init_mm.page_table_lock);
20167d34 591 last_map_addr = next;
6ad91658
KM
592 continue;
593 }
594
868bf4d6 595 pmd = alloc_low_page();
b27a43c1
SS
596 last_map_addr = phys_pmd_init(pmd, addr, end, page_size_mask,
597 prot);
8ae3a5a8
JB
598
599 spin_lock(&init_mm.page_table_lock);
868bf4d6 600 pud_populate(&init_mm, pud, pmd);
44df75e6 601 spin_unlock(&init_mm.page_table_lock);
1da177e4 602 }
1a2b4412 603 __flush_tlb_all();
a2699e47 604
ce0c0e50 605 update_page_count(PG_LEVEL_1G, pages);
cc615032 606
1a0db38e 607 return last_map_addr;
14a62c34 608}
1da177e4 609
41d840e2 610unsigned long __meminit
f765090a
PE
611kernel_physical_mapping_init(unsigned long start,
612 unsigned long end,
613 unsigned long page_size_mask)
14a62c34 614{
9b861528 615 bool pgd_changed = false;
b50efd2a 616 unsigned long next, last_map_addr = end;
9b861528 617 unsigned long addr;
1da177e4
LT
618
619 start = (unsigned long)__va(start);
620 end = (unsigned long)__va(end);
1c5f50ee 621 addr = start;
1da177e4
LT
622
623 for (; start < end; start = next) {
44df75e6
MT
624 pgd_t *pgd = pgd_offset_k(start);
625 pud_t *pud;
626
c2bdee59 627 next = (start & PGDIR_MASK) + PGDIR_SIZE;
4f9c11dd
JF
628
629 if (pgd_val(*pgd)) {
973dc4f3 630 pud = (pud_t *)pgd_page_vaddr(*pgd);
4b239f45 631 last_map_addr = phys_pud_init(pud, __pa(start),
b50efd2a 632 __pa(end), page_size_mask);
4f9c11dd
JF
633 continue;
634 }
635
868bf4d6 636 pud = alloc_low_page();
c2bdee59 637 last_map_addr = phys_pud_init(pud, __pa(start), __pa(end),
b50efd2a 638 page_size_mask);
8ae3a5a8
JB
639
640 spin_lock(&init_mm.page_table_lock);
868bf4d6 641 pgd_populate(&init_mm, pgd, pud);
8ae3a5a8 642 spin_unlock(&init_mm.page_table_lock);
9b861528 643 pgd_changed = true;
14a62c34 644 }
9b861528
HL
645
646 if (pgd_changed)
9661d5bc 647 sync_global_pgds(addr, end - 1, 0);
9b861528 648
a2699e47 649 __flush_tlb_all();
1da177e4 650
b50efd2a
YL
651 return last_map_addr;
652}
7b16eb89 653
2b97690f 654#ifndef CONFIG_NUMA
d8fc3afc 655void __init initmem_init(void)
1f75d7e3 656{
e7e8de59 657 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
1f75d7e3 658}
3551f88f 659#endif
1f75d7e3 660
1da177e4
LT
661void __init paging_init(void)
662{
3551f88f 663 sparse_memory_present_with_active_regions(MAX_NUMNODES);
44df75e6 664 sparse_init();
44b57280
YL
665
666 /*
667 * clear the default setting with node 0
668 * note: don't use nodes_clear here, that is really clearing when
669 * numa support is not compiled in, and later node_set_state
670 * will not set it back.
671 */
4b0ef1fe
LJ
672 node_clear_state(0, N_MEMORY);
673 if (N_MEMORY != N_NORMAL_MEMORY)
674 node_clear_state(0, N_NORMAL_MEMORY);
44b57280 675
4c0b2e5f 676 zone_sizes_init();
1da177e4 677}
1da177e4 678
44df75e6
MT
679/*
680 * Memory hotplug specific functions
44df75e6 681 */
bc02af93 682#ifdef CONFIG_MEMORY_HOTPLUG
ea085417
SZ
683/*
684 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
685 * updating.
686 */
687static void update_end_of_memory_vars(u64 start, u64 size)
688{
689 unsigned long end_pfn = PFN_UP(start + size);
690
691 if (end_pfn > max_pfn) {
692 max_pfn = end_pfn;
693 max_low_pfn = end_pfn;
694 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
695 }
696}
697
9d99aaa3
AK
698/*
699 * Memory is added always to NORMAL zone. This means you will never get
700 * additional DMA/DMA32 memory.
701 */
bc02af93 702int arch_add_memory(int nid, u64 start, u64 size)
44df75e6 703{
bc02af93 704 struct pglist_data *pgdat = NODE_DATA(nid);
9bfc4113
WN
705 struct zone *zone = pgdat->node_zones +
706 zone_for_memory(nid, start, size, ZONE_NORMAL);
66520ebc 707 unsigned long start_pfn = start >> PAGE_SHIFT;
44df75e6
MT
708 unsigned long nr_pages = size >> PAGE_SHIFT;
709 int ret;
710
66520ebc 711 init_memory_mapping(start, start + size);
45e0b78b 712
c04fc586 713 ret = __add_pages(nid, zone, start_pfn, nr_pages);
fe8b868e 714 WARN_ON_ONCE(ret);
44df75e6 715
ea085417
SZ
716 /* update max_pfn, max_low_pfn and high_memory */
717 update_end_of_memory_vars(start, size);
718
44df75e6 719 return ret;
44df75e6 720}
bc02af93 721EXPORT_SYMBOL_GPL(arch_add_memory);
44df75e6 722
ae9aae9e
WC
723#define PAGE_INUSE 0xFD
724
725static void __meminit free_pagetable(struct page *page, int order)
726{
ae9aae9e
WC
727 unsigned long magic;
728 unsigned int nr_pages = 1 << order;
729
730 /* bootmem page has reserved flag */
731 if (PageReserved(page)) {
732 __ClearPageReserved(page);
ae9aae9e
WC
733
734 magic = (unsigned long)page->lru.next;
735 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
736 while (nr_pages--)
737 put_page_bootmem(page++);
738 } else
170a5a7e
JL
739 while (nr_pages--)
740 free_reserved_page(page++);
ae9aae9e
WC
741 } else
742 free_pages((unsigned long)page_address(page), order);
ae9aae9e
WC
743}
744
745static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
746{
747 pte_t *pte;
748 int i;
749
750 for (i = 0; i < PTRS_PER_PTE; i++) {
751 pte = pte_start + i;
752 if (pte_val(*pte))
753 return;
754 }
755
756 /* free a pte talbe */
757 free_pagetable(pmd_page(*pmd), 0);
758 spin_lock(&init_mm.page_table_lock);
759 pmd_clear(pmd);
760 spin_unlock(&init_mm.page_table_lock);
761}
762
763static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
764{
765 pmd_t *pmd;
766 int i;
767
768 for (i = 0; i < PTRS_PER_PMD; i++) {
769 pmd = pmd_start + i;
770 if (pmd_val(*pmd))
771 return;
772 }
773
774 /* free a pmd talbe */
775 free_pagetable(pud_page(*pud), 0);
776 spin_lock(&init_mm.page_table_lock);
777 pud_clear(pud);
778 spin_unlock(&init_mm.page_table_lock);
779}
780
781/* Return true if pgd is changed, otherwise return false. */
782static bool __meminit free_pud_table(pud_t *pud_start, pgd_t *pgd)
783{
784 pud_t *pud;
785 int i;
786
787 for (i = 0; i < PTRS_PER_PUD; i++) {
788 pud = pud_start + i;
789 if (pud_val(*pud))
790 return false;
791 }
792
793 /* free a pud table */
794 free_pagetable(pgd_page(*pgd), 0);
795 spin_lock(&init_mm.page_table_lock);
796 pgd_clear(pgd);
797 spin_unlock(&init_mm.page_table_lock);
798
799 return true;
800}
801
802static void __meminit
803remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
804 bool direct)
805{
806 unsigned long next, pages = 0;
807 pte_t *pte;
808 void *page_addr;
809 phys_addr_t phys_addr;
810
811 pte = pte_start + pte_index(addr);
812 for (; addr < end; addr = next, pte++) {
813 next = (addr + PAGE_SIZE) & PAGE_MASK;
814 if (next > end)
815 next = end;
816
817 if (!pte_present(*pte))
818 continue;
819
820 /*
821 * We mapped [0,1G) memory as identity mapping when
822 * initializing, in arch/x86/kernel/head_64.S. These
823 * pagetables cannot be removed.
824 */
825 phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
826 if (phys_addr < (phys_addr_t)0x40000000)
827 return;
828
829 if (IS_ALIGNED(addr, PAGE_SIZE) &&
830 IS_ALIGNED(next, PAGE_SIZE)) {
831 /*
832 * Do not free direct mapping pages since they were
833 * freed when offlining, or simplely not in use.
834 */
835 if (!direct)
836 free_pagetable(pte_page(*pte), 0);
837
838 spin_lock(&init_mm.page_table_lock);
839 pte_clear(&init_mm, addr, pte);
840 spin_unlock(&init_mm.page_table_lock);
841
842 /* For non-direct mapping, pages means nothing. */
843 pages++;
844 } else {
845 /*
846 * If we are here, we are freeing vmemmap pages since
847 * direct mapped memory ranges to be freed are aligned.
848 *
849 * If we are not removing the whole page, it means
850 * other page structs in this page are being used and
851 * we canot remove them. So fill the unused page_structs
852 * with 0xFD, and remove the page when it is wholly
853 * filled with 0xFD.
854 */
855 memset((void *)addr, PAGE_INUSE, next - addr);
856
857 page_addr = page_address(pte_page(*pte));
858 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
859 free_pagetable(pte_page(*pte), 0);
860
861 spin_lock(&init_mm.page_table_lock);
862 pte_clear(&init_mm, addr, pte);
863 spin_unlock(&init_mm.page_table_lock);
864 }
865 }
866 }
867
868 /* Call free_pte_table() in remove_pmd_table(). */
869 flush_tlb_all();
870 if (direct)
871 update_page_count(PG_LEVEL_4K, -pages);
872}
873
874static void __meminit
875remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
876 bool direct)
877{
878 unsigned long next, pages = 0;
879 pte_t *pte_base;
880 pmd_t *pmd;
881 void *page_addr;
882
883 pmd = pmd_start + pmd_index(addr);
884 for (; addr < end; addr = next, pmd++) {
885 next = pmd_addr_end(addr, end);
886
887 if (!pmd_present(*pmd))
888 continue;
889
890 if (pmd_large(*pmd)) {
891 if (IS_ALIGNED(addr, PMD_SIZE) &&
892 IS_ALIGNED(next, PMD_SIZE)) {
893 if (!direct)
894 free_pagetable(pmd_page(*pmd),
895 get_order(PMD_SIZE));
896
897 spin_lock(&init_mm.page_table_lock);
898 pmd_clear(pmd);
899 spin_unlock(&init_mm.page_table_lock);
900 pages++;
901 } else {
902 /* If here, we are freeing vmemmap pages. */
903 memset((void *)addr, PAGE_INUSE, next - addr);
904
905 page_addr = page_address(pmd_page(*pmd));
906 if (!memchr_inv(page_addr, PAGE_INUSE,
907 PMD_SIZE)) {
908 free_pagetable(pmd_page(*pmd),
909 get_order(PMD_SIZE));
910
911 spin_lock(&init_mm.page_table_lock);
912 pmd_clear(pmd);
913 spin_unlock(&init_mm.page_table_lock);
914 }
915 }
916
917 continue;
918 }
919
920 pte_base = (pte_t *)pmd_page_vaddr(*pmd);
921 remove_pte_table(pte_base, addr, next, direct);
922 free_pte_table(pte_base, pmd);
923 }
924
925 /* Call free_pmd_table() in remove_pud_table(). */
926 if (direct)
927 update_page_count(PG_LEVEL_2M, -pages);
928}
929
930static void __meminit
931remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
932 bool direct)
933{
934 unsigned long next, pages = 0;
935 pmd_t *pmd_base;
936 pud_t *pud;
937 void *page_addr;
938
939 pud = pud_start + pud_index(addr);
940 for (; addr < end; addr = next, pud++) {
941 next = pud_addr_end(addr, end);
942
943 if (!pud_present(*pud))
944 continue;
945
946 if (pud_large(*pud)) {
947 if (IS_ALIGNED(addr, PUD_SIZE) &&
948 IS_ALIGNED(next, PUD_SIZE)) {
949 if (!direct)
950 free_pagetable(pud_page(*pud),
951 get_order(PUD_SIZE));
952
953 spin_lock(&init_mm.page_table_lock);
954 pud_clear(pud);
955 spin_unlock(&init_mm.page_table_lock);
956 pages++;
957 } else {
958 /* If here, we are freeing vmemmap pages. */
959 memset((void *)addr, PAGE_INUSE, next - addr);
960
961 page_addr = page_address(pud_page(*pud));
962 if (!memchr_inv(page_addr, PAGE_INUSE,
963 PUD_SIZE)) {
964 free_pagetable(pud_page(*pud),
965 get_order(PUD_SIZE));
966
967 spin_lock(&init_mm.page_table_lock);
968 pud_clear(pud);
969 spin_unlock(&init_mm.page_table_lock);
970 }
971 }
972
973 continue;
974 }
975
976 pmd_base = (pmd_t *)pud_page_vaddr(*pud);
977 remove_pmd_table(pmd_base, addr, next, direct);
978 free_pmd_table(pmd_base, pud);
979 }
980
981 if (direct)
982 update_page_count(PG_LEVEL_1G, -pages);
983}
984
985/* start and end are both virtual address. */
986static void __meminit
987remove_pagetable(unsigned long start, unsigned long end, bool direct)
988{
989 unsigned long next;
5255e0a7 990 unsigned long addr;
ae9aae9e
WC
991 pgd_t *pgd;
992 pud_t *pud;
993 bool pgd_changed = false;
994
5255e0a7
YI
995 for (addr = start; addr < end; addr = next) {
996 next = pgd_addr_end(addr, end);
ae9aae9e 997
5255e0a7 998 pgd = pgd_offset_k(addr);
ae9aae9e
WC
999 if (!pgd_present(*pgd))
1000 continue;
1001
1002 pud = (pud_t *)pgd_page_vaddr(*pgd);
5255e0a7 1003 remove_pud_table(pud, addr, next, direct);
ae9aae9e
WC
1004 if (free_pud_table(pud, pgd))
1005 pgd_changed = true;
1006 }
1007
1008 if (pgd_changed)
9661d5bc 1009 sync_global_pgds(start, end - 1, 1);
ae9aae9e
WC
1010
1011 flush_tlb_all();
1012}
1013
0aad818b 1014void __ref vmemmap_free(unsigned long start, unsigned long end)
0197518c 1015{
0197518c
TC
1016 remove_pagetable(start, end, false);
1017}
1018
587ff8c4 1019#ifdef CONFIG_MEMORY_HOTREMOVE
bbcab878
TC
1020static void __meminit
1021kernel_physical_mapping_remove(unsigned long start, unsigned long end)
1022{
1023 start = (unsigned long)__va(start);
1024 end = (unsigned long)__va(end);
1025
1026 remove_pagetable(start, end, true);
1027}
1028
24d335ca
WC
1029int __ref arch_remove_memory(u64 start, u64 size)
1030{
1031 unsigned long start_pfn = start >> PAGE_SHIFT;
1032 unsigned long nr_pages = size >> PAGE_SHIFT;
1033 struct zone *zone;
1034 int ret;
1035
1036 zone = page_zone(pfn_to_page(start_pfn));
bbcab878 1037 kernel_physical_mapping_remove(start, start + size);
24d335ca
WC
1038 ret = __remove_pages(zone, start_pfn, nr_pages);
1039 WARN_ON_ONCE(ret);
1040
1041 return ret;
1042}
1043#endif
45e0b78b
KM
1044#endif /* CONFIG_MEMORY_HOTPLUG */
1045
81ac3ad9 1046static struct kcore_list kcore_vsyscall;
1da177e4 1047
94b43c3d
YL
1048static void __init register_page_bootmem_info(void)
1049{
1050#ifdef CONFIG_NUMA
1051 int i;
1052
1053 for_each_online_node(i)
1054 register_page_bootmem_info_node(NODE_DATA(i));
1055#endif
1056}
1057
1da177e4
LT
1058void __init mem_init(void)
1059{
0dc243ae 1060 pci_iommu_alloc();
1da177e4 1061
48ddb154 1062 /* clear_bss() already clear the empty_zero_page */
1da177e4 1063
94b43c3d 1064 register_page_bootmem_info();
bced0e32
JL
1065
1066 /* this will put all memory onto the freelists */
0c988534 1067 free_all_bootmem();
1da177e4
LT
1068 after_bootmem = 1;
1069
1da177e4 1070 /* Register memory areas for /proc/kcore */
f40c3300
AL
1071 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR,
1072 PAGE_SIZE, KCORE_OTHER);
1da177e4 1073
46a84132 1074 mem_init_print_info(NULL);
1da177e4
LT
1075}
1076
67df197b 1077#ifdef CONFIG_DEBUG_RODATA
edeed305
AV
1078const int rodata_test_data = 0xC3;
1079EXPORT_SYMBOL_GPL(rodata_test_data);
67df197b 1080
502f6604 1081int kernel_set_to_readonly;
16239630
SR
1082
1083void set_kernel_text_rw(void)
1084{
b9af7c0d 1085 unsigned long start = PFN_ALIGN(_text);
e7d23dde 1086 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
1087
1088 if (!kernel_set_to_readonly)
1089 return;
1090
1091 pr_debug("Set kernel text: %lx - %lx for read write\n",
1092 start, end);
1093
e7d23dde
SS
1094 /*
1095 * Make the kernel identity mapping for text RW. Kernel text
1096 * mapping will always be RO. Refer to the comment in
1097 * static_protections() in pageattr.c
1098 */
16239630
SR
1099 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
1100}
1101
1102void set_kernel_text_ro(void)
1103{
b9af7c0d 1104 unsigned long start = PFN_ALIGN(_text);
e7d23dde 1105 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
1106
1107 if (!kernel_set_to_readonly)
1108 return;
1109
1110 pr_debug("Set kernel text: %lx - %lx for read only\n",
1111 start, end);
1112
e7d23dde
SS
1113 /*
1114 * Set the kernel identity mapping for text RO.
1115 */
16239630
SR
1116 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1117}
1118
67df197b
AV
1119void mark_rodata_ro(void)
1120{
74e08179 1121 unsigned long start = PFN_ALIGN(_text);
fc8d7826 1122 unsigned long rodata_start = PFN_ALIGN(__start_rodata);
74e08179 1123 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
fc8d7826
AD
1124 unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
1125 unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
72212675 1126 unsigned long all_end = PFN_ALIGN(&_end);
8f0f996e 1127
6fb14755 1128 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
e3ebadd9 1129 (end - start) >> 10);
984bb80d
AV
1130 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1131
16239630
SR
1132 kernel_set_to_readonly = 1;
1133
984bb80d 1134 /*
72212675
YL
1135 * The rodata/data/bss/brk section (but not the kernel text!)
1136 * should also be not-executable.
984bb80d 1137 */
72212675 1138 set_memory_nx(rodata_start, (all_end - rodata_start) >> PAGE_SHIFT);
67df197b 1139
1a487252
AV
1140 rodata_test();
1141
0c42f392 1142#ifdef CONFIG_CPA_DEBUG
10f22dde 1143 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
6d238cc4 1144 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
0c42f392 1145
10f22dde 1146 printk(KERN_INFO "Testing CPA: again\n");
6d238cc4 1147 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
0c42f392 1148#endif
74e08179 1149
c88442ec 1150 free_init_pages("unused kernel",
fc8d7826
AD
1151 (unsigned long) __va(__pa_symbol(text_end)),
1152 (unsigned long) __va(__pa_symbol(rodata_start)));
c88442ec 1153 free_init_pages("unused kernel",
fc8d7826
AD
1154 (unsigned long) __va(__pa_symbol(rodata_end)),
1155 (unsigned long) __va(__pa_symbol(_sdata)));
67df197b 1156}
4e4eee0e 1157
67df197b
AV
1158#endif
1159
14a62c34
TG
1160int kern_addr_valid(unsigned long addr)
1161{
1da177e4 1162 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
14a62c34
TG
1163 pgd_t *pgd;
1164 pud_t *pud;
1165 pmd_t *pmd;
1166 pte_t *pte;
1da177e4
LT
1167
1168 if (above != 0 && above != -1UL)
14a62c34
TG
1169 return 0;
1170
1da177e4
LT
1171 pgd = pgd_offset_k(addr);
1172 if (pgd_none(*pgd))
1173 return 0;
1174
1175 pud = pud_offset(pgd, addr);
1176 if (pud_none(*pud))
14a62c34 1177 return 0;
1da177e4 1178
0ee364eb
MG
1179 if (pud_large(*pud))
1180 return pfn_valid(pud_pfn(*pud));
1181
1da177e4
LT
1182 pmd = pmd_offset(pud, addr);
1183 if (pmd_none(*pmd))
1184 return 0;
14a62c34 1185
1da177e4
LT
1186 if (pmd_large(*pmd))
1187 return pfn_valid(pmd_pfn(*pmd));
1188
1189 pte = pte_offset_kernel(pmd, addr);
1190 if (pte_none(*pte))
1191 return 0;
14a62c34 1192
1da177e4
LT
1193 return pfn_valid(pte_pfn(*pte));
1194}
1195
14a62c34
TG
1196/*
1197 * A pseudo VMA to allow ptrace access for the vsyscall page. This only
1198 * covers the 64bit vsyscall page now. 32bit has a real VMA now and does
1199 * not need special handling anymore:
1200 */
ac49b9a9
AL
1201static const char *gate_vma_name(struct vm_area_struct *vma)
1202{
1203 return "[vsyscall]";
1204}
1205static struct vm_operations_struct gate_vma_ops = {
1206 .name = gate_vma_name,
1207};
1da177e4 1208static struct vm_area_struct gate_vma = {
f40c3300
AL
1209 .vm_start = VSYSCALL_ADDR,
1210 .vm_end = VSYSCALL_ADDR + PAGE_SIZE,
14a62c34 1211 .vm_page_prot = PAGE_READONLY_EXEC,
ac49b9a9
AL
1212 .vm_flags = VM_READ | VM_EXEC,
1213 .vm_ops = &gate_vma_ops,
1da177e4
LT
1214};
1215
31db58b3 1216struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
1da177e4
LT
1217{
1218#ifdef CONFIG_IA32_EMULATION
31db58b3 1219 if (!mm || mm->context.ia32_compat)
1e014410 1220 return NULL;
1da177e4
LT
1221#endif
1222 return &gate_vma;
1223}
1224
83b964bb 1225int in_gate_area(struct mm_struct *mm, unsigned long addr)
1da177e4 1226{
83b964bb 1227 struct vm_area_struct *vma = get_gate_vma(mm);
14a62c34 1228
1e014410
AK
1229 if (!vma)
1230 return 0;
14a62c34 1231
1da177e4
LT
1232 return (addr >= vma->vm_start) && (addr < vma->vm_end);
1233}
1234
14a62c34 1235/*
cae5d390
SW
1236 * Use this when you have no reliable mm, typically from interrupt
1237 * context. It is less reliable than using a task's mm and may give
1238 * false positives.
1da177e4 1239 */
cae5d390 1240int in_gate_area_no_mm(unsigned long addr)
1da177e4 1241{
f40c3300 1242 return (addr & PAGE_MASK) == VSYSCALL_ADDR;
2aae950b 1243}
0889eba5 1244
982792c7 1245static unsigned long probe_memory_block_size(void)
1dc41aa6 1246{
982792c7
YL
1247 /* start from 2g */
1248 unsigned long bz = 1UL<<31;
1249
1250#ifdef CONFIG_X86_UV
1dc41aa6
NF
1251 if (is_uv_system()) {
1252 printk(KERN_INFO "UV: memory block size 2GB\n");
1253 return 2UL * 1024 * 1024 * 1024;
1254 }
1dc41aa6
NF
1255#endif
1256
982792c7
YL
1257 /* less than 64g installed */
1258 if ((max_pfn << PAGE_SHIFT) < (16UL << 32))
1259 return MIN_MEMORY_BLOCK_SIZE;
1260
1261 /* get the tail size */
1262 while (bz > MIN_MEMORY_BLOCK_SIZE) {
1263 if (!((max_pfn << PAGE_SHIFT) & (bz - 1)))
1264 break;
1265 bz >>= 1;
1266 }
1267
1268 printk(KERN_DEBUG "memory block size : %ldMB\n", bz >> 20);
1269
1270 return bz;
1271}
1272
1273static unsigned long memory_block_size_probed;
1274unsigned long memory_block_size_bytes(void)
1275{
1276 if (!memory_block_size_probed)
1277 memory_block_size_probed = probe_memory_block_size();
1278
1279 return memory_block_size_probed;
1280}
1281
0889eba5
CL
1282#ifdef CONFIG_SPARSEMEM_VMEMMAP
1283/*
1284 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
1285 */
c2b91e2e
YL
1286static long __meminitdata addr_start, addr_end;
1287static void __meminitdata *p_start, *p_end;
1288static int __meminitdata node_start;
1289
e8216da5
JW
1290static int __meminit vmemmap_populate_hugepages(unsigned long start,
1291 unsigned long end, int node)
0889eba5 1292{
0aad818b 1293 unsigned long addr;
0889eba5
CL
1294 unsigned long next;
1295 pgd_t *pgd;
1296 pud_t *pud;
1297 pmd_t *pmd;
1298
0aad818b 1299 for (addr = start; addr < end; addr = next) {
e8216da5 1300 next = pmd_addr_end(addr, end);
0889eba5
CL
1301
1302 pgd = vmemmap_pgd_populate(addr, node);
1303 if (!pgd)
1304 return -ENOMEM;
14a62c34 1305
0889eba5
CL
1306 pud = vmemmap_pud_populate(pgd, addr, node);
1307 if (!pud)
1308 return -ENOMEM;
1309
e8216da5
JW
1310 pmd = pmd_offset(pud, addr);
1311 if (pmd_none(*pmd)) {
e8216da5 1312 void *p;
14a62c34 1313
e8216da5 1314 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
8e2cdbcb
JW
1315 if (p) {
1316 pte_t entry;
1317
1318 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
1319 PAGE_KERNEL_LARGE);
1320 set_pmd(pmd, __pmd(pte_val(entry)));
1321
1322 /* check to see if we have contiguous blocks */
1323 if (p_end != p || node_start != node) {
1324 if (p_start)
1325 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1326 addr_start, addr_end-1, p_start, p_end-1, node_start);
1327 addr_start = addr;
1328 node_start = node;
1329 p_start = p;
1330 }
7c934d39 1331
8e2cdbcb
JW
1332 addr_end = addr + PMD_SIZE;
1333 p_end = p + PMD_SIZE;
1334 continue;
1335 }
1336 } else if (pmd_large(*pmd)) {
e8216da5 1337 vmemmap_verify((pte_t *)pmd, node, addr, next);
8e2cdbcb
JW
1338 continue;
1339 }
1340 pr_warn_once("vmemmap: falling back to regular page backing\n");
1341 if (vmemmap_populate_basepages(addr, next, node))
1342 return -ENOMEM;
0889eba5 1343 }
0889eba5
CL
1344 return 0;
1345}
c2b91e2e 1346
e8216da5
JW
1347int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
1348{
1349 int err;
1350
1351 if (cpu_has_pse)
1352 err = vmemmap_populate_hugepages(start, end, node);
1353 else
1354 err = vmemmap_populate_basepages(start, end, node);
1355 if (!err)
9661d5bc 1356 sync_global_pgds(start, end - 1, 0);
e8216da5
JW
1357 return err;
1358}
1359
46723bfa
YI
1360#if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
1361void register_page_bootmem_memmap(unsigned long section_nr,
1362 struct page *start_page, unsigned long size)
1363{
1364 unsigned long addr = (unsigned long)start_page;
1365 unsigned long end = (unsigned long)(start_page + size);
1366 unsigned long next;
1367 pgd_t *pgd;
1368 pud_t *pud;
1369 pmd_t *pmd;
1370 unsigned int nr_pages;
1371 struct page *page;
1372
1373 for (; addr < end; addr = next) {
1374 pte_t *pte = NULL;
1375
1376 pgd = pgd_offset_k(addr);
1377 if (pgd_none(*pgd)) {
1378 next = (addr + PAGE_SIZE) & PAGE_MASK;
1379 continue;
1380 }
1381 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
1382
1383 pud = pud_offset(pgd, addr);
1384 if (pud_none(*pud)) {
1385 next = (addr + PAGE_SIZE) & PAGE_MASK;
1386 continue;
1387 }
1388 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
1389
1390 if (!cpu_has_pse) {
1391 next = (addr + PAGE_SIZE) & PAGE_MASK;
1392 pmd = pmd_offset(pud, addr);
1393 if (pmd_none(*pmd))
1394 continue;
1395 get_page_bootmem(section_nr, pmd_page(*pmd),
1396 MIX_SECTION_INFO);
1397
1398 pte = pte_offset_kernel(pmd, addr);
1399 if (pte_none(*pte))
1400 continue;
1401 get_page_bootmem(section_nr, pte_page(*pte),
1402 SECTION_INFO);
1403 } else {
1404 next = pmd_addr_end(addr, end);
1405
1406 pmd = pmd_offset(pud, addr);
1407 if (pmd_none(*pmd))
1408 continue;
1409
1410 nr_pages = 1 << (get_order(PMD_SIZE));
1411 page = pmd_page(*pmd);
1412 while (nr_pages--)
1413 get_page_bootmem(section_nr, page++,
1414 SECTION_INFO);
1415 }
1416 }
1417}
1418#endif
1419
c2b91e2e
YL
1420void __meminit vmemmap_populate_print_last(void)
1421{
1422 if (p_start) {
1423 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
1424 addr_start, addr_end-1, p_start, p_end-1, node_start);
1425 p_start = NULL;
1426 p_end = NULL;
1427 node_start = 0;
1428 }
1429}
0889eba5 1430#endif
This page took 0.896389 seconds and 5 git commands to generate.