Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[deliverable/linux.git] / arch / x86 / mm / init_64.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
a2531293 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
1da177e4
LT
9#include <linux/signal.h>
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/ptrace.h>
16#include <linux/mman.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/smp.h>
20#include <linux/init.h>
11034d55 21#include <linux/initrd.h>
1da177e4
LT
22#include <linux/pagemap.h>
23#include <linux/bootmem.h>
a9ce6bc1 24#include <linux/memblock.h>
1da177e4 25#include <linux/proc_fs.h>
59170891 26#include <linux/pci.h>
6fb14755 27#include <linux/pfn.h>
c9cf5528 28#include <linux/poison.h>
17a941d8 29#include <linux/dma-mapping.h>
a63fdc51 30#include <linux/memory.h>
44df75e6 31#include <linux/memory_hotplug.h>
4b94ffdc 32#include <linux/memremap.h>
ae32b129 33#include <linux/nmi.h>
5a0e3ad6 34#include <linux/gfp.h>
2f96b8c1 35#include <linux/kcore.h>
1da177e4
LT
36
37#include <asm/processor.h>
46eaa670 38#include <asm/bios_ebda.h>
1da177e4
LT
39#include <asm/uaccess.h>
40#include <asm/pgtable.h>
41#include <asm/pgalloc.h>
42#include <asm/dma.h>
43#include <asm/fixmap.h>
44#include <asm/e820.h>
45#include <asm/apic.h>
46#include <asm/tlb.h>
47#include <asm/mmu_context.h>
48#include <asm/proto.h>
49#include <asm/smp.h>
2bc0414e 50#include <asm/sections.h>
718fc13b 51#include <asm/kdebug.h>
aaa64e04 52#include <asm/numa.h>
7bfeab9a 53#include <asm/cacheflush.h>
4fcb2083 54#include <asm/init.h>
43c75f93 55#include <asm/uv/uv.h>
e5f15b45 56#include <asm/setup.h>
1da177e4 57
5c51bdbe
YL
58#include "mm_internal.h"
59
cf4fb15b 60#include "ident_map.c"
aece2785 61
1da177e4
LT
62/*
63 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
64 * physical space so we can cache the place of the first one and move
65 * around without checking the pgd every time.
66 */
67
f955371c 68pteval_t __supported_pte_mask __read_mostly = ~0;
bd220a24
YL
69EXPORT_SYMBOL_GPL(__supported_pte_mask);
70
bd220a24
YL
71int force_personality32;
72
deed05b7
IM
73/*
74 * noexec32=on|off
75 * Control non executable heap for 32bit processes.
76 * To control the stack too use noexec=off
77 *
78 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
79 * off PROT_READ implies PROT_EXEC
80 */
bd220a24
YL
81static int __init nonx32_setup(char *str)
82{
83 if (!strcmp(str, "on"))
84 force_personality32 &= ~READ_IMPLIES_EXEC;
85 else if (!strcmp(str, "off"))
86 force_personality32 |= READ_IMPLIES_EXEC;
87 return 1;
88}
89__setup("noexec32=", nonx32_setup);
90
6afb5157
HL
91/*
92 * When memory was added/removed make sure all the processes MM have
93 * suitable PGD entries in the local PGD level page.
94 */
9661d5bc 95void sync_global_pgds(unsigned long start, unsigned long end, int removed)
6afb5157 96{
44235dcd
JF
97 unsigned long address;
98
99 for (address = start; address <= end; address += PGDIR_SIZE) {
100 const pgd_t *pgd_ref = pgd_offset_k(address);
44235dcd
JF
101 struct page *page;
102
9661d5bc
YI
103 /*
104 * When it is called after memory hot remove, pgd_none()
105 * returns true. In this case (removed == 1), we must clear
106 * the PGD entries in the local PGD level page.
107 */
108 if (pgd_none(*pgd_ref) && !removed)
44235dcd
JF
109 continue;
110
a79e53d8 111 spin_lock(&pgd_lock);
44235dcd 112 list_for_each_entry(page, &pgd_list, lru) {
be354f40 113 pgd_t *pgd;
617d34d9
JF
114 spinlock_t *pgt_lock;
115
44235dcd 116 pgd = (pgd_t *)page_address(page) + pgd_index(address);
a79e53d8 117 /* the pgt_lock only for Xen */
617d34d9
JF
118 pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
119 spin_lock(pgt_lock);
120
9661d5bc 121 if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
44235dcd
JF
122 BUG_ON(pgd_page_vaddr(*pgd)
123 != pgd_page_vaddr(*pgd_ref));
617d34d9 124
9661d5bc
YI
125 if (removed) {
126 if (pgd_none(*pgd_ref) && !pgd_none(*pgd))
127 pgd_clear(pgd);
128 } else {
129 if (pgd_none(*pgd))
130 set_pgd(pgd, *pgd_ref);
131 }
132
617d34d9 133 spin_unlock(pgt_lock);
44235dcd 134 }
a79e53d8 135 spin_unlock(&pgd_lock);
44235dcd 136 }
6afb5157
HL
137}
138
8d6ea967
MS
139/*
140 * NOTE: This function is marked __ref because it calls __init function
141 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
142 */
143static __ref void *spp_getpage(void)
14a62c34 144{
1da177e4 145 void *ptr;
14a62c34 146
1da177e4 147 if (after_bootmem)
9e730237 148 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
1da177e4
LT
149 else
150 ptr = alloc_bootmem_pages(PAGE_SIZE);
14a62c34
TG
151
152 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
153 panic("set_pte_phys: cannot allocate page data %s\n",
154 after_bootmem ? "after bootmem" : "");
155 }
1da177e4 156
10f22dde 157 pr_debug("spp_getpage %p\n", ptr);
14a62c34 158
1da177e4 159 return ptr;
14a62c34 160}
1da177e4 161
f254f390 162static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
1da177e4 163{
458a3e64
TH
164 if (pgd_none(*pgd)) {
165 pud_t *pud = (pud_t *)spp_getpage();
166 pgd_populate(&init_mm, pgd, pud);
167 if (pud != pud_offset(pgd, 0))
168 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
169 pud, pud_offset(pgd, 0));
170 }
171 return pud_offset(pgd, vaddr);
172}
1da177e4 173
f254f390 174static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
458a3e64 175{
1da177e4 176 if (pud_none(*pud)) {
458a3e64 177 pmd_t *pmd = (pmd_t *) spp_getpage();
bb23e403 178 pud_populate(&init_mm, pud, pmd);
458a3e64 179 if (pmd != pmd_offset(pud, 0))
10f22dde 180 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
458a3e64 181 pmd, pmd_offset(pud, 0));
1da177e4 182 }
458a3e64
TH
183 return pmd_offset(pud, vaddr);
184}
185
f254f390 186static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
458a3e64 187{
1da177e4 188 if (pmd_none(*pmd)) {
458a3e64 189 pte_t *pte = (pte_t *) spp_getpage();
bb23e403 190 pmd_populate_kernel(&init_mm, pmd, pte);
458a3e64 191 if (pte != pte_offset_kernel(pmd, 0))
10f22dde 192 printk(KERN_ERR "PAGETABLE BUG #02!\n");
1da177e4 193 }
458a3e64
TH
194 return pte_offset_kernel(pmd, vaddr);
195}
196
197void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
198{
199 pud_t *pud;
200 pmd_t *pmd;
201 pte_t *pte;
202
203 pud = pud_page + pud_index(vaddr);
204 pmd = fill_pmd(pud, vaddr);
205 pte = fill_pte(pmd, vaddr);
1da177e4 206
1da177e4
LT
207 set_pte(pte, new_pte);
208
209 /*
210 * It's enough to flush this one mapping.
211 * (PGE mappings get flushed as well)
212 */
213 __flush_tlb_one(vaddr);
214}
215
458a3e64 216void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
0814e0ba
EH
217{
218 pgd_t *pgd;
219 pud_t *pud_page;
220
221 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
222
223 pgd = pgd_offset_k(vaddr);
224 if (pgd_none(*pgd)) {
225 printk(KERN_ERR
226 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
227 return;
228 }
229 pud_page = (pud_t*)pgd_page_vaddr(*pgd);
230 set_pte_vaddr_pud(pud_page, vaddr, pteval);
231}
232
458a3e64 233pmd_t * __init populate_extra_pmd(unsigned long vaddr)
11124411
TH
234{
235 pgd_t *pgd;
236 pud_t *pud;
237
238 pgd = pgd_offset_k(vaddr);
458a3e64
TH
239 pud = fill_pud(pgd, vaddr);
240 return fill_pmd(pud, vaddr);
241}
242
243pte_t * __init populate_extra_pte(unsigned long vaddr)
244{
245 pmd_t *pmd;
11124411 246
458a3e64
TH
247 pmd = populate_extra_pmd(vaddr);
248 return fill_pte(pmd, vaddr);
11124411
TH
249}
250
3a9e189d
JS
251/*
252 * Create large page table mappings for a range of physical addresses.
253 */
254static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
2df58b6d 255 enum page_cache_mode cache)
3a9e189d
JS
256{
257 pgd_t *pgd;
258 pud_t *pud;
259 pmd_t *pmd;
2df58b6d 260 pgprot_t prot;
3a9e189d 261
2df58b6d
JG
262 pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
263 pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
3a9e189d
JS
264 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
265 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
266 pgd = pgd_offset_k((unsigned long)__va(phys));
267 if (pgd_none(*pgd)) {
268 pud = (pud_t *) spp_getpage();
269 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
270 _PAGE_USER));
271 }
272 pud = pud_offset(pgd, (unsigned long)__va(phys));
273 if (pud_none(*pud)) {
274 pmd = (pmd_t *) spp_getpage();
275 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
276 _PAGE_USER));
277 }
278 pmd = pmd_offset(pud, phys);
279 BUG_ON(!pmd_none(*pmd));
280 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
281 }
282}
283
284void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
285{
2df58b6d 286 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
3a9e189d
JS
287}
288
289void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
290{
2df58b6d 291 __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
3a9e189d
JS
292}
293
31eedd82 294/*
88f3aec7
IM
295 * The head.S code sets up the kernel high mapping:
296 *
297 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
31eedd82 298 *
1e3b3081 299 * phys_base holds the negative offset to the kernel, which is added
31eedd82
TG
300 * to the compile time generated pmds. This results in invalid pmds up
301 * to the point where we hit the physaddr 0 mapping.
302 *
e5f15b45
YL
303 * We limit the mappings to the region from _text to _brk_end. _brk_end
304 * is rounded up to the 2MB boundary. This catches the invalid pmds as
31eedd82
TG
305 * well, as they are located before _text:
306 */
307void __init cleanup_highmap(void)
308{
309 unsigned long vaddr = __START_KERNEL_map;
10054230 310 unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
e5f15b45 311 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
31eedd82 312 pmd_t *pmd = level2_kernel_pgt;
31eedd82 313
10054230
YL
314 /*
315 * Native path, max_pfn_mapped is not set yet.
316 * Xen has valid max_pfn_mapped set in
317 * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
318 */
319 if (max_pfn_mapped)
320 vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
321
e5f15b45 322 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
2884f110 323 if (pmd_none(*pmd))
31eedd82
TG
324 continue;
325 if (vaddr < (unsigned long) _text || vaddr > end)
326 set_pmd(pmd, __pmd(0));
327 }
328}
329
59b3d020
TG
330/*
331 * Create PTE level page table mapping for physical addresses.
332 * It returns the last physical address mapped.
333 */
7b16eb89 334static unsigned long __meminit
59b3d020 335phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
b27a43c1 336 pgprot_t prot)
4f9c11dd 337{
59b3d020
TG
338 unsigned long pages = 0, paddr_next;
339 unsigned long paddr_last = paddr_end;
340 pte_t *pte;
4f9c11dd 341 int i;
7b16eb89 342
59b3d020
TG
343 pte = pte_page + pte_index(paddr);
344 i = pte_index(paddr);
4f9c11dd 345
59b3d020
TG
346 for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
347 paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
348 if (paddr >= paddr_end) {
eceb3632 349 if (!after_bootmem &&
59b3d020
TG
350 !e820_any_mapped(paddr & PAGE_MASK, paddr_next,
351 E820_RAM) &&
352 !e820_any_mapped(paddr & PAGE_MASK, paddr_next,
353 E820_RESERVED_KERN))
eceb3632
YL
354 set_pte(pte, __pte(0));
355 continue;
4f9c11dd
JF
356 }
357
b27a43c1
SS
358 /*
359 * We will re-use the existing mapping.
360 * Xen for example has some special requirements, like mapping
361 * pagetable pages as RO. So assume someone who pre-setup
362 * these mappings are more intelligent.
363 */
dcb32d99 364 if (!pte_none(*pte)) {
876ee61a
JB
365 if (!after_bootmem)
366 pages++;
4f9c11dd 367 continue;
3afa3949 368 }
4f9c11dd
JF
369
370 if (0)
59b3d020
TG
371 pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr,
372 pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
4f9c11dd 373 pages++;
59b3d020
TG
374 set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
375 paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 376 }
a2699e47 377
4f9c11dd 378 update_page_count(PG_LEVEL_4K, pages);
7b16eb89 379
59b3d020 380 return paddr_last;
4f9c11dd
JF
381}
382
59b3d020
TG
383/*
384 * Create PMD level page table mapping for physical addresses. The virtual
385 * and physical address have to be aligned at this level.
386 * It returns the last physical address mapped.
387 */
cc615032 388static unsigned long __meminit
59b3d020 389phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
b27a43c1 390 unsigned long page_size_mask, pgprot_t prot)
44df75e6 391{
59b3d020
TG
392 unsigned long pages = 0, paddr_next;
393 unsigned long paddr_last = paddr_end;
ce0c0e50 394
59b3d020 395 int i = pmd_index(paddr);
44df75e6 396
59b3d020
TG
397 for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
398 pmd_t *pmd = pmd_page + pmd_index(paddr);
4f9c11dd 399 pte_t *pte;
b27a43c1 400 pgprot_t new_prot = prot;
44df75e6 401
59b3d020
TG
402 paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
403 if (paddr >= paddr_end) {
eceb3632 404 if (!after_bootmem &&
59b3d020
TG
405 !e820_any_mapped(paddr & PMD_MASK, paddr_next,
406 E820_RAM) &&
407 !e820_any_mapped(paddr & PMD_MASK, paddr_next,
408 E820_RESERVED_KERN))
eceb3632
YL
409 set_pmd(pmd, __pmd(0));
410 continue;
44df75e6 411 }
6ad91658 412
dcb32d99 413 if (!pmd_none(*pmd)) {
8ae3a5a8
JB
414 if (!pmd_large(*pmd)) {
415 spin_lock(&init_mm.page_table_lock);
973dc4f3 416 pte = (pte_t *)pmd_page_vaddr(*pmd);
59b3d020
TG
417 paddr_last = phys_pte_init(pte, paddr,
418 paddr_end, prot);
8ae3a5a8 419 spin_unlock(&init_mm.page_table_lock);
a2699e47 420 continue;
8ae3a5a8 421 }
b27a43c1
SS
422 /*
423 * If we are ok with PG_LEVEL_2M mapping, then we will
424 * use the existing mapping,
425 *
426 * Otherwise, we will split the large page mapping but
427 * use the same existing protection bits except for
428 * large page, so that we don't violate Intel's TLB
429 * Application note (317080) which says, while changing
430 * the page sizes, new and old translations should
431 * not differ with respect to page frame and
432 * attributes.
433 */
3afa3949 434 if (page_size_mask & (1 << PG_LEVEL_2M)) {
876ee61a
JB
435 if (!after_bootmem)
436 pages++;
59b3d020 437 paddr_last = paddr_next;
b27a43c1 438 continue;
3afa3949 439 }
b27a43c1 440 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
4f9c11dd
JF
441 }
442
b50efd2a 443 if (page_size_mask & (1<<PG_LEVEL_2M)) {
4f9c11dd 444 pages++;
8ae3a5a8 445 spin_lock(&init_mm.page_table_lock);
4f9c11dd 446 set_pte((pte_t *)pmd,
59b3d020 447 pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
b27a43c1 448 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
8ae3a5a8 449 spin_unlock(&init_mm.page_table_lock);
59b3d020 450 paddr_last = paddr_next;
6ad91658 451 continue;
4f9c11dd 452 }
6ad91658 453
868bf4d6 454 pte = alloc_low_page();
59b3d020 455 paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
4f9c11dd 456
8ae3a5a8 457 spin_lock(&init_mm.page_table_lock);
868bf4d6 458 pmd_populate_kernel(&init_mm, pmd, pte);
8ae3a5a8 459 spin_unlock(&init_mm.page_table_lock);
44df75e6 460 }
ce0c0e50 461 update_page_count(PG_LEVEL_2M, pages);
59b3d020 462 return paddr_last;
44df75e6
MT
463}
464
59b3d020
TG
465/*
466 * Create PUD level page table mapping for physical addresses. The virtual
faa37933
TG
467 * and physical address do not have to be aligned at this level. KASLR can
468 * randomize virtual addresses up to this level.
59b3d020
TG
469 * It returns the last physical address mapped.
470 */
cc615032 471static unsigned long __meminit
59b3d020
TG
472phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
473 unsigned long page_size_mask)
14a62c34 474{
59b3d020
TG
475 unsigned long pages = 0, paddr_next;
476 unsigned long paddr_last = paddr_end;
faa37933
TG
477 unsigned long vaddr = (unsigned long)__va(paddr);
478 int i = pud_index(vaddr);
44df75e6 479
59b3d020 480 for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
faa37933 481 pud_t *pud;
1da177e4 482 pmd_t *pmd;
b27a43c1 483 pgprot_t prot = PAGE_KERNEL;
1da177e4 484
faa37933
TG
485 vaddr = (unsigned long)__va(paddr);
486 pud = pud_page + pud_index(vaddr);
59b3d020 487 paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
faa37933 488
59b3d020 489 if (paddr >= paddr_end) {
eceb3632 490 if (!after_bootmem &&
59b3d020
TG
491 !e820_any_mapped(paddr & PUD_MASK, paddr_next,
492 E820_RAM) &&
493 !e820_any_mapped(paddr & PUD_MASK, paddr_next,
494 E820_RESERVED_KERN))
eceb3632 495 set_pud(pud, __pud(0));
1da177e4 496 continue;
14a62c34 497 }
1da177e4 498
dcb32d99 499 if (!pud_none(*pud)) {
a2699e47 500 if (!pud_large(*pud)) {
973dc4f3 501 pmd = pmd_offset(pud, 0);
59b3d020
TG
502 paddr_last = phys_pmd_init(pmd, paddr,
503 paddr_end,
504 page_size_mask,
505 prot);
4b239f45 506 __flush_tlb_all();
a2699e47
SS
507 continue;
508 }
b27a43c1
SS
509 /*
510 * If we are ok with PG_LEVEL_1G mapping, then we will
511 * use the existing mapping.
512 *
513 * Otherwise, we will split the gbpage mapping but use
514 * the same existing protection bits except for large
515 * page, so that we don't violate Intel's TLB
516 * Application note (317080) which says, while changing
517 * the page sizes, new and old translations should
518 * not differ with respect to page frame and
519 * attributes.
520 */
3afa3949 521 if (page_size_mask & (1 << PG_LEVEL_1G)) {
876ee61a
JB
522 if (!after_bootmem)
523 pages++;
59b3d020 524 paddr_last = paddr_next;
b27a43c1 525 continue;
3afa3949 526 }
b27a43c1 527 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
ef925766
AK
528 }
529
b50efd2a 530 if (page_size_mask & (1<<PG_LEVEL_1G)) {
ce0c0e50 531 pages++;
8ae3a5a8 532 spin_lock(&init_mm.page_table_lock);
ef925766 533 set_pte((pte_t *)pud,
59b3d020 534 pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
960ddb4f 535 PAGE_KERNEL_LARGE));
8ae3a5a8 536 spin_unlock(&init_mm.page_table_lock);
59b3d020 537 paddr_last = paddr_next;
6ad91658
KM
538 continue;
539 }
540
868bf4d6 541 pmd = alloc_low_page();
59b3d020
TG
542 paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
543 page_size_mask, prot);
8ae3a5a8
JB
544
545 spin_lock(&init_mm.page_table_lock);
868bf4d6 546 pud_populate(&init_mm, pud, pmd);
44df75e6 547 spin_unlock(&init_mm.page_table_lock);
1da177e4 548 }
1a2b4412 549 __flush_tlb_all();
a2699e47 550
ce0c0e50 551 update_page_count(PG_LEVEL_1G, pages);
cc615032 552
59b3d020 553 return paddr_last;
14a62c34 554}
1da177e4 555
59b3d020
TG
556/*
557 * Create page table mapping for the physical memory for specific physical
faa37933 558 * addresses. The virtual and physical addresses have to be aligned on PMD level
59b3d020
TG
559 * down. It returns the last physical address mapped.
560 */
41d840e2 561unsigned long __meminit
59b3d020
TG
562kernel_physical_mapping_init(unsigned long paddr_start,
563 unsigned long paddr_end,
f765090a 564 unsigned long page_size_mask)
14a62c34 565{
9b861528 566 bool pgd_changed = false;
59b3d020 567 unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
1da177e4 568
59b3d020
TG
569 paddr_last = paddr_end;
570 vaddr = (unsigned long)__va(paddr_start);
571 vaddr_end = (unsigned long)__va(paddr_end);
572 vaddr_start = vaddr;
1da177e4 573
59b3d020
TG
574 for (; vaddr < vaddr_end; vaddr = vaddr_next) {
575 pgd_t *pgd = pgd_offset_k(vaddr);
44df75e6
MT
576 pud_t *pud;
577
59b3d020 578 vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
4f9c11dd
JF
579
580 if (pgd_val(*pgd)) {
973dc4f3 581 pud = (pud_t *)pgd_page_vaddr(*pgd);
59b3d020
TG
582 paddr_last = phys_pud_init(pud, __pa(vaddr),
583 __pa(vaddr_end),
584 page_size_mask);
4f9c11dd
JF
585 continue;
586 }
587
868bf4d6 588 pud = alloc_low_page();
59b3d020
TG
589 paddr_last = phys_pud_init(pud, __pa(vaddr), __pa(vaddr_end),
590 page_size_mask);
8ae3a5a8
JB
591
592 spin_lock(&init_mm.page_table_lock);
868bf4d6 593 pgd_populate(&init_mm, pgd, pud);
8ae3a5a8 594 spin_unlock(&init_mm.page_table_lock);
9b861528 595 pgd_changed = true;
14a62c34 596 }
9b861528
HL
597
598 if (pgd_changed)
59b3d020 599 sync_global_pgds(vaddr_start, vaddr_end - 1, 0);
9b861528 600
a2699e47 601 __flush_tlb_all();
1da177e4 602
59b3d020 603 return paddr_last;
b50efd2a 604}
7b16eb89 605
2b97690f 606#ifndef CONFIG_NUMA
d8fc3afc 607void __init initmem_init(void)
1f75d7e3 608{
e7e8de59 609 memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
1f75d7e3 610}
3551f88f 611#endif
1f75d7e3 612
1da177e4
LT
613void __init paging_init(void)
614{
3551f88f 615 sparse_memory_present_with_active_regions(MAX_NUMNODES);
44df75e6 616 sparse_init();
44b57280
YL
617
618 /*
619 * clear the default setting with node 0
620 * note: don't use nodes_clear here, that is really clearing when
621 * numa support is not compiled in, and later node_set_state
622 * will not set it back.
623 */
4b0ef1fe
LJ
624 node_clear_state(0, N_MEMORY);
625 if (N_MEMORY != N_NORMAL_MEMORY)
626 node_clear_state(0, N_NORMAL_MEMORY);
44b57280 627
4c0b2e5f 628 zone_sizes_init();
1da177e4 629}
1da177e4 630
44df75e6
MT
631/*
632 * Memory hotplug specific functions
44df75e6 633 */
bc02af93 634#ifdef CONFIG_MEMORY_HOTPLUG
ea085417
SZ
635/*
636 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
637 * updating.
638 */
639static void update_end_of_memory_vars(u64 start, u64 size)
640{
641 unsigned long end_pfn = PFN_UP(start + size);
642
643 if (end_pfn > max_pfn) {
644 max_pfn = end_pfn;
645 max_low_pfn = end_pfn;
646 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
647 }
648}
649
9d99aaa3
AK
650/*
651 * Memory is added always to NORMAL zone. This means you will never get
652 * additional DMA/DMA32 memory.
653 */
033fbae9 654int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
44df75e6 655{
bc02af93 656 struct pglist_data *pgdat = NODE_DATA(nid);
9bfc4113 657 struct zone *zone = pgdat->node_zones +
033fbae9 658 zone_for_memory(nid, start, size, ZONE_NORMAL, for_device);
66520ebc 659 unsigned long start_pfn = start >> PAGE_SHIFT;
44df75e6
MT
660 unsigned long nr_pages = size >> PAGE_SHIFT;
661 int ret;
662
66520ebc 663 init_memory_mapping(start, start + size);
45e0b78b 664
c04fc586 665 ret = __add_pages(nid, zone, start_pfn, nr_pages);
fe8b868e 666 WARN_ON_ONCE(ret);
44df75e6 667
ea085417
SZ
668 /* update max_pfn, max_low_pfn and high_memory */
669 update_end_of_memory_vars(start, size);
670
44df75e6 671 return ret;
44df75e6 672}
bc02af93 673EXPORT_SYMBOL_GPL(arch_add_memory);
44df75e6 674
ae9aae9e
WC
675#define PAGE_INUSE 0xFD
676
677static void __meminit free_pagetable(struct page *page, int order)
678{
ae9aae9e
WC
679 unsigned long magic;
680 unsigned int nr_pages = 1 << order;
4b94ffdc
DW
681 struct vmem_altmap *altmap = to_vmem_altmap((unsigned long) page);
682
683 if (altmap) {
684 vmem_altmap_free(altmap, nr_pages);
685 return;
686 }
ae9aae9e
WC
687
688 /* bootmem page has reserved flag */
689 if (PageReserved(page)) {
690 __ClearPageReserved(page);
ae9aae9e
WC
691
692 magic = (unsigned long)page->lru.next;
693 if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
694 while (nr_pages--)
695 put_page_bootmem(page++);
696 } else
170a5a7e
JL
697 while (nr_pages--)
698 free_reserved_page(page++);
ae9aae9e
WC
699 } else
700 free_pages((unsigned long)page_address(page), order);
ae9aae9e
WC
701}
702
703static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
704{
705 pte_t *pte;
706 int i;
707
708 for (i = 0; i < PTRS_PER_PTE; i++) {
709 pte = pte_start + i;
dcb32d99 710 if (!pte_none(*pte))
ae9aae9e
WC
711 return;
712 }
713
714 /* free a pte talbe */
715 free_pagetable(pmd_page(*pmd), 0);
716 spin_lock(&init_mm.page_table_lock);
717 pmd_clear(pmd);
718 spin_unlock(&init_mm.page_table_lock);
719}
720
721static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
722{
723 pmd_t *pmd;
724 int i;
725
726 for (i = 0; i < PTRS_PER_PMD; i++) {
727 pmd = pmd_start + i;
dcb32d99 728 if (!pmd_none(*pmd))
ae9aae9e
WC
729 return;
730 }
731
732 /* free a pmd talbe */
733 free_pagetable(pud_page(*pud), 0);
734 spin_lock(&init_mm.page_table_lock);
735 pud_clear(pud);
736 spin_unlock(&init_mm.page_table_lock);
737}
738
ae9aae9e
WC
739static void __meminit
740remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
741 bool direct)
742{
743 unsigned long next, pages = 0;
744 pte_t *pte;
745 void *page_addr;
746 phys_addr_t phys_addr;
747
748 pte = pte_start + pte_index(addr);
749 for (; addr < end; addr = next, pte++) {
750 next = (addr + PAGE_SIZE) & PAGE_MASK;
751 if (next > end)
752 next = end;
753
754 if (!pte_present(*pte))
755 continue;
756
757 /*
758 * We mapped [0,1G) memory as identity mapping when
759 * initializing, in arch/x86/kernel/head_64.S. These
760 * pagetables cannot be removed.
761 */
762 phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
763 if (phys_addr < (phys_addr_t)0x40000000)
764 return;
765
b500f77b 766 if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
ae9aae9e
WC
767 /*
768 * Do not free direct mapping pages since they were
769 * freed when offlining, or simplely not in use.
770 */
771 if (!direct)
772 free_pagetable(pte_page(*pte), 0);
773
774 spin_lock(&init_mm.page_table_lock);
775 pte_clear(&init_mm, addr, pte);
776 spin_unlock(&init_mm.page_table_lock);
777
778 /* For non-direct mapping, pages means nothing. */
779 pages++;
780 } else {
781 /*
782 * If we are here, we are freeing vmemmap pages since
783 * direct mapped memory ranges to be freed are aligned.
784 *
785 * If we are not removing the whole page, it means
786 * other page structs in this page are being used and
787 * we canot remove them. So fill the unused page_structs
788 * with 0xFD, and remove the page when it is wholly
789 * filled with 0xFD.
790 */
791 memset((void *)addr, PAGE_INUSE, next - addr);
792
793 page_addr = page_address(pte_page(*pte));
794 if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
795 free_pagetable(pte_page(*pte), 0);
796
797 spin_lock(&init_mm.page_table_lock);
798 pte_clear(&init_mm, addr, pte);
799 spin_unlock(&init_mm.page_table_lock);
800 }
801 }
802 }
803
804 /* Call free_pte_table() in remove_pmd_table(). */
805 flush_tlb_all();
806 if (direct)
807 update_page_count(PG_LEVEL_4K, -pages);
808}
809
810static void __meminit
811remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
812 bool direct)
813{
814 unsigned long next, pages = 0;
815 pte_t *pte_base;
816 pmd_t *pmd;
817 void *page_addr;
818
819 pmd = pmd_start + pmd_index(addr);
820 for (; addr < end; addr = next, pmd++) {
821 next = pmd_addr_end(addr, end);
822
823 if (!pmd_present(*pmd))
824 continue;
825
826 if (pmd_large(*pmd)) {
827 if (IS_ALIGNED(addr, PMD_SIZE) &&
828 IS_ALIGNED(next, PMD_SIZE)) {
829 if (!direct)
830 free_pagetable(pmd_page(*pmd),
831 get_order(PMD_SIZE));
832
833 spin_lock(&init_mm.page_table_lock);
834 pmd_clear(pmd);
835 spin_unlock(&init_mm.page_table_lock);
836 pages++;
837 } else {
838 /* If here, we are freeing vmemmap pages. */
839 memset((void *)addr, PAGE_INUSE, next - addr);
840
841 page_addr = page_address(pmd_page(*pmd));
842 if (!memchr_inv(page_addr, PAGE_INUSE,
843 PMD_SIZE)) {
844 free_pagetable(pmd_page(*pmd),
845 get_order(PMD_SIZE));
846
847 spin_lock(&init_mm.page_table_lock);
848 pmd_clear(pmd);
849 spin_unlock(&init_mm.page_table_lock);
850 }
851 }
852
853 continue;
854 }
855
856 pte_base = (pte_t *)pmd_page_vaddr(*pmd);
857 remove_pte_table(pte_base, addr, next, direct);
858 free_pte_table(pte_base, pmd);
859 }
860
861 /* Call free_pmd_table() in remove_pud_table(). */
862 if (direct)
863 update_page_count(PG_LEVEL_2M, -pages);
864}
865
866static void __meminit
867remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
868 bool direct)
869{
870 unsigned long next, pages = 0;
871 pmd_t *pmd_base;
872 pud_t *pud;
873 void *page_addr;
874
875 pud = pud_start + pud_index(addr);
876 for (; addr < end; addr = next, pud++) {
877 next = pud_addr_end(addr, end);
878
879 if (!pud_present(*pud))
880 continue;
881
882 if (pud_large(*pud)) {
883 if (IS_ALIGNED(addr, PUD_SIZE) &&
884 IS_ALIGNED(next, PUD_SIZE)) {
885 if (!direct)
886 free_pagetable(pud_page(*pud),
887 get_order(PUD_SIZE));
888
889 spin_lock(&init_mm.page_table_lock);
890 pud_clear(pud);
891 spin_unlock(&init_mm.page_table_lock);
892 pages++;
893 } else {
894 /* If here, we are freeing vmemmap pages. */
895 memset((void *)addr, PAGE_INUSE, next - addr);
896
897 page_addr = page_address(pud_page(*pud));
898 if (!memchr_inv(page_addr, PAGE_INUSE,
899 PUD_SIZE)) {
900 free_pagetable(pud_page(*pud),
901 get_order(PUD_SIZE));
902
903 spin_lock(&init_mm.page_table_lock);
904 pud_clear(pud);
905 spin_unlock(&init_mm.page_table_lock);
906 }
907 }
908
909 continue;
910 }
911
912 pmd_base = (pmd_t *)pud_page_vaddr(*pud);
913 remove_pmd_table(pmd_base, addr, next, direct);
914 free_pmd_table(pmd_base, pud);
915 }
916
917 if (direct)
918 update_page_count(PG_LEVEL_1G, -pages);
919}
920
921/* start and end are both virtual address. */
922static void __meminit
923remove_pagetable(unsigned long start, unsigned long end, bool direct)
924{
925 unsigned long next;
5255e0a7 926 unsigned long addr;
ae9aae9e
WC
927 pgd_t *pgd;
928 pud_t *pud;
ae9aae9e 929
5255e0a7
YI
930 for (addr = start; addr < end; addr = next) {
931 next = pgd_addr_end(addr, end);
ae9aae9e 932
5255e0a7 933 pgd = pgd_offset_k(addr);
ae9aae9e
WC
934 if (!pgd_present(*pgd))
935 continue;
936
937 pud = (pud_t *)pgd_page_vaddr(*pgd);
5255e0a7 938 remove_pud_table(pud, addr, next, direct);
ae9aae9e
WC
939 }
940
ae9aae9e
WC
941 flush_tlb_all();
942}
943
0aad818b 944void __ref vmemmap_free(unsigned long start, unsigned long end)
0197518c 945{
0197518c
TC
946 remove_pagetable(start, end, false);
947}
948
587ff8c4 949#ifdef CONFIG_MEMORY_HOTREMOVE
bbcab878
TC
950static void __meminit
951kernel_physical_mapping_remove(unsigned long start, unsigned long end)
952{
953 start = (unsigned long)__va(start);
954 end = (unsigned long)__va(end);
955
956 remove_pagetable(start, end, true);
957}
958
24d335ca
WC
959int __ref arch_remove_memory(u64 start, u64 size)
960{
961 unsigned long start_pfn = start >> PAGE_SHIFT;
962 unsigned long nr_pages = size >> PAGE_SHIFT;
4b94ffdc
DW
963 struct page *page = pfn_to_page(start_pfn);
964 struct vmem_altmap *altmap;
24d335ca
WC
965 struct zone *zone;
966 int ret;
967
4b94ffdc
DW
968 /* With altmap the first mapped page is offset from @start */
969 altmap = to_vmem_altmap((unsigned long) page);
970 if (altmap)
971 page += vmem_altmap_offset(altmap);
972 zone = page_zone(page);
24d335ca
WC
973 ret = __remove_pages(zone, start_pfn, nr_pages);
974 WARN_ON_ONCE(ret);
4b94ffdc 975 kernel_physical_mapping_remove(start, start + size);
24d335ca
WC
976
977 return ret;
978}
979#endif
45e0b78b
KM
980#endif /* CONFIG_MEMORY_HOTPLUG */
981
81ac3ad9 982static struct kcore_list kcore_vsyscall;
1da177e4 983
94b43c3d
YL
984static void __init register_page_bootmem_info(void)
985{
986#ifdef CONFIG_NUMA
987 int i;
988
989 for_each_online_node(i)
990 register_page_bootmem_info_node(NODE_DATA(i));
991#endif
992}
993
1da177e4
LT
994void __init mem_init(void)
995{
0dc243ae 996 pci_iommu_alloc();
1da177e4 997
48ddb154 998 /* clear_bss() already clear the empty_zero_page */
1da177e4 999
94b43c3d 1000 register_page_bootmem_info();
bced0e32
JL
1001
1002 /* this will put all memory onto the freelists */
0c988534 1003 free_all_bootmem();
1da177e4
LT
1004 after_bootmem = 1;
1005
1da177e4 1006 /* Register memory areas for /proc/kcore */
f40c3300
AL
1007 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR,
1008 PAGE_SIZE, KCORE_OTHER);
1da177e4 1009
46a84132 1010 mem_init_print_info(NULL);
1da177e4
LT
1011}
1012
edeed305
AV
1013const int rodata_test_data = 0xC3;
1014EXPORT_SYMBOL_GPL(rodata_test_data);
67df197b 1015
502f6604 1016int kernel_set_to_readonly;
16239630
SR
1017
1018void set_kernel_text_rw(void)
1019{
b9af7c0d 1020 unsigned long start = PFN_ALIGN(_text);
e7d23dde 1021 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
1022
1023 if (!kernel_set_to_readonly)
1024 return;
1025
1026 pr_debug("Set kernel text: %lx - %lx for read write\n",
1027 start, end);
1028
e7d23dde
SS
1029 /*
1030 * Make the kernel identity mapping for text RW. Kernel text
1031 * mapping will always be RO. Refer to the comment in
1032 * static_protections() in pageattr.c
1033 */
16239630
SR
1034 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
1035}
1036
1037void set_kernel_text_ro(void)
1038{
b9af7c0d 1039 unsigned long start = PFN_ALIGN(_text);
e7d23dde 1040 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
1041
1042 if (!kernel_set_to_readonly)
1043 return;
1044
1045 pr_debug("Set kernel text: %lx - %lx for read only\n",
1046 start, end);
1047
e7d23dde
SS
1048 /*
1049 * Set the kernel identity mapping for text RO.
1050 */
16239630
SR
1051 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1052}
1053
67df197b
AV
1054void mark_rodata_ro(void)
1055{
74e08179 1056 unsigned long start = PFN_ALIGN(_text);
fc8d7826 1057 unsigned long rodata_start = PFN_ALIGN(__start_rodata);
74e08179 1058 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
fc8d7826
AD
1059 unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
1060 unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
45e2a9d4 1061 unsigned long all_end;
8f0f996e 1062
6fb14755 1063 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
e3ebadd9 1064 (end - start) >> 10);
984bb80d
AV
1065 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
1066
16239630
SR
1067 kernel_set_to_readonly = 1;
1068
984bb80d 1069 /*
72212675
YL
1070 * The rodata/data/bss/brk section (but not the kernel text!)
1071 * should also be not-executable.
45e2a9d4
KC
1072 *
1073 * We align all_end to PMD_SIZE because the existing mapping
1074 * is a full PMD. If we would align _brk_end to PAGE_SIZE we
1075 * split the PMD and the reminder between _brk_end and the end
1076 * of the PMD will remain mapped executable.
1077 *
1078 * Any PMD which was setup after the one which covers _brk_end
1079 * has been zapped already via cleanup_highmem().
984bb80d 1080 */
45e2a9d4 1081 all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
ab76f7b4 1082 set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
67df197b 1083
1a487252
AV
1084 rodata_test();
1085
0c42f392 1086#ifdef CONFIG_CPA_DEBUG
10f22dde 1087 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
6d238cc4 1088 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
0c42f392 1089
10f22dde 1090 printk(KERN_INFO "Testing CPA: again\n");
6d238cc4 1091 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
0c42f392 1092#endif
74e08179 1093
c88442ec 1094 free_init_pages("unused kernel",
fc8d7826
AD
1095 (unsigned long) __va(__pa_symbol(text_end)),
1096 (unsigned long) __va(__pa_symbol(rodata_start)));
c88442ec 1097 free_init_pages("unused kernel",
fc8d7826
AD
1098 (unsigned long) __va(__pa_symbol(rodata_end)),
1099 (unsigned long) __va(__pa_symbol(_sdata)));
e1a58320
SS
1100
1101 debug_checkwx();
67df197b 1102}
4e4eee0e 1103
14a62c34
TG
1104int kern_addr_valid(unsigned long addr)
1105{
1da177e4 1106 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
14a62c34
TG
1107 pgd_t *pgd;
1108 pud_t *pud;
1109 pmd_t *pmd;
1110 pte_t *pte;
1da177e4
LT
1111
1112 if (above != 0 && above != -1UL)
14a62c34
TG
1113 return 0;
1114
1da177e4
LT
1115 pgd = pgd_offset_k(addr);
1116 if (pgd_none(*pgd))
1117 return 0;
1118
1119 pud = pud_offset(pgd, addr);
1120 if (pud_none(*pud))
14a62c34 1121 return 0;
1da177e4 1122
0ee364eb
MG
1123 if (pud_large(*pud))
1124 return pfn_valid(pud_pfn(*pud));
1125
1da177e4
LT
1126 pmd = pmd_offset(pud, addr);
1127 if (pmd_none(*pmd))
1128 return 0;
14a62c34 1129
1da177e4
LT
1130 if (pmd_large(*pmd))
1131 return pfn_valid(pmd_pfn(*pmd));
1132
1133 pte = pte_offset_kernel(pmd, addr);
1134 if (pte_none(*pte))
1135 return 0;
14a62c34 1136
1da177e4
LT
1137 return pfn_valid(pte_pfn(*pte));
1138}
1139
982792c7 1140static unsigned long probe_memory_block_size(void)
1dc41aa6 1141{
43c75f93 1142 unsigned long bz = MIN_MEMORY_BLOCK_SIZE;
982792c7 1143
43c75f93
SJ
1144 /* if system is UV or has 64GB of RAM or more, use large blocks */
1145 if (is_uv_system() || ((max_pfn << PAGE_SHIFT) >= (64UL << 30)))
1146 bz = 2UL << 30; /* 2GB */
982792c7 1147
43c75f93 1148 pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
982792c7
YL
1149
1150 return bz;
1151}
1152
1153static unsigned long memory_block_size_probed;
1154unsigned long memory_block_size_bytes(void)
1155{
1156 if (!memory_block_size_probed)
1157 memory_block_size_probed = probe_memory_block_size();
1158
1159 return memory_block_size_probed;
1160}
1161
0889eba5
CL
1162#ifdef CONFIG_SPARSEMEM_VMEMMAP
1163/*
1164 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
1165 */
c2b91e2e
YL
1166static long __meminitdata addr_start, addr_end;
1167static void __meminitdata *p_start, *p_end;
1168static int __meminitdata node_start;
1169
e8216da5 1170static int __meminit vmemmap_populate_hugepages(unsigned long start,
4b94ffdc 1171 unsigned long end, int node, struct vmem_altmap *altmap)
0889eba5 1172{
0aad818b 1173 unsigned long addr;
0889eba5
CL
1174 unsigned long next;
1175 pgd_t *pgd;
1176 pud_t *pud;
1177 pmd_t *pmd;
1178
0aad818b 1179 for (addr = start; addr < end; addr = next) {
e8216da5 1180 next = pmd_addr_end(addr, end);
0889eba5
CL
1181
1182 pgd = vmemmap_pgd_populate(addr, node);
1183 if (!pgd)
1184 return -ENOMEM;
14a62c34 1185
0889eba5
CL
1186 pud = vmemmap_pud_populate(pgd, addr, node);
1187 if (!pud)
1188 return -ENOMEM;
1189
e8216da5
JW
1190 pmd = pmd_offset(pud, addr);
1191 if (pmd_none(*pmd)) {
e8216da5 1192 void *p;
14a62c34 1193
4b94ffdc 1194 p = __vmemmap_alloc_block_buf(PMD_SIZE, node, altmap);
8e2cdbcb
JW
1195 if (p) {
1196 pte_t entry;
1197
1198 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
1199 PAGE_KERNEL_LARGE);
1200 set_pmd(pmd, __pmd(pte_val(entry)));
1201
1202 /* check to see if we have contiguous blocks */
1203 if (p_end != p || node_start != node) {
1204 if (p_start)
c9cdaeb2 1205 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
8e2cdbcb
JW
1206 addr_start, addr_end-1, p_start, p_end-1, node_start);
1207 addr_start = addr;
1208 node_start = node;
1209 p_start = p;
1210 }
7c934d39 1211
8e2cdbcb
JW
1212 addr_end = addr + PMD_SIZE;
1213 p_end = p + PMD_SIZE;
1214 continue;
4b94ffdc
DW
1215 } else if (altmap)
1216 return -ENOMEM; /* no fallback */
8e2cdbcb 1217 } else if (pmd_large(*pmd)) {
e8216da5 1218 vmemmap_verify((pte_t *)pmd, node, addr, next);
8e2cdbcb
JW
1219 continue;
1220 }
1221 pr_warn_once("vmemmap: falling back to regular page backing\n");
1222 if (vmemmap_populate_basepages(addr, next, node))
1223 return -ENOMEM;
0889eba5 1224 }
0889eba5
CL
1225 return 0;
1226}
c2b91e2e 1227
e8216da5
JW
1228int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
1229{
4b94ffdc 1230 struct vmem_altmap *altmap = to_vmem_altmap(start);
e8216da5
JW
1231 int err;
1232
16bf9226 1233 if (boot_cpu_has(X86_FEATURE_PSE))
4b94ffdc
DW
1234 err = vmemmap_populate_hugepages(start, end, node, altmap);
1235 else if (altmap) {
1236 pr_err_once("%s: no cpu support for altmap allocations\n",
1237 __func__);
1238 err = -ENOMEM;
1239 } else
e8216da5
JW
1240 err = vmemmap_populate_basepages(start, end, node);
1241 if (!err)
9661d5bc 1242 sync_global_pgds(start, end - 1, 0);
e8216da5
JW
1243 return err;
1244}
1245
46723bfa
YI
1246#if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
1247void register_page_bootmem_memmap(unsigned long section_nr,
1248 struct page *start_page, unsigned long size)
1249{
1250 unsigned long addr = (unsigned long)start_page;
1251 unsigned long end = (unsigned long)(start_page + size);
1252 unsigned long next;
1253 pgd_t *pgd;
1254 pud_t *pud;
1255 pmd_t *pmd;
1256 unsigned int nr_pages;
1257 struct page *page;
1258
1259 for (; addr < end; addr = next) {
1260 pte_t *pte = NULL;
1261
1262 pgd = pgd_offset_k(addr);
1263 if (pgd_none(*pgd)) {
1264 next = (addr + PAGE_SIZE) & PAGE_MASK;
1265 continue;
1266 }
1267 get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
1268
1269 pud = pud_offset(pgd, addr);
1270 if (pud_none(*pud)) {
1271 next = (addr + PAGE_SIZE) & PAGE_MASK;
1272 continue;
1273 }
1274 get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
1275
16bf9226 1276 if (!boot_cpu_has(X86_FEATURE_PSE)) {
46723bfa
YI
1277 next = (addr + PAGE_SIZE) & PAGE_MASK;
1278 pmd = pmd_offset(pud, addr);
1279 if (pmd_none(*pmd))
1280 continue;
1281 get_page_bootmem(section_nr, pmd_page(*pmd),
1282 MIX_SECTION_INFO);
1283
1284 pte = pte_offset_kernel(pmd, addr);
1285 if (pte_none(*pte))
1286 continue;
1287 get_page_bootmem(section_nr, pte_page(*pte),
1288 SECTION_INFO);
1289 } else {
1290 next = pmd_addr_end(addr, end);
1291
1292 pmd = pmd_offset(pud, addr);
1293 if (pmd_none(*pmd))
1294 continue;
1295
1296 nr_pages = 1 << (get_order(PMD_SIZE));
1297 page = pmd_page(*pmd);
1298 while (nr_pages--)
1299 get_page_bootmem(section_nr, page++,
1300 SECTION_INFO);
1301 }
1302 }
1303}
1304#endif
1305
c2b91e2e
YL
1306void __meminit vmemmap_populate_print_last(void)
1307{
1308 if (p_start) {
c9cdaeb2 1309 pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
c2b91e2e
YL
1310 addr_start, addr_end-1, p_start, p_end-1, node_start);
1311 p_start = NULL;
1312 p_end = NULL;
1313 node_start = 0;
1314 }
1315}
0889eba5 1316#endif
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