x86, mm: Use MAX_DMA_PFN for ZONE_DMA on 32-bit
[deliverable/linux.git] / arch / x86 / mm / init_64.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/mm/init.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
a2531293 5 * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
1da177e4
LT
6 * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
7 */
8
1da177e4
LT
9#include <linux/signal.h>
10#include <linux/sched.h>
11#include <linux/kernel.h>
12#include <linux/errno.h>
13#include <linux/string.h>
14#include <linux/types.h>
15#include <linux/ptrace.h>
16#include <linux/mman.h>
17#include <linux/mm.h>
18#include <linux/swap.h>
19#include <linux/smp.h>
20#include <linux/init.h>
11034d55 21#include <linux/initrd.h>
1da177e4
LT
22#include <linux/pagemap.h>
23#include <linux/bootmem.h>
a9ce6bc1 24#include <linux/memblock.h>
1da177e4 25#include <linux/proc_fs.h>
59170891 26#include <linux/pci.h>
6fb14755 27#include <linux/pfn.h>
c9cf5528 28#include <linux/poison.h>
17a941d8 29#include <linux/dma-mapping.h>
44df75e6 30#include <linux/module.h>
a63fdc51 31#include <linux/memory.h>
44df75e6 32#include <linux/memory_hotplug.h>
ae32b129 33#include <linux/nmi.h>
5a0e3ad6 34#include <linux/gfp.h>
1da177e4
LT
35
36#include <asm/processor.h>
46eaa670 37#include <asm/bios_ebda.h>
1da177e4
LT
38#include <asm/system.h>
39#include <asm/uaccess.h>
40#include <asm/pgtable.h>
41#include <asm/pgalloc.h>
42#include <asm/dma.h>
43#include <asm/fixmap.h>
44#include <asm/e820.h>
45#include <asm/apic.h>
46#include <asm/tlb.h>
47#include <asm/mmu_context.h>
48#include <asm/proto.h>
49#include <asm/smp.h>
2bc0414e 50#include <asm/sections.h>
718fc13b 51#include <asm/kdebug.h>
aaa64e04 52#include <asm/numa.h>
7bfeab9a 53#include <asm/cacheflush.h>
4fcb2083 54#include <asm/init.h>
1dc41aa6 55#include <asm/uv/uv.h>
e5f15b45 56#include <asm/setup.h>
1da177e4 57
00d1c5e0
IM
58static int __init parse_direct_gbpages_off(char *arg)
59{
60 direct_gbpages = 0;
61 return 0;
62}
63early_param("nogbpages", parse_direct_gbpages_off);
64
65static int __init parse_direct_gbpages_on(char *arg)
66{
67 direct_gbpages = 1;
68 return 0;
69}
70early_param("gbpages", parse_direct_gbpages_on);
71
1da177e4
LT
72/*
73 * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
74 * physical space so we can cache the place of the first one and move
75 * around without checking the pgd every time.
76 */
77
be43d728 78pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
bd220a24
YL
79EXPORT_SYMBOL_GPL(__supported_pte_mask);
80
bd220a24
YL
81int force_personality32;
82
deed05b7
IM
83/*
84 * noexec32=on|off
85 * Control non executable heap for 32bit processes.
86 * To control the stack too use noexec=off
87 *
88 * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
89 * off PROT_READ implies PROT_EXEC
90 */
bd220a24
YL
91static int __init nonx32_setup(char *str)
92{
93 if (!strcmp(str, "on"))
94 force_personality32 &= ~READ_IMPLIES_EXEC;
95 else if (!strcmp(str, "off"))
96 force_personality32 |= READ_IMPLIES_EXEC;
97 return 1;
98}
99__setup("noexec32=", nonx32_setup);
100
6afb5157
HL
101/*
102 * When memory was added/removed make sure all the processes MM have
103 * suitable PGD entries in the local PGD level page.
104 */
105void sync_global_pgds(unsigned long start, unsigned long end)
106{
44235dcd
JF
107 unsigned long address;
108
109 for (address = start; address <= end; address += PGDIR_SIZE) {
110 const pgd_t *pgd_ref = pgd_offset_k(address);
44235dcd
JF
111 struct page *page;
112
113 if (pgd_none(*pgd_ref))
114 continue;
115
a79e53d8 116 spin_lock(&pgd_lock);
44235dcd
JF
117 list_for_each_entry(page, &pgd_list, lru) {
118 pgd_t *pgd;
617d34d9
JF
119 spinlock_t *pgt_lock;
120
44235dcd 121 pgd = (pgd_t *)page_address(page) + pgd_index(address);
a79e53d8 122 /* the pgt_lock only for Xen */
617d34d9
JF
123 pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
124 spin_lock(pgt_lock);
125
44235dcd
JF
126 if (pgd_none(*pgd))
127 set_pgd(pgd, *pgd_ref);
128 else
129 BUG_ON(pgd_page_vaddr(*pgd)
130 != pgd_page_vaddr(*pgd_ref));
617d34d9
JF
131
132 spin_unlock(pgt_lock);
44235dcd 133 }
a79e53d8 134 spin_unlock(&pgd_lock);
44235dcd 135 }
6afb5157
HL
136}
137
8d6ea967
MS
138/*
139 * NOTE: This function is marked __ref because it calls __init function
140 * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
141 */
142static __ref void *spp_getpage(void)
14a62c34 143{
1da177e4 144 void *ptr;
14a62c34 145
1da177e4 146 if (after_bootmem)
9e730237 147 ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
1da177e4
LT
148 else
149 ptr = alloc_bootmem_pages(PAGE_SIZE);
14a62c34
TG
150
151 if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
152 panic("set_pte_phys: cannot allocate page data %s\n",
153 after_bootmem ? "after bootmem" : "");
154 }
1da177e4 155
10f22dde 156 pr_debug("spp_getpage %p\n", ptr);
14a62c34 157
1da177e4 158 return ptr;
14a62c34 159}
1da177e4 160
f254f390 161static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
1da177e4 162{
458a3e64
TH
163 if (pgd_none(*pgd)) {
164 pud_t *pud = (pud_t *)spp_getpage();
165 pgd_populate(&init_mm, pgd, pud);
166 if (pud != pud_offset(pgd, 0))
167 printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
168 pud, pud_offset(pgd, 0));
169 }
170 return pud_offset(pgd, vaddr);
171}
1da177e4 172
f254f390 173static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
458a3e64 174{
1da177e4 175 if (pud_none(*pud)) {
458a3e64 176 pmd_t *pmd = (pmd_t *) spp_getpage();
bb23e403 177 pud_populate(&init_mm, pud, pmd);
458a3e64 178 if (pmd != pmd_offset(pud, 0))
10f22dde 179 printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
458a3e64 180 pmd, pmd_offset(pud, 0));
1da177e4 181 }
458a3e64
TH
182 return pmd_offset(pud, vaddr);
183}
184
f254f390 185static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
458a3e64 186{
1da177e4 187 if (pmd_none(*pmd)) {
458a3e64 188 pte_t *pte = (pte_t *) spp_getpage();
bb23e403 189 pmd_populate_kernel(&init_mm, pmd, pte);
458a3e64 190 if (pte != pte_offset_kernel(pmd, 0))
10f22dde 191 printk(KERN_ERR "PAGETABLE BUG #02!\n");
1da177e4 192 }
458a3e64
TH
193 return pte_offset_kernel(pmd, vaddr);
194}
195
196void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
197{
198 pud_t *pud;
199 pmd_t *pmd;
200 pte_t *pte;
201
202 pud = pud_page + pud_index(vaddr);
203 pmd = fill_pmd(pud, vaddr);
204 pte = fill_pte(pmd, vaddr);
1da177e4 205
1da177e4
LT
206 set_pte(pte, new_pte);
207
208 /*
209 * It's enough to flush this one mapping.
210 * (PGE mappings get flushed as well)
211 */
212 __flush_tlb_one(vaddr);
213}
214
458a3e64 215void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
0814e0ba
EH
216{
217 pgd_t *pgd;
218 pud_t *pud_page;
219
220 pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
221
222 pgd = pgd_offset_k(vaddr);
223 if (pgd_none(*pgd)) {
224 printk(KERN_ERR
225 "PGD FIXMAP MISSING, it should be setup in head.S!\n");
226 return;
227 }
228 pud_page = (pud_t*)pgd_page_vaddr(*pgd);
229 set_pte_vaddr_pud(pud_page, vaddr, pteval);
230}
231
458a3e64 232pmd_t * __init populate_extra_pmd(unsigned long vaddr)
11124411
TH
233{
234 pgd_t *pgd;
235 pud_t *pud;
236
237 pgd = pgd_offset_k(vaddr);
458a3e64
TH
238 pud = fill_pud(pgd, vaddr);
239 return fill_pmd(pud, vaddr);
240}
241
242pte_t * __init populate_extra_pte(unsigned long vaddr)
243{
244 pmd_t *pmd;
11124411 245
458a3e64
TH
246 pmd = populate_extra_pmd(vaddr);
247 return fill_pte(pmd, vaddr);
11124411
TH
248}
249
3a9e189d
JS
250/*
251 * Create large page table mappings for a range of physical addresses.
252 */
253static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
254 pgprot_t prot)
255{
256 pgd_t *pgd;
257 pud_t *pud;
258 pmd_t *pmd;
259
260 BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
261 for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
262 pgd = pgd_offset_k((unsigned long)__va(phys));
263 if (pgd_none(*pgd)) {
264 pud = (pud_t *) spp_getpage();
265 set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
266 _PAGE_USER));
267 }
268 pud = pud_offset(pgd, (unsigned long)__va(phys));
269 if (pud_none(*pud)) {
270 pmd = (pmd_t *) spp_getpage();
271 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
272 _PAGE_USER));
273 }
274 pmd = pmd_offset(pud, phys);
275 BUG_ON(!pmd_none(*pmd));
276 set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
277 }
278}
279
280void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
281{
282 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE);
283}
284
285void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
286{
287 __init_extra_mapping(phys, size, PAGE_KERNEL_LARGE_NOCACHE);
288}
289
31eedd82 290/*
88f3aec7
IM
291 * The head.S code sets up the kernel high mapping:
292 *
293 * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
31eedd82
TG
294 *
295 * phys_addr holds the negative offset to the kernel, which is added
296 * to the compile time generated pmds. This results in invalid pmds up
297 * to the point where we hit the physaddr 0 mapping.
298 *
e5f15b45
YL
299 * We limit the mappings to the region from _text to _brk_end. _brk_end
300 * is rounded up to the 2MB boundary. This catches the invalid pmds as
31eedd82
TG
301 * well, as they are located before _text:
302 */
303void __init cleanup_highmap(void)
304{
305 unsigned long vaddr = __START_KERNEL_map;
e5f15b45
YL
306 unsigned long vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
307 unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
31eedd82 308 pmd_t *pmd = level2_kernel_pgt;
31eedd82 309
e5f15b45 310 for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
2884f110 311 if (pmd_none(*pmd))
31eedd82
TG
312 continue;
313 if (vaddr < (unsigned long) _text || vaddr > end)
314 set_pmd(pmd, __pmd(0));
315 }
316}
317
9482ac6e 318static __ref void *alloc_low_page(unsigned long *phys)
14a62c34 319{
d1b19426 320 unsigned long pfn = pgt_buf_end++;
1da177e4
LT
321 void *adr;
322
44df75e6 323 if (after_bootmem) {
9e730237 324 adr = (void *)get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
44df75e6 325 *phys = __pa(adr);
14a62c34 326
44df75e6
MT
327 return adr;
328 }
329
d1b19426 330 if (pfn >= pgt_buf_top)
14a62c34 331 panic("alloc_low_page: ran out of memory");
dafe41ee 332
14941779 333 adr = early_memremap(pfn * PAGE_SIZE, PAGE_SIZE);
234bb549 334 clear_page(adr);
dafe41ee
VG
335 *phys = pfn * PAGE_SIZE;
336 return adr;
337}
1da177e4 338
4b239f45
YL
339static __ref void *map_low_page(void *virt)
340{
341 void *adr;
342 unsigned long phys, left;
343
344 if (after_bootmem)
345 return virt;
346
347 phys = __pa(virt);
348 left = phys & (PAGE_SIZE - 1);
349 adr = early_memremap(phys & PAGE_MASK, PAGE_SIZE);
350 adr = (void *)(((unsigned long)adr) | left);
351
352 return adr;
353}
354
9482ac6e 355static __ref void unmap_low_page(void *adr)
14a62c34 356{
44df75e6
MT
357 if (after_bootmem)
358 return;
359
4b239f45 360 early_iounmap((void *)((unsigned long)adr & PAGE_MASK), PAGE_SIZE);
14a62c34 361}
1da177e4 362
7b16eb89 363static unsigned long __meminit
b27a43c1
SS
364phys_pte_init(pte_t *pte_page, unsigned long addr, unsigned long end,
365 pgprot_t prot)
4f9c11dd
JF
366{
367 unsigned pages = 0;
7b16eb89 368 unsigned long last_map_addr = end;
4f9c11dd 369 int i;
7b16eb89 370
4f9c11dd
JF
371 pte_t *pte = pte_page + pte_index(addr);
372
373 for(i = pte_index(addr); i < PTRS_PER_PTE; i++, addr += PAGE_SIZE, pte++) {
374
375 if (addr >= end) {
376 if (!after_bootmem) {
377 for(; i < PTRS_PER_PTE; i++, pte++)
378 set_pte(pte, __pte(0));
379 }
380 break;
381 }
382
b27a43c1
SS
383 /*
384 * We will re-use the existing mapping.
385 * Xen for example has some special requirements, like mapping
386 * pagetable pages as RO. So assume someone who pre-setup
387 * these mappings are more intelligent.
388 */
3afa3949
YL
389 if (pte_val(*pte)) {
390 pages++;
4f9c11dd 391 continue;
3afa3949 392 }
4f9c11dd
JF
393
394 if (0)
395 printk(" pte=%p addr=%lx pte=%016lx\n",
396 pte, addr, pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL).pte);
4f9c11dd 397 pages++;
b27a43c1 398 set_pte(pte, pfn_pte(addr >> PAGE_SHIFT, prot));
7b16eb89 399 last_map_addr = (addr & PAGE_MASK) + PAGE_SIZE;
4f9c11dd 400 }
a2699e47 401
4f9c11dd 402 update_page_count(PG_LEVEL_4K, pages);
7b16eb89
YL
403
404 return last_map_addr;
4f9c11dd
JF
405}
406
cc615032 407static unsigned long __meminit
b50efd2a 408phys_pmd_init(pmd_t *pmd_page, unsigned long address, unsigned long end,
b27a43c1 409 unsigned long page_size_mask, pgprot_t prot)
44df75e6 410{
ce0c0e50 411 unsigned long pages = 0;
7b16eb89 412 unsigned long last_map_addr = end;
ce0c0e50 413
6ad91658 414 int i = pmd_index(address);
44df75e6 415
6ad91658 416 for (; i < PTRS_PER_PMD; i++, address += PMD_SIZE) {
4f9c11dd 417 unsigned long pte_phys;
6ad91658 418 pmd_t *pmd = pmd_page + pmd_index(address);
4f9c11dd 419 pte_t *pte;
b27a43c1 420 pgprot_t new_prot = prot;
44df75e6 421
5f51e139 422 if (address >= end) {
14a62c34 423 if (!after_bootmem) {
5f51e139
JB
424 for (; i < PTRS_PER_PMD; i++, pmd++)
425 set_pmd(pmd, __pmd(0));
14a62c34 426 }
44df75e6
MT
427 break;
428 }
6ad91658 429
4f9c11dd 430 if (pmd_val(*pmd)) {
8ae3a5a8
JB
431 if (!pmd_large(*pmd)) {
432 spin_lock(&init_mm.page_table_lock);
4b239f45
YL
433 pte = map_low_page((pte_t *)pmd_page_vaddr(*pmd));
434 last_map_addr = phys_pte_init(pte, address,
b27a43c1 435 end, prot);
4b239f45 436 unmap_low_page(pte);
8ae3a5a8 437 spin_unlock(&init_mm.page_table_lock);
a2699e47 438 continue;
8ae3a5a8 439 }
b27a43c1
SS
440 /*
441 * If we are ok with PG_LEVEL_2M mapping, then we will
442 * use the existing mapping,
443 *
444 * Otherwise, we will split the large page mapping but
445 * use the same existing protection bits except for
446 * large page, so that we don't violate Intel's TLB
447 * Application note (317080) which says, while changing
448 * the page sizes, new and old translations should
449 * not differ with respect to page frame and
450 * attributes.
451 */
3afa3949
YL
452 if (page_size_mask & (1 << PG_LEVEL_2M)) {
453 pages++;
b27a43c1 454 continue;
3afa3949 455 }
b27a43c1 456 new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
4f9c11dd
JF
457 }
458
b50efd2a 459 if (page_size_mask & (1<<PG_LEVEL_2M)) {
4f9c11dd 460 pages++;
8ae3a5a8 461 spin_lock(&init_mm.page_table_lock);
4f9c11dd 462 set_pte((pte_t *)pmd,
b27a43c1
SS
463 pfn_pte(address >> PAGE_SHIFT,
464 __pgprot(pgprot_val(prot) | _PAGE_PSE)));
8ae3a5a8 465 spin_unlock(&init_mm.page_table_lock);
7b16eb89 466 last_map_addr = (address & PMD_MASK) + PMD_SIZE;
6ad91658 467 continue;
4f9c11dd 468 }
6ad91658 469
4f9c11dd 470 pte = alloc_low_page(&pte_phys);
b27a43c1 471 last_map_addr = phys_pte_init(pte, address, end, new_prot);
4f9c11dd
JF
472 unmap_low_page(pte);
473
8ae3a5a8 474 spin_lock(&init_mm.page_table_lock);
4f9c11dd 475 pmd_populate_kernel(&init_mm, pmd, __va(pte_phys));
8ae3a5a8 476 spin_unlock(&init_mm.page_table_lock);
44df75e6 477 }
ce0c0e50 478 update_page_count(PG_LEVEL_2M, pages);
7b16eb89 479 return last_map_addr;
44df75e6
MT
480}
481
cc615032 482static unsigned long __meminit
b50efd2a
YL
483phys_pud_init(pud_t *pud_page, unsigned long addr, unsigned long end,
484 unsigned long page_size_mask)
14a62c34 485{
ce0c0e50 486 unsigned long pages = 0;
cc615032 487 unsigned long last_map_addr = end;
6ad91658 488 int i = pud_index(addr);
44df75e6 489
14a62c34 490 for (; i < PTRS_PER_PUD; i++, addr = (addr & PUD_MASK) + PUD_SIZE) {
6ad91658
KM
491 unsigned long pmd_phys;
492 pud_t *pud = pud_page + pud_index(addr);
1da177e4 493 pmd_t *pmd;
b27a43c1 494 pgprot_t prot = PAGE_KERNEL;
1da177e4 495
6ad91658 496 if (addr >= end)
1da177e4 497 break;
1da177e4 498
14a62c34
TG
499 if (!after_bootmem &&
500 !e820_any_mapped(addr, addr+PUD_SIZE, 0)) {
501 set_pud(pud, __pud(0));
1da177e4 502 continue;
14a62c34 503 }
1da177e4 504
6ad91658 505 if (pud_val(*pud)) {
a2699e47 506 if (!pud_large(*pud)) {
4b239f45
YL
507 pmd = map_low_page(pmd_offset(pud, 0));
508 last_map_addr = phys_pmd_init(pmd, addr, end,
b27a43c1 509 page_size_mask, prot);
4b239f45
YL
510 unmap_low_page(pmd);
511 __flush_tlb_all();
a2699e47
SS
512 continue;
513 }
b27a43c1
SS
514 /*
515 * If we are ok with PG_LEVEL_1G mapping, then we will
516 * use the existing mapping.
517 *
518 * Otherwise, we will split the gbpage mapping but use
519 * the same existing protection bits except for large
520 * page, so that we don't violate Intel's TLB
521 * Application note (317080) which says, while changing
522 * the page sizes, new and old translations should
523 * not differ with respect to page frame and
524 * attributes.
525 */
3afa3949
YL
526 if (page_size_mask & (1 << PG_LEVEL_1G)) {
527 pages++;
b27a43c1 528 continue;
3afa3949 529 }
b27a43c1 530 prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
ef925766
AK
531 }
532
b50efd2a 533 if (page_size_mask & (1<<PG_LEVEL_1G)) {
ce0c0e50 534 pages++;
8ae3a5a8 535 spin_lock(&init_mm.page_table_lock);
ef925766
AK
536 set_pte((pte_t *)pud,
537 pfn_pte(addr >> PAGE_SHIFT, PAGE_KERNEL_LARGE));
8ae3a5a8 538 spin_unlock(&init_mm.page_table_lock);
cc615032 539 last_map_addr = (addr & PUD_MASK) + PUD_SIZE;
6ad91658
KM
540 continue;
541 }
542
dafe41ee 543 pmd = alloc_low_page(&pmd_phys);
b27a43c1
SS
544 last_map_addr = phys_pmd_init(pmd, addr, end, page_size_mask,
545 prot);
4f9c11dd 546 unmap_low_page(pmd);
8ae3a5a8
JB
547
548 spin_lock(&init_mm.page_table_lock);
4f9c11dd 549 pud_populate(&init_mm, pud, __va(pmd_phys));
44df75e6 550 spin_unlock(&init_mm.page_table_lock);
1da177e4 551 }
1a2b4412 552 __flush_tlb_all();
a2699e47 553
ce0c0e50 554 update_page_count(PG_LEVEL_1G, pages);
cc615032 555
1a0db38e 556 return last_map_addr;
14a62c34 557}
1da177e4 558
41d840e2 559unsigned long __meminit
f765090a
PE
560kernel_physical_mapping_init(unsigned long start,
561 unsigned long end,
562 unsigned long page_size_mask)
14a62c34 563{
9b861528 564 bool pgd_changed = false;
b50efd2a 565 unsigned long next, last_map_addr = end;
9b861528 566 unsigned long addr;
1da177e4
LT
567
568 start = (unsigned long)__va(start);
569 end = (unsigned long)__va(end);
1c5f50ee 570 addr = start;
1da177e4
LT
571
572 for (; start < end; start = next) {
44df75e6 573 pgd_t *pgd = pgd_offset_k(start);
14a62c34 574 unsigned long pud_phys;
44df75e6
MT
575 pud_t *pud;
576
e22146e6 577 next = (start + PGDIR_SIZE) & PGDIR_MASK;
4f9c11dd
JF
578 if (next > end)
579 next = end;
580
581 if (pgd_val(*pgd)) {
4b239f45
YL
582 pud = map_low_page((pud_t *)pgd_page_vaddr(*pgd));
583 last_map_addr = phys_pud_init(pud, __pa(start),
b50efd2a 584 __pa(end), page_size_mask);
4b239f45 585 unmap_low_page(pud);
4f9c11dd
JF
586 continue;
587 }
588
8ae3a5a8 589 pud = alloc_low_page(&pud_phys);
b50efd2a
YL
590 last_map_addr = phys_pud_init(pud, __pa(start), __pa(next),
591 page_size_mask);
4f9c11dd 592 unmap_low_page(pud);
8ae3a5a8
JB
593
594 spin_lock(&init_mm.page_table_lock);
595 pgd_populate(&init_mm, pgd, __va(pud_phys));
596 spin_unlock(&init_mm.page_table_lock);
9b861528 597 pgd_changed = true;
14a62c34 598 }
9b861528
HL
599
600 if (pgd_changed)
601 sync_global_pgds(addr, end);
602
a2699e47 603 __flush_tlb_all();
1da177e4 604
b50efd2a
YL
605 return last_map_addr;
606}
7b16eb89 607
2b97690f 608#ifndef CONFIG_NUMA
d8fc3afc 609void __init initmem_init(void)
1f75d7e3 610{
86ef4dbf 611 memblock_x86_register_active_regions(0, 0, max_pfn);
1f75d7e3 612}
3551f88f 613#endif
1f75d7e3 614
1da177e4
LT
615void __init paging_init(void)
616{
6391af17 617 unsigned long max_zone_pfns[MAX_NR_ZONES];
14a62c34 618
6391af17 619 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
dc382fd5 620#ifdef CONFIG_ZONE_DMA
6391af17 621 max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
dc382fd5 622#endif
6391af17 623 max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
c987d12f 624 max_zone_pfns[ZONE_NORMAL] = max_pfn;
6391af17 625
3551f88f 626 sparse_memory_present_with_active_regions(MAX_NUMNODES);
44df75e6 627 sparse_init();
44b57280
YL
628
629 /*
630 * clear the default setting with node 0
631 * note: don't use nodes_clear here, that is really clearing when
632 * numa support is not compiled in, and later node_set_state
633 * will not set it back.
634 */
635 node_clear_state(0, N_NORMAL_MEMORY);
636
5cb248ab 637 free_area_init_nodes(max_zone_pfns);
1da177e4 638}
1da177e4 639
44df75e6
MT
640/*
641 * Memory hotplug specific functions
44df75e6 642 */
bc02af93 643#ifdef CONFIG_MEMORY_HOTPLUG
ea085417
SZ
644/*
645 * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
646 * updating.
647 */
648static void update_end_of_memory_vars(u64 start, u64 size)
649{
650 unsigned long end_pfn = PFN_UP(start + size);
651
652 if (end_pfn > max_pfn) {
653 max_pfn = end_pfn;
654 max_low_pfn = end_pfn;
655 high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
656 }
657}
658
9d99aaa3
AK
659/*
660 * Memory is added always to NORMAL zone. This means you will never get
661 * additional DMA/DMA32 memory.
662 */
bc02af93 663int arch_add_memory(int nid, u64 start, u64 size)
44df75e6 664{
bc02af93 665 struct pglist_data *pgdat = NODE_DATA(nid);
776ed98b 666 struct zone *zone = pgdat->node_zones + ZONE_NORMAL;
cc615032 667 unsigned long last_mapped_pfn, start_pfn = start >> PAGE_SHIFT;
44df75e6
MT
668 unsigned long nr_pages = size >> PAGE_SHIFT;
669 int ret;
670
60817c9b 671 last_mapped_pfn = init_memory_mapping(start, start + size);
cc615032
AK
672 if (last_mapped_pfn > max_pfn_mapped)
673 max_pfn_mapped = last_mapped_pfn;
45e0b78b 674
c04fc586 675 ret = __add_pages(nid, zone, start_pfn, nr_pages);
fe8b868e 676 WARN_ON_ONCE(ret);
44df75e6 677
ea085417
SZ
678 /* update max_pfn, max_low_pfn and high_memory */
679 update_end_of_memory_vars(start, size);
680
44df75e6 681 return ret;
44df75e6 682}
bc02af93 683EXPORT_SYMBOL_GPL(arch_add_memory);
44df75e6 684
45e0b78b
KM
685#endif /* CONFIG_MEMORY_HOTPLUG */
686
81ac3ad9 687static struct kcore_list kcore_vsyscall;
1da177e4
LT
688
689void __init mem_init(void)
690{
0a43e4bf 691 long codesize, reservedpages, datasize, initsize;
11a6b0c9 692 unsigned long absent_pages;
1da177e4 693
0dc243ae 694 pci_iommu_alloc();
1da177e4 695
48ddb154 696 /* clear_bss() already clear the empty_zero_page */
1da177e4
LT
697
698 reservedpages = 0;
699
700 /* this will put all low memory onto the freelists */
2b97690f 701#ifdef CONFIG_NUMA
0a43e4bf 702 totalram_pages = numa_free_all_bootmem();
1da177e4 703#else
0a43e4bf 704 totalram_pages = free_all_bootmem();
1da177e4 705#endif
11a6b0c9
YL
706
707 absent_pages = absent_pages_in_range(0, max_pfn);
708 reservedpages = max_pfn - totalram_pages - absent_pages;
1da177e4
LT
709 after_bootmem = 1;
710
711 codesize = (unsigned long) &_etext - (unsigned long) &_text;
712 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
713 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
714
715 /* Register memory areas for /proc/kcore */
14a62c34 716 kclist_add(&kcore_vsyscall, (void *)VSYSCALL_START,
c30bb2a2 717 VSYSCALL_END - VSYSCALL_START, KCORE_OTHER);
1da177e4 718
10f22dde 719 printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, "
11a6b0c9 720 "%ldk absent, %ldk reserved, %ldk data, %ldk init)\n",
cc013a88 721 nr_free_pages() << (PAGE_SHIFT-10),
c987d12f 722 max_pfn << (PAGE_SHIFT-10),
1da177e4 723 codesize >> 10,
11a6b0c9 724 absent_pages << (PAGE_SHIFT-10),
1da177e4
LT
725 reservedpages << (PAGE_SHIFT-10),
726 datasize >> 10,
727 initsize >> 10);
1da177e4
LT
728}
729
67df197b 730#ifdef CONFIG_DEBUG_RODATA
edeed305
AV
731const int rodata_test_data = 0xC3;
732EXPORT_SYMBOL_GPL(rodata_test_data);
67df197b 733
502f6604 734int kernel_set_to_readonly;
16239630
SR
735
736void set_kernel_text_rw(void)
737{
b9af7c0d 738 unsigned long start = PFN_ALIGN(_text);
e7d23dde 739 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
740
741 if (!kernel_set_to_readonly)
742 return;
743
744 pr_debug("Set kernel text: %lx - %lx for read write\n",
745 start, end);
746
e7d23dde
SS
747 /*
748 * Make the kernel identity mapping for text RW. Kernel text
749 * mapping will always be RO. Refer to the comment in
750 * static_protections() in pageattr.c
751 */
16239630
SR
752 set_memory_rw(start, (end - start) >> PAGE_SHIFT);
753}
754
755void set_kernel_text_ro(void)
756{
b9af7c0d 757 unsigned long start = PFN_ALIGN(_text);
e7d23dde 758 unsigned long end = PFN_ALIGN(__stop___ex_table);
16239630
SR
759
760 if (!kernel_set_to_readonly)
761 return;
762
763 pr_debug("Set kernel text: %lx - %lx for read only\n",
764 start, end);
765
e7d23dde
SS
766 /*
767 * Set the kernel identity mapping for text RO.
768 */
16239630
SR
769 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
770}
771
67df197b
AV
772void mark_rodata_ro(void)
773{
74e08179 774 unsigned long start = PFN_ALIGN(_text);
8f0f996e
SR
775 unsigned long rodata_start =
776 ((unsigned long)__start_rodata + PAGE_SIZE - 1) & PAGE_MASK;
74e08179
SS
777 unsigned long end = (unsigned long) &__end_rodata_hpage_align;
778 unsigned long text_end = PAGE_ALIGN((unsigned long) &__stop___ex_table);
779 unsigned long rodata_end = PAGE_ALIGN((unsigned long) &__end_rodata);
780 unsigned long data_start = (unsigned long) &_sdata;
8f0f996e 781
6fb14755 782 printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
e3ebadd9 783 (end - start) >> 10);
984bb80d
AV
784 set_memory_ro(start, (end - start) >> PAGE_SHIFT);
785
16239630
SR
786 kernel_set_to_readonly = 1;
787
984bb80d
AV
788 /*
789 * The rodata section (but not the kernel text!) should also be
790 * not-executable.
791 */
72b59d67 792 set_memory_nx(rodata_start, (end - rodata_start) >> PAGE_SHIFT);
67df197b 793
1a487252
AV
794 rodata_test();
795
0c42f392 796#ifdef CONFIG_CPA_DEBUG
10f22dde 797 printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
6d238cc4 798 set_memory_rw(start, (end-start) >> PAGE_SHIFT);
0c42f392 799
10f22dde 800 printk(KERN_INFO "Testing CPA: again\n");
6d238cc4 801 set_memory_ro(start, (end-start) >> PAGE_SHIFT);
0c42f392 802#endif
74e08179
SS
803
804 free_init_pages("unused kernel memory",
805 (unsigned long) page_address(virt_to_page(text_end)),
806 (unsigned long)
807 page_address(virt_to_page(rodata_start)));
808 free_init_pages("unused kernel memory",
809 (unsigned long) page_address(virt_to_page(rodata_end)),
810 (unsigned long) page_address(virt_to_page(data_start)));
67df197b 811}
4e4eee0e 812
67df197b
AV
813#endif
814
14a62c34
TG
815int kern_addr_valid(unsigned long addr)
816{
1da177e4 817 unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
14a62c34
TG
818 pgd_t *pgd;
819 pud_t *pud;
820 pmd_t *pmd;
821 pte_t *pte;
1da177e4
LT
822
823 if (above != 0 && above != -1UL)
14a62c34
TG
824 return 0;
825
1da177e4
LT
826 pgd = pgd_offset_k(addr);
827 if (pgd_none(*pgd))
828 return 0;
829
830 pud = pud_offset(pgd, addr);
831 if (pud_none(*pud))
14a62c34 832 return 0;
1da177e4
LT
833
834 pmd = pmd_offset(pud, addr);
835 if (pmd_none(*pmd))
836 return 0;
14a62c34 837
1da177e4
LT
838 if (pmd_large(*pmd))
839 return pfn_valid(pmd_pfn(*pmd));
840
841 pte = pte_offset_kernel(pmd, addr);
842 if (pte_none(*pte))
843 return 0;
14a62c34 844
1da177e4
LT
845 return pfn_valid(pte_pfn(*pte));
846}
847
14a62c34
TG
848/*
849 * A pseudo VMA to allow ptrace access for the vsyscall page. This only
850 * covers the 64bit vsyscall page now. 32bit has a real VMA now and does
851 * not need special handling anymore:
852 */
1da177e4 853static struct vm_area_struct gate_vma = {
14a62c34
TG
854 .vm_start = VSYSCALL_START,
855 .vm_end = VSYSCALL_START + (VSYSCALL_MAPPED_PAGES * PAGE_SIZE),
856 .vm_page_prot = PAGE_READONLY_EXEC,
857 .vm_flags = VM_READ | VM_EXEC
1da177e4
LT
858};
859
31db58b3 860struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
1da177e4
LT
861{
862#ifdef CONFIG_IA32_EMULATION
31db58b3 863 if (!mm || mm->context.ia32_compat)
1e014410 864 return NULL;
1da177e4
LT
865#endif
866 return &gate_vma;
867}
868
83b964bb 869int in_gate_area(struct mm_struct *mm, unsigned long addr)
1da177e4 870{
83b964bb 871 struct vm_area_struct *vma = get_gate_vma(mm);
14a62c34 872
1e014410
AK
873 if (!vma)
874 return 0;
14a62c34 875
1da177e4
LT
876 return (addr >= vma->vm_start) && (addr < vma->vm_end);
877}
878
14a62c34 879/*
cae5d390
SW
880 * Use this when you have no reliable mm, typically from interrupt
881 * context. It is less reliable than using a task's mm and may give
882 * false positives.
1da177e4 883 */
cae5d390 884int in_gate_area_no_mm(unsigned long addr)
1da177e4 885{
1e014410 886 return (addr >= VSYSCALL_START) && (addr < VSYSCALL_END);
1da177e4 887}
2e1c49db 888
2aae950b
AK
889const char *arch_vma_name(struct vm_area_struct *vma)
890{
891 if (vma->vm_mm && vma->vm_start == (long)vma->vm_mm->context.vdso)
892 return "[vdso]";
893 if (vma == &gate_vma)
894 return "[vsyscall]";
895 return NULL;
896}
0889eba5 897
1dc41aa6 898#ifdef CONFIG_X86_UV
1dc41aa6
NF
899unsigned long memory_block_size_bytes(void)
900{
901 if (is_uv_system()) {
902 printk(KERN_INFO "UV: memory block size 2GB\n");
903 return 2UL * 1024 * 1024 * 1024;
904 }
905 return MIN_MEMORY_BLOCK_SIZE;
906}
907#endif
908
0889eba5
CL
909#ifdef CONFIG_SPARSEMEM_VMEMMAP
910/*
911 * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
912 */
c2b91e2e
YL
913static long __meminitdata addr_start, addr_end;
914static void __meminitdata *p_start, *p_end;
915static int __meminitdata node_start;
916
14a62c34
TG
917int __meminit
918vmemmap_populate(struct page *start_page, unsigned long size, int node)
0889eba5
CL
919{
920 unsigned long addr = (unsigned long)start_page;
921 unsigned long end = (unsigned long)(start_page + size);
922 unsigned long next;
923 pgd_t *pgd;
924 pud_t *pud;
925 pmd_t *pmd;
926
927 for (; addr < end; addr = next) {
7c934d39 928 void *p = NULL;
0889eba5
CL
929
930 pgd = vmemmap_pgd_populate(addr, node);
931 if (!pgd)
932 return -ENOMEM;
14a62c34 933
0889eba5
CL
934 pud = vmemmap_pud_populate(pgd, addr, node);
935 if (!pud)
936 return -ENOMEM;
937
7c934d39
JF
938 if (!cpu_has_pse) {
939 next = (addr + PAGE_SIZE) & PAGE_MASK;
940 pmd = vmemmap_pmd_populate(pud, addr, node);
941
942 if (!pmd)
943 return -ENOMEM;
944
945 p = vmemmap_pte_populate(pmd, addr, node);
14a62c34 946
0889eba5
CL
947 if (!p)
948 return -ENOMEM;
949
7c934d39
JF
950 addr_end = addr + PAGE_SIZE;
951 p_end = p + PAGE_SIZE;
14a62c34 952 } else {
7c934d39
JF
953 next = pmd_addr_end(addr, end);
954
955 pmd = pmd_offset(pud, addr);
956 if (pmd_none(*pmd)) {
957 pte_t entry;
958
9bdac914 959 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
7c934d39
JF
960 if (!p)
961 return -ENOMEM;
962
963 entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
964 PAGE_KERNEL_LARGE);
965 set_pmd(pmd, __pmd(pte_val(entry)));
966
7c934d39
JF
967 /* check to see if we have contiguous blocks */
968 if (p_end != p || node_start != node) {
969 if (p_start)
970 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
971 addr_start, addr_end-1, p_start, p_end-1, node_start);
972 addr_start = addr;
973 node_start = node;
974 p_start = p;
975 }
49c980df
YL
976
977 addr_end = addr + PMD_SIZE;
978 p_end = p + PMD_SIZE;
7c934d39
JF
979 } else
980 vmemmap_verify((pte_t *)pmd, node, addr, next);
14a62c34 981 }
7c934d39 982
0889eba5 983 }
9b861528 984 sync_global_pgds((unsigned long)start_page, end);
0889eba5
CL
985 return 0;
986}
c2b91e2e
YL
987
988void __meminit vmemmap_populate_print_last(void)
989{
990 if (p_start) {
991 printk(KERN_DEBUG " [%lx-%lx] PMD -> [%p-%p] on node %d\n",
992 addr_start, addr_end-1, p_start, p_end-1, node_start);
993 p_start = NULL;
994 p_end = NULL;
995 node_start = 0;
996 }
997}
0889eba5 998#endif
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