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Merge tag 'master-2014-09-08' of git://git.kernel.org/pub/scm/linux/kernel/git/linvil...
[deliverable/linux.git] / arch / x86 / net / bpf_jit_comp.c
CommitLineData
0a14842f
ED		 1/* bpf_jit_comp.c : BPF JIT compiler
2 *
3b58908a 3 * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
62258278 4 * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
0a14842f
ED		 5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; version 2
9 * of the License.
10 */
11#include <linux/moduleloader.h>
12#include <asm/cacheflush.h>
13#include <linux/netdevice.h>
14#include <linux/filter.h>
855ddb56 15#include <linux/if_vlan.h>
314beb9b 16#include <linux/random.h>
0a14842f 17
0a14842f
ED		 18int bpf_jit_enable __read_mostly;
19
20/*
21 * assembly code in arch/x86/net/bpf_jit.S
22 */
62258278 23extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
a998d434 24extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
62258278 25extern u8 sk_load_byte_positive_offset[];
a998d434 26extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
62258278 27extern u8 sk_load_byte_negative_offset[];
0a14842f
ED		 28
29static inline u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
30{
31 if (len == 1)
32 *ptr = bytes;
33 else if (len == 2)
34 *(u16 *)ptr = bytes;
35 else {
36 *(u32 *)ptr = bytes;
37 barrier();
38 }
39 return ptr + len;
40}
41
42#define EMIT(bytes, len) do { prog = emit_code(prog, bytes, len); } while (0)
43
44#define EMIT1(b1) EMIT(b1, 1)
45#define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
46#define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
47#define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
62258278
AS		 48#define EMIT1_off32(b1, off) \
49 do {EMIT1(b1); EMIT(off, 4); } while (0)
50#define EMIT2_off32(b1, b2, off) \
51 do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
52#define EMIT3_off32(b1, b2, b3, off) \
53 do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
54#define EMIT4_off32(b1, b2, b3, b4, off) \
55 do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
0a14842f
ED		 56
57static inline bool is_imm8(int value)
58{
59 return value <= 127 && value >= -128;
60}
61
62258278 62static inline bool is_simm32(s64 value)
0a14842f 63{
62258278 64 return value == (s64) (s32) value;
0a14842f
ED		 65}
66
e430f34e
AS		 67/* mov dst, src */
68#define EMIT_mov(DST, SRC) \
69 do {if (DST != SRC) \
70 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
62258278
AS		 71 } while (0)
72
73static int bpf_size_to_x86_bytes(int bpf_size)
74{
75 if (bpf_size == BPF_W)
76 return 4;
77 else if (bpf_size == BPF_H)
78 return 2;
79 else if (bpf_size == BPF_B)
80 return 1;
81 else if (bpf_size == BPF_DW)
82 return 4; /* imm32 */
83 else
84 return 0;
85}
0a14842f
ED		 86
87/* list of x86 cond jumps opcodes (. + s8)
88 * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
89 */
90#define X86_JB 0x72
91#define X86_JAE 0x73
92#define X86_JE 0x74
93#define X86_JNE 0x75
94#define X86_JBE 0x76
95#define X86_JA 0x77
62258278
AS		 96#define X86_JGE 0x7D
97#define X86_JG 0x7F
0a14842f
ED		 98
99static inline void bpf_flush_icache(void *start, void *end)
100{
101 mm_segment_t old_fs = get_fs();
102
103 set_fs(KERNEL_DS);
104 smp_wmb();
105 flush_icache_range((unsigned long)start, (unsigned long)end);
106 set_fs(old_fs);
107}
108
a998d434
JS		 109#define CHOOSE_LOAD_FUNC(K, func) \
110 ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
0a14842f 111
314beb9b
ED		 112struct bpf_binary_header {
113 unsigned int pages;
114 /* Note : for security reasons, bpf code will follow a randomly
115 * sized amount of int3 instructions
116 */
117 u8 image[];
118};
119
120static struct bpf_binary_header *bpf_alloc_binary(unsigned int proglen,
121 u8 **image_ptr)
122{
123 unsigned int sz, hole;
124 struct bpf_binary_header *header;
125
126 /* Most of BPF filters are really small,
127 * but if some of them fill a page, allow at least
128 * 128 extra bytes to insert a random section of int3
129 */
130 sz = round_up(proglen + sizeof(*header) + 128, PAGE_SIZE);
131 header = module_alloc(sz);
132 if (!header)
133 return NULL;
134
135 memset(header, 0xcc, sz); /* fill whole space with int3 instructions */
136
137 header->pages = sz / PAGE_SIZE;
773cd38f 138 hole = min(sz - (proglen + sizeof(*header)), PAGE_SIZE - sizeof(*header));
314beb9b
ED		 139
140 /* insert a random number of int3 instructions before BPF code */
141 *image_ptr = &header->image[prandom_u32() % hole];
142 return header;
143}
144
62258278
AS		 145/* pick a register outside of BPF range for JIT internal work */
146#define AUX_REG (MAX_BPF_REG + 1)
147
148/* the following table maps BPF registers to x64 registers.
149 * x64 register r12 is unused, since if used as base address register
150 * in load/store instructions, it always needs an extra byte of encoding
151 */
152static const int reg2hex[] = {
153 [BPF_REG_0] = 0, /* rax */
154 [BPF_REG_1] = 7, /* rdi */
155 [BPF_REG_2] = 6, /* rsi */
156 [BPF_REG_3] = 2, /* rdx */
157 [BPF_REG_4] = 1, /* rcx */
158 [BPF_REG_5] = 0, /* r8 */
159 [BPF_REG_6] = 3, /* rbx callee saved */
160 [BPF_REG_7] = 5, /* r13 callee saved */
161 [BPF_REG_8] = 6, /* r14 callee saved */
162 [BPF_REG_9] = 7, /* r15 callee saved */
163 [BPF_REG_FP] = 5, /* rbp readonly */
164 [AUX_REG] = 3, /* r11 temp register */
165};
166
167/* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
168 * which need extra byte of encoding.
169 * rax,rcx,...,rbp have simpler encoding
170 */
171static inline bool is_ereg(u32 reg)
172{
173 if (reg == BPF_REG_5 || reg == AUX_REG ||
174 (reg >= BPF_REG_7 && reg <= BPF_REG_9))
175 return true;
176 else
177 return false;
178}
179
180/* add modifiers if 'reg' maps to x64 registers r8..r15 */
181static inline u8 add_1mod(u8 byte, u32 reg)
182{
183 if (is_ereg(reg))
184 byte |= 1;
185 return byte;
186}
187
188static inline u8 add_2mod(u8 byte, u32 r1, u32 r2)
189{
190 if (is_ereg(r1))
191 byte |= 1;
192 if (is_ereg(r2))
193 byte |= 4;
194 return byte;
195}
196
e430f34e
AS		 197/* encode 'dst_reg' register into x64 opcode 'byte' */
198static inline u8 add_1reg(u8 byte, u32 dst_reg)
62258278 199{
e430f34e 200 return byte + reg2hex[dst_reg];
62258278
AS		 201}
202
e430f34e
AS		 203/* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
204static inline u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
62258278 205{
e430f34e 206 return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
62258278
AS		 207}
208
f3c2af7b
AS		 209struct jit_context {
210 unsigned int cleanup_addr; /* epilogue code offset */
62258278 211 bool seen_ld_abs;
f3c2af7b
AS		 212};
213
7ae457c1 214static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
f3c2af7b 215 int oldproglen, struct jit_context *ctx)
0a14842f 216{
2695fb55 217 struct bpf_insn *insn = bpf_prog->insnsi;
62258278 218 int insn_cnt = bpf_prog->len;
0a14842f 219 u8 temp[64];
62258278
AS		 220 int i;
221 int proglen = 0;
222 u8 *prog = temp;
223 int stacksize = MAX_BPF_STACK +
224 32 /* space for rbx, r13, r14, r15 */ +
225 8 /* space for skb_copy_bits() buffer */;
0a14842f 226
62258278
AS		 227 EMIT1(0x55); /* push rbp */
228 EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
0a14842f 229
62258278
AS		 230 /* sub rsp, stacksize */
231 EMIT3_off32(0x48, 0x81, 0xEC, stacksize);
232
233 /* all classic BPF filters use R6(rbx) save it */
234
235 /* mov qword ptr [rbp-X],rbx */
236 EMIT3_off32(0x48, 0x89, 0x9D, -stacksize);
237
8fb575ca 238 /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
62258278
AS		 239 * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
240 * R8(r14). R9(r15) spill could be made conditional, but there is only
241 * one 'bpf_error' return path out of helper functions inside bpf_jit.S
242 * The overhead of extra spill is negligible for any filter other
243 * than synthetic ones. Therefore not worth adding complexity.
244 */
245
246 /* mov qword ptr [rbp-X],r13 */
247 EMIT3_off32(0x4C, 0x89, 0xAD, -stacksize + 8);
248 /* mov qword ptr [rbp-X],r14 */
249 EMIT3_off32(0x4C, 0x89, 0xB5, -stacksize + 16);
250 /* mov qword ptr [rbp-X],r15 */
251 EMIT3_off32(0x4C, 0x89, 0xBD, -stacksize + 24);
252
253 /* clear A and X registers */
254 EMIT2(0x31, 0xc0); /* xor eax, eax */
255 EMIT3(0x4D, 0x31, 0xED); /* xor r13, r13 */
256
257 if (ctx->seen_ld_abs) {
258 /* r9d : skb->len - skb->data_len (headlen)
259 * r10 : skb->data
260 */
261 if (is_imm8(offsetof(struct sk_buff, len)))
262 /* mov %r9d, off8(%rdi) */
263 EMIT4(0x44, 0x8b, 0x4f,
264 offsetof(struct sk_buff, len));
265 else
266 /* mov %r9d, off32(%rdi) */
267 EMIT3_off32(0x44, 0x8b, 0x8f,
268 offsetof(struct sk_buff, len));
269
270 if (is_imm8(offsetof(struct sk_buff, data_len)))
271 /* sub %r9d, off8(%rdi) */
272 EMIT4(0x44, 0x2b, 0x4f,
273 offsetof(struct sk_buff, data_len));
274 else
275 EMIT3_off32(0x44, 0x2b, 0x8f,
276 offsetof(struct sk_buff, data_len));
277
278 if (is_imm8(offsetof(struct sk_buff, data)))
279 /* mov %r10, off8(%rdi) */
280 EMIT4(0x4c, 0x8b, 0x57,
281 offsetof(struct sk_buff, data));
282 else
283 /* mov %r10, off32(%rdi) */
284 EMIT3_off32(0x4c, 0x8b, 0x97,
285 offsetof(struct sk_buff, data));
286 }
287
288 for (i = 0; i < insn_cnt; i++, insn++) {
e430f34e
AS		 289 const s32 imm32 = insn->imm;
290 u32 dst_reg = insn->dst_reg;
291 u32 src_reg = insn->src_reg;
62258278
AS		 292 u8 b1 = 0, b2 = 0, b3 = 0;
293 s64 jmp_offset;
294 u8 jmp_cond;
295 int ilen;
296 u8 *func;
297
298 switch (insn->code) {
299 /* ALU */
300 case BPF_ALU | BPF_ADD | BPF_X:
301 case BPF_ALU | BPF_SUB | BPF_X:
302 case BPF_ALU | BPF_AND | BPF_X:
303 case BPF_ALU | BPF_OR | BPF_X:
304 case BPF_ALU | BPF_XOR | BPF_X:
305 case BPF_ALU64 | BPF_ADD | BPF_X:
306 case BPF_ALU64 | BPF_SUB | BPF_X:
307 case BPF_ALU64 | BPF_AND | BPF_X:
308 case BPF_ALU64 | BPF_OR | BPF_X:
309 case BPF_ALU64 | BPF_XOR | BPF_X:
310 switch (BPF_OP(insn->code)) {
311 case BPF_ADD: b2 = 0x01; break;
312 case BPF_SUB: b2 = 0x29; break;
313 case BPF_AND: b2 = 0x21; break;
314 case BPF_OR: b2 = 0x09; break;
315 case BPF_XOR: b2 = 0x31; break;
0a14842f 316 }
62258278 317 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS		 318 EMIT1(add_2mod(0x48, dst_reg, src_reg));
319 else if (is_ereg(dst_reg) || is_ereg(src_reg))
320 EMIT1(add_2mod(0x40, dst_reg, src_reg));
321 EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
62258278 322 break;
0a14842f 323
e430f34e 324 /* mov dst, src */
62258278 325 case BPF_ALU64 | BPF_MOV | BPF_X:
e430f34e 326 EMIT_mov(dst_reg, src_reg);
0a14842f 327 break;
0a14842f 328
e430f34e 329 /* mov32 dst, src */
62258278 330 case BPF_ALU | BPF_MOV | BPF_X:
e430f34e
AS		 331 if (is_ereg(dst_reg) || is_ereg(src_reg))
332 EMIT1(add_2mod(0x40, dst_reg, src_reg));
333 EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
62258278 334 break;
0a14842f 335
e430f34e 336 /* neg dst */
62258278
AS		 337 case BPF_ALU | BPF_NEG:
338 case BPF_ALU64 | BPF_NEG:
339 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS		 340 EMIT1(add_1mod(0x48, dst_reg));
341 else if (is_ereg(dst_reg))
342 EMIT1(add_1mod(0x40, dst_reg));
343 EMIT2(0xF7, add_1reg(0xD8, dst_reg));
62258278
AS		 344 break;
345
346 case BPF_ALU | BPF_ADD | BPF_K:
347 case BPF_ALU | BPF_SUB | BPF_K:
348 case BPF_ALU | BPF_AND | BPF_K:
349 case BPF_ALU | BPF_OR | BPF_K:
350 case BPF_ALU | BPF_XOR | BPF_K:
351 case BPF_ALU64 | BPF_ADD | BPF_K:
352 case BPF_ALU64 | BPF_SUB | BPF_K:
353 case BPF_ALU64 | BPF_AND | BPF_K:
354 case BPF_ALU64 | BPF_OR | BPF_K:
355 case BPF_ALU64 | BPF_XOR | BPF_K:
356 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS		 357 EMIT1(add_1mod(0x48, dst_reg));
358 else if (is_ereg(dst_reg))
359 EMIT1(add_1mod(0x40, dst_reg));
62258278
AS		 360
361 switch (BPF_OP(insn->code)) {
362 case BPF_ADD: b3 = 0xC0; break;
363 case BPF_SUB: b3 = 0xE8; break;
364 case BPF_AND: b3 = 0xE0; break;
365 case BPF_OR: b3 = 0xC8; break;
366 case BPF_XOR: b3 = 0xF0; break;
367 }
368
e430f34e
AS		 369 if (is_imm8(imm32))
370 EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
62258278 371 else
e430f34e 372 EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
62258278
AS		 373 break;
374
375 case BPF_ALU64 | BPF_MOV | BPF_K:
376 /* optimization: if imm32 is positive,
377 * use 'mov eax, imm32' (which zero-extends imm32)
378 * to save 2 bytes
379 */
e430f34e 380 if (imm32 < 0) {
62258278 381 /* 'mov rax, imm32' sign extends imm32 */
e430f34e 382 b1 = add_1mod(0x48, dst_reg);
62258278
AS		 383 b2 = 0xC7;
384 b3 = 0xC0;
e430f34e 385 EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
0a14842f 386 break;
62258278
AS		 387 }
388
389 case BPF_ALU | BPF_MOV | BPF_K:
390 /* mov %eax, imm32 */
e430f34e
AS		 391 if (is_ereg(dst_reg))
392 EMIT1(add_1mod(0x40, dst_reg));
393 EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
62258278
AS		 394 break;
395
e430f34e 396 /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
62258278
AS		 397 case BPF_ALU | BPF_MOD | BPF_X:
398 case BPF_ALU | BPF_DIV | BPF_X:
399 case BPF_ALU | BPF_MOD | BPF_K:
400 case BPF_ALU | BPF_DIV | BPF_K:
401 case BPF_ALU64 | BPF_MOD | BPF_X:
402 case BPF_ALU64 | BPF_DIV | BPF_X:
403 case BPF_ALU64 | BPF_MOD | BPF_K:
404 case BPF_ALU64 | BPF_DIV | BPF_K:
405 EMIT1(0x50); /* push rax */
406 EMIT1(0x52); /* push rdx */
407
408 if (BPF_SRC(insn->code) == BPF_X)
e430f34e
AS		 409 /* mov r11, src_reg */
410 EMIT_mov(AUX_REG, src_reg);
62258278 411 else
e430f34e
AS		 412 /* mov r11, imm32 */
413 EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
62258278 414
e430f34e
AS		 415 /* mov rax, dst_reg */
416 EMIT_mov(BPF_REG_0, dst_reg);
62258278
AS		 417
418 /* xor edx, edx
419 * equivalent to 'xor rdx, rdx', but one byte less
420 */
421 EMIT2(0x31, 0xd2);
422
423 if (BPF_SRC(insn->code) == BPF_X) {
e430f34e 424 /* if (src_reg == 0) return 0 */
62258278
AS		 425
426 /* cmp r11, 0 */
427 EMIT4(0x49, 0x83, 0xFB, 0x00);
428
429 /* jne .+9 (skip over pop, pop, xor and jmp) */
430 EMIT2(X86_JNE, 1 + 1 + 2 + 5);
431 EMIT1(0x5A); /* pop rdx */
432 EMIT1(0x58); /* pop rax */
433 EMIT2(0x31, 0xc0); /* xor eax, eax */
434
435 /* jmp cleanup_addr
436 * addrs[i] - 11, because there are 11 bytes
437 * after this insn: div, mov, pop, pop, mov
438 */
439 jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
440 EMIT1_off32(0xE9, jmp_offset);
441 }
442
443 if (BPF_CLASS(insn->code) == BPF_ALU64)
444 /* div r11 */
445 EMIT3(0x49, 0xF7, 0xF3);
446 else
447 /* div r11d */
448 EMIT3(0x41, 0xF7, 0xF3);
449
450 if (BPF_OP(insn->code) == BPF_MOD)
451 /* mov r11, rdx */
452 EMIT3(0x49, 0x89, 0xD3);
453 else
454 /* mov r11, rax */
455 EMIT3(0x49, 0x89, 0xC3);
456
457 EMIT1(0x5A); /* pop rdx */
458 EMIT1(0x58); /* pop rax */
459
e430f34e
AS		 460 /* mov dst_reg, r11 */
461 EMIT_mov(dst_reg, AUX_REG);
62258278
AS		 462 break;
463
464 case BPF_ALU | BPF_MUL | BPF_K:
465 case BPF_ALU | BPF_MUL | BPF_X:
466 case BPF_ALU64 | BPF_MUL | BPF_K:
467 case BPF_ALU64 | BPF_MUL | BPF_X:
468 EMIT1(0x50); /* push rax */
469 EMIT1(0x52); /* push rdx */
470
e430f34e
AS		 471 /* mov r11, dst_reg */
472 EMIT_mov(AUX_REG, dst_reg);
62258278
AS		 473
474 if (BPF_SRC(insn->code) == BPF_X)
e430f34e
AS		 475 /* mov rax, src_reg */
476 EMIT_mov(BPF_REG_0, src_reg);
62258278 477 else
e430f34e
AS		 478 /* mov rax, imm32 */
479 EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
62258278
AS		 480
481 if (BPF_CLASS(insn->code) == BPF_ALU64)
482 EMIT1(add_1mod(0x48, AUX_REG));
483 else if (is_ereg(AUX_REG))
484 EMIT1(add_1mod(0x40, AUX_REG));
485 /* mul(q) r11 */
486 EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
487
488 /* mov r11, rax */
489 EMIT_mov(AUX_REG, BPF_REG_0);
490
491 EMIT1(0x5A); /* pop rdx */
492 EMIT1(0x58); /* pop rax */
493
e430f34e
AS		 494 /* mov dst_reg, r11 */
495 EMIT_mov(dst_reg, AUX_REG);
62258278
AS		 496 break;
497
498 /* shifts */
499 case BPF_ALU | BPF_LSH | BPF_K:
500 case BPF_ALU | BPF_RSH | BPF_K:
501 case BPF_ALU | BPF_ARSH | BPF_K:
502 case BPF_ALU64 | BPF_LSH | BPF_K:
503 case BPF_ALU64 | BPF_RSH | BPF_K:
504 case BPF_ALU64 | BPF_ARSH | BPF_K:
505 if (BPF_CLASS(insn->code) == BPF_ALU64)
e430f34e
AS		 506 EMIT1(add_1mod(0x48, dst_reg));
507 else if (is_ereg(dst_reg))
508 EMIT1(add_1mod(0x40, dst_reg));
62258278
AS		 509
510 switch (BPF_OP(insn->code)) {
511 case BPF_LSH: b3 = 0xE0; break;
512 case BPF_RSH: b3 = 0xE8; break;
513 case BPF_ARSH: b3 = 0xF8; break;
514 }
e430f34e 515 EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
62258278
AS		 516 break;
517
72b603ee
AS		 518 case BPF_ALU | BPF_LSH | BPF_X:
519 case BPF_ALU | BPF_RSH | BPF_X:
520 case BPF_ALU | BPF_ARSH | BPF_X:
521 case BPF_ALU64 | BPF_LSH | BPF_X:
522 case BPF_ALU64 | BPF_RSH | BPF_X:
523 case BPF_ALU64 | BPF_ARSH | BPF_X:
524
525 /* check for bad case when dst_reg == rcx */
526 if (dst_reg == BPF_REG_4) {
527 /* mov r11, dst_reg */
528 EMIT_mov(AUX_REG, dst_reg);
529 dst_reg = AUX_REG;
530 }
531
532 if (src_reg != BPF_REG_4) { /* common case */
533 EMIT1(0x51); /* push rcx */
534
535 /* mov rcx, src_reg */
536 EMIT_mov(BPF_REG_4, src_reg);
537 }
538
539 /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
540 if (BPF_CLASS(insn->code) == BPF_ALU64)
541 EMIT1(add_1mod(0x48, dst_reg));
542 else if (is_ereg(dst_reg))
543 EMIT1(add_1mod(0x40, dst_reg));
544
545 switch (BPF_OP(insn->code)) {
546 case BPF_LSH: b3 = 0xE0; break;
547 case BPF_RSH: b3 = 0xE8; break;
548 case BPF_ARSH: b3 = 0xF8; break;
549 }
550 EMIT2(0xD3, add_1reg(b3, dst_reg));
551
552 if (src_reg != BPF_REG_4)
553 EMIT1(0x59); /* pop rcx */
554
555 if (insn->dst_reg == BPF_REG_4)
556 /* mov dst_reg, r11 */
557 EMIT_mov(insn->dst_reg, AUX_REG);
558 break;
559
62258278 560 case BPF_ALU | BPF_END | BPF_FROM_BE:
e430f34e 561 switch (imm32) {
62258278
AS		 562 case 16:
563 /* emit 'ror %ax, 8' to swap lower 2 bytes */
564 EMIT1(0x66);
e430f34e 565 if (is_ereg(dst_reg))
62258278 566 EMIT1(0x41);
e430f34e 567 EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
62258278
AS		 568 break;
569 case 32:
570 /* emit 'bswap eax' to swap lower 4 bytes */
e430f34e 571 if (is_ereg(dst_reg))
62258278 572 EMIT2(0x41, 0x0F);
0a14842f 573 else
62258278 574 EMIT1(0x0F);
e430f34e 575 EMIT1(add_1reg(0xC8, dst_reg));
0a14842f 576 break;
62258278
AS		 577 case 64:
578 /* emit 'bswap rax' to swap 8 bytes */
e430f34e
AS		 579 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
580 add_1reg(0xC8, dst_reg));
3b58908a
ED		 581 break;
582 }
62258278
AS		 583 break;
584
585 case BPF_ALU | BPF_END | BPF_FROM_LE:
586 break;
587
e430f34e 588 /* ST: *(u8*)(dst_reg + off) = imm */
62258278 589 case BPF_ST | BPF_MEM | BPF_B:
e430f34e 590 if (is_ereg(dst_reg))
62258278
AS		 591 EMIT2(0x41, 0xC6);
592 else
593 EMIT1(0xC6);
594 goto st;
595 case BPF_ST | BPF_MEM | BPF_H:
e430f34e 596 if (is_ereg(dst_reg))
62258278
AS		 597 EMIT3(0x66, 0x41, 0xC7);
598 else
599 EMIT2(0x66, 0xC7);
600 goto st;
601 case BPF_ST | BPF_MEM | BPF_W:
e430f34e 602 if (is_ereg(dst_reg))
62258278
AS		 603 EMIT2(0x41, 0xC7);
604 else
605 EMIT1(0xC7);
606 goto st;
607 case BPF_ST | BPF_MEM | BPF_DW:
e430f34e 608 EMIT2(add_1mod(0x48, dst_reg), 0xC7);
62258278
AS		 609
610st: if (is_imm8(insn->off))
e430f34e 611 EMIT2(add_1reg(0x40, dst_reg), insn->off);
62258278 612 else
e430f34e 613 EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
62258278 614
e430f34e 615 EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
62258278
AS		 616 break;
617
e430f34e 618 /* STX: *(u8*)(dst_reg + off) = src_reg */
62258278
AS		 619 case BPF_STX | BPF_MEM | BPF_B:
620 /* emit 'mov byte ptr [rax + off], al' */
e430f34e 621 if (is_ereg(dst_reg) || is_ereg(src_reg) ||
62258278 622 /* have to add extra byte for x86 SIL, DIL regs */
e430f34e
AS		 623 src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
624 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
62258278
AS		 625 else
626 EMIT1(0x88);
627 goto stx;
628 case BPF_STX | BPF_MEM | BPF_H:
e430f34e
AS		 629 if (is_ereg(dst_reg) || is_ereg(src_reg))
630 EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
62258278
AS		 631 else
632 EMIT2(0x66, 0x89);
633 goto stx;
634 case BPF_STX | BPF_MEM | BPF_W:
e430f34e
AS		 635 if (is_ereg(dst_reg) || is_ereg(src_reg))
636 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
62258278
AS		 637 else
638 EMIT1(0x89);
639 goto stx;
640 case BPF_STX | BPF_MEM | BPF_DW:
e430f34e 641 EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
62258278 642stx: if (is_imm8(insn->off))
e430f34e 643 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
62258278 644 else
e430f34e 645 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
62258278
AS		 646 insn->off);
647 break;
648
e430f34e 649 /* LDX: dst_reg = *(u8*)(src_reg + off) */
62258278
AS		 650 case BPF_LDX | BPF_MEM | BPF_B:
651 /* emit 'movzx rax, byte ptr [rax + off]' */
e430f34e 652 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
62258278
AS		 653 goto ldx;
654 case BPF_LDX | BPF_MEM | BPF_H:
655 /* emit 'movzx rax, word ptr [rax + off]' */
e430f34e 656 EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
62258278
AS		 657 goto ldx;
658 case BPF_LDX | BPF_MEM | BPF_W:
659 /* emit 'mov eax, dword ptr [rax+0x14]' */
e430f34e
AS		 660 if (is_ereg(dst_reg) || is_ereg(src_reg))
661 EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
62258278
AS		 662 else
663 EMIT1(0x8B);
664 goto ldx;
665 case BPF_LDX | BPF_MEM | BPF_DW:
666 /* emit 'mov rax, qword ptr [rax+0x14]' */
e430f34e 667 EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
62258278
AS		 668ldx: /* if insn->off == 0 we can save one extra byte, but
669 * special case of x86 r13 which always needs an offset
670 * is not worth the hassle
671 */
672 if (is_imm8(insn->off))
e430f34e 673 EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
62258278 674 else
e430f34e 675 EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
62258278
AS		 676 insn->off);
677 break;
678
e430f34e 679 /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
62258278
AS		 680 case BPF_STX | BPF_XADD | BPF_W:
681 /* emit 'lock add dword ptr [rax + off], eax' */
e430f34e
AS		 682 if (is_ereg(dst_reg) || is_ereg(src_reg))
683 EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
62258278
AS		 684 else
685 EMIT2(0xF0, 0x01);
686 goto xadd;
687 case BPF_STX | BPF_XADD | BPF_DW:
e430f34e 688 EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
62258278 689xadd: if (is_imm8(insn->off))
e430f34e 690 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
62258278 691 else
e430f34e 692 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
62258278
AS		 693 insn->off);
694 break;
695
696 /* call */
697 case BPF_JMP | BPF_CALL:
e430f34e 698 func = (u8 *) __bpf_call_base + imm32;
62258278
AS		 699 jmp_offset = func - (image + addrs[i]);
700 if (ctx->seen_ld_abs) {
701 EMIT2(0x41, 0x52); /* push %r10 */
702 EMIT2(0x41, 0x51); /* push %r9 */
703 /* need to adjust jmp offset, since
704 * pop %r9, pop %r10 take 4 bytes after call insn
705 */
706 jmp_offset += 4;
707 }
e430f34e 708 if (!imm32 || !is_simm32(jmp_offset)) {
62258278 709 pr_err("unsupported bpf func %d addr %p image %p\n",
e430f34e 710 imm32, func, image);
62258278
AS		 711 return -EINVAL;
712 }
713 EMIT1_off32(0xE8, jmp_offset);
714 if (ctx->seen_ld_abs) {
715 EMIT2(0x41, 0x59); /* pop %r9 */
716 EMIT2(0x41, 0x5A); /* pop %r10 */
717 }
718 break;
719
720 /* cond jump */
721 case BPF_JMP | BPF_JEQ | BPF_X:
722 case BPF_JMP | BPF_JNE | BPF_X:
723 case BPF_JMP | BPF_JGT | BPF_X:
724 case BPF_JMP | BPF_JGE | BPF_X:
725 case BPF_JMP | BPF_JSGT | BPF_X:
726 case BPF_JMP | BPF_JSGE | BPF_X:
e430f34e
AS		 727 /* cmp dst_reg, src_reg */
728 EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
729 add_2reg(0xC0, dst_reg, src_reg));
62258278
AS		 730 goto emit_cond_jmp;
731
732 case BPF_JMP | BPF_JSET | BPF_X:
e430f34e
AS		 733 /* test dst_reg, src_reg */
734 EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
735 add_2reg(0xC0, dst_reg, src_reg));
62258278
AS		 736 goto emit_cond_jmp;
737
738 case BPF_JMP | BPF_JSET | BPF_K:
e430f34e
AS		 739 /* test dst_reg, imm32 */
740 EMIT1(add_1mod(0x48, dst_reg));
741 EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
62258278
AS		 742 goto emit_cond_jmp;
743
744 case BPF_JMP | BPF_JEQ | BPF_K:
745 case BPF_JMP | BPF_JNE | BPF_K:
746 case BPF_JMP | BPF_JGT | BPF_K:
747 case BPF_JMP | BPF_JGE | BPF_K:
748 case BPF_JMP | BPF_JSGT | BPF_K:
749 case BPF_JMP | BPF_JSGE | BPF_K:
e430f34e
AS		 750 /* cmp dst_reg, imm8/32 */
751 EMIT1(add_1mod(0x48, dst_reg));
62258278 752
e430f34e
AS		 753 if (is_imm8(imm32))
754 EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
62258278 755 else
e430f34e 756 EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
62258278
AS		 757
758emit_cond_jmp: /* convert BPF opcode to x86 */
759 switch (BPF_OP(insn->code)) {
760 case BPF_JEQ:
761 jmp_cond = X86_JE;
762 break;
763 case BPF_JSET:
764 case BPF_JNE:
765 jmp_cond = X86_JNE;
766 break;
767 case BPF_JGT:
768 /* GT is unsigned '>', JA in x86 */
769 jmp_cond = X86_JA;
770 break;
771 case BPF_JGE:
772 /* GE is unsigned '>=', JAE in x86 */
773 jmp_cond = X86_JAE;
774 break;
775 case BPF_JSGT:
776 /* signed '>', GT in x86 */
777 jmp_cond = X86_JG;
778 break;
779 case BPF_JSGE:
780 /* signed '>=', GE in x86 */
781 jmp_cond = X86_JGE;
782 break;
783 default: /* to silence gcc warning */
784 return -EFAULT;
785 }
786 jmp_offset = addrs[i + insn->off] - addrs[i];
787 if (is_imm8(jmp_offset)) {
788 EMIT2(jmp_cond, jmp_offset);
789 } else if (is_simm32(jmp_offset)) {
790 EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
791 } else {
792 pr_err("cond_jmp gen bug %llx\n", jmp_offset);
793 return -EFAULT;
794 }
795
796 break;
0a14842f 797
62258278
AS		 798 case BPF_JMP | BPF_JA:
799 jmp_offset = addrs[i + insn->off] - addrs[i];
800 if (!jmp_offset)
801 /* optimize out nop jumps */
802 break;
803emit_jmp:
804 if (is_imm8(jmp_offset)) {
805 EMIT2(0xEB, jmp_offset);
806 } else if (is_simm32(jmp_offset)) {
807 EMIT1_off32(0xE9, jmp_offset);
808 } else {
809 pr_err("jmp gen bug %llx\n", jmp_offset);
810 return -EFAULT;
811 }
812 break;
813
814 case BPF_LD | BPF_IND | BPF_W:
815 func = sk_load_word;
816 goto common_load;
817 case BPF_LD | BPF_ABS | BPF_W:
e430f34e 818 func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
62258278
AS		 819common_load: ctx->seen_ld_abs = true;
820 jmp_offset = func - (image + addrs[i]);
821 if (!func || !is_simm32(jmp_offset)) {
822 pr_err("unsupported bpf func %d addr %p image %p\n",
e430f34e 823 imm32, func, image);
62258278
AS		 824 return -EINVAL;
825 }
826 if (BPF_MODE(insn->code) == BPF_ABS) {
827 /* mov %esi, imm32 */
e430f34e 828 EMIT1_off32(0xBE, imm32);
62258278 829 } else {
e430f34e
AS		 830 /* mov %rsi, src_reg */
831 EMIT_mov(BPF_REG_2, src_reg);
832 if (imm32) {
833 if (is_imm8(imm32))
62258278 834 /* add %esi, imm8 */
e430f34e 835 EMIT3(0x83, 0xC6, imm32);
0a14842f 836 else
62258278 837 /* add %esi, imm32 */
e430f34e 838 EMIT2_off32(0x81, 0xC6, imm32);
0a14842f 839 }
62258278
AS		 840 }
841 /* skb pointer is in R6 (%rbx), it will be copied into
842 * %rdi if skb_copy_bits() call is necessary.
843 * sk_load_* helpers also use %r10 and %r9d.
844 * See bpf_jit.S
845 */
846 EMIT1_off32(0xE8, jmp_offset); /* call */
847 break;
848
849 case BPF_LD | BPF_IND | BPF_H:
850 func = sk_load_half;
851 goto common_load;
852 case BPF_LD | BPF_ABS | BPF_H:
e430f34e 853 func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
62258278
AS		 854 goto common_load;
855 case BPF_LD | BPF_IND | BPF_B:
856 func = sk_load_byte;
857 goto common_load;
858 case BPF_LD | BPF_ABS | BPF_B:
e430f34e 859 func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
62258278
AS		 860 goto common_load;
861
862 case BPF_JMP | BPF_EXIT:
863 if (i != insn_cnt - 1) {
864 jmp_offset = ctx->cleanup_addr - addrs[i];
865 goto emit_jmp;
866 }
867 /* update cleanup_addr */
868 ctx->cleanup_addr = proglen;
869 /* mov rbx, qword ptr [rbp-X] */
870 EMIT3_off32(0x48, 0x8B, 0x9D, -stacksize);
871 /* mov r13, qword ptr [rbp-X] */
872 EMIT3_off32(0x4C, 0x8B, 0xAD, -stacksize + 8);
873 /* mov r14, qword ptr [rbp-X] */
874 EMIT3_off32(0x4C, 0x8B, 0xB5, -stacksize + 16);
875 /* mov r15, qword ptr [rbp-X] */
876 EMIT3_off32(0x4C, 0x8B, 0xBD, -stacksize + 24);
877
878 EMIT1(0xC9); /* leave */
879 EMIT1(0xC3); /* ret */
880 break;
881
f3c2af7b 882 default:
62258278
AS		 883 /* By design x64 JIT should support all BPF instructions
884 * This error will be seen if new instruction was added
885 * to interpreter, but not to JIT
7ae457c1 886 * or if there is junk in bpf_prog
62258278
AS		 887 */
888 pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
f3c2af7b
AS		 889 return -EINVAL;
890 }
62258278 891
f3c2af7b
AS		 892 ilen = prog - temp;
893 if (image) {
894 if (unlikely(proglen + ilen > oldproglen)) {
62258278 895 pr_err("bpf_jit_compile fatal error\n");
f3c2af7b 896 return -EFAULT;
0a14842f 897 }
f3c2af7b 898 memcpy(image + proglen, temp, ilen);
0a14842f 899 }
f3c2af7b
AS		 900 proglen += ilen;
901 addrs[i] = proglen;
902 prog = temp;
903 }
f3c2af7b
AS		 904 return proglen;
905}
906
7ae457c1 907void bpf_jit_compile(struct bpf_prog *prog)
62258278
AS		 908{
909}
910
7ae457c1 911void bpf_int_jit_compile(struct bpf_prog *prog)
f3c2af7b
AS		 912{
913 struct bpf_binary_header *header = NULL;
914 int proglen, oldproglen = 0;
915 struct jit_context ctx = {};
916 u8 *image = NULL;
917 int *addrs;
918 int pass;
919 int i;
920
921 if (!bpf_jit_enable)
922 return;
0a14842f 923
f3c2af7b
AS		 924 if (!prog || !prog->len)
925 return;
926
927 addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
928 if (!addrs)
929 return;
930
931 /* Before first pass, make a rough estimation of addrs[]
932 * each bpf instruction is translated to less than 64 bytes
933 */
934 for (proglen = 0, i = 0; i < prog->len; i++) {
935 proglen += 64;
936 addrs[i] = proglen;
937 }
938 ctx.cleanup_addr = proglen;
f3c2af7b
AS		 939
940 for (pass = 0; pass < 10; pass++) {
941 proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
942 if (proglen <= 0) {
943 image = NULL;
944 if (header)
945 module_free(NULL, header);
946 goto out;
947 }
0a14842f 948 if (image) {
d00a9dd2 949 if (proglen != oldproglen)
f3c2af7b
AS		 950 pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
951 proglen, oldproglen);
0a14842f
ED		 952 break;
953 }
954 if (proglen == oldproglen) {
314beb9b
ED		 955 header = bpf_alloc_binary(proglen, &image);
956 if (!header)
0a14842f
ED		 957 goto out;
958 }
959 oldproglen = proglen;
960 }
79617801 961
0a14842f 962 if (bpf_jit_enable > 1)
f3c2af7b 963 bpf_jit_dump(prog->len, proglen, 0, image);
0a14842f
ED		 964
965 if (image) {
314beb9b
ED		 966 bpf_flush_icache(header, image + proglen);
967 set_memory_ro((unsigned long)header, header->pages);
f3c2af7b
AS		 968 prog->bpf_func = (void *)image;
969 prog->jited = 1;
0a14842f
ED		 970 }
971out:
972 kfree(addrs);
0a14842f
ED		 973}
974
60a3b225 975void bpf_jit_free(struct bpf_prog *fp)
d45ed4a4 976{
d45ed4a4
AS		 977 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
978 struct bpf_binary_header *header = (void *)addr;
979
60a3b225
DB		 980 if (!fp->jited)
981 goto free_filter;
982
d45ed4a4
AS		 983 set_memory_rw(addr, header->pages);
984 module_free(NULL, header);
d45ed4a4 985
60a3b225
DB		 986free_filter:
987 bpf_prog_unlock_free(fp);
0a14842f 988}
Linux kernel - Deliverables
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