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0a14842f ED |
1 | /* bpf_jit_comp.c : BPF JIT compiler |
2 | * | |
3b58908a | 3 | * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com) |
62258278 | 4 | * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com |
0a14842f ED |
5 | * |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; version 2 | |
9 | * of the License. | |
10 | */ | |
11 | #include <linux/moduleloader.h> | |
12 | #include <asm/cacheflush.h> | |
13 | #include <linux/netdevice.h> | |
14 | #include <linux/filter.h> | |
855ddb56 | 15 | #include <linux/if_vlan.h> |
314beb9b | 16 | #include <linux/random.h> |
0a14842f | 17 | |
0a14842f ED |
18 | int bpf_jit_enable __read_mostly; |
19 | ||
20 | /* | |
21 | * assembly code in arch/x86/net/bpf_jit.S | |
22 | */ | |
62258278 | 23 | extern u8 sk_load_word[], sk_load_half[], sk_load_byte[]; |
a998d434 | 24 | extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[]; |
62258278 | 25 | extern u8 sk_load_byte_positive_offset[]; |
a998d434 | 26 | extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[]; |
62258278 | 27 | extern u8 sk_load_byte_negative_offset[]; |
0a14842f ED |
28 | |
29 | static inline u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len) | |
30 | { | |
31 | if (len == 1) | |
32 | *ptr = bytes; | |
33 | else if (len == 2) | |
34 | *(u16 *)ptr = bytes; | |
35 | else { | |
36 | *(u32 *)ptr = bytes; | |
37 | barrier(); | |
38 | } | |
39 | return ptr + len; | |
40 | } | |
41 | ||
42 | #define EMIT(bytes, len) do { prog = emit_code(prog, bytes, len); } while (0) | |
43 | ||
44 | #define EMIT1(b1) EMIT(b1, 1) | |
45 | #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2) | |
46 | #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3) | |
47 | #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4) | |
62258278 AS |
48 | #define EMIT1_off32(b1, off) \ |
49 | do {EMIT1(b1); EMIT(off, 4); } while (0) | |
50 | #define EMIT2_off32(b1, b2, off) \ | |
51 | do {EMIT2(b1, b2); EMIT(off, 4); } while (0) | |
52 | #define EMIT3_off32(b1, b2, b3, off) \ | |
53 | do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0) | |
54 | #define EMIT4_off32(b1, b2, b3, b4, off) \ | |
55 | do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0) | |
0a14842f ED |
56 | |
57 | static inline bool is_imm8(int value) | |
58 | { | |
59 | return value <= 127 && value >= -128; | |
60 | } | |
61 | ||
62258278 | 62 | static inline bool is_simm32(s64 value) |
0a14842f | 63 | { |
62258278 | 64 | return value == (s64) (s32) value; |
0a14842f ED |
65 | } |
66 | ||
e430f34e AS |
67 | /* mov dst, src */ |
68 | #define EMIT_mov(DST, SRC) \ | |
69 | do {if (DST != SRC) \ | |
70 | EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \ | |
62258278 AS |
71 | } while (0) |
72 | ||
73 | static int bpf_size_to_x86_bytes(int bpf_size) | |
74 | { | |
75 | if (bpf_size == BPF_W) | |
76 | return 4; | |
77 | else if (bpf_size == BPF_H) | |
78 | return 2; | |
79 | else if (bpf_size == BPF_B) | |
80 | return 1; | |
81 | else if (bpf_size == BPF_DW) | |
82 | return 4; /* imm32 */ | |
83 | else | |
84 | return 0; | |
85 | } | |
0a14842f ED |
86 | |
87 | /* list of x86 cond jumps opcodes (. + s8) | |
88 | * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32) | |
89 | */ | |
90 | #define X86_JB 0x72 | |
91 | #define X86_JAE 0x73 | |
92 | #define X86_JE 0x74 | |
93 | #define X86_JNE 0x75 | |
94 | #define X86_JBE 0x76 | |
95 | #define X86_JA 0x77 | |
62258278 AS |
96 | #define X86_JGE 0x7D |
97 | #define X86_JG 0x7F | |
0a14842f ED |
98 | |
99 | static inline void bpf_flush_icache(void *start, void *end) | |
100 | { | |
101 | mm_segment_t old_fs = get_fs(); | |
102 | ||
103 | set_fs(KERNEL_DS); | |
104 | smp_wmb(); | |
105 | flush_icache_range((unsigned long)start, (unsigned long)end); | |
106 | set_fs(old_fs); | |
107 | } | |
108 | ||
a998d434 JS |
109 | #define CHOOSE_LOAD_FUNC(K, func) \ |
110 | ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset) | |
0a14842f | 111 | |
314beb9b ED |
112 | struct bpf_binary_header { |
113 | unsigned int pages; | |
114 | /* Note : for security reasons, bpf code will follow a randomly | |
115 | * sized amount of int3 instructions | |
116 | */ | |
117 | u8 image[]; | |
118 | }; | |
119 | ||
120 | static struct bpf_binary_header *bpf_alloc_binary(unsigned int proglen, | |
121 | u8 **image_ptr) | |
122 | { | |
123 | unsigned int sz, hole; | |
124 | struct bpf_binary_header *header; | |
125 | ||
126 | /* Most of BPF filters are really small, | |
127 | * but if some of them fill a page, allow at least | |
128 | * 128 extra bytes to insert a random section of int3 | |
129 | */ | |
130 | sz = round_up(proglen + sizeof(*header) + 128, PAGE_SIZE); | |
131 | header = module_alloc(sz); | |
132 | if (!header) | |
133 | return NULL; | |
134 | ||
135 | memset(header, 0xcc, sz); /* fill whole space with int3 instructions */ | |
136 | ||
137 | header->pages = sz / PAGE_SIZE; | |
773cd38f | 138 | hole = min(sz - (proglen + sizeof(*header)), PAGE_SIZE - sizeof(*header)); |
314beb9b ED |
139 | |
140 | /* insert a random number of int3 instructions before BPF code */ | |
141 | *image_ptr = &header->image[prandom_u32() % hole]; | |
142 | return header; | |
143 | } | |
144 | ||
62258278 AS |
145 | /* pick a register outside of BPF range for JIT internal work */ |
146 | #define AUX_REG (MAX_BPF_REG + 1) | |
147 | ||
148 | /* the following table maps BPF registers to x64 registers. | |
149 | * x64 register r12 is unused, since if used as base address register | |
150 | * in load/store instructions, it always needs an extra byte of encoding | |
151 | */ | |
152 | static const int reg2hex[] = { | |
153 | [BPF_REG_0] = 0, /* rax */ | |
154 | [BPF_REG_1] = 7, /* rdi */ | |
155 | [BPF_REG_2] = 6, /* rsi */ | |
156 | [BPF_REG_3] = 2, /* rdx */ | |
157 | [BPF_REG_4] = 1, /* rcx */ | |
158 | [BPF_REG_5] = 0, /* r8 */ | |
159 | [BPF_REG_6] = 3, /* rbx callee saved */ | |
160 | [BPF_REG_7] = 5, /* r13 callee saved */ | |
161 | [BPF_REG_8] = 6, /* r14 callee saved */ | |
162 | [BPF_REG_9] = 7, /* r15 callee saved */ | |
163 | [BPF_REG_FP] = 5, /* rbp readonly */ | |
164 | [AUX_REG] = 3, /* r11 temp register */ | |
165 | }; | |
166 | ||
167 | /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15 | |
168 | * which need extra byte of encoding. | |
169 | * rax,rcx,...,rbp have simpler encoding | |
170 | */ | |
171 | static inline bool is_ereg(u32 reg) | |
172 | { | |
173 | if (reg == BPF_REG_5 || reg == AUX_REG || | |
174 | (reg >= BPF_REG_7 && reg <= BPF_REG_9)) | |
175 | return true; | |
176 | else | |
177 | return false; | |
178 | } | |
179 | ||
180 | /* add modifiers if 'reg' maps to x64 registers r8..r15 */ | |
181 | static inline u8 add_1mod(u8 byte, u32 reg) | |
182 | { | |
183 | if (is_ereg(reg)) | |
184 | byte |= 1; | |
185 | return byte; | |
186 | } | |
187 | ||
188 | static inline u8 add_2mod(u8 byte, u32 r1, u32 r2) | |
189 | { | |
190 | if (is_ereg(r1)) | |
191 | byte |= 1; | |
192 | if (is_ereg(r2)) | |
193 | byte |= 4; | |
194 | return byte; | |
195 | } | |
196 | ||
e430f34e AS |
197 | /* encode 'dst_reg' register into x64 opcode 'byte' */ |
198 | static inline u8 add_1reg(u8 byte, u32 dst_reg) | |
62258278 | 199 | { |
e430f34e | 200 | return byte + reg2hex[dst_reg]; |
62258278 AS |
201 | } |
202 | ||
e430f34e AS |
203 | /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */ |
204 | static inline u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg) | |
62258278 | 205 | { |
e430f34e | 206 | return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3); |
62258278 AS |
207 | } |
208 | ||
f3c2af7b AS |
209 | struct jit_context { |
210 | unsigned int cleanup_addr; /* epilogue code offset */ | |
62258278 | 211 | bool seen_ld_abs; |
f3c2af7b AS |
212 | }; |
213 | ||
7ae457c1 | 214 | static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, |
f3c2af7b | 215 | int oldproglen, struct jit_context *ctx) |
0a14842f | 216 | { |
2695fb55 | 217 | struct bpf_insn *insn = bpf_prog->insnsi; |
62258278 | 218 | int insn_cnt = bpf_prog->len; |
0a14842f | 219 | u8 temp[64]; |
62258278 AS |
220 | int i; |
221 | int proglen = 0; | |
222 | u8 *prog = temp; | |
223 | int stacksize = MAX_BPF_STACK + | |
224 | 32 /* space for rbx, r13, r14, r15 */ + | |
225 | 8 /* space for skb_copy_bits() buffer */; | |
0a14842f | 226 | |
62258278 AS |
227 | EMIT1(0x55); /* push rbp */ |
228 | EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */ | |
0a14842f | 229 | |
62258278 AS |
230 | /* sub rsp, stacksize */ |
231 | EMIT3_off32(0x48, 0x81, 0xEC, stacksize); | |
232 | ||
233 | /* all classic BPF filters use R6(rbx) save it */ | |
234 | ||
235 | /* mov qword ptr [rbp-X],rbx */ | |
236 | EMIT3_off32(0x48, 0x89, 0x9D, -stacksize); | |
237 | ||
8fb575ca | 238 | /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8 |
62258278 AS |
239 | * as temporary, so all tcpdump filters need to spill/fill R7(r13) and |
240 | * R8(r14). R9(r15) spill could be made conditional, but there is only | |
241 | * one 'bpf_error' return path out of helper functions inside bpf_jit.S | |
242 | * The overhead of extra spill is negligible for any filter other | |
243 | * than synthetic ones. Therefore not worth adding complexity. | |
244 | */ | |
245 | ||
246 | /* mov qword ptr [rbp-X],r13 */ | |
247 | EMIT3_off32(0x4C, 0x89, 0xAD, -stacksize + 8); | |
248 | /* mov qword ptr [rbp-X],r14 */ | |
249 | EMIT3_off32(0x4C, 0x89, 0xB5, -stacksize + 16); | |
250 | /* mov qword ptr [rbp-X],r15 */ | |
251 | EMIT3_off32(0x4C, 0x89, 0xBD, -stacksize + 24); | |
252 | ||
253 | /* clear A and X registers */ | |
254 | EMIT2(0x31, 0xc0); /* xor eax, eax */ | |
255 | EMIT3(0x4D, 0x31, 0xED); /* xor r13, r13 */ | |
256 | ||
257 | if (ctx->seen_ld_abs) { | |
258 | /* r9d : skb->len - skb->data_len (headlen) | |
259 | * r10 : skb->data | |
260 | */ | |
261 | if (is_imm8(offsetof(struct sk_buff, len))) | |
262 | /* mov %r9d, off8(%rdi) */ | |
263 | EMIT4(0x44, 0x8b, 0x4f, | |
264 | offsetof(struct sk_buff, len)); | |
265 | else | |
266 | /* mov %r9d, off32(%rdi) */ | |
267 | EMIT3_off32(0x44, 0x8b, 0x8f, | |
268 | offsetof(struct sk_buff, len)); | |
269 | ||
270 | if (is_imm8(offsetof(struct sk_buff, data_len))) | |
271 | /* sub %r9d, off8(%rdi) */ | |
272 | EMIT4(0x44, 0x2b, 0x4f, | |
273 | offsetof(struct sk_buff, data_len)); | |
274 | else | |
275 | EMIT3_off32(0x44, 0x2b, 0x8f, | |
276 | offsetof(struct sk_buff, data_len)); | |
277 | ||
278 | if (is_imm8(offsetof(struct sk_buff, data))) | |
279 | /* mov %r10, off8(%rdi) */ | |
280 | EMIT4(0x4c, 0x8b, 0x57, | |
281 | offsetof(struct sk_buff, data)); | |
282 | else | |
283 | /* mov %r10, off32(%rdi) */ | |
284 | EMIT3_off32(0x4c, 0x8b, 0x97, | |
285 | offsetof(struct sk_buff, data)); | |
286 | } | |
287 | ||
288 | for (i = 0; i < insn_cnt; i++, insn++) { | |
e430f34e AS |
289 | const s32 imm32 = insn->imm; |
290 | u32 dst_reg = insn->dst_reg; | |
291 | u32 src_reg = insn->src_reg; | |
62258278 AS |
292 | u8 b1 = 0, b2 = 0, b3 = 0; |
293 | s64 jmp_offset; | |
294 | u8 jmp_cond; | |
295 | int ilen; | |
296 | u8 *func; | |
297 | ||
298 | switch (insn->code) { | |
299 | /* ALU */ | |
300 | case BPF_ALU | BPF_ADD | BPF_X: | |
301 | case BPF_ALU | BPF_SUB | BPF_X: | |
302 | case BPF_ALU | BPF_AND | BPF_X: | |
303 | case BPF_ALU | BPF_OR | BPF_X: | |
304 | case BPF_ALU | BPF_XOR | BPF_X: | |
305 | case BPF_ALU64 | BPF_ADD | BPF_X: | |
306 | case BPF_ALU64 | BPF_SUB | BPF_X: | |
307 | case BPF_ALU64 | BPF_AND | BPF_X: | |
308 | case BPF_ALU64 | BPF_OR | BPF_X: | |
309 | case BPF_ALU64 | BPF_XOR | BPF_X: | |
310 | switch (BPF_OP(insn->code)) { | |
311 | case BPF_ADD: b2 = 0x01; break; | |
312 | case BPF_SUB: b2 = 0x29; break; | |
313 | case BPF_AND: b2 = 0x21; break; | |
314 | case BPF_OR: b2 = 0x09; break; | |
315 | case BPF_XOR: b2 = 0x31; break; | |
0a14842f | 316 | } |
62258278 | 317 | if (BPF_CLASS(insn->code) == BPF_ALU64) |
e430f34e AS |
318 | EMIT1(add_2mod(0x48, dst_reg, src_reg)); |
319 | else if (is_ereg(dst_reg) || is_ereg(src_reg)) | |
320 | EMIT1(add_2mod(0x40, dst_reg, src_reg)); | |
321 | EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg)); | |
62258278 | 322 | break; |
0a14842f | 323 | |
e430f34e | 324 | /* mov dst, src */ |
62258278 | 325 | case BPF_ALU64 | BPF_MOV | BPF_X: |
e430f34e | 326 | EMIT_mov(dst_reg, src_reg); |
0a14842f | 327 | break; |
0a14842f | 328 | |
e430f34e | 329 | /* mov32 dst, src */ |
62258278 | 330 | case BPF_ALU | BPF_MOV | BPF_X: |
e430f34e AS |
331 | if (is_ereg(dst_reg) || is_ereg(src_reg)) |
332 | EMIT1(add_2mod(0x40, dst_reg, src_reg)); | |
333 | EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg)); | |
62258278 | 334 | break; |
0a14842f | 335 | |
e430f34e | 336 | /* neg dst */ |
62258278 AS |
337 | case BPF_ALU | BPF_NEG: |
338 | case BPF_ALU64 | BPF_NEG: | |
339 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
e430f34e AS |
340 | EMIT1(add_1mod(0x48, dst_reg)); |
341 | else if (is_ereg(dst_reg)) | |
342 | EMIT1(add_1mod(0x40, dst_reg)); | |
343 | EMIT2(0xF7, add_1reg(0xD8, dst_reg)); | |
62258278 AS |
344 | break; |
345 | ||
346 | case BPF_ALU | BPF_ADD | BPF_K: | |
347 | case BPF_ALU | BPF_SUB | BPF_K: | |
348 | case BPF_ALU | BPF_AND | BPF_K: | |
349 | case BPF_ALU | BPF_OR | BPF_K: | |
350 | case BPF_ALU | BPF_XOR | BPF_K: | |
351 | case BPF_ALU64 | BPF_ADD | BPF_K: | |
352 | case BPF_ALU64 | BPF_SUB | BPF_K: | |
353 | case BPF_ALU64 | BPF_AND | BPF_K: | |
354 | case BPF_ALU64 | BPF_OR | BPF_K: | |
355 | case BPF_ALU64 | BPF_XOR | BPF_K: | |
356 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
e430f34e AS |
357 | EMIT1(add_1mod(0x48, dst_reg)); |
358 | else if (is_ereg(dst_reg)) | |
359 | EMIT1(add_1mod(0x40, dst_reg)); | |
62258278 AS |
360 | |
361 | switch (BPF_OP(insn->code)) { | |
362 | case BPF_ADD: b3 = 0xC0; break; | |
363 | case BPF_SUB: b3 = 0xE8; break; | |
364 | case BPF_AND: b3 = 0xE0; break; | |
365 | case BPF_OR: b3 = 0xC8; break; | |
366 | case BPF_XOR: b3 = 0xF0; break; | |
367 | } | |
368 | ||
e430f34e AS |
369 | if (is_imm8(imm32)) |
370 | EMIT3(0x83, add_1reg(b3, dst_reg), imm32); | |
62258278 | 371 | else |
e430f34e | 372 | EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32); |
62258278 AS |
373 | break; |
374 | ||
375 | case BPF_ALU64 | BPF_MOV | BPF_K: | |
376 | /* optimization: if imm32 is positive, | |
377 | * use 'mov eax, imm32' (which zero-extends imm32) | |
378 | * to save 2 bytes | |
379 | */ | |
e430f34e | 380 | if (imm32 < 0) { |
62258278 | 381 | /* 'mov rax, imm32' sign extends imm32 */ |
e430f34e | 382 | b1 = add_1mod(0x48, dst_reg); |
62258278 AS |
383 | b2 = 0xC7; |
384 | b3 = 0xC0; | |
e430f34e | 385 | EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32); |
0a14842f | 386 | break; |
62258278 AS |
387 | } |
388 | ||
389 | case BPF_ALU | BPF_MOV | BPF_K: | |
390 | /* mov %eax, imm32 */ | |
e430f34e AS |
391 | if (is_ereg(dst_reg)) |
392 | EMIT1(add_1mod(0x40, dst_reg)); | |
393 | EMIT1_off32(add_1reg(0xB8, dst_reg), imm32); | |
62258278 AS |
394 | break; |
395 | ||
02ab695b AS |
396 | case BPF_LD | BPF_IMM | BPF_DW: |
397 | if (insn[1].code != 0 || insn[1].src_reg != 0 || | |
398 | insn[1].dst_reg != 0 || insn[1].off != 0) { | |
399 | /* verifier must catch invalid insns */ | |
400 | pr_err("invalid BPF_LD_IMM64 insn\n"); | |
401 | return -EINVAL; | |
402 | } | |
403 | ||
404 | /* movabsq %rax, imm64 */ | |
405 | EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg)); | |
406 | EMIT(insn[0].imm, 4); | |
407 | EMIT(insn[1].imm, 4); | |
408 | ||
409 | insn++; | |
410 | i++; | |
411 | break; | |
412 | ||
e430f34e | 413 | /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */ |
62258278 AS |
414 | case BPF_ALU | BPF_MOD | BPF_X: |
415 | case BPF_ALU | BPF_DIV | BPF_X: | |
416 | case BPF_ALU | BPF_MOD | BPF_K: | |
417 | case BPF_ALU | BPF_DIV | BPF_K: | |
418 | case BPF_ALU64 | BPF_MOD | BPF_X: | |
419 | case BPF_ALU64 | BPF_DIV | BPF_X: | |
420 | case BPF_ALU64 | BPF_MOD | BPF_K: | |
421 | case BPF_ALU64 | BPF_DIV | BPF_K: | |
422 | EMIT1(0x50); /* push rax */ | |
423 | EMIT1(0x52); /* push rdx */ | |
424 | ||
425 | if (BPF_SRC(insn->code) == BPF_X) | |
e430f34e AS |
426 | /* mov r11, src_reg */ |
427 | EMIT_mov(AUX_REG, src_reg); | |
62258278 | 428 | else |
e430f34e AS |
429 | /* mov r11, imm32 */ |
430 | EMIT3_off32(0x49, 0xC7, 0xC3, imm32); | |
62258278 | 431 | |
e430f34e AS |
432 | /* mov rax, dst_reg */ |
433 | EMIT_mov(BPF_REG_0, dst_reg); | |
62258278 AS |
434 | |
435 | /* xor edx, edx | |
436 | * equivalent to 'xor rdx, rdx', but one byte less | |
437 | */ | |
438 | EMIT2(0x31, 0xd2); | |
439 | ||
440 | if (BPF_SRC(insn->code) == BPF_X) { | |
e430f34e | 441 | /* if (src_reg == 0) return 0 */ |
62258278 AS |
442 | |
443 | /* cmp r11, 0 */ | |
444 | EMIT4(0x49, 0x83, 0xFB, 0x00); | |
445 | ||
446 | /* jne .+9 (skip over pop, pop, xor and jmp) */ | |
447 | EMIT2(X86_JNE, 1 + 1 + 2 + 5); | |
448 | EMIT1(0x5A); /* pop rdx */ | |
449 | EMIT1(0x58); /* pop rax */ | |
450 | EMIT2(0x31, 0xc0); /* xor eax, eax */ | |
451 | ||
452 | /* jmp cleanup_addr | |
453 | * addrs[i] - 11, because there are 11 bytes | |
454 | * after this insn: div, mov, pop, pop, mov | |
455 | */ | |
456 | jmp_offset = ctx->cleanup_addr - (addrs[i] - 11); | |
457 | EMIT1_off32(0xE9, jmp_offset); | |
458 | } | |
459 | ||
460 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
461 | /* div r11 */ | |
462 | EMIT3(0x49, 0xF7, 0xF3); | |
463 | else | |
464 | /* div r11d */ | |
465 | EMIT3(0x41, 0xF7, 0xF3); | |
466 | ||
467 | if (BPF_OP(insn->code) == BPF_MOD) | |
468 | /* mov r11, rdx */ | |
469 | EMIT3(0x49, 0x89, 0xD3); | |
470 | else | |
471 | /* mov r11, rax */ | |
472 | EMIT3(0x49, 0x89, 0xC3); | |
473 | ||
474 | EMIT1(0x5A); /* pop rdx */ | |
475 | EMIT1(0x58); /* pop rax */ | |
476 | ||
e430f34e AS |
477 | /* mov dst_reg, r11 */ |
478 | EMIT_mov(dst_reg, AUX_REG); | |
62258278 AS |
479 | break; |
480 | ||
481 | case BPF_ALU | BPF_MUL | BPF_K: | |
482 | case BPF_ALU | BPF_MUL | BPF_X: | |
483 | case BPF_ALU64 | BPF_MUL | BPF_K: | |
484 | case BPF_ALU64 | BPF_MUL | BPF_X: | |
485 | EMIT1(0x50); /* push rax */ | |
486 | EMIT1(0x52); /* push rdx */ | |
487 | ||
e430f34e AS |
488 | /* mov r11, dst_reg */ |
489 | EMIT_mov(AUX_REG, dst_reg); | |
62258278 AS |
490 | |
491 | if (BPF_SRC(insn->code) == BPF_X) | |
e430f34e AS |
492 | /* mov rax, src_reg */ |
493 | EMIT_mov(BPF_REG_0, src_reg); | |
62258278 | 494 | else |
e430f34e AS |
495 | /* mov rax, imm32 */ |
496 | EMIT3_off32(0x48, 0xC7, 0xC0, imm32); | |
62258278 AS |
497 | |
498 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
499 | EMIT1(add_1mod(0x48, AUX_REG)); | |
500 | else if (is_ereg(AUX_REG)) | |
501 | EMIT1(add_1mod(0x40, AUX_REG)); | |
502 | /* mul(q) r11 */ | |
503 | EMIT2(0xF7, add_1reg(0xE0, AUX_REG)); | |
504 | ||
505 | /* mov r11, rax */ | |
506 | EMIT_mov(AUX_REG, BPF_REG_0); | |
507 | ||
508 | EMIT1(0x5A); /* pop rdx */ | |
509 | EMIT1(0x58); /* pop rax */ | |
510 | ||
e430f34e AS |
511 | /* mov dst_reg, r11 */ |
512 | EMIT_mov(dst_reg, AUX_REG); | |
62258278 AS |
513 | break; |
514 | ||
515 | /* shifts */ | |
516 | case BPF_ALU | BPF_LSH | BPF_K: | |
517 | case BPF_ALU | BPF_RSH | BPF_K: | |
518 | case BPF_ALU | BPF_ARSH | BPF_K: | |
519 | case BPF_ALU64 | BPF_LSH | BPF_K: | |
520 | case BPF_ALU64 | BPF_RSH | BPF_K: | |
521 | case BPF_ALU64 | BPF_ARSH | BPF_K: | |
522 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
e430f34e AS |
523 | EMIT1(add_1mod(0x48, dst_reg)); |
524 | else if (is_ereg(dst_reg)) | |
525 | EMIT1(add_1mod(0x40, dst_reg)); | |
62258278 AS |
526 | |
527 | switch (BPF_OP(insn->code)) { | |
528 | case BPF_LSH: b3 = 0xE0; break; | |
529 | case BPF_RSH: b3 = 0xE8; break; | |
530 | case BPF_ARSH: b3 = 0xF8; break; | |
531 | } | |
e430f34e | 532 | EMIT3(0xC1, add_1reg(b3, dst_reg), imm32); |
62258278 AS |
533 | break; |
534 | ||
72b603ee AS |
535 | case BPF_ALU | BPF_LSH | BPF_X: |
536 | case BPF_ALU | BPF_RSH | BPF_X: | |
537 | case BPF_ALU | BPF_ARSH | BPF_X: | |
538 | case BPF_ALU64 | BPF_LSH | BPF_X: | |
539 | case BPF_ALU64 | BPF_RSH | BPF_X: | |
540 | case BPF_ALU64 | BPF_ARSH | BPF_X: | |
541 | ||
542 | /* check for bad case when dst_reg == rcx */ | |
543 | if (dst_reg == BPF_REG_4) { | |
544 | /* mov r11, dst_reg */ | |
545 | EMIT_mov(AUX_REG, dst_reg); | |
546 | dst_reg = AUX_REG; | |
547 | } | |
548 | ||
549 | if (src_reg != BPF_REG_4) { /* common case */ | |
550 | EMIT1(0x51); /* push rcx */ | |
551 | ||
552 | /* mov rcx, src_reg */ | |
553 | EMIT_mov(BPF_REG_4, src_reg); | |
554 | } | |
555 | ||
556 | /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */ | |
557 | if (BPF_CLASS(insn->code) == BPF_ALU64) | |
558 | EMIT1(add_1mod(0x48, dst_reg)); | |
559 | else if (is_ereg(dst_reg)) | |
560 | EMIT1(add_1mod(0x40, dst_reg)); | |
561 | ||
562 | switch (BPF_OP(insn->code)) { | |
563 | case BPF_LSH: b3 = 0xE0; break; | |
564 | case BPF_RSH: b3 = 0xE8; break; | |
565 | case BPF_ARSH: b3 = 0xF8; break; | |
566 | } | |
567 | EMIT2(0xD3, add_1reg(b3, dst_reg)); | |
568 | ||
569 | if (src_reg != BPF_REG_4) | |
570 | EMIT1(0x59); /* pop rcx */ | |
571 | ||
572 | if (insn->dst_reg == BPF_REG_4) | |
573 | /* mov dst_reg, r11 */ | |
574 | EMIT_mov(insn->dst_reg, AUX_REG); | |
575 | break; | |
576 | ||
62258278 | 577 | case BPF_ALU | BPF_END | BPF_FROM_BE: |
e430f34e | 578 | switch (imm32) { |
62258278 AS |
579 | case 16: |
580 | /* emit 'ror %ax, 8' to swap lower 2 bytes */ | |
581 | EMIT1(0x66); | |
e430f34e | 582 | if (is_ereg(dst_reg)) |
62258278 | 583 | EMIT1(0x41); |
e430f34e | 584 | EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8); |
62258278 AS |
585 | break; |
586 | case 32: | |
587 | /* emit 'bswap eax' to swap lower 4 bytes */ | |
e430f34e | 588 | if (is_ereg(dst_reg)) |
62258278 | 589 | EMIT2(0x41, 0x0F); |
0a14842f | 590 | else |
62258278 | 591 | EMIT1(0x0F); |
e430f34e | 592 | EMIT1(add_1reg(0xC8, dst_reg)); |
0a14842f | 593 | break; |
62258278 AS |
594 | case 64: |
595 | /* emit 'bswap rax' to swap 8 bytes */ | |
e430f34e AS |
596 | EMIT3(add_1mod(0x48, dst_reg), 0x0F, |
597 | add_1reg(0xC8, dst_reg)); | |
3b58908a ED |
598 | break; |
599 | } | |
62258278 AS |
600 | break; |
601 | ||
602 | case BPF_ALU | BPF_END | BPF_FROM_LE: | |
603 | break; | |
604 | ||
e430f34e | 605 | /* ST: *(u8*)(dst_reg + off) = imm */ |
62258278 | 606 | case BPF_ST | BPF_MEM | BPF_B: |
e430f34e | 607 | if (is_ereg(dst_reg)) |
62258278 AS |
608 | EMIT2(0x41, 0xC6); |
609 | else | |
610 | EMIT1(0xC6); | |
611 | goto st; | |
612 | case BPF_ST | BPF_MEM | BPF_H: | |
e430f34e | 613 | if (is_ereg(dst_reg)) |
62258278 AS |
614 | EMIT3(0x66, 0x41, 0xC7); |
615 | else | |
616 | EMIT2(0x66, 0xC7); | |
617 | goto st; | |
618 | case BPF_ST | BPF_MEM | BPF_W: | |
e430f34e | 619 | if (is_ereg(dst_reg)) |
62258278 AS |
620 | EMIT2(0x41, 0xC7); |
621 | else | |
622 | EMIT1(0xC7); | |
623 | goto st; | |
624 | case BPF_ST | BPF_MEM | BPF_DW: | |
e430f34e | 625 | EMIT2(add_1mod(0x48, dst_reg), 0xC7); |
62258278 AS |
626 | |
627 | st: if (is_imm8(insn->off)) | |
e430f34e | 628 | EMIT2(add_1reg(0x40, dst_reg), insn->off); |
62258278 | 629 | else |
e430f34e | 630 | EMIT1_off32(add_1reg(0x80, dst_reg), insn->off); |
62258278 | 631 | |
e430f34e | 632 | EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code))); |
62258278 AS |
633 | break; |
634 | ||
e430f34e | 635 | /* STX: *(u8*)(dst_reg + off) = src_reg */ |
62258278 AS |
636 | case BPF_STX | BPF_MEM | BPF_B: |
637 | /* emit 'mov byte ptr [rax + off], al' */ | |
e430f34e | 638 | if (is_ereg(dst_reg) || is_ereg(src_reg) || |
62258278 | 639 | /* have to add extra byte for x86 SIL, DIL regs */ |
e430f34e AS |
640 | src_reg == BPF_REG_1 || src_reg == BPF_REG_2) |
641 | EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88); | |
62258278 AS |
642 | else |
643 | EMIT1(0x88); | |
644 | goto stx; | |
645 | case BPF_STX | BPF_MEM | BPF_H: | |
e430f34e AS |
646 | if (is_ereg(dst_reg) || is_ereg(src_reg)) |
647 | EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89); | |
62258278 AS |
648 | else |
649 | EMIT2(0x66, 0x89); | |
650 | goto stx; | |
651 | case BPF_STX | BPF_MEM | BPF_W: | |
e430f34e AS |
652 | if (is_ereg(dst_reg) || is_ereg(src_reg)) |
653 | EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89); | |
62258278 AS |
654 | else |
655 | EMIT1(0x89); | |
656 | goto stx; | |
657 | case BPF_STX | BPF_MEM | BPF_DW: | |
e430f34e | 658 | EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89); |
62258278 | 659 | stx: if (is_imm8(insn->off)) |
e430f34e | 660 | EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off); |
62258278 | 661 | else |
e430f34e | 662 | EMIT1_off32(add_2reg(0x80, dst_reg, src_reg), |
62258278 AS |
663 | insn->off); |
664 | break; | |
665 | ||
e430f34e | 666 | /* LDX: dst_reg = *(u8*)(src_reg + off) */ |
62258278 AS |
667 | case BPF_LDX | BPF_MEM | BPF_B: |
668 | /* emit 'movzx rax, byte ptr [rax + off]' */ | |
e430f34e | 669 | EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6); |
62258278 AS |
670 | goto ldx; |
671 | case BPF_LDX | BPF_MEM | BPF_H: | |
672 | /* emit 'movzx rax, word ptr [rax + off]' */ | |
e430f34e | 673 | EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7); |
62258278 AS |
674 | goto ldx; |
675 | case BPF_LDX | BPF_MEM | BPF_W: | |
676 | /* emit 'mov eax, dword ptr [rax+0x14]' */ | |
e430f34e AS |
677 | if (is_ereg(dst_reg) || is_ereg(src_reg)) |
678 | EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B); | |
62258278 AS |
679 | else |
680 | EMIT1(0x8B); | |
681 | goto ldx; | |
682 | case BPF_LDX | BPF_MEM | BPF_DW: | |
683 | /* emit 'mov rax, qword ptr [rax+0x14]' */ | |
e430f34e | 684 | EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B); |
62258278 AS |
685 | ldx: /* if insn->off == 0 we can save one extra byte, but |
686 | * special case of x86 r13 which always needs an offset | |
687 | * is not worth the hassle | |
688 | */ | |
689 | if (is_imm8(insn->off)) | |
e430f34e | 690 | EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off); |
62258278 | 691 | else |
e430f34e | 692 | EMIT1_off32(add_2reg(0x80, src_reg, dst_reg), |
62258278 AS |
693 | insn->off); |
694 | break; | |
695 | ||
e430f34e | 696 | /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */ |
62258278 AS |
697 | case BPF_STX | BPF_XADD | BPF_W: |
698 | /* emit 'lock add dword ptr [rax + off], eax' */ | |
e430f34e AS |
699 | if (is_ereg(dst_reg) || is_ereg(src_reg)) |
700 | EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01); | |
62258278 AS |
701 | else |
702 | EMIT2(0xF0, 0x01); | |
703 | goto xadd; | |
704 | case BPF_STX | BPF_XADD | BPF_DW: | |
e430f34e | 705 | EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01); |
62258278 | 706 | xadd: if (is_imm8(insn->off)) |
e430f34e | 707 | EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off); |
62258278 | 708 | else |
e430f34e | 709 | EMIT1_off32(add_2reg(0x80, dst_reg, src_reg), |
62258278 AS |
710 | insn->off); |
711 | break; | |
712 | ||
713 | /* call */ | |
714 | case BPF_JMP | BPF_CALL: | |
e430f34e | 715 | func = (u8 *) __bpf_call_base + imm32; |
62258278 AS |
716 | jmp_offset = func - (image + addrs[i]); |
717 | if (ctx->seen_ld_abs) { | |
718 | EMIT2(0x41, 0x52); /* push %r10 */ | |
719 | EMIT2(0x41, 0x51); /* push %r9 */ | |
720 | /* need to adjust jmp offset, since | |
721 | * pop %r9, pop %r10 take 4 bytes after call insn | |
722 | */ | |
723 | jmp_offset += 4; | |
724 | } | |
e430f34e | 725 | if (!imm32 || !is_simm32(jmp_offset)) { |
62258278 | 726 | pr_err("unsupported bpf func %d addr %p image %p\n", |
e430f34e | 727 | imm32, func, image); |
62258278 AS |
728 | return -EINVAL; |
729 | } | |
730 | EMIT1_off32(0xE8, jmp_offset); | |
731 | if (ctx->seen_ld_abs) { | |
732 | EMIT2(0x41, 0x59); /* pop %r9 */ | |
733 | EMIT2(0x41, 0x5A); /* pop %r10 */ | |
734 | } | |
735 | break; | |
736 | ||
737 | /* cond jump */ | |
738 | case BPF_JMP | BPF_JEQ | BPF_X: | |
739 | case BPF_JMP | BPF_JNE | BPF_X: | |
740 | case BPF_JMP | BPF_JGT | BPF_X: | |
741 | case BPF_JMP | BPF_JGE | BPF_X: | |
742 | case BPF_JMP | BPF_JSGT | BPF_X: | |
743 | case BPF_JMP | BPF_JSGE | BPF_X: | |
e430f34e AS |
744 | /* cmp dst_reg, src_reg */ |
745 | EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39, | |
746 | add_2reg(0xC0, dst_reg, src_reg)); | |
62258278 AS |
747 | goto emit_cond_jmp; |
748 | ||
749 | case BPF_JMP | BPF_JSET | BPF_X: | |
e430f34e AS |
750 | /* test dst_reg, src_reg */ |
751 | EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85, | |
752 | add_2reg(0xC0, dst_reg, src_reg)); | |
62258278 AS |
753 | goto emit_cond_jmp; |
754 | ||
755 | case BPF_JMP | BPF_JSET | BPF_K: | |
e430f34e AS |
756 | /* test dst_reg, imm32 */ |
757 | EMIT1(add_1mod(0x48, dst_reg)); | |
758 | EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32); | |
62258278 AS |
759 | goto emit_cond_jmp; |
760 | ||
761 | case BPF_JMP | BPF_JEQ | BPF_K: | |
762 | case BPF_JMP | BPF_JNE | BPF_K: | |
763 | case BPF_JMP | BPF_JGT | BPF_K: | |
764 | case BPF_JMP | BPF_JGE | BPF_K: | |
765 | case BPF_JMP | BPF_JSGT | BPF_K: | |
766 | case BPF_JMP | BPF_JSGE | BPF_K: | |
e430f34e AS |
767 | /* cmp dst_reg, imm8/32 */ |
768 | EMIT1(add_1mod(0x48, dst_reg)); | |
62258278 | 769 | |
e430f34e AS |
770 | if (is_imm8(imm32)) |
771 | EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32); | |
62258278 | 772 | else |
e430f34e | 773 | EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32); |
62258278 AS |
774 | |
775 | emit_cond_jmp: /* convert BPF opcode to x86 */ | |
776 | switch (BPF_OP(insn->code)) { | |
777 | case BPF_JEQ: | |
778 | jmp_cond = X86_JE; | |
779 | break; | |
780 | case BPF_JSET: | |
781 | case BPF_JNE: | |
782 | jmp_cond = X86_JNE; | |
783 | break; | |
784 | case BPF_JGT: | |
785 | /* GT is unsigned '>', JA in x86 */ | |
786 | jmp_cond = X86_JA; | |
787 | break; | |
788 | case BPF_JGE: | |
789 | /* GE is unsigned '>=', JAE in x86 */ | |
790 | jmp_cond = X86_JAE; | |
791 | break; | |
792 | case BPF_JSGT: | |
793 | /* signed '>', GT in x86 */ | |
794 | jmp_cond = X86_JG; | |
795 | break; | |
796 | case BPF_JSGE: | |
797 | /* signed '>=', GE in x86 */ | |
798 | jmp_cond = X86_JGE; | |
799 | break; | |
800 | default: /* to silence gcc warning */ | |
801 | return -EFAULT; | |
802 | } | |
803 | jmp_offset = addrs[i + insn->off] - addrs[i]; | |
804 | if (is_imm8(jmp_offset)) { | |
805 | EMIT2(jmp_cond, jmp_offset); | |
806 | } else if (is_simm32(jmp_offset)) { | |
807 | EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset); | |
808 | } else { | |
809 | pr_err("cond_jmp gen bug %llx\n", jmp_offset); | |
810 | return -EFAULT; | |
811 | } | |
812 | ||
813 | break; | |
0a14842f | 814 | |
62258278 AS |
815 | case BPF_JMP | BPF_JA: |
816 | jmp_offset = addrs[i + insn->off] - addrs[i]; | |
817 | if (!jmp_offset) | |
818 | /* optimize out nop jumps */ | |
819 | break; | |
820 | emit_jmp: | |
821 | if (is_imm8(jmp_offset)) { | |
822 | EMIT2(0xEB, jmp_offset); | |
823 | } else if (is_simm32(jmp_offset)) { | |
824 | EMIT1_off32(0xE9, jmp_offset); | |
825 | } else { | |
826 | pr_err("jmp gen bug %llx\n", jmp_offset); | |
827 | return -EFAULT; | |
828 | } | |
829 | break; | |
830 | ||
831 | case BPF_LD | BPF_IND | BPF_W: | |
832 | func = sk_load_word; | |
833 | goto common_load; | |
834 | case BPF_LD | BPF_ABS | BPF_W: | |
e430f34e | 835 | func = CHOOSE_LOAD_FUNC(imm32, sk_load_word); |
62258278 AS |
836 | common_load: ctx->seen_ld_abs = true; |
837 | jmp_offset = func - (image + addrs[i]); | |
838 | if (!func || !is_simm32(jmp_offset)) { | |
839 | pr_err("unsupported bpf func %d addr %p image %p\n", | |
e430f34e | 840 | imm32, func, image); |
62258278 AS |
841 | return -EINVAL; |
842 | } | |
843 | if (BPF_MODE(insn->code) == BPF_ABS) { | |
844 | /* mov %esi, imm32 */ | |
e430f34e | 845 | EMIT1_off32(0xBE, imm32); |
62258278 | 846 | } else { |
e430f34e AS |
847 | /* mov %rsi, src_reg */ |
848 | EMIT_mov(BPF_REG_2, src_reg); | |
849 | if (imm32) { | |
850 | if (is_imm8(imm32)) | |
62258278 | 851 | /* add %esi, imm8 */ |
e430f34e | 852 | EMIT3(0x83, 0xC6, imm32); |
0a14842f | 853 | else |
62258278 | 854 | /* add %esi, imm32 */ |
e430f34e | 855 | EMIT2_off32(0x81, 0xC6, imm32); |
0a14842f | 856 | } |
62258278 AS |
857 | } |
858 | /* skb pointer is in R6 (%rbx), it will be copied into | |
859 | * %rdi if skb_copy_bits() call is necessary. | |
860 | * sk_load_* helpers also use %r10 and %r9d. | |
861 | * See bpf_jit.S | |
862 | */ | |
863 | EMIT1_off32(0xE8, jmp_offset); /* call */ | |
864 | break; | |
865 | ||
866 | case BPF_LD | BPF_IND | BPF_H: | |
867 | func = sk_load_half; | |
868 | goto common_load; | |
869 | case BPF_LD | BPF_ABS | BPF_H: | |
e430f34e | 870 | func = CHOOSE_LOAD_FUNC(imm32, sk_load_half); |
62258278 AS |
871 | goto common_load; |
872 | case BPF_LD | BPF_IND | BPF_B: | |
873 | func = sk_load_byte; | |
874 | goto common_load; | |
875 | case BPF_LD | BPF_ABS | BPF_B: | |
e430f34e | 876 | func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte); |
62258278 AS |
877 | goto common_load; |
878 | ||
879 | case BPF_JMP | BPF_EXIT: | |
880 | if (i != insn_cnt - 1) { | |
881 | jmp_offset = ctx->cleanup_addr - addrs[i]; | |
882 | goto emit_jmp; | |
883 | } | |
884 | /* update cleanup_addr */ | |
885 | ctx->cleanup_addr = proglen; | |
886 | /* mov rbx, qword ptr [rbp-X] */ | |
887 | EMIT3_off32(0x48, 0x8B, 0x9D, -stacksize); | |
888 | /* mov r13, qword ptr [rbp-X] */ | |
889 | EMIT3_off32(0x4C, 0x8B, 0xAD, -stacksize + 8); | |
890 | /* mov r14, qword ptr [rbp-X] */ | |
891 | EMIT3_off32(0x4C, 0x8B, 0xB5, -stacksize + 16); | |
892 | /* mov r15, qword ptr [rbp-X] */ | |
893 | EMIT3_off32(0x4C, 0x8B, 0xBD, -stacksize + 24); | |
894 | ||
895 | EMIT1(0xC9); /* leave */ | |
896 | EMIT1(0xC3); /* ret */ | |
897 | break; | |
898 | ||
f3c2af7b | 899 | default: |
62258278 AS |
900 | /* By design x64 JIT should support all BPF instructions |
901 | * This error will be seen if new instruction was added | |
902 | * to interpreter, but not to JIT | |
7ae457c1 | 903 | * or if there is junk in bpf_prog |
62258278 AS |
904 | */ |
905 | pr_err("bpf_jit: unknown opcode %02x\n", insn->code); | |
f3c2af7b AS |
906 | return -EINVAL; |
907 | } | |
62258278 | 908 | |
f3c2af7b AS |
909 | ilen = prog - temp; |
910 | if (image) { | |
911 | if (unlikely(proglen + ilen > oldproglen)) { | |
62258278 | 912 | pr_err("bpf_jit_compile fatal error\n"); |
f3c2af7b | 913 | return -EFAULT; |
0a14842f | 914 | } |
f3c2af7b | 915 | memcpy(image + proglen, temp, ilen); |
0a14842f | 916 | } |
f3c2af7b AS |
917 | proglen += ilen; |
918 | addrs[i] = proglen; | |
919 | prog = temp; | |
920 | } | |
f3c2af7b AS |
921 | return proglen; |
922 | } | |
923 | ||
7ae457c1 | 924 | void bpf_jit_compile(struct bpf_prog *prog) |
62258278 AS |
925 | { |
926 | } | |
927 | ||
7ae457c1 | 928 | void bpf_int_jit_compile(struct bpf_prog *prog) |
f3c2af7b AS |
929 | { |
930 | struct bpf_binary_header *header = NULL; | |
931 | int proglen, oldproglen = 0; | |
932 | struct jit_context ctx = {}; | |
933 | u8 *image = NULL; | |
934 | int *addrs; | |
935 | int pass; | |
936 | int i; | |
937 | ||
938 | if (!bpf_jit_enable) | |
939 | return; | |
0a14842f | 940 | |
f3c2af7b AS |
941 | if (!prog || !prog->len) |
942 | return; | |
943 | ||
944 | addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL); | |
945 | if (!addrs) | |
946 | return; | |
947 | ||
948 | /* Before first pass, make a rough estimation of addrs[] | |
949 | * each bpf instruction is translated to less than 64 bytes | |
950 | */ | |
951 | for (proglen = 0, i = 0; i < prog->len; i++) { | |
952 | proglen += 64; | |
953 | addrs[i] = proglen; | |
954 | } | |
955 | ctx.cleanup_addr = proglen; | |
f3c2af7b AS |
956 | |
957 | for (pass = 0; pass < 10; pass++) { | |
958 | proglen = do_jit(prog, addrs, image, oldproglen, &ctx); | |
959 | if (proglen <= 0) { | |
960 | image = NULL; | |
961 | if (header) | |
962 | module_free(NULL, header); | |
963 | goto out; | |
964 | } | |
0a14842f | 965 | if (image) { |
d00a9dd2 | 966 | if (proglen != oldproglen) |
f3c2af7b AS |
967 | pr_err("bpf_jit: proglen=%d != oldproglen=%d\n", |
968 | proglen, oldproglen); | |
0a14842f ED |
969 | break; |
970 | } | |
971 | if (proglen == oldproglen) { | |
314beb9b ED |
972 | header = bpf_alloc_binary(proglen, &image); |
973 | if (!header) | |
0a14842f ED |
974 | goto out; |
975 | } | |
976 | oldproglen = proglen; | |
977 | } | |
79617801 | 978 | |
0a14842f | 979 | if (bpf_jit_enable > 1) |
f3c2af7b | 980 | bpf_jit_dump(prog->len, proglen, 0, image); |
0a14842f ED |
981 | |
982 | if (image) { | |
314beb9b ED |
983 | bpf_flush_icache(header, image + proglen); |
984 | set_memory_ro((unsigned long)header, header->pages); | |
f3c2af7b AS |
985 | prog->bpf_func = (void *)image; |
986 | prog->jited = 1; | |
0a14842f ED |
987 | } |
988 | out: | |
989 | kfree(addrs); | |
0a14842f ED |
990 | } |
991 | ||
60a3b225 | 992 | void bpf_jit_free(struct bpf_prog *fp) |
d45ed4a4 | 993 | { |
d45ed4a4 AS |
994 | unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; |
995 | struct bpf_binary_header *header = (void *)addr; | |
996 | ||
60a3b225 DB |
997 | if (!fp->jited) |
998 | goto free_filter; | |
999 | ||
d45ed4a4 AS |
1000 | set_memory_rw(addr, header->pages); |
1001 | module_free(NULL, header); | |
d45ed4a4 | 1002 | |
60a3b225 DB |
1003 | free_filter: |
1004 | bpf_prog_unlock_free(fp); | |
0a14842f | 1005 | } |