projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /** |
| 2 | * @file op_x86_model.h | |
| 3 | * interface to x86 model-specific MSR operations | |
| 4 | * | |
| 5 | * @remark Copyright 2002 OProfile authors | |
| 6 | * @remark Read the file COPYING | |
| 7 | * | |
| 8 | * @author Graydon Hoare | |
| 3370d358 | 9 | * @author Robert Richter <robert.richter@amd.com> |
| 1da177e4 LT |
10 | */ |
| 11 | ||
| 12 | #ifndef OP_X86_MODEL_H | |
| 13 | #define OP_X86_MODEL_H | |
| 14 | ||
| 3370d358 | 15 | #include <asm/types.h> |
| cdd6c482 | 16 | #include <asm/perf_event.h> |
| ec064c09 | 17 | |
| 1da177e4 | 18 | struct op_msr { |
| 95e74e62 RR |
19 | unsigned long addr; |
| 20 | u64 saved; | |
| 1da177e4 LT |
21 | }; |
| 22 | ||
| 23 | struct op_msrs { | |
| 25ad2913 RR |
24 | struct op_msr *counters; |
| 25 | struct op_msr *controls; | |
| 4d4036e0 | 26 | struct op_msr *multiplex; |
| 1da177e4 LT |
27 | }; |
| 28 | ||
| 29 | struct pt_regs; | |
| 30 | ||
| 3370d358 RR |
31 | struct oprofile_operations; |
| 32 | ||
| 1da177e4 | 33 | /* The model vtable abstracts the differences between |
| 27b46d76 | 34 | * various x86 CPU models' perfctr support. |
| 1da177e4 LT |
35 | */ |
| 36 | struct op_x86_model_spec { | |
| 06552ccc RR |
37 | unsigned int num_counters; |
| 38 | unsigned int num_controls; | |
| 4d4036e0 | 39 | unsigned int num_virt_counters; |
| 3370d358 RR |
40 | u64 reserved; |
| 41 | u16 event_mask; | |
| 06552ccc | 42 | int (*init)(struct oprofile_operations *ops); |
| 8617f98c | 43 | int (*fill_in_addresses)(struct op_msrs * const msrs); |
| ef8828dd RR |
44 | void (*setup_ctrs)(struct op_x86_model_spec const *model, |
| 45 | struct op_msrs const * const msrs); | |
| 06552ccc RR |
46 | int (*check_ctrs)(struct pt_regs * const regs, |
| 47 | struct op_msrs const * const msrs); | |
| 48 | void (*start)(struct op_msrs const * const msrs); | |
| 49 | void (*stop)(struct op_msrs const * const msrs); | |
| 50 | void (*shutdown)(struct op_msrs const * const msrs); | |
| 4d4036e0 JY |
51 | #ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX |
| 52 | void (*switch_ctrl)(struct op_x86_model_spec const *model, | |
| 53 | struct op_msrs const * const msrs); | |
| 54 | #endif | |
| 1da177e4 LT |
55 | }; |
| 56 | ||
| 3370d358 RR |
57 | struct op_counter_config; |
| 58 | ||
| 98a2e73a RR |
59 | static inline void op_x86_warn_in_use(int counter) |
| 60 | { | |
| 8588d106 NC |
61 | /* |
| 62 | * The warning indicates an already running counter. If | |
| 63 | * oprofile doesn't collect data, then try using a different | |
| 64 | * performance counter on your platform to monitor the desired | |
| 65 | * event. Delete counter #%d from the desired event by editing | |
| 66 | * the /usr/share/oprofile/%s/<cpu>/events file. If the event | |
| 67 | * cannot be monitored by any other counter, contact your | |
| 68 | * hardware or BIOS vendor. | |
| 69 | */ | |
| 98a2e73a RR |
70 | pr_warning("oprofile: counter #%d on cpu #%d may already be used\n", |
| 71 | counter, smp_processor_id()); | |
| 72 | } | |
| 73 | ||
| 74 | static inline void op_x86_warn_reserved(int counter) | |
| 75 | { | |
| 76 | pr_warning("oprofile: counter #%d is already reserved\n", counter); | |
| 77 | } | |
| 78 | ||
| 3370d358 RR |
79 | extern u64 op_x86_get_ctrl(struct op_x86_model_spec const *model, |
| 80 | struct op_counter_config *counter_config); | |
| d8471ad3 | 81 | extern int op_x86_phys_to_virt(int phys); |
| 61d149d5 | 82 | extern int op_x86_virt_to_phys(int virt); |
| 3370d358 | 83 | |
| 259a83a8 RR |
84 | extern struct op_x86_model_spec op_ppro_spec; |
| 85 | extern struct op_x86_model_spec op_p4_spec; | |
| 86 | extern struct op_x86_model_spec op_p4_ht2_spec; | |
| 87 | extern struct op_x86_model_spec op_amd_spec; | |
| b9917028 AK |
88 | extern struct op_x86_model_spec op_arch_perfmon_spec; |
| 89 | ||
| 1da177e4 | 90 | #endif /* OP_X86_MODEL_H */ |