[deliverable/linux.git] / arch / x86 / pci / acpi.c

#include <linux/pci.h>
#include <linux/acpi.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/dmi.h>
#include <linux/slab.h>
#include <asm/numa.h>
#include <asm/pci_x86.h>

struct pci_root_info {
	struct acpi_device *bridge;
	char name[16];
	unsigned int res_num;
	struct resource *res;
	resource_size_t *res_offset;
	struct pci_sysdata sd;
#ifdef	CONFIG_PCI_MMCONFIG
	bool mcfg_added;
	u16 segment;
	u8 start_bus;
	u8 end_bus;
#endif
};

static bool pci_use_crs = true;
static bool pci_ignore_seg = false;

static int __init set_use_crs(const struct dmi_system_id *id)
{
	pci_use_crs = true;
	return 0;
}

static int __init set_nouse_crs(const struct dmi_system_id *id)
{
	pci_use_crs = false;
	return 0;
}

static int __init set_ignore_seg(const struct dmi_system_id *id)
{
	printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
	pci_ignore_seg = true;
	return 0;
}

static const struct dmi_system_id pci_crs_quirks[] __initconst = {
	/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
	{
		.callback = set_use_crs,
		.ident = "IBM System x3800",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
			DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
		},
	},
	/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
	/* 2006 AMD HT/VIA system with two host bridges */
        {
		.callback = set_use_crs,
		.ident = "ASRock ALiveSATA2-GLAN",
		.matches = {
			DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
                },
        },
	/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
	/* 2006 AMD HT/VIA system with two host bridges */
	{
		.callback = set_use_crs,
		.ident = "ASUS M2V-MX SE",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
			DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
			DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
		},
	},
	/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
	{
		.callback = set_use_crs,
		.ident = "MSI MS-7253",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
			DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
			DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
		},
	},

	/* Now for the blacklist.. */

	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	{
		.callback = set_nouse_crs,
		.ident = "Dell Studio 1557",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
			DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
			DMI_MATCH(DMI_BIOS_VERSION, "A09"),
		},
	},
	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	{
		.callback = set_nouse_crs,
		.ident = "Thinkpad SL510",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
			DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
			DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
		},
	},

	/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
	{
		.callback = set_ignore_seg,
		.ident = "HP xw9300",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
		},
	},
	{}
};

void __init pci_acpi_crs_quirks(void)
{
	int year;

	if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
		pci_use_crs = false;

	dmi_check_system(pci_crs_quirks);

	/*
	 * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
	 * takes precedence over anything we figured out above.
	 */
	if (pci_probe & PCI_ROOT_NO_CRS)
		pci_use_crs = false;
	else if (pci_probe & PCI_USE__CRS)
		pci_use_crs = true;

	printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
	       "if necessary, use \"pci=%s\" and report a bug\n",
	       pci_use_crs ? "Using" : "Ignoring",
	       pci_use_crs ? "nocrs" : "use_crs");
}

#ifdef	CONFIG_PCI_MMCONFIG
static int check_segment(u16 seg, struct device *dev, char *estr)
{
	if (seg) {
		dev_err(dev,
			"%s can't access PCI configuration "
			"space under this host bridge.\n",
			estr);
		return -EIO;
	}

	/*
	 * Failure in adding MMCFG information is not fatal,
	 * just can't access extended configuration space of
	 * devices under this host bridge.
	 */
	dev_warn(dev,
		 "%s can't access extended PCI configuration "
		 "space under this bridge.\n",
		 estr);

	return 0;
}

static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
			  u8 end, phys_addr_t addr)
{
	int result;
	struct device *dev = &info->bridge->dev;

	info->start_bus = start;
	info->end_bus = end;
	info->mcfg_added = false;

	/* return success if MMCFG is not in use */
	if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
		return 0;

	if (!(pci_probe & PCI_PROBE_MMCONF))
		return check_segment(seg, dev, "MMCONFIG is disabled,");

	result = pci_mmconfig_insert(dev, seg, start, end, addr);
	if (result == 0) {
		/* enable MMCFG if it hasn't been enabled yet */
		if (raw_pci_ext_ops == NULL)
			raw_pci_ext_ops = &pci_mmcfg;
		info->mcfg_added = true;
	} else if (result != -EEXIST)
		return check_segment(seg, dev,
			 "fail to add MMCONFIG information,");

	return 0;
}

static void teardown_mcfg_map(struct pci_root_info *info)
{
	if (info->mcfg_added) {
		pci_mmconfig_delete(info->segment, info->start_bus,
				    info->end_bus);
		info->mcfg_added = false;
	}
}
#else
static int setup_mcfg_map(struct pci_root_info *info,
				    u16 seg, u8 start, u8 end,
				    phys_addr_t addr)
{
	return 0;
}
static void teardown_mcfg_map(struct pci_root_info *info)
{
}
#endif

static acpi_status resource_to_addr(struct acpi_resource *resource,
				    struct acpi_resource_address64 *addr)
{
	acpi_status status;
	struct acpi_resource_memory24 *memory24;
	struct acpi_resource_memory32 *memory32;
	struct acpi_resource_fixed_memory32 *fixed_memory32;

	memset(addr, 0, sizeof(*addr));
	switch (resource->type) {
	case ACPI_RESOURCE_TYPE_MEMORY24:
		memory24 = &resource->data.memory24;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = memory24->minimum;
		addr->address_length = memory24->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_MEMORY32:
		memory32 = &resource->data.memory32;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = memory32->minimum;
		addr->address_length = memory32->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
		fixed_memory32 = &resource->data.fixed_memory32;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = fixed_memory32->address;
		addr->address_length = fixed_memory32->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_ADDRESS16:
	case ACPI_RESOURCE_TYPE_ADDRESS32:
	case ACPI_RESOURCE_TYPE_ADDRESS64:
		status = acpi_resource_to_address64(resource, addr);
		if (ACPI_SUCCESS(status) &&
		    (addr->resource_type == ACPI_MEMORY_RANGE ||
		    addr->resource_type == ACPI_IO_RANGE) &&
		    addr->address_length > 0) {
			return AE_OK;
		}
		break;
	}
	return AE_ERROR;
}

static acpi_status count_resource(struct acpi_resource *acpi_res, void *data)
{
	struct pci_root_info *info = data;
	struct acpi_resource_address64 addr;
	acpi_status status;

	status = resource_to_addr(acpi_res, &addr);
	if (ACPI_SUCCESS(status))
		info->res_num++;
	return AE_OK;
}

static acpi_status setup_resource(struct acpi_resource *acpi_res, void *data)
{
	struct pci_root_info *info = data;
	struct resource *res;
	struct acpi_resource_address64 addr;
	acpi_status status;
	unsigned long flags;
	u64 start, orig_end, end;

	status = resource_to_addr(acpi_res, &addr);
	if (!ACPI_SUCCESS(status))
		return AE_OK;

	if (addr.resource_type == ACPI_MEMORY_RANGE) {
		flags = IORESOURCE_MEM;
		if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
			flags |= IORESOURCE_PREFETCH;
	} else if (addr.resource_type == ACPI_IO_RANGE) {
		flags = IORESOURCE_IO;
	} else
		return AE_OK;

	start = addr.minimum + addr.translation_offset;
	orig_end = end = addr.maximum + addr.translation_offset;

	/* Exclude non-addressable range or non-addressable portion of range */
	end = min(end, (u64)iomem_resource.end);
	if (end <= start) {
		dev_info(&info->bridge->dev,
			"host bridge window [%#llx-%#llx] "
			"(ignored, not CPU addressable)\n", start, orig_end);
		return AE_OK;
	} else if (orig_end != end) {
		dev_info(&info->bridge->dev,
			"host bridge window [%#llx-%#llx] "
			"([%#llx-%#llx] ignored, not CPU addressable)\n", 
			start, orig_end, end + 1, orig_end);
	}

	res = &info->res[info->res_num];
	res->name = info->name;
	res->flags = flags;
	res->start = start;
	res->end = end;
	info->res_offset[info->res_num] = addr.translation_offset;
	info->res_num++;

	if (!pci_use_crs)
		dev_printk(KERN_DEBUG, &info->bridge->dev,
			   "host bridge window %pR (ignored)\n", res);

	return AE_OK;
}

static void coalesce_windows(struct pci_root_info *info, unsigned long type)
{
	int i, j;
	struct resource *res1, *res2;

	for (i = 0; i < info->res_num; i++) {
		res1 = &info->res[i];
		if (!(res1->flags & type))
			continue;

		for (j = i + 1; j < info->res_num; j++) {
			res2 = &info->res[j];
			if (!(res2->flags & type))
				continue;

			/*
			 * I don't like throwing away windows because then
			 * our resources no longer match the ACPI _CRS, but
			 * the kernel resource tree doesn't allow overlaps.
			 */
			if (resource_overlaps(res1, res2)) {
				res2->start = min(res1->start, res2->start);
				res2->end = max(res1->end, res2->end);
				dev_info(&info->bridge->dev,
					 "host bridge window expanded to %pR; %pR ignored\n",
					 res2, res1);
				res1->flags = 0;
			}
		}
	}
}

static void add_resources(struct pci_root_info *info,
			  struct list_head *resources)
{
	int i;
	struct resource *res, *root, *conflict;

	coalesce_windows(info, IORESOURCE_MEM);
	coalesce_windows(info, IORESOURCE_IO);

	for (i = 0; i < info->res_num; i++) {
		res = &info->res[i];

		if (res->flags & IORESOURCE_MEM)
			root = &iomem_resource;
		else if (res->flags & IORESOURCE_IO)
			root = &ioport_resource;
		else
			continue;

		conflict = insert_resource_conflict(root, res);
		if (conflict)
			dev_info(&info->bridge->dev,
				 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
				 res, conflict->name, conflict);
		else
			pci_add_resource_offset(resources, res,
					info->res_offset[i]);
	}
}

static void free_pci_root_info_res(struct pci_root_info *info)
{
	kfree(info->res);
	info->res = NULL;
	kfree(info->res_offset);
	info->res_offset = NULL;
	info->res_num = 0;
}

static void __release_pci_root_info(struct pci_root_info *info)
{
	int i;
	struct resource *res;

	for (i = 0; i < info->res_num; i++) {
		res = &info->res[i];

		if (!res->parent)
			continue;

		if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
			continue;

		release_resource(res);
	}

	free_pci_root_info_res(info);

	teardown_mcfg_map(info);

	kfree(info);
}

static void release_pci_root_info(struct pci_host_bridge *bridge)
{
	struct pci_root_info *info = bridge->release_data;

	__release_pci_root_info(info);
}

static void probe_pci_root_info(struct pci_root_info *info,
				struct acpi_device *device,
				int busnum, int domain)
{
	size_t size;

	sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
	info->bridge = device;

	info->res_num = 0;
	acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
				info);
	if (!info->res_num)
		return;

	size = sizeof(*info->res) * info->res_num;
	info->res = kzalloc(size, GFP_KERNEL);
	if (!info->res) {
		info->res_num = 0;
		return;
	}

	size = sizeof(*info->res_offset) * info->res_num;
	info->res_num = 0;
	info->res_offset = kzalloc(size, GFP_KERNEL);
	if (!info->res_offset) {
		kfree(info->res);
		info->res = NULL;
		return;
	}

	acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
				info);
}

struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
{
	struct acpi_device *device = root->device;
	struct pci_root_info *info;
	int domain = root->segment;
	int busnum = root->secondary.start;
	LIST_HEAD(resources);
	struct pci_bus *bus;
	struct pci_sysdata *sd;
	int node;

	if (pci_ignore_seg)
		domain = 0;

	if (domain && !pci_domains_supported) {
		printk(KERN_WARNING "pci_bus %04x:%02x: "
		       "ignored (multiple domains not supported)\n",
		       domain, busnum);
		return NULL;
	}

	node = acpi_get_node(device->handle);
	if (node == NUMA_NO_NODE) {
		node = x86_pci_root_bus_node(busnum);
		if (node != 0 && node != NUMA_NO_NODE)
			dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
				node);
	}

	if (node != NUMA_NO_NODE && !node_online(node))
		node = NUMA_NO_NODE;

	info = kzalloc(sizeof(*info), GFP_KERNEL);
	if (!info) {
		printk(KERN_WARNING "pci_bus %04x:%02x: "
		       "ignored (out of memory)\n", domain, busnum);
		return NULL;
	}

	sd = &info->sd;
	sd->domain = domain;
	sd->node = node;
	sd->companion = device;

	bus = pci_find_bus(domain, busnum);
	if (bus) {
		/*
		 * If the desired bus has been scanned already, replace
		 * its bus->sysdata.
		 */
		memcpy(bus->sysdata, sd, sizeof(*sd));
		kfree(info);
	} else {
		probe_pci_root_info(info, device, busnum, domain);

		/* insert busn res at first */
		pci_add_resource(&resources,  &root->secondary);
		/*
		 * _CRS with no apertures is normal, so only fall back to
		 * defaults or native bridge info if we're ignoring _CRS.
		 */
		if (pci_use_crs)
			add_resources(info, &resources);
		else {
			free_pci_root_info_res(info);
			x86_pci_root_bus_resources(busnum, &resources);
		}

		if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
				    (u8)root->secondary.end, root->mcfg_addr))
			bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
						  sd, &resources);

		if (bus) {
			pci_scan_child_bus(bus);
			pci_set_host_bridge_release(
				to_pci_host_bridge(bus->bridge),
				release_pci_root_info, info);
		} else {
			pci_free_resource_list(&resources);
			__release_pci_root_info(info);
		}
	}

	/* After the PCI-E bus has been walked and all devices discovered,
	 * configure any settings of the fabric that might be necessary.
	 */
	if (bus) {
		struct pci_bus *child;
		list_for_each_entry(child, &bus->children, node)
			pcie_bus_configure_settings(child);
	}

	if (bus && node != NUMA_NO_NODE)
		dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);

	return bus;
}

int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
{
	struct pci_sysdata *sd = bridge->bus->sysdata;

	ACPI_COMPANION_SET(&bridge->dev, sd->companion);
	return 0;
}

int __init pci_acpi_init(void)
{
	struct pci_dev *dev = NULL;

	if (acpi_noirq)
		return -ENODEV;

	printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
	acpi_irq_penalty_init();
	pcibios_enable_irq = acpi_pci_irq_enable;
	pcibios_disable_irq = acpi_pci_irq_disable;
	x86_init.pci.init_irq = x86_init_noop;

	if (pci_routeirq) {
		/*
		 * PCI IRQ routing is set up by pci_enable_device(), but we
		 * also do it here in case there are still broken drivers that
		 * don't use pci_enable_device().
		 */
		printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
		for_each_pci_dev(dev)
			acpi_pci_irq_enable(dev);
	}

	return 0;
}
Commit	Line	Data
1da177e4 LT	1	#include <linux/pci.h>
	2	#include <linux/acpi.h>
	3	#include <linux/init.h>
b33fa1f3	4	#include <linux/irq.h>
036fff4c	5	#include <linux/dmi.h>
5a0e3ad6	6	#include <linux/slab.h>
69e1a33f	7	#include <asm/numa.h>
82487711	8	#include <asm/pci_x86.h>
1da177e4	9
62f420f8	10	struct pci_root_info {
42887b29	11	struct acpi_device *bridge;
fe05725f	12	char name[16];
62f420f8 GH	13	unsigned int res_num;
62f420f8 GH	14	struct resource *res;
b4873931	15	resource_size_t *res_offset;
35cb05e5	16	struct pci_sysdata sd;
c0fa4078 JL	17	#ifdef CONFIG_PCI_MMCONFIG
	18	bool mcfg_added;
	19	u16 segment;
	20	u8 start_bus;
	21	u8 end_bus;
	22	#endif
62f420f8 GH	23	};
62f420f8 GH	24
7bc5e3f2	25	static bool pci_use_crs = true;
1f09b09b	26	static bool pci_ignore_seg = false;
7bc5e3f2 BH	27
	28	static int __init set_use_crs(const struct dmi_system_id *id)
	29	{
	30	pci_use_crs = true;
	31	return 0;
	32	}
	33
28c3c05d DJ	34	static int __init set_nouse_crs(const struct dmi_system_id *id)
	35	{
	36	pci_use_crs = false;
	37	return 0;
	38	}
	39
1f09b09b BH	40	static int __init set_ignore_seg(const struct dmi_system_id *id)
	41	{
	42	printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
	43	pci_ignore_seg = true;
	44	return 0;
	45	}
	46
	47	static const struct dmi_system_id pci_crs_quirks[] __initconst = {
7bc5e3f2 BH	48	/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
	49	{
	50	.callback = set_use_crs,
	51	.ident = "IBM System x3800",
	52	.matches = {
	53	DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
	54	DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
	55	},
	56	},
2491762c BH	57	/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
	58	/* 2006 AMD HT/VIA system with two host bridges */
	59	{
	60	.callback = set_use_crs,
	61	.ident = "ASRock ALiveSATA2-GLAN",
	62	.matches = {
	63	DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
	64	},
	65	},
29cf7a30 PM	66	/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
	67	/* 2006 AMD HT/VIA system with two host bridges */
	68	{
	69	.callback = set_use_crs,
	70	.ident = "ASUS M2V-MX SE",
	71	.matches = {
	72	DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
	73	DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
	74	DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
	75	},
	76	},
84113717 JN	77	/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
	78	{
	79	.callback = set_use_crs,
	80	.ident = "MSI MS-7253",
	81	.matches = {
	82	DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
	83	DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
	84	DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
84113717 JN	85	},
84113717 JN	86	},
28c3c05d	87
e702781f DJ	88	/* Now for the blacklist.. */
	89
	90	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	91	{
	92	.callback = set_nouse_crs,
	93	.ident = "Dell Studio 1557",
	94	.matches = {
	95	DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
	96	DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
	97	DMI_MATCH(DMI_BIOS_VERSION, "A09"),
	98	},
	99	},
8b6a5af9 DJ	100	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	101	{
	102	.callback = set_nouse_crs,
	103	.ident = "Thinkpad SL510",
	104	.matches = {
	105	DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
	106	DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
	107	DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
	108	},
	109	},
1f09b09b BH	110
	111	/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
	112	{
	113	.callback = set_ignore_seg,
	114	.ident = "HP xw9300",
	115	.matches = {
	116	DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
	117	DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
	118	},
	119	},
7bc5e3f2 BH	120	{}
	121	};
	122
	123	void __init pci_acpi_crs_quirks(void)
	124	{
	125	int year;
	126
	127	if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
	128	pci_use_crs = false;
	129
1f09b09b	130	dmi_check_system(pci_crs_quirks);
7bc5e3f2 BH	131
	132	/*
	133	* If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
	134	* takes precedence over anything we figured out above.
	135	*/
	136	if (pci_probe & PCI_ROOT_NO_CRS)
	137	pci_use_crs = false;
	138	else if (pci_probe & PCI_USE__CRS)
	139	pci_use_crs = true;
	140
	141	printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
	142	"if necessary, use \"pci=%s\" and report a bug\n",
	143	pci_use_crs ? "Using" : "Ignoring",
	144	pci_use_crs ? "nocrs" : "use_crs");
	145	}
	146
c0fa4078	147	#ifdef CONFIG_PCI_MMCONFIG
a18e3690	148	static int check_segment(u16 seg, struct device dev, char estr)
c0fa4078 JL	149	{
	150	if (seg) {
	151	dev_err(dev,
	152	"%s can't access PCI configuration "
	153	"space under this host bridge.\n",
	154	estr);
	155	return -EIO;
	156	}
	157
	158	/*
	159	* Failure in adding MMCFG information is not fatal,
	160	* just can't access extended configuration space of
	161	* devices under this host bridge.
	162	*/
	163	dev_warn(dev,
	164	"%s can't access extended PCI configuration "
	165	"space under this bridge.\n",
	166	estr);
	167
	168	return 0;
	169	}
	170
a18e3690 GKH	171	static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
a18e3690 GKH	172	u8 end, phys_addr_t addr)
c0fa4078 JL	173	{
	174	int result;
	175	struct device *dev = &info->bridge->dev;
	176
	177	info->start_bus = start;
	178	info->end_bus = end;
	179	info->mcfg_added = false;
	180
	181	/* return success if MMCFG is not in use */
	182	if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
	183	return 0;
	184
	185	if (!(pci_probe & PCI_PROBE_MMCONF))
	186	return check_segment(seg, dev, "MMCONFIG is disabled,");
	187
	188	result = pci_mmconfig_insert(dev, seg, start, end, addr);
	189	if (result == 0) {
	190	/* enable MMCFG if it hasn't been enabled yet */
	191	if (raw_pci_ext_ops == NULL)
	192	raw_pci_ext_ops = &pci_mmcfg;
	193	info->mcfg_added = true;
	194	} else if (result != -EEXIST)
	195	return check_segment(seg, dev,
	196	"fail to add MMCONFIG information,");
	197
	198	return 0;
	199	}
	200
	201	static void teardown_mcfg_map(struct pci_root_info *info)
	202	{
	203	if (info->mcfg_added) {
	204	pci_mmconfig_delete(info->segment, info->start_bus,
	205	info->end_bus);
	206	info->mcfg_added = false;
	207	}
	208	}
	209	#else
a18e3690	210	static int setup_mcfg_map(struct pci_root_info *info,
c0fa4078 JL	211	u16 seg, u8 start, u8 end,
	212	phys_addr_t addr)
	213	{
	214	return 0;
	215	}
	216	static void teardown_mcfg_map(struct pci_root_info *info)
	217	{
	218	}
	219	#endif
	220
da5d727c BH	221	static acpi_status resource_to_addr(struct acpi_resource *resource,
da5d727c BH	222	struct acpi_resource_address64 *addr)
62f420f8 GH	223	{
62f420f8 GH	224	acpi_status status;
66528fdd BH	225	struct acpi_resource_memory24 *memory24;
	226	struct acpi_resource_memory32 *memory32;
	227	struct acpi_resource_fixed_memory32 *fixed_memory32;
62f420f8	228
66528fdd BH	229	memset(addr, 0, sizeof(*addr));
	230	switch (resource->type) {
	231	case ACPI_RESOURCE_TYPE_MEMORY24:
	232	memory24 = &resource->data.memory24;
	233	addr->resource_type = ACPI_MEMORY_RANGE;
	234	addr->minimum = memory24->minimum;
	235	addr->address_length = memory24->address_length;
	236	addr->maximum = addr->minimum + addr->address_length - 1;
62f420f8	237	return AE_OK;
66528fdd BH	238	case ACPI_RESOURCE_TYPE_MEMORY32:
	239	memory32 = &resource->data.memory32;
	240	addr->resource_type = ACPI_MEMORY_RANGE;
	241	addr->minimum = memory32->minimum;
	242	addr->address_length = memory32->address_length;
	243	addr->maximum = addr->minimum + addr->address_length - 1;
	244	return AE_OK;
	245	case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
	246	fixed_memory32 = &resource->data.fixed_memory32;
	247	addr->resource_type = ACPI_MEMORY_RANGE;
	248	addr->minimum = fixed_memory32->address;
	249	addr->address_length = fixed_memory32->address_length;
	250	addr->maximum = addr->minimum + addr->address_length - 1;
	251	return AE_OK;
	252	case ACPI_RESOURCE_TYPE_ADDRESS16:
	253	case ACPI_RESOURCE_TYPE_ADDRESS32:
	254	case ACPI_RESOURCE_TYPE_ADDRESS64:
	255	status = acpi_resource_to_address64(resource, addr);
	256	if (ACPI_SUCCESS(status) &&
	257	(addr->resource_type == ACPI_MEMORY_RANGE \|\|
	258	addr->resource_type == ACPI_IO_RANGE) &&
	259	addr->address_length > 0) {
	260	return AE_OK;
	261	}
	262	break;
62f420f8 GH	263	}
	264	return AE_ERROR;
	265	}
	266
da5d727c	267	static acpi_status count_resource(struct acpi_resource acpi_res, void data)
62f420f8 GH	268	{
	269	struct pci_root_info *info = data;
	270	struct acpi_resource_address64 addr;
	271	acpi_status status;
	272
	273	status = resource_to_addr(acpi_res, &addr);
	274	if (ACPI_SUCCESS(status))
	275	info->res_num++;
	276	return AE_OK;
	277	}
	278
da5d727c	279	static acpi_status setup_resource(struct acpi_resource acpi_res, void data)
62f420f8 GH	280	{
	281	struct pci_root_info *info = data;
	282	struct resource *res;
	283	struct acpi_resource_address64 addr;
	284	acpi_status status;
	285	unsigned long flags;
ae5cd864	286	u64 start, orig_end, end;
2cdb3f1d	287
62f420f8 GH	288	status = resource_to_addr(acpi_res, &addr);
	289	if (!ACPI_SUCCESS(status))
	290	return AE_OK;
	291
	292	if (addr.resource_type == ACPI_MEMORY_RANGE) {
62f420f8 GH	293	flags = IORESOURCE_MEM;
	294	if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
	295	flags \|= IORESOURCE_PREFETCH;
	296	} else if (addr.resource_type == ACPI_IO_RANGE) {
62f420f8 GH	297	flags = IORESOURCE_IO;
	298	} else
	299	return AE_OK;
	300
2cdb3f1d	301	start = addr.minimum + addr.translation_offset;
ae5cd864 GH	302	orig_end = end = addr.maximum + addr.translation_offset;
	303
	304	/* Exclude non-addressable range or non-addressable portion of range */
	305	end = min(end, (u64)iomem_resource.end);
	306	if (end <= start) {
	307	dev_info(&info->bridge->dev,
	308	"host bridge window [%#llx-%#llx] "
	309	"(ignored, not CPU addressable)\n", start, orig_end);
	310	return AE_OK;
	311	} else if (orig_end != end) {
	312	dev_info(&info->bridge->dev,
	313	"host bridge window [%#llx-%#llx] "
	314	"([%#llx-%#llx] ignored, not CPU addressable)\n",
	315	start, orig_end, end + 1, orig_end);
	316	}
f9cde5ff	317
2cdb3f1d YL	318	res = &info->res[info->res_num];
	319	res->name = info->name;
	320	res->flags = flags;
	321	res->start = start;
	322	res->end = end;
b4873931	323	info->res_offset[info->res_num] = addr.translation_offset;
ea221e64	324	info->res_num++;
2cdb3f1d	325
ea221e64	326	if (!pci_use_crs)
f1db6fde BH	327	dev_printk(KERN_DEBUG, &info->bridge->dev,
f1db6fde BH	328	"host bridge window %pR (ignored)\n", res);
4723d0f2 BH	329
	330	return AE_OK;
	331	}
	332
6e33a852	333	static void coalesce_windows(struct pci_root_info *info, unsigned long type)
4723d0f2 BH	334	{
	335	int i, j;
	336	struct resource res1, res2;
	337
	338	for (i = 0; i < info->res_num; i++) {
	339	res1 = &info->res[i];
	340	if (!(res1->flags & type))
	341	continue;
	342
	343	for (j = i + 1; j < info->res_num; j++) {
	344	res2 = &info->res[j];
	345	if (!(res2->flags & type))
	346	continue;
	347
	348	/*
	349	* I don't like throwing away windows because then
	350	* our resources no longer match the ACPI _CRS, but
	351	* the kernel resource tree doesn't allow overlaps.
	352	*/
74d24b21	353	if (resource_overlaps(res1, res2)) {
3ad674d6 AN	354	res2->start = min(res1->start, res2->start);
3ad674d6 AN	355	res2->end = max(res1->end, res2->end);
4723d0f2 BH	356	dev_info(&info->bridge->dev,
4723d0f2 BH	357	"host bridge window expanded to %pR; %pR ignored\n",
3ad674d6 AN	358	res2, res1);
3ad674d6 AN	359	res1->flags = 0;
4723d0f2 BH	360	}
	361	}
	362	}
	363	}
	364
9a03d28d YL	365	static void add_resources(struct pci_root_info *info,
9a03d28d YL	366	struct list_head *resources)
4723d0f2 BH	367	{
	368	int i;
	369	struct resource res, root, *conflict;
	370
4723d0f2 BH	371	coalesce_windows(info, IORESOURCE_MEM);
	372	coalesce_windows(info, IORESOURCE_IO);
	373
	374	for (i = 0; i < info->res_num; i++) {
	375	res = &info->res[i];
	376
	377	if (res->flags & IORESOURCE_MEM)
	378	root = &iomem_resource;
	379	else if (res->flags & IORESOURCE_IO)
	380	root = &ioport_resource;
42887b29	381	else
4723d0f2 BH	382	continue;
	383
	384	conflict = insert_resource_conflict(root, res);
	385	if (conflict)
43d786ed BH	386	dev_info(&info->bridge->dev,
	387	"ignoring host bridge window %pR (conflicts with %s %pR)\n",
	388	res, conflict->name, conflict);
4723d0f2	389	else
b4873931 MY	390	pci_add_resource_offset(resources, res,
b4873931 MY	391	info->res_offset[i]);
62f420f8	392	}
62f420f8 GH	393	}
62f420f8 GH	394
fd3b0c1e	395	static void free_pci_root_info_res(struct pci_root_info *info)
baa495d9	396	{
baa495d9	397	kfree(info->res);
fd3b0c1e	398	info->res = NULL;
b4873931 MY	399	kfree(info->res_offset);
b4873931 MY	400	info->res_offset = NULL;
fd3b0c1e YL	401	info->res_num = 0;
	402	}
	403
	404	static void __release_pci_root_info(struct pci_root_info *info)
	405	{
	406	int i;
	407	struct resource *res;
	408
	409	for (i = 0; i < info->res_num; i++) {
	410	res = &info->res[i];
	411
	412	if (!res->parent)
	413	continue;
	414
	415	if (!(res->flags & (IORESOURCE_MEM \| IORESOURCE_IO)))
	416	continue;
	417
	418	release_resource(res);
	419	}
	420
	421	free_pci_root_info_res(info);
	422
c0fa4078 JL	423	teardown_mcfg_map(info);
c0fa4078 JL	424
fd3b0c1e YL	425	kfree(info);
fd3b0c1e YL	426	}
c0fa4078	427
fd3b0c1e YL	428	static void release_pci_root_info(struct pci_host_bridge *bridge)
	429	{
	430	struct pci_root_info *info = bridge->release_data;
	431
	432	__release_pci_root_info(info);
baa495d9 YL	433	}
baa495d9 YL	434
da5d727c BH	435	static void probe_pci_root_info(struct pci_root_info *info,
	436	struct acpi_device *device,
	437	int busnum, int domain)
62f420f8	438	{
62f420f8 GH	439	size_t size;
62f420f8 GH	440
5c1d81d1	441	sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
baa495d9	442	info->bridge = device;
5c1d81d1	443
baa495d9	444	info->res_num = 0;
62f420f8	445	acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
baa495d9 YL	446	info);
baa495d9 YL	447	if (!info->res_num)
62f420f8 GH	448	return;
62f420f8 GH	449
baa495d9	450	size = sizeof(info->res) info->res_num;
4cd8daf0	451	info->res = kzalloc(size, GFP_KERNEL);
b4873931 MY	452	if (!info->res) {
	453	info->res_num = 0;
	454	return;
	455	}
	456
	457	size = sizeof(info->res_offset) info->res_num;
	458	info->res_num = 0;
	459	info->res_offset = kzalloc(size, GFP_KERNEL);
	460	if (!info->res_offset) {
	461	kfree(info->res);
	462	info->res = NULL;
2cd6975a	463	return;
b4873931	464	}
62f420f8	465
62f420f8	466	acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
baa495d9	467	info);
62f420f8 GH	468	}
62f420f8 GH	469
a18e3690	470	struct pci_bus pci_acpi_scan_root(struct acpi_pci_root root)
1da177e4	471	{
57283776	472	struct acpi_device *device = root->device;
8928d5a6	473	struct pci_root_info *info;
57283776 BH	474	int domain = root->segment;
57283776 BH	475	int busnum = root->secondary.start;
2cd6975a	476	LIST_HEAD(resources);
8928d5a6	477	struct pci_bus *bus;
08f1c192	478	struct pci_sysdata *sd;
871d5f8d	479	int node;
08f1c192	480
1f09b09b BH	481	if (pci_ignore_seg)
	482	domain = 0;
	483
a79e4198	484	if (domain && !pci_domains_supported) {
2a6bed83 BH	485	printk(KERN_WARNING "pci_bus %04x:%02x: "
	486	"ignored (multiple domains not supported)\n",
	487	domain, busnum);
a79e4198 JG	488	return NULL;
	489	}
	490
ab6ffce3	491	node = acpi_get_node(device->handle);
33673101	492	if (node == NUMA_NO_NODE) {
6616dbdf	493	node = x86_pci_root_bus_node(busnum);
33673101 MS	494	if (node != 0 && node != NUMA_NO_NODE)
	495	dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
	496	node);
	497	}
b755de8d	498
8a3d01c7 BH	499	if (node != NUMA_NO_NODE && !node_online(node))
8a3d01c7 BH	500	node = NUMA_NO_NODE;
871d5f8d	501
35cb05e5 YL	502	info = kzalloc(sizeof(*info), GFP_KERNEL);
35cb05e5 YL	503	if (!info) {
2a6bed83 BH	504	printk(KERN_WARNING "pci_bus %04x:%02x: "
2a6bed83 BH	505	"ignored (out of memory)\n", domain, busnum);
08f1c192 MBY	506	return NULL;
08f1c192 MBY	507	}
69e1a33f	508
35cb05e5	509	sd = &info->sd;
a79e4198	510	sd->domain = domain;
871d5f8d	511	sd->node = node;
7b199811	512	sd->companion = device;
affbda86	513
b87e81e5	514	bus = pci_find_bus(domain, busnum);
	515	if (bus) {
	516	/*
affbda86 BH	517	* If the desired bus has been scanned already, replace
affbda86 BH	518	* its bus->sysdata.
b87e81e5	519	*/
b87e81e5	520	memcpy(bus->sysdata, sd, sizeof(*sd));
fd3b0c1e	521	kfree(info);
626fdfec	522	} else {
fd3b0c1e	523	probe_pci_root_info(info, device, busnum, domain);
316d86fe	524
5c1d81d1 YL	525	/* insert busn res at first */
5c1d81d1 YL	526	pci_add_resource(&resources, &root->secondary);
316d86fe BH	527	/*
	528	* _CRS with no apertures is normal, so only fall back to
	529	* defaults or native bridge info if we're ignoring _CRS.
	530	*/
9a03d28d	531	if (pci_use_crs)
fd3b0c1e	532	add_resources(info, &resources);
9a03d28d	533	else {
fd3b0c1e	534	free_pci_root_info_res(info);
2cd6975a	535	x86_pci_root_bus_resources(busnum, &resources);
9a03d28d	536	}
fd3b0c1e	537
c0fa4078 JL	538	if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
	539	(u8)root->secondary.end, root->mcfg_addr))
	540	bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
	541	sd, &resources);
	542
fd3b0c1e	543	if (bus) {
5c1d81d1	544	pci_scan_child_bus(bus);
fd3b0c1e YL	545	pci_set_host_bridge_release(
	546	to_pci_host_bridge(bus->bridge),
	547	release_pci_root_info, info);
	548	} else {
2cd6975a	549	pci_free_resource_list(&resources);
fd3b0c1e YL	550	__release_pci_root_info(info);
fd3b0c1e YL	551	}
626fdfec	552	}
08f1c192	553
b03e7495 JM	554	/* After the PCI-E bus has been walked and all devices discovered,
	555	* configure any settings of the fabric that might be necessary.
	556	*/
	557	if (bus) {
	558	struct pci_bus *child;
a58674ff BH	559	list_for_each_entry(child, &bus->children, node)
a58674ff BH	560	pcie_bus_configure_settings(child);
b03e7495 JM	561	}
b03e7495 JM	562
ab6ffce3	563	if (bus && node != NUMA_NO_NODE)
2b8c2efe	564	dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
62f420f8	565
69e1a33f	566	return bus;
1da177e4 LT	567	}
1da177e4 LT	568
6c0cc950 RW	569	int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
	570	{
	571	struct pci_sysdata *sd = bridge->bus->sysdata;
	572
7b199811	573	ACPI_COMPANION_SET(&bridge->dev, sd->companion);
6c0cc950 RW	574	return 0;
	575	}
	576
8dd779b1	577	int __init pci_acpi_init(void)
1da177e4 LT	578	{
	579	struct pci_dev *dev = NULL;
	580
1da177e4	581	if (acpi_noirq)
b72d0db9	582	return -ENODEV;
1da177e4 LT	583
	584	printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
	585	acpi_irq_penalty_init();
1da177e4	586	pcibios_enable_irq = acpi_pci_irq_enable;
87bec66b	587	pcibios_disable_irq = acpi_pci_irq_disable;
ab3b3793	588	x86_init.pci.init_irq = x86_init_noop;
1da177e4 LT	589
	590	if (pci_routeirq) {
	591	/*
	592	* PCI IRQ routing is set up by pci_enable_device(), but we
	593	* also do it here in case there are still broken drivers that
	594	* don't use pci_enable_device().
	595	*/
	596	printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
fb37fb96	597	for_each_pci_dev(dev)
1da177e4	598	acpi_pci_irq_enable(dev);
657472e9	599	}
1da177e4	600
1da177e4 LT	601	return 0;
1da177e4 LT	602	}