Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * mmconfig.c - Low-level direct PCI config space access via MMCONFIG | |
15a58ed1 | 3 | * |
1da177e4 LT |
4 | * This is an 64bit optimized version that always keeps the full mmconfig |
5 | * space mapped. This allows lockless config space operation. | |
6 | */ | |
7 | ||
8 | #include <linux/pci.h> | |
9 | #include <linux/init.h> | |
54549391 | 10 | #include <linux/acpi.h> |
d6ece549 | 11 | #include <linux/bitmap.h> |
376f70ac | 12 | #include <linux/rcupdate.h> |
946f2ee5 | 13 | #include <asm/e820.h> |
82487711 | 14 | #include <asm/pci_x86.h> |
1da177e4 | 15 | |
8c57786a BH |
16 | #define PREFIX "PCI: " |
17 | ||
8b8a4e33 | 18 | static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) |
1cde8a16 | 19 | { |
f6e1d8cc | 20 | struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus); |
a0ca9909 | 21 | |
f6e1d8cc BH |
22 | if (cfg && cfg->virt) |
23 | return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); | |
24 | return NULL; | |
1da177e4 LT |
25 | } |
26 | ||
27 | static int pci_mmcfg_read(unsigned int seg, unsigned int bus, | |
28 | unsigned int devfn, int reg, int len, u32 *value) | |
29 | { | |
8b8a4e33 | 30 | char __iomem *addr; |
1da177e4 | 31 | |
928cf8c6 | 32 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
ecc16ba9 | 33 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { |
a0ca9909 | 34 | err: *value = -1; |
1da177e4 | 35 | return -EINVAL; |
49c93e84 | 36 | } |
1da177e4 | 37 | |
376f70ac | 38 | rcu_read_lock(); |
928cf8c6 | 39 | addr = pci_dev_base(seg, bus, devfn); |
376f70ac JL |
40 | if (!addr) { |
41 | rcu_read_unlock(); | |
a0ca9909 | 42 | goto err; |
376f70ac | 43 | } |
928cf8c6 | 44 | |
1da177e4 LT |
45 | switch (len) { |
46 | case 1: | |
3320ad99 | 47 | *value = mmio_config_readb(addr + reg); |
1da177e4 LT |
48 | break; |
49 | case 2: | |
3320ad99 | 50 | *value = mmio_config_readw(addr + reg); |
1da177e4 LT |
51 | break; |
52 | case 4: | |
3320ad99 | 53 | *value = mmio_config_readl(addr + reg); |
1da177e4 LT |
54 | break; |
55 | } | |
376f70ac | 56 | rcu_read_unlock(); |
1da177e4 LT |
57 | |
58 | return 0; | |
59 | } | |
60 | ||
61 | static int pci_mmcfg_write(unsigned int seg, unsigned int bus, | |
62 | unsigned int devfn, int reg, int len, u32 value) | |
63 | { | |
8b8a4e33 | 64 | char __iomem *addr; |
1da177e4 | 65 | |
928cf8c6 | 66 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
1da177e4 LT |
67 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) |
68 | return -EINVAL; | |
69 | ||
376f70ac | 70 | rcu_read_lock(); |
928cf8c6 | 71 | addr = pci_dev_base(seg, bus, devfn); |
376f70ac JL |
72 | if (!addr) { |
73 | rcu_read_unlock(); | |
a0ca9909 | 74 | return -EINVAL; |
376f70ac | 75 | } |
928cf8c6 | 76 | |
1da177e4 LT |
77 | switch (len) { |
78 | case 1: | |
3320ad99 | 79 | mmio_config_writeb(addr + reg, value); |
1da177e4 LT |
80 | break; |
81 | case 2: | |
3320ad99 | 82 | mmio_config_writew(addr + reg, value); |
1da177e4 LT |
83 | break; |
84 | case 4: | |
3320ad99 | 85 | mmio_config_writel(addr + reg, value); |
1da177e4 LT |
86 | break; |
87 | } | |
376f70ac | 88 | rcu_read_unlock(); |
1da177e4 LT |
89 | |
90 | return 0; | |
91 | } | |
92 | ||
c0fa4078 | 93 | const struct pci_raw_ops pci_mmcfg = { |
1da177e4 LT |
94 | .read = pci_mmcfg_read, |
95 | .write = pci_mmcfg_write, | |
96 | }; | |
97 | ||
a18e3690 | 98 | static void __iomem *mcfg_ioremap(struct pci_mmcfg_region *cfg) |
44de0203 OH |
99 | { |
100 | void __iomem *addr; | |
068258bc | 101 | u64 start, size; |
df5eb1d6 | 102 | int num_buses; |
068258bc | 103 | |
d7e6b66f BH |
104 | start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus); |
105 | num_buses = cfg->end_bus - cfg->start_bus + 1; | |
df5eb1d6 | 106 | size = PCI_MMCFG_BUS_OFFSET(num_buses); |
068258bc | 107 | addr = ioremap_nocache(start, size); |
8c57786a | 108 | if (addr) |
d7e6b66f | 109 | addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus); |
44de0203 OH |
110 | return addr; |
111 | } | |
112 | ||
b7867394 | 113 | int __init pci_mmcfg_arch_init(void) |
1da177e4 | 114 | { |
3f0f5503 | 115 | struct pci_mmcfg_region *cfg; |
b7867394 | 116 | |
9cf0105d JL |
117 | list_for_each_entry(cfg, &pci_mmcfg_list, list) |
118 | if (pci_mmcfg_arch_map(cfg)) { | |
0b64ad71 | 119 | pci_mmcfg_arch_free(); |
b7867394 | 120 | return 0; |
1cde8a16 | 121 | } |
9cf0105d | 122 | |
b6ce068a | 123 | raw_pci_ext_ops = &pci_mmcfg; |
9cf0105d | 124 | |
b7867394 | 125 | return 1; |
1da177e4 | 126 | } |
0b64ad71 YL |
127 | |
128 | void __init pci_mmcfg_arch_free(void) | |
129 | { | |
3f0f5503 | 130 | struct pci_mmcfg_region *cfg; |
0b64ad71 | 131 | |
9cf0105d JL |
132 | list_for_each_entry(cfg, &pci_mmcfg_list, list) |
133 | pci_mmcfg_arch_unmap(cfg); | |
134 | } | |
135 | ||
a18e3690 | 136 | int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg) |
9cf0105d JL |
137 | { |
138 | cfg->virt = mcfg_ioremap(cfg); | |
139 | if (!cfg->virt) { | |
24c97f04 | 140 | pr_err(PREFIX "can't map MMCONFIG at %pR\n", &cfg->res); |
9cf0105d JL |
141 | return -ENOMEM; |
142 | } | |
143 | ||
144 | return 0; | |
145 | } | |
146 | ||
147 | void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg) | |
148 | { | |
149 | if (cfg && cfg->virt) { | |
150 | iounmap(cfg->virt + PCI_MMCFG_BUS_OFFSET(cfg->start_bus)); | |
151 | cfg->virt = NULL; | |
0b64ad71 | 152 | } |
0b64ad71 | 153 | } |