Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * mmconfig.c - Low-level direct PCI config space access via MMCONFIG | |
15a58ed1 | 3 | * |
1da177e4 LT |
4 | * This is an 64bit optimized version that always keeps the full mmconfig |
5 | * space mapped. This allows lockless config space operation. | |
6 | */ | |
7 | ||
8 | #include <linux/pci.h> | |
9 | #include <linux/init.h> | |
54549391 | 10 | #include <linux/acpi.h> |
d6ece549 | 11 | #include <linux/bitmap.h> |
946f2ee5 | 12 | #include <asm/e820.h> |
82487711 | 13 | #include <asm/pci_x86.h> |
1da177e4 | 14 | |
8b8a4e33 | 15 | static char __iomem *get_virt(unsigned int seg, unsigned bus) |
1da177e4 | 16 | { |
d215a9c8 | 17 | struct pci_mmcfg_region *cfg; |
1cde8a16 | 18 | |
ff097ddd | 19 | list_for_each_entry(cfg, &pci_mmcfg_list, list) |
d7e6b66f BH |
20 | if (cfg->segment == seg && |
21 | (cfg->start_bus <= bus) && | |
22 | (cfg->end_bus >= bus)) | |
3f0f5503 | 23 | return cfg->virt; |
3103039c | 24 | |
3103039c | 25 | /* Fall back to type 0 */ |
cc59853b | 26 | return NULL; |
1cde8a16 GKH |
27 | } |
28 | ||
8b8a4e33 | 29 | static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) |
1cde8a16 | 30 | { |
8b8a4e33 | 31 | char __iomem *addr; |
a0ca9909 | 32 | |
d6ece549 | 33 | addr = get_virt(seg, bus); |
928cf8c6 AK |
34 | if (!addr) |
35 | return NULL; | |
df5eb1d6 | 36 | return addr + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); |
1da177e4 LT |
37 | } |
38 | ||
39 | static int pci_mmcfg_read(unsigned int seg, unsigned int bus, | |
40 | unsigned int devfn, int reg, int len, u32 *value) | |
41 | { | |
8b8a4e33 | 42 | char __iomem *addr; |
1da177e4 | 43 | |
928cf8c6 | 44 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
ecc16ba9 | 45 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { |
a0ca9909 | 46 | err: *value = -1; |
1da177e4 | 47 | return -EINVAL; |
49c93e84 | 48 | } |
1da177e4 | 49 | |
928cf8c6 AK |
50 | addr = pci_dev_base(seg, bus, devfn); |
51 | if (!addr) | |
a0ca9909 | 52 | goto err; |
928cf8c6 | 53 | |
1da177e4 LT |
54 | switch (len) { |
55 | case 1: | |
3320ad99 | 56 | *value = mmio_config_readb(addr + reg); |
1da177e4 LT |
57 | break; |
58 | case 2: | |
3320ad99 | 59 | *value = mmio_config_readw(addr + reg); |
1da177e4 LT |
60 | break; |
61 | case 4: | |
3320ad99 | 62 | *value = mmio_config_readl(addr + reg); |
1da177e4 LT |
63 | break; |
64 | } | |
65 | ||
66 | return 0; | |
67 | } | |
68 | ||
69 | static int pci_mmcfg_write(unsigned int seg, unsigned int bus, | |
70 | unsigned int devfn, int reg, int len, u32 value) | |
71 | { | |
8b8a4e33 | 72 | char __iomem *addr; |
1da177e4 | 73 | |
928cf8c6 | 74 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
1da177e4 LT |
75 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) |
76 | return -EINVAL; | |
77 | ||
928cf8c6 AK |
78 | addr = pci_dev_base(seg, bus, devfn); |
79 | if (!addr) | |
a0ca9909 | 80 | return -EINVAL; |
928cf8c6 | 81 | |
1da177e4 LT |
82 | switch (len) { |
83 | case 1: | |
3320ad99 | 84 | mmio_config_writeb(addr + reg, value); |
1da177e4 LT |
85 | break; |
86 | case 2: | |
3320ad99 | 87 | mmio_config_writew(addr + reg, value); |
1da177e4 LT |
88 | break; |
89 | case 4: | |
3320ad99 | 90 | mmio_config_writel(addr + reg, value); |
1da177e4 LT |
91 | break; |
92 | } | |
93 | ||
94 | return 0; | |
95 | } | |
96 | ||
97 | static struct pci_raw_ops pci_mmcfg = { | |
98 | .read = pci_mmcfg_read, | |
99 | .write = pci_mmcfg_write, | |
100 | }; | |
101 | ||
d215a9c8 | 102 | static void __iomem * __init mcfg_ioremap(struct pci_mmcfg_region *cfg) |
44de0203 OH |
103 | { |
104 | void __iomem *addr; | |
068258bc | 105 | u64 start, size; |
df5eb1d6 | 106 | int num_buses; |
068258bc | 107 | |
d7e6b66f BH |
108 | start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus); |
109 | num_buses = cfg->end_bus - cfg->start_bus + 1; | |
df5eb1d6 | 110 | size = PCI_MMCFG_BUS_OFFSET(num_buses); |
068258bc | 111 | addr = ioremap_nocache(start, size); |
44de0203 OH |
112 | if (addr) { |
113 | printk(KERN_INFO "PCI: Using MMCONFIG at %Lx - %Lx\n", | |
068258bc | 114 | start, start + size - 1); |
d7e6b66f | 115 | addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus); |
44de0203 OH |
116 | } |
117 | return addr; | |
118 | } | |
119 | ||
b7867394 | 120 | int __init pci_mmcfg_arch_init(void) |
1da177e4 | 121 | { |
3f0f5503 | 122 | struct pci_mmcfg_region *cfg; |
b7867394 | 123 | |
ff097ddd | 124 | list_for_each_entry(cfg, &pci_mmcfg_list, list) { |
3f0f5503 BH |
125 | cfg->virt = mcfg_ioremap(cfg); |
126 | if (!cfg->virt) { | |
3095fc0c DJ |
127 | printk(KERN_ERR "PCI: Cannot map mmconfig aperture for " |
128 | "segment %d\n", | |
3f0f5503 | 129 | cfg->segment); |
0b64ad71 | 130 | pci_mmcfg_arch_free(); |
b7867394 | 131 | return 0; |
1cde8a16 | 132 | } |
1cde8a16 | 133 | } |
b6ce068a | 134 | raw_pci_ext_ops = &pci_mmcfg; |
b7867394 | 135 | return 1; |
1da177e4 | 136 | } |
0b64ad71 YL |
137 | |
138 | void __init pci_mmcfg_arch_free(void) | |
139 | { | |
3f0f5503 | 140 | struct pci_mmcfg_region *cfg; |
0b64ad71 | 141 | |
ff097ddd | 142 | list_for_each_entry(cfg, &pci_mmcfg_list, list) { |
3f0f5503 BH |
143 | if (cfg->virt) { |
144 | iounmap(cfg->virt + PCI_MMCFG_BUS_OFFSET(cfg->start_bus)); | |
145 | cfg->virt = NULL; | |
0b64ad71 YL |
146 | } |
147 | } | |
0b64ad71 | 148 | } |