Commit | Line | Data |
---|---|---|
b5401a96 | 1 | /* |
996c34ae KRW |
2 | * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and |
3 | * initial domain support. We also handle the DSDT _PRT callbacks for GSI's | |
4 | * used in HVM and initial domain mode (PV does not parse ACPI, so it has no | |
5 | * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and | |
6 | * 0xcf8 PCI configuration read/write. | |
b5401a96 AN |
7 | * |
8 | * Author: Ryan Wilson <hap9@epoch.ncsc.mil> | |
996c34ae KRW |
9 | * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> |
10 | * Stefano Stabellini <stefano.stabellini@eu.citrix.com> | |
b5401a96 AN |
11 | */ |
12 | #include <linux/module.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/pci.h> | |
15 | #include <linux/acpi.h> | |
16 | ||
17 | #include <linux/io.h> | |
0e058e52 | 18 | #include <asm/io_apic.h> |
b5401a96 AN |
19 | #include <asm/pci_x86.h> |
20 | ||
21 | #include <asm/xen/hypervisor.h> | |
22 | ||
3942b740 | 23 | #include <xen/features.h> |
b5401a96 AN |
24 | #include <xen/events.h> |
25 | #include <asm/xen/pci.h> | |
26 | ||
fef6e262 KRW |
27 | static int xen_pcifront_enable_irq(struct pci_dev *dev) |
28 | { | |
29 | int rc; | |
30 | int share = 1; | |
31 | int pirq; | |
32 | u8 gsi; | |
33 | ||
34 | rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); | |
35 | if (rc < 0) { | |
36 | dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", | |
37 | rc); | |
38 | return rc; | |
39 | } | |
40 | ||
41 | rc = xen_allocate_pirq_gsi(gsi); | |
42 | if (rc < 0) { | |
43 | dev_warn(&dev->dev, "Xen PCI: failed to allocate a PIRQ for GSI%d: %d\n", | |
44 | gsi, rc); | |
45 | return rc; | |
46 | } | |
47 | pirq = rc; | |
48 | ||
49 | if (gsi < NR_IRQS_LEGACY) | |
50 | share = 0; | |
51 | ||
52 | rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront"); | |
53 | if (rc < 0) { | |
54 | dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n", | |
55 | gsi, pirq, rc); | |
56 | return rc; | |
57 | } | |
58 | ||
59 | dev->irq = rc; | |
60 | dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq); | |
61 | return 0; | |
62 | } | |
63 | ||
42a1de56 | 64 | #ifdef CONFIG_ACPI |
ed89eb63 KRW |
65 | static int xen_register_pirq(u32 gsi, int gsi_override, int triggering, |
66 | bool alloc_pirq) | |
42a1de56 | 67 | { |
ed89eb63 | 68 | int rc, pirq = -1, irq = -1; |
42a1de56 SS |
69 | struct physdev_map_pirq map_irq; |
70 | int shareable = 0; | |
71 | char *name; | |
72 | ||
ed89eb63 KRW |
73 | if (alloc_pirq) { |
74 | pirq = xen_allocate_pirq_gsi(gsi); | |
75 | if (pirq < 0) | |
76 | goto out; | |
42a1de56 | 77 | } |
fef6e262 KRW |
78 | map_irq.domid = DOMID_SELF; |
79 | map_irq.type = MAP_PIRQ_TYPE_GSI; | |
80 | map_irq.index = gsi; | |
81 | map_irq.pirq = pirq; | |
82 | ||
83 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); | |
84 | if (rc) { | |
85 | printk(KERN_WARNING "xen map irq failed %d\n", rc); | |
86 | return -1; | |
87 | } | |
88 | ||
30bd35ed KRW |
89 | if (triggering == ACPI_EDGE_SENSITIVE) { |
90 | shareable = 0; | |
91 | name = "ioapic-edge"; | |
92 | } else { | |
93 | shareable = 1; | |
94 | name = "ioapic-level"; | |
95 | } | |
96 | ||
97 | if (gsi_override >= 0) | |
98 | gsi = gsi_override; | |
99 | ||
ed89eb63 | 100 | irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name); |
30bd35ed KRW |
101 | if (irq < 0) |
102 | goto out; | |
103 | ||
ed89eb63 | 104 | printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi); |
fef6e262 KRW |
105 | out: |
106 | return irq; | |
107 | } | |
108 | ||
ed89eb63 KRW |
109 | static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, |
110 | int trigger, int polarity) | |
111 | { | |
112 | if (!xen_hvm_domain()) | |
113 | return -1; | |
114 | ||
115 | return xen_register_pirq(gsi, -1 /* no GSI override */, | |
116 | trigger, false /* no PIRQ allocation */); | |
117 | } | |
118 | ||
119 | #ifdef CONFIG_XEN_DOM0 | |
fef6e262 KRW |
120 | static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity) |
121 | { | |
122 | int rc, irq; | |
123 | struct physdev_setup_gsi setup_gsi; | |
124 | ||
125 | if (!xen_pv_domain()) | |
126 | return -1; | |
127 | ||
128 | printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n", | |
129 | gsi, triggering, polarity); | |
130 | ||
ed89eb63 | 131 | irq = xen_register_pirq(gsi, gsi_override, triggering, true); |
fef6e262 KRW |
132 | |
133 | setup_gsi.gsi = gsi; | |
134 | setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); | |
135 | setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
136 | ||
137 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi); | |
138 | if (rc == -EEXIST) | |
139 | printk(KERN_INFO "Already setup the GSI :%d\n", gsi); | |
140 | else if (rc) { | |
141 | printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n", | |
142 | gsi, rc); | |
143 | } | |
144 | ||
145 | return irq; | |
146 | } | |
147 | ||
148 | static int acpi_register_gsi_xen(struct device *dev, u32 gsi, | |
149 | int trigger, int polarity) | |
150 | { | |
151 | return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity); | |
152 | } | |
153 | #endif | |
d92edd81 | 154 | #endif |
fef6e262 | 155 | |
b5401a96 AN |
156 | #if defined(CONFIG_PCI_MSI) |
157 | #include <linux/msi.h> | |
809f9267 | 158 | #include <asm/msidef.h> |
b5401a96 AN |
159 | |
160 | struct xen_pci_frontend_ops *xen_pci_frontend; | |
161 | EXPORT_SYMBOL_GPL(xen_pci_frontend); | |
162 | ||
fef6e262 KRW |
163 | static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
164 | { | |
165 | int irq, ret, i; | |
166 | struct msi_desc *msidesc; | |
167 | int *v; | |
168 | ||
169 | v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL); | |
170 | if (!v) | |
171 | return -ENOMEM; | |
172 | ||
173 | if (type == PCI_CAP_ID_MSIX) | |
174 | ret = xen_pci_frontend_enable_msix(dev, v, nvec); | |
175 | else | |
176 | ret = xen_pci_frontend_enable_msi(dev, v); | |
177 | if (ret) | |
178 | goto error; | |
179 | i = 0; | |
180 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
181 | irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0, | |
182 | (type == PCI_CAP_ID_MSIX) ? | |
183 | "pcifront-msi-x" : | |
184 | "pcifront-msi", | |
185 | DOMID_SELF); | |
186 | if (irq < 0) | |
187 | goto free; | |
188 | i++; | |
189 | } | |
190 | kfree(v); | |
191 | return 0; | |
192 | ||
193 | error: | |
194 | dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n"); | |
195 | free: | |
196 | kfree(v); | |
197 | return ret; | |
198 | } | |
199 | ||
af42b8d1 SS |
200 | #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \ |
201 | MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0)) | |
202 | ||
809f9267 SS |
203 | static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, |
204 | struct msi_msg *msg) | |
205 | { | |
206 | /* We set vector == 0 to tell the hypervisor we don't care about it, | |
207 | * but we want a pirq setup instead. | |
208 | * We use the dest_id field to pass the pirq that we want. */ | |
209 | msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq); | |
210 | msg->address_lo = | |
211 | MSI_ADDR_BASE_LO | | |
212 | MSI_ADDR_DEST_MODE_PHYSICAL | | |
213 | MSI_ADDR_REDIRECTION_CPU | | |
214 | MSI_ADDR_DEST_ID(pirq); | |
215 | ||
af42b8d1 | 216 | msg->data = XEN_PIRQ_MSI_DATA; |
809f9267 SS |
217 | } |
218 | ||
219 | static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |
220 | { | |
bf480d95 | 221 | int irq, pirq; |
809f9267 SS |
222 | struct msi_desc *msidesc; |
223 | struct msi_msg msg; | |
224 | ||
225 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
af42b8d1 SS |
226 | __read_msi_msg(msidesc, &msg); |
227 | pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) | | |
228 | ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff); | |
bf480d95 IC |
229 | if (msg.data != XEN_PIRQ_MSI_DATA || |
230 | xen_irq_from_pirq(pirq) < 0) { | |
231 | pirq = xen_allocate_pirq_msi(dev, msidesc); | |
232 | if (pirq < 0) | |
af42b8d1 | 233 | goto error; |
bf480d95 IC |
234 | xen_msi_compose_msg(dev, pirq, &msg); |
235 | __write_msi_msg(msidesc, &msg); | |
236 | dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq); | |
237 | } else { | |
238 | dev_dbg(&dev->dev, | |
239 | "xen: msi already bound to pirq=%d\n", pirq); | |
af42b8d1 | 240 | } |
ca1d8fe9 | 241 | irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0, |
bf480d95 | 242 | (type == PCI_CAP_ID_MSIX) ? |
beafbdc1 KRW |
243 | "msi-x" : "msi", |
244 | DOMID_SELF); | |
bf480d95 | 245 | if (irq < 0) |
809f9267 | 246 | goto error; |
bf480d95 IC |
247 | dev_dbg(&dev->dev, |
248 | "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq); | |
809f9267 SS |
249 | } |
250 | return 0; | |
251 | ||
809f9267 | 252 | error: |
bf480d95 IC |
253 | dev_err(&dev->dev, |
254 | "Xen PCI frontend has not registered MSI/MSI-X support!\n"); | |
255 | return -ENODEV; | |
809f9267 SS |
256 | } |
257 | ||
260a7d4c | 258 | #ifdef CONFIG_XEN_DOM0 |
f731e3ef QH |
259 | static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
260 | { | |
71eef7d1 | 261 | int ret = 0; |
f731e3ef QH |
262 | struct msi_desc *msidesc; |
263 | ||
264 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
71eef7d1 | 265 | struct physdev_map_pirq map_irq; |
beafbdc1 KRW |
266 | domid_t domid; |
267 | ||
268 | domid = ret = xen_find_device_domain_owner(dev); | |
269 | /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED, | |
270 | * hence check ret value for < 0. */ | |
271 | if (ret < 0) | |
272 | domid = DOMID_SELF; | |
71eef7d1 IC |
273 | |
274 | memset(&map_irq, 0, sizeof(map_irq)); | |
beafbdc1 | 275 | map_irq.domid = domid; |
71eef7d1 IC |
276 | map_irq.type = MAP_PIRQ_TYPE_MSI; |
277 | map_irq.index = -1; | |
278 | map_irq.pirq = -1; | |
279 | map_irq.bus = dev->bus->number; | |
280 | map_irq.devfn = dev->devfn; | |
281 | ||
282 | if (type == PCI_CAP_ID_MSIX) { | |
283 | int pos; | |
284 | u32 table_offset, bir; | |
285 | ||
286 | pos = pci_find_capability(dev, PCI_CAP_ID_MSIX); | |
287 | ||
288 | pci_read_config_dword(dev, pos + PCI_MSIX_TABLE, | |
289 | &table_offset); | |
290 | bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK); | |
291 | ||
292 | map_irq.table_base = pci_resource_start(dev, bir); | |
293 | map_irq.entry_nr = msidesc->msi_attrib.entry_nr; | |
294 | } | |
295 | ||
296 | ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); | |
297 | if (ret) { | |
beafbdc1 KRW |
298 | dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n", |
299 | ret, domid); | |
71eef7d1 IC |
300 | goto out; |
301 | } | |
302 | ||
303 | ret = xen_bind_pirq_msi_to_irq(dev, msidesc, | |
304 | map_irq.pirq, map_irq.index, | |
305 | (type == PCI_CAP_ID_MSIX) ? | |
beafbdc1 KRW |
306 | "msi-x" : "msi", |
307 | domid); | |
71eef7d1 IC |
308 | if (ret < 0) |
309 | goto out; | |
f731e3ef | 310 | } |
71eef7d1 IC |
311 | ret = 0; |
312 | out: | |
313 | return ret; | |
f731e3ef | 314 | } |
b5401a96 AN |
315 | #endif |
316 | ||
fef6e262 | 317 | static void xen_teardown_msi_irqs(struct pci_dev *dev) |
b5401a96 | 318 | { |
fef6e262 | 319 | struct msi_desc *msidesc; |
b5401a96 | 320 | |
fef6e262 KRW |
321 | msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); |
322 | if (msidesc->msi_attrib.is_msix) | |
323 | xen_pci_frontend_disable_msix(dev); | |
324 | else | |
325 | xen_pci_frontend_disable_msi(dev); | |
b5401a96 | 326 | |
fef6e262 KRW |
327 | /* Free the IRQ's and the msidesc using the generic code. */ |
328 | default_teardown_msi_irqs(dev); | |
329 | } | |
f4d0635b | 330 | |
fef6e262 KRW |
331 | static void xen_teardown_msi_irq(unsigned int irq) |
332 | { | |
333 | xen_destroy_irq(irq); | |
334 | } | |
b5401a96 | 335 | |
fef6e262 | 336 | #endif |
3f2a230c | 337 | |
b5401a96 AN |
338 | int __init pci_xen_init(void) |
339 | { | |
340 | if (!xen_pv_domain() || xen_initial_domain()) | |
341 | return -ENODEV; | |
342 | ||
343 | printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n"); | |
344 | ||
345 | pcibios_set_cache_line_size(); | |
346 | ||
347 | pcibios_enable_irq = xen_pcifront_enable_irq; | |
348 | pcibios_disable_irq = NULL; | |
349 | ||
350 | #ifdef CONFIG_ACPI | |
351 | /* Keep ACPI out of the picture */ | |
352 | acpi_noirq = 1; | |
353 | #endif | |
354 | ||
b5401a96 AN |
355 | #ifdef CONFIG_PCI_MSI |
356 | x86_msi.setup_msi_irqs = xen_setup_msi_irqs; | |
357 | x86_msi.teardown_msi_irq = xen_teardown_msi_irq; | |
358 | x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; | |
359 | #endif | |
360 | return 0; | |
361 | } | |
3942b740 SS |
362 | |
363 | int __init pci_xen_hvm_init(void) | |
364 | { | |
365 | if (!xen_feature(XENFEAT_hvm_pirqs)) | |
366 | return 0; | |
367 | ||
368 | #ifdef CONFIG_ACPI | |
369 | /* | |
370 | * We don't want to change the actual ACPI delivery model, | |
371 | * just how GSIs get registered. | |
372 | */ | |
373 | __acpi_register_gsi = acpi_register_gsi_xen_hvm; | |
374 | #endif | |
809f9267 SS |
375 | |
376 | #ifdef CONFIG_PCI_MSI | |
377 | x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; | |
378 | x86_msi.teardown_msi_irq = xen_teardown_msi_irq; | |
379 | #endif | |
3942b740 SS |
380 | return 0; |
381 | } | |
38aa66fc JF |
382 | |
383 | #ifdef CONFIG_XEN_DOM0 | |
38aa66fc JF |
384 | static __init void xen_setup_acpi_sci(void) |
385 | { | |
386 | int rc; | |
387 | int trigger, polarity; | |
388 | int gsi = acpi_sci_override_gsi; | |
ee339fe6 KRW |
389 | int irq = -1; |
390 | int gsi_override = -1; | |
38aa66fc JF |
391 | |
392 | if (!gsi) | |
393 | return; | |
394 | ||
395 | rc = acpi_get_override_irq(gsi, &trigger, &polarity); | |
396 | if (rc) { | |
397 | printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi" | |
398 | " sci, rc=%d\n", rc); | |
399 | return; | |
400 | } | |
401 | trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; | |
402 | polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; | |
996c34ae | 403 | |
38aa66fc JF |
404 | printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d " |
405 | "polarity=%d\n", gsi, trigger, polarity); | |
406 | ||
ee339fe6 KRW |
407 | /* Before we bind the GSI to a Linux IRQ, check whether |
408 | * we need to override it with bus_irq (IRQ) value. Usually for | |
409 | * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so: | |
410 | * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) | |
411 | * but there are oddballs where the IRQ != GSI: | |
412 | * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level) | |
413 | * which ends up being: gsi_to_irq[9] == 20 | |
414 | * (which is what acpi_gsi_to_irq ends up calling when starting the | |
415 | * the ACPI interpreter and keels over since IRQ 9 has not been | |
416 | * setup as we had setup IRQ 20 for it). | |
417 | */ | |
418 | /* Check whether the GSI != IRQ */ | |
419 | if (acpi_gsi_to_irq(gsi, &irq) == 0) { | |
420 | if (irq >= 0 && irq != gsi) | |
421 | /* Bugger, we MUST have that IRQ. */ | |
422 | gsi_override = irq; | |
423 | } | |
424 | ||
425 | gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity); | |
38aa66fc JF |
426 | printk(KERN_INFO "xen: acpi sci %d\n", gsi); |
427 | ||
428 | return; | |
429 | } | |
a0ee0567 KRW |
430 | |
431 | int __init pci_xen_initial_domain(void) | |
38aa66fc | 432 | { |
a0ee0567 KRW |
433 | int pirq, irq; |
434 | ||
f731e3ef QH |
435 | #ifdef CONFIG_PCI_MSI |
436 | x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; | |
437 | x86_msi.teardown_msi_irq = xen_teardown_msi_irq; | |
438 | #endif | |
38aa66fc JF |
439 | xen_setup_acpi_sci(); |
440 | __acpi_register_gsi = acpi_register_gsi_xen; | |
38aa66fc JF |
441 | /* Pre-allocate legacy irqs */ |
442 | for (irq = 0; irq < NR_IRQS_LEGACY; irq++) { | |
443 | int trigger, polarity; | |
444 | ||
445 | if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) | |
446 | continue; | |
447 | ||
ee339fe6 | 448 | xen_register_pirq(irq, -1 /* no GSI override */, |
ed89eb63 KRW |
449 | trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE, |
450 | true /* allocate IRQ */); | |
38aa66fc | 451 | } |
9b6519db KRW |
452 | if (0 == nr_ioapics) { |
453 | for (irq = 0; irq < NR_IRQS_LEGACY; irq++) { | |
454 | pirq = xen_allocate_pirq_gsi(irq); | |
455 | if (WARN(pirq < 0, | |
456 | "Could not allocate PIRQ for legacy interrupt\n")) | |
457 | break; | |
458 | irq = xen_bind_pirq_gsi_to_irq(irq, pirq, 0, "xt-pic"); | |
459 | } | |
460 | } | |
a0ee0567 | 461 | return 0; |
38aa66fc | 462 | } |
c55fa78b KRW |
463 | |
464 | struct xen_device_domain_owner { | |
465 | domid_t domain; | |
466 | struct pci_dev *dev; | |
467 | struct list_head list; | |
468 | }; | |
469 | ||
470 | static DEFINE_SPINLOCK(dev_domain_list_spinlock); | |
471 | static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list); | |
472 | ||
473 | static struct xen_device_domain_owner *find_device(struct pci_dev *dev) | |
474 | { | |
475 | struct xen_device_domain_owner *owner; | |
476 | ||
477 | list_for_each_entry(owner, &dev_domain_list, list) { | |
478 | if (owner->dev == dev) | |
479 | return owner; | |
480 | } | |
481 | return NULL; | |
482 | } | |
483 | ||
484 | int xen_find_device_domain_owner(struct pci_dev *dev) | |
485 | { | |
486 | struct xen_device_domain_owner *owner; | |
487 | int domain = -ENODEV; | |
488 | ||
489 | spin_lock(&dev_domain_list_spinlock); | |
490 | owner = find_device(dev); | |
491 | if (owner) | |
492 | domain = owner->domain; | |
493 | spin_unlock(&dev_domain_list_spinlock); | |
494 | return domain; | |
495 | } | |
496 | EXPORT_SYMBOL_GPL(xen_find_device_domain_owner); | |
497 | ||
498 | int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain) | |
499 | { | |
500 | struct xen_device_domain_owner *owner; | |
501 | ||
502 | owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL); | |
503 | if (!owner) | |
504 | return -ENODEV; | |
505 | ||
506 | spin_lock(&dev_domain_list_spinlock); | |
507 | if (find_device(dev)) { | |
508 | spin_unlock(&dev_domain_list_spinlock); | |
509 | kfree(owner); | |
510 | return -EEXIST; | |
511 | } | |
512 | owner->domain = domain; | |
513 | owner->dev = dev; | |
514 | list_add_tail(&owner->list, &dev_domain_list); | |
515 | spin_unlock(&dev_domain_list_spinlock); | |
516 | return 0; | |
517 | } | |
518 | EXPORT_SYMBOL_GPL(xen_register_device_domain_owner); | |
519 | ||
520 | int xen_unregister_device_domain_owner(struct pci_dev *dev) | |
521 | { | |
522 | struct xen_device_domain_owner *owner; | |
523 | ||
524 | spin_lock(&dev_domain_list_spinlock); | |
525 | owner = find_device(dev); | |
526 | if (!owner) { | |
527 | spin_unlock(&dev_domain_list_spinlock); | |
528 | return -ENODEV; | |
529 | } | |
530 | list_del(&owner->list); | |
531 | spin_unlock(&dev_domain_list_spinlock); | |
532 | kfree(owner); | |
533 | return 0; | |
534 | } | |
535 | EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner); | |
7c1bfd68 | 536 | #endif |