Commit | Line | Data |
---|---|---|
b5401a96 AN |
1 | /* |
2 | * Xen PCI Frontend Stub - puts some "dummy" functions in to the Linux | |
3 | * x86 PCI core to support the Xen PCI Frontend | |
4 | * | |
5 | * Author: Ryan Wilson <hap9@epoch.ncsc.mil> | |
6 | */ | |
7 | #include <linux/module.h> | |
8 | #include <linux/init.h> | |
9 | #include <linux/pci.h> | |
10 | #include <linux/acpi.h> | |
11 | ||
12 | #include <linux/io.h> | |
0e058e52 | 13 | #include <asm/io_apic.h> |
b5401a96 AN |
14 | #include <asm/pci_x86.h> |
15 | ||
16 | #include <asm/xen/hypervisor.h> | |
17 | ||
3942b740 | 18 | #include <xen/features.h> |
b5401a96 AN |
19 | #include <xen/events.h> |
20 | #include <asm/xen/pci.h> | |
21 | ||
42a1de56 | 22 | #ifdef CONFIG_ACPI |
9a626612 IC |
23 | static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi, |
24 | int trigger, int polarity) | |
42a1de56 SS |
25 | { |
26 | int rc, irq; | |
27 | struct physdev_map_pirq map_irq; | |
28 | int shareable = 0; | |
29 | char *name; | |
30 | ||
31 | if (!xen_hvm_domain()) | |
32 | return -1; | |
33 | ||
34 | map_irq.domid = DOMID_SELF; | |
35 | map_irq.type = MAP_PIRQ_TYPE_GSI; | |
36 | map_irq.index = gsi; | |
37 | map_irq.pirq = -1; | |
38 | ||
39 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); | |
40 | if (rc) { | |
41 | printk(KERN_WARNING "xen map irq failed %d\n", rc); | |
42 | return -1; | |
43 | } | |
44 | ||
9a626612 | 45 | if (trigger == ACPI_EDGE_SENSITIVE) { |
42a1de56 SS |
46 | shareable = 0; |
47 | name = "ioapic-edge"; | |
48 | } else { | |
49 | shareable = 1; | |
50 | name = "ioapic-level"; | |
51 | } | |
52 | ||
53 | irq = xen_map_pirq_gsi(map_irq.pirq, gsi, shareable, name); | |
54 | ||
55 | printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq); | |
56 | ||
57 | return irq; | |
58 | } | |
59 | #endif | |
60 | ||
b5401a96 AN |
61 | #if defined(CONFIG_PCI_MSI) |
62 | #include <linux/msi.h> | |
809f9267 | 63 | #include <asm/msidef.h> |
b5401a96 AN |
64 | |
65 | struct xen_pci_frontend_ops *xen_pci_frontend; | |
66 | EXPORT_SYMBOL_GPL(xen_pci_frontend); | |
67 | ||
af42b8d1 SS |
68 | #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \ |
69 | MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0)) | |
70 | ||
809f9267 SS |
71 | static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq, |
72 | struct msi_msg *msg) | |
73 | { | |
74 | /* We set vector == 0 to tell the hypervisor we don't care about it, | |
75 | * but we want a pirq setup instead. | |
76 | * We use the dest_id field to pass the pirq that we want. */ | |
77 | msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq); | |
78 | msg->address_lo = | |
79 | MSI_ADDR_BASE_LO | | |
80 | MSI_ADDR_DEST_MODE_PHYSICAL | | |
81 | MSI_ADDR_REDIRECTION_CPU | | |
82 | MSI_ADDR_DEST_ID(pirq); | |
83 | ||
af42b8d1 | 84 | msg->data = XEN_PIRQ_MSI_DATA; |
809f9267 SS |
85 | } |
86 | ||
87 | static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |
88 | { | |
89 | int irq, pirq, ret = 0; | |
90 | struct msi_desc *msidesc; | |
91 | struct msi_msg msg; | |
92 | ||
93 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
af42b8d1 SS |
94 | __read_msi_msg(msidesc, &msg); |
95 | pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) | | |
96 | ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff); | |
97 | if (xen_irq_from_pirq(pirq) >= 0 && msg.data == XEN_PIRQ_MSI_DATA) { | |
4b41df7f IC |
98 | irq = xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? |
99 | "msi-x" : "msi", &pirq, 0); | |
af42b8d1 SS |
100 | if (irq < 0) |
101 | goto error; | |
102 | ret = set_irq_msi(irq, msidesc); | |
103 | if (ret < 0) | |
104 | goto error_while; | |
105 | printk(KERN_DEBUG "xen: msi already setup: msi --> irq=%d" | |
106 | " pirq=%d\n", irq, pirq); | |
107 | return 0; | |
108 | } | |
4b41df7f IC |
109 | irq = xen_allocate_pirq_msi((type == PCI_CAP_ID_MSIX) ? |
110 | "msi-x" : "msi", &pirq, 1); | |
809f9267 SS |
111 | if (irq < 0 || pirq < 0) |
112 | goto error; | |
113 | printk(KERN_DEBUG "xen: msi --> irq=%d, pirq=%d\n", irq, pirq); | |
114 | xen_msi_compose_msg(dev, pirq, &msg); | |
115 | ret = set_irq_msi(irq, msidesc); | |
116 | if (ret < 0) | |
117 | goto error_while; | |
118 | write_msi_msg(irq, &msg); | |
119 | } | |
120 | return 0; | |
121 | ||
122 | error_while: | |
123 | unbind_from_irqhandler(irq, NULL); | |
124 | error: | |
125 | if (ret == -ENODEV) | |
126 | dev_err(&dev->dev, "Xen PCI frontend has not registered" \ | |
127 | " MSI/MSI-X support!\n"); | |
128 | ||
129 | return ret; | |
130 | } | |
131 | ||
b5401a96 AN |
132 | /* |
133 | * For MSI interrupts we have to use drivers/xen/event.s functions to | |
134 | * allocate an irq_desc and setup the right */ | |
135 | ||
136 | ||
137 | static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |
138 | { | |
139 | int irq, ret, i; | |
140 | struct msi_desc *msidesc; | |
141 | int *v; | |
142 | ||
143 | v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL); | |
144 | if (!v) | |
145 | return -ENOMEM; | |
146 | ||
f731e3ef | 147 | if (type == PCI_CAP_ID_MSIX) |
cc0f89c4 | 148 | ret = xen_pci_frontend_enable_msix(dev, v, nvec); |
f731e3ef | 149 | else |
cc0f89c4 | 150 | ret = xen_pci_frontend_enable_msi(dev, v); |
f731e3ef QH |
151 | if (ret) |
152 | goto error; | |
b5401a96 AN |
153 | i = 0; |
154 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
4b41df7f | 155 | irq = xen_allocate_pirq_msi( |
b5401a96 | 156 | (type == PCI_CAP_ID_MSIX) ? |
55cb8cd4 | 157 | "pcifront-msi-x" : "pcifront-msi", |
4b41df7f | 158 | &v[i], 0); |
07cf2a64 JS |
159 | if (irq < 0) { |
160 | ret = -1; | |
161 | goto free; | |
162 | } | |
b5401a96 AN |
163 | ret = set_irq_msi(irq, msidesc); |
164 | if (ret) | |
165 | goto error_while; | |
166 | i++; | |
167 | } | |
168 | kfree(v); | |
169 | return 0; | |
170 | ||
171 | error_while: | |
172 | unbind_from_irqhandler(irq, NULL); | |
173 | error: | |
174 | if (ret == -ENODEV) | |
175 | dev_err(&dev->dev, "Xen PCI frontend has not registered" \ | |
176 | " MSI/MSI-X support!\n"); | |
07cf2a64 | 177 | free: |
b5401a96 AN |
178 | kfree(v); |
179 | return ret; | |
180 | } | |
181 | ||
182 | static void xen_teardown_msi_irqs(struct pci_dev *dev) | |
183 | { | |
f731e3ef | 184 | struct msi_desc *msidesc; |
b5401a96 | 185 | |
f731e3ef QH |
186 | msidesc = list_entry(dev->msi_list.next, struct msi_desc, list); |
187 | if (msidesc->msi_attrib.is_msix) | |
188 | xen_pci_frontend_disable_msix(dev); | |
189 | else | |
190 | xen_pci_frontend_disable_msi(dev); | |
3d74a539 KRW |
191 | |
192 | /* Free the IRQ's and the msidesc using the generic code. */ | |
193 | default_teardown_msi_irqs(dev); | |
b5401a96 AN |
194 | } |
195 | ||
196 | static void xen_teardown_msi_irq(unsigned int irq) | |
197 | { | |
198 | xen_destroy_irq(irq); | |
199 | } | |
f731e3ef | 200 | |
260a7d4c | 201 | #ifdef CONFIG_XEN_DOM0 |
f731e3ef QH |
202 | static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) |
203 | { | |
204 | int irq, ret; | |
205 | struct msi_desc *msidesc; | |
206 | ||
207 | list_for_each_entry(msidesc, &dev->msi_list, list) { | |
208 | irq = xen_create_msi_irq(dev, msidesc, type); | |
209 | if (irq < 0) | |
210 | return -1; | |
211 | ||
212 | ret = set_irq_msi(irq, msidesc); | |
213 | if (ret) | |
214 | goto error; | |
215 | } | |
216 | return 0; | |
217 | ||
218 | error: | |
219 | xen_destroy_irq(irq); | |
220 | return ret; | |
221 | } | |
b5401a96 | 222 | #endif |
260a7d4c | 223 | #endif |
b5401a96 AN |
224 | |
225 | static int xen_pcifront_enable_irq(struct pci_dev *dev) | |
226 | { | |
227 | int rc; | |
228 | int share = 1; | |
3f2a230c | 229 | u8 gsi; |
b5401a96 | 230 | |
3f2a230c IC |
231 | rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); |
232 | if (rc < 0) { | |
233 | dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", | |
234 | rc); | |
235 | return rc; | |
236 | } | |
b5401a96 | 237 | |
3f2a230c | 238 | if (gsi < NR_IRQS_LEGACY) |
b5401a96 AN |
239 | share = 0; |
240 | ||
3f2a230c | 241 | rc = xen_allocate_pirq(gsi, share, "pcifront"); |
b5401a96 | 242 | if (rc < 0) { |
3f2a230c IC |
243 | dev_warn(&dev->dev, "Xen PCI: failed to register GSI%d: %d\n", |
244 | gsi, rc); | |
b5401a96 AN |
245 | return rc; |
246 | } | |
3f2a230c IC |
247 | |
248 | dev->irq = rc; | |
249 | dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq); | |
b5401a96 AN |
250 | return 0; |
251 | } | |
252 | ||
253 | int __init pci_xen_init(void) | |
254 | { | |
255 | if (!xen_pv_domain() || xen_initial_domain()) | |
256 | return -ENODEV; | |
257 | ||
258 | printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n"); | |
259 | ||
260 | pcibios_set_cache_line_size(); | |
261 | ||
262 | pcibios_enable_irq = xen_pcifront_enable_irq; | |
263 | pcibios_disable_irq = NULL; | |
264 | ||
265 | #ifdef CONFIG_ACPI | |
266 | /* Keep ACPI out of the picture */ | |
267 | acpi_noirq = 1; | |
268 | #endif | |
269 | ||
b5401a96 AN |
270 | #ifdef CONFIG_PCI_MSI |
271 | x86_msi.setup_msi_irqs = xen_setup_msi_irqs; | |
272 | x86_msi.teardown_msi_irq = xen_teardown_msi_irq; | |
273 | x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs; | |
274 | #endif | |
275 | return 0; | |
276 | } | |
3942b740 SS |
277 | |
278 | int __init pci_xen_hvm_init(void) | |
279 | { | |
280 | if (!xen_feature(XENFEAT_hvm_pirqs)) | |
281 | return 0; | |
282 | ||
283 | #ifdef CONFIG_ACPI | |
284 | /* | |
285 | * We don't want to change the actual ACPI delivery model, | |
286 | * just how GSIs get registered. | |
287 | */ | |
288 | __acpi_register_gsi = acpi_register_gsi_xen_hvm; | |
289 | #endif | |
809f9267 SS |
290 | |
291 | #ifdef CONFIG_PCI_MSI | |
292 | x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs; | |
293 | x86_msi.teardown_msi_irq = xen_teardown_msi_irq; | |
294 | #endif | |
3942b740 SS |
295 | return 0; |
296 | } | |
38aa66fc JF |
297 | |
298 | #ifdef CONFIG_XEN_DOM0 | |
299 | static int xen_register_pirq(u32 gsi, int triggering) | |
300 | { | |
301 | int rc, irq; | |
302 | struct physdev_map_pirq map_irq; | |
303 | int shareable = 0; | |
304 | char *name; | |
305 | ||
306 | if (!xen_pv_domain()) | |
307 | return -1; | |
308 | ||
309 | if (triggering == ACPI_EDGE_SENSITIVE) { | |
310 | shareable = 0; | |
311 | name = "ioapic-edge"; | |
312 | } else { | |
313 | shareable = 1; | |
314 | name = "ioapic-level"; | |
315 | } | |
316 | ||
317 | irq = xen_allocate_pirq(gsi, shareable, name); | |
318 | ||
319 | printk(KERN_DEBUG "xen: --> irq=%d\n", irq); | |
320 | ||
321 | if (irq < 0) | |
322 | goto out; | |
323 | ||
324 | map_irq.domid = DOMID_SELF; | |
325 | map_irq.type = MAP_PIRQ_TYPE_GSI; | |
326 | map_irq.index = gsi; | |
327 | map_irq.pirq = irq; | |
328 | ||
329 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq); | |
330 | if (rc) { | |
331 | printk(KERN_WARNING "xen map irq failed %d\n", rc); | |
332 | return -1; | |
333 | } | |
334 | ||
335 | out: | |
336 | return irq; | |
337 | } | |
338 | ||
339 | static int xen_register_gsi(u32 gsi, int triggering, int polarity) | |
340 | { | |
341 | int rc, irq; | |
342 | struct physdev_setup_gsi setup_gsi; | |
343 | ||
344 | if (!xen_pv_domain()) | |
345 | return -1; | |
346 | ||
347 | printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n", | |
348 | gsi, triggering, polarity); | |
349 | ||
350 | irq = xen_register_pirq(gsi, triggering); | |
351 | ||
352 | setup_gsi.gsi = gsi; | |
353 | setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1); | |
354 | setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
355 | ||
356 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi); | |
357 | if (rc == -EEXIST) | |
358 | printk(KERN_INFO "Already setup the GSI :%d\n", gsi); | |
359 | else if (rc) { | |
360 | printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n", | |
361 | gsi, rc); | |
362 | } | |
363 | ||
364 | return irq; | |
365 | } | |
366 | ||
367 | static __init void xen_setup_acpi_sci(void) | |
368 | { | |
369 | int rc; | |
370 | int trigger, polarity; | |
371 | int gsi = acpi_sci_override_gsi; | |
372 | ||
373 | if (!gsi) | |
374 | return; | |
375 | ||
376 | rc = acpi_get_override_irq(gsi, &trigger, &polarity); | |
377 | if (rc) { | |
378 | printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi" | |
379 | " sci, rc=%d\n", rc); | |
380 | return; | |
381 | } | |
382 | trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; | |
383 | polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; | |
384 | ||
385 | printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d " | |
386 | "polarity=%d\n", gsi, trigger, polarity); | |
387 | ||
388 | gsi = xen_register_gsi(gsi, trigger, polarity); | |
389 | printk(KERN_INFO "xen: acpi sci %d\n", gsi); | |
390 | ||
391 | return; | |
392 | } | |
393 | ||
394 | static int acpi_register_gsi_xen(struct device *dev, u32 gsi, | |
395 | int trigger, int polarity) | |
396 | { | |
397 | return xen_register_gsi(gsi, trigger, polarity); | |
398 | } | |
399 | ||
400 | static int __init pci_xen_initial_domain(void) | |
401 | { | |
f731e3ef QH |
402 | #ifdef CONFIG_PCI_MSI |
403 | x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs; | |
404 | x86_msi.teardown_msi_irq = xen_teardown_msi_irq; | |
405 | #endif | |
38aa66fc JF |
406 | xen_setup_acpi_sci(); |
407 | __acpi_register_gsi = acpi_register_gsi_xen; | |
408 | ||
409 | return 0; | |
410 | } | |
411 | ||
412 | void __init xen_setup_pirqs(void) | |
413 | { | |
414 | int irq; | |
415 | ||
416 | pci_xen_initial_domain(); | |
417 | ||
418 | if (0 == nr_ioapics) { | |
419 | for (irq = 0; irq < NR_IRQS_LEGACY; irq++) | |
420 | xen_allocate_pirq(irq, 0, "xt-pic"); | |
421 | return; | |
422 | } | |
423 | ||
424 | /* Pre-allocate legacy irqs */ | |
425 | for (irq = 0; irq < NR_IRQS_LEGACY; irq++) { | |
426 | int trigger, polarity; | |
427 | ||
428 | if (acpi_get_override_irq(irq, &trigger, &polarity) == -1) | |
429 | continue; | |
430 | ||
431 | xen_register_pirq(irq, | |
432 | trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE); | |
433 | } | |
434 | } | |
435 | #endif |