arch: Cleanup read_barrier_depends() and comments
[deliverable/linux.git] / arch / x86 / um / asm / barrier.h
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1#ifndef _ASM_UM_BARRIER_H_
2#define _ASM_UM_BARRIER_H_
3
4#include <asm/asm.h>
5#include <asm/segment.h>
6#include <asm/cpufeature.h>
7#include <asm/cmpxchg.h>
8#include <asm/nops.h>
9
10#include <linux/kernel.h>
11#include <linux/irqflags.h>
12
13/*
14 * Force strict CPU ordering.
15 * And yes, this is required on UP too when we're talking
16 * to devices.
17 */
18#ifdef CONFIG_X86_32
19
20#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
21#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
22#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
23
24#else /* CONFIG_X86_32 */
25
26#define mb() asm volatile("mfence" : : : "memory")
27#define rmb() asm volatile("lfence" : : : "memory")
28#define wmb() asm volatile("sfence" : : : "memory")
29
30#endif /* CONFIG_X86_32 */
31
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32#ifdef CONFIG_SMP
33
34#define smp_mb() mb()
35#ifdef CONFIG_X86_PPRO_FENCE
36#define smp_rmb() rmb()
37#else /* CONFIG_X86_PPRO_FENCE */
38#define smp_rmb() barrier()
39#endif /* CONFIG_X86_PPRO_FENCE */
40
a3a85a76 41#define smp_wmb() barrier()
a3a85a76 42
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43#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
44
45#else /* CONFIG_SMP */
46
47#define smp_mb() barrier()
48#define smp_rmb() barrier()
49#define smp_wmb() barrier()
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50#define set_mb(var, value) do { var = value; barrier(); } while (0)
51
52#endif /* CONFIG_SMP */
53
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54#define read_barrier_depends() do { } while (0)
55#define smp_read_barrier_depends() do { } while (0)
56
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57/*
58 * Stop RDTSC speculation. This is needed when you need to use RDTSC
59 * (or get_cycles or vread that possibly accesses the TSC) in a defined
60 * code region.
61 *
62 * (Could use an alternative three way for this if there was one.)
63 */
64static inline void rdtsc_barrier(void)
65{
66 alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
67 alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
68}
69
70#endif
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