Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
5ead97c8 | 34 | |
1ccbf534 | 35 | #include <xen/xen.h> |
0ec53ecf | 36 | #include <xen/events.h> |
5ead97c8 | 37 | #include <xen/interface/xen.h> |
ecbf29cd | 38 | #include <xen/interface/version.h> |
5ead97c8 JF |
39 | #include <xen/interface/physdev.h> |
40 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 41 | #include <xen/interface/memory.h> |
cef12ee5 | 42 | #include <xen/interface/xen-mca.h> |
5ead97c8 JF |
43 | #include <xen/features.h> |
44 | #include <xen/page.h> | |
38e20b07 | 45 | #include <xen/hvm.h> |
084a2a4e | 46 | #include <xen/hvc-console.h> |
211063dc | 47 | #include <xen/acpi.h> |
5ead97c8 JF |
48 | |
49 | #include <asm/paravirt.h> | |
7b6aa335 | 50 | #include <asm/apic.h> |
5ead97c8 | 51 | #include <asm/page.h> |
b5401a96 | 52 | #include <asm/xen/pci.h> |
5ead97c8 JF |
53 | #include <asm/xen/hypercall.h> |
54 | #include <asm/xen/hypervisor.h> | |
55 | #include <asm/fixmap.h> | |
56 | #include <asm/processor.h> | |
707ebbc8 | 57 | #include <asm/proto.h> |
1153968a | 58 | #include <asm/msr-index.h> |
6cac5a92 | 59 | #include <asm/traps.h> |
5ead97c8 JF |
60 | #include <asm/setup.h> |
61 | #include <asm/desc.h> | |
817a824b | 62 | #include <asm/pgalloc.h> |
5ead97c8 | 63 | #include <asm/pgtable.h> |
f87e4cac | 64 | #include <asm/tlbflush.h> |
fefa629a | 65 | #include <asm/reboot.h> |
577eebea | 66 | #include <asm/stackprotector.h> |
bee6ab53 | 67 | #include <asm/hypervisor.h> |
73c154c6 | 68 | #include <asm/mwait.h> |
76a8df7b | 69 | #include <asm/pci_x86.h> |
73c154c6 KRW |
70 | |
71 | #ifdef CONFIG_ACPI | |
72 | #include <linux/acpi.h> | |
73 | #include <asm/acpi.h> | |
74 | #include <acpi/pdc_intel.h> | |
75 | #include <acpi/processor.h> | |
76 | #include <xen/interface/platform.h> | |
77 | #endif | |
5ead97c8 JF |
78 | |
79 | #include "xen-ops.h" | |
3b827c1b | 80 | #include "mmu.h" |
f447d56d | 81 | #include "smp.h" |
5ead97c8 JF |
82 | #include "multicalls.h" |
83 | ||
84 | EXPORT_SYMBOL_GPL(hypercall_page); | |
85 | ||
5ead97c8 JF |
86 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
87 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 88 | |
6e833587 JF |
89 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
90 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
91 | ||
7e77506a IC |
92 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
93 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
94 | unsigned long machine_to_phys_nr; |
95 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 96 | |
5ead97c8 JF |
97 | struct start_info *xen_start_info; |
98 | EXPORT_SYMBOL_GPL(xen_start_info); | |
99 | ||
a0d695c8 | 100 | struct shared_info xen_dummy_shared_info; |
60223a32 | 101 | |
38341432 JF |
102 | void *xen_initial_gdt; |
103 | ||
bee6ab53 | 104 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
105 | __read_mostly int xen_have_vector_callback; |
106 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 107 | |
60223a32 JF |
108 | /* |
109 | * Point at some empty memory to start with. We map the real shared_info | |
110 | * page as soon as fixmap is up and running. | |
111 | */ | |
4648da7c | 112 | struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info; |
60223a32 JF |
113 | |
114 | /* | |
115 | * Flag to determine whether vcpu info placement is available on all | |
116 | * VCPUs. We assume it is to start with, and then set it to zero on | |
117 | * the first failure. This is because it can succeed on some VCPUs | |
118 | * and not others, since it can involve hypervisor memory allocation, | |
119 | * or because the guest failed to guarantee all the appropriate | |
120 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
121 | * | |
122 | * Note that any particular CPU may be using a placed vcpu structure, | |
123 | * but we can only optimise if the all are. | |
124 | * | |
125 | * 0: not available, 1: available | |
126 | */ | |
e4d04071 | 127 | static int have_vcpu_info_placement = 1; |
60223a32 | 128 | |
1c32cdc6 DV |
129 | struct tls_descs { |
130 | struct desc_struct desc[3]; | |
131 | }; | |
132 | ||
133 | /* | |
134 | * Updating the 3 TLS descriptors in the GDT on every task switch is | |
135 | * surprisingly expensive so we avoid updating them if they haven't | |
136 | * changed. Since Xen writes different descriptors than the one | |
137 | * passed in the update_descriptor hypercall we keep shadow copies to | |
138 | * compare against. | |
139 | */ | |
140 | static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); | |
141 | ||
c06ee78d MR |
142 | static void clamp_max_cpus(void) |
143 | { | |
144 | #ifdef CONFIG_SMP | |
145 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
146 | setup_max_cpus = MAX_VIRT_CPUS; | |
147 | #endif | |
148 | } | |
149 | ||
9c7a7942 | 150 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 151 | { |
60223a32 JF |
152 | struct vcpu_register_vcpu_info info; |
153 | int err; | |
154 | struct vcpu_info *vcpup; | |
155 | ||
a0d695c8 | 156 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 157 | |
c06ee78d MR |
158 | if (cpu < MAX_VIRT_CPUS) |
159 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 160 | |
c06ee78d MR |
161 | if (!have_vcpu_info_placement) { |
162 | if (cpu >= MAX_VIRT_CPUS) | |
163 | clamp_max_cpus(); | |
164 | return; | |
165 | } | |
60223a32 | 166 | |
c06ee78d | 167 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 168 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
169 | info.offset = offset_in_page(vcpup); |
170 | ||
60223a32 JF |
171 | /* Check to see if the hypervisor will put the vcpu_info |
172 | structure where we want it, which allows direct access via | |
173 | a percpu-variable. */ | |
174 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
175 | ||
176 | if (err) { | |
177 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
178 | have_vcpu_info_placement = 0; | |
c06ee78d | 179 | clamp_max_cpus(); |
60223a32 JF |
180 | } else { |
181 | /* This cpu is using the registered vcpu info, even if | |
182 | later ones fail to. */ | |
183 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 184 | } |
5ead97c8 JF |
185 | } |
186 | ||
9c7a7942 JF |
187 | /* |
188 | * On restore, set the vcpu placement up again. | |
189 | * If it fails, then we're in a bad state, since | |
190 | * we can't back out from using it... | |
191 | */ | |
192 | void xen_vcpu_restore(void) | |
193 | { | |
3905bb2a | 194 | int cpu; |
9c7a7942 | 195 | |
9d328a94 | 196 | for_each_possible_cpu(cpu) { |
3905bb2a | 197 | bool other_cpu = (cpu != smp_processor_id()); |
9d328a94 | 198 | bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL); |
9c7a7942 | 199 | |
9d328a94 | 200 | if (other_cpu && is_up && |
3905bb2a JF |
201 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) |
202 | BUG(); | |
9c7a7942 | 203 | |
3905bb2a | 204 | xen_setup_runstate_info(cpu); |
9c7a7942 | 205 | |
3905bb2a | 206 | if (have_vcpu_info_placement) |
9c7a7942 | 207 | xen_vcpu_setup(cpu); |
9c7a7942 | 208 | |
9d328a94 | 209 | if (other_cpu && is_up && |
3905bb2a JF |
210 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) |
211 | BUG(); | |
9c7a7942 JF |
212 | } |
213 | } | |
214 | ||
5ead97c8 JF |
215 | static void __init xen_banner(void) |
216 | { | |
95c7c23b JF |
217 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
218 | struct xen_extraversion extra; | |
219 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
220 | ||
5ead97c8 | 221 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 222 | pv_info.name); |
95c7c23b JF |
223 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
224 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 225 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 | 226 | } |
394b40f6 KRW |
227 | /* Check if running on Xen version (major, minor) or later */ |
228 | bool | |
229 | xen_running_on_version_or_later(unsigned int major, unsigned int minor) | |
230 | { | |
231 | unsigned int version; | |
232 | ||
233 | if (!xen_domain()) | |
234 | return false; | |
235 | ||
236 | version = HYPERVISOR_xen_version(XENVER_version, NULL); | |
237 | if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || | |
238 | ((version >> 16) > major)) | |
239 | return true; | |
240 | return false; | |
241 | } | |
5ead97c8 | 242 | |
5e626254 AP |
243 | #define CPUID_THERM_POWER_LEAF 6 |
244 | #define APERFMPERF_PRESENT 0 | |
245 | ||
e826fe1b JF |
246 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
247 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
248 | ||
73c154c6 KRW |
249 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
250 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
251 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
252 | ||
65ea5b03 PA |
253 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
254 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 255 | { |
82d64699 | 256 | unsigned maskebx = ~0; |
e826fe1b | 257 | unsigned maskecx = ~0; |
5ead97c8 | 258 | unsigned maskedx = ~0; |
73c154c6 | 259 | unsigned setecx = 0; |
5ead97c8 JF |
260 | /* |
261 | * Mask out inconvenient features, to try and disable as many | |
262 | * unsupported kernel subsystems as possible. | |
263 | */ | |
82d64699 JF |
264 | switch (*ax) { |
265 | case 1: | |
e826fe1b | 266 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 267 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 268 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
269 | break; |
270 | ||
73c154c6 KRW |
271 | case CPUID_MWAIT_LEAF: |
272 | /* Synthesize the values.. */ | |
273 | *ax = 0; | |
274 | *bx = 0; | |
275 | *cx = cpuid_leaf5_ecx_val; | |
276 | *dx = cpuid_leaf5_edx_val; | |
277 | return; | |
278 | ||
5e626254 AP |
279 | case CPUID_THERM_POWER_LEAF: |
280 | /* Disabling APERFMPERF for kernel usage */ | |
281 | maskecx = ~(1 << APERFMPERF_PRESENT); | |
282 | break; | |
283 | ||
82d64699 JF |
284 | case 0xb: |
285 | /* Suppress extended topology stuff */ | |
286 | maskebx = 0; | |
287 | break; | |
e826fe1b | 288 | } |
5ead97c8 JF |
289 | |
290 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
291 | : "=a" (*ax), |
292 | "=b" (*bx), | |
293 | "=c" (*cx), | |
294 | "=d" (*dx) | |
295 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 296 | |
82d64699 | 297 | *bx &= maskebx; |
e826fe1b | 298 | *cx &= maskecx; |
73c154c6 | 299 | *cx |= setecx; |
65ea5b03 | 300 | *dx &= maskedx; |
73c154c6 | 301 | |
5ead97c8 JF |
302 | } |
303 | ||
73c154c6 KRW |
304 | static bool __init xen_check_mwait(void) |
305 | { | |
e3aa4e61 | 306 | #ifdef CONFIG_ACPI |
73c154c6 KRW |
307 | struct xen_platform_op op = { |
308 | .cmd = XENPF_set_processor_pminfo, | |
309 | .u.set_pminfo.id = -1, | |
310 | .u.set_pminfo.type = XEN_PM_PDC, | |
311 | }; | |
312 | uint32_t buf[3]; | |
313 | unsigned int ax, bx, cx, dx; | |
314 | unsigned int mwait_mask; | |
315 | ||
316 | /* We need to determine whether it is OK to expose the MWAIT | |
317 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
318 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
319 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
320 | * checks against). The hypervisor won't expose the MWAIT flag because | |
321 | * it would break backwards compatibility; so we will find out directly | |
322 | * from the hardware and hypercall. | |
323 | */ | |
324 | if (!xen_initial_domain()) | |
325 | return false; | |
326 | ||
e3aa4e61 LJ |
327 | /* |
328 | * When running under platform earlier than Xen4.2, do not expose | |
329 | * mwait, to avoid the risk of loading native acpi pad driver | |
330 | */ | |
331 | if (!xen_running_on_version_or_later(4, 2)) | |
332 | return false; | |
333 | ||
73c154c6 KRW |
334 | ax = 1; |
335 | cx = 0; | |
336 | ||
337 | native_cpuid(&ax, &bx, &cx, &dx); | |
338 | ||
339 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
340 | (1 << (X86_FEATURE_MWAIT % 32)); | |
341 | ||
342 | if ((cx & mwait_mask) != mwait_mask) | |
343 | return false; | |
344 | ||
345 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
346 | * ecx and edx. The hypercall provides only partial information. | |
347 | */ | |
348 | ||
349 | ax = CPUID_MWAIT_LEAF; | |
350 | bx = 0; | |
351 | cx = 0; | |
352 | dx = 0; | |
353 | ||
354 | native_cpuid(&ax, &bx, &cx, &dx); | |
355 | ||
356 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
357 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
358 | */ | |
359 | buf[0] = ACPI_PDC_REVISION_ID; | |
360 | buf[1] = 1; | |
361 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
362 | ||
363 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
364 | ||
365 | if ((HYPERVISOR_dom0_op(&op) == 0) && | |
366 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
367 | cpuid_leaf5_ecx_val = cx; | |
368 | cpuid_leaf5_edx_val = dx; | |
369 | } | |
370 | return true; | |
371 | #else | |
372 | return false; | |
373 | #endif | |
374 | } | |
ad3062a0 | 375 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
376 | { |
377 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 378 | unsigned int xsave_mask; |
e826fe1b JF |
379 | |
380 | cpuid_leaf1_edx_mask = | |
cef12ee5 | 381 | ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
382 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
383 | ||
384 | if (!xen_initial_domain()) | |
385 | cpuid_leaf1_edx_mask &= | |
386 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
387 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
947ccf9c | 388 | ax = 1; |
5e287830 | 389 | cx = 0; |
947ccf9c | 390 | xen_cpuid(&ax, &bx, &cx, &dx); |
e826fe1b | 391 | |
947ccf9c SH |
392 | xsave_mask = |
393 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
394 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
395 | ||
396 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
397 | if ((cx & xsave_mask) != xsave_mask) | |
398 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
399 | if (xen_check_mwait()) |
400 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
401 | } |
402 | ||
5ead97c8 JF |
403 | static void xen_set_debugreg(int reg, unsigned long val) |
404 | { | |
405 | HYPERVISOR_set_debugreg(reg, val); | |
406 | } | |
407 | ||
408 | static unsigned long xen_get_debugreg(int reg) | |
409 | { | |
410 | return HYPERVISOR_get_debugreg(reg); | |
411 | } | |
412 | ||
224101ed | 413 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 414 | { |
5ead97c8 | 415 | xen_mc_flush(); |
224101ed | 416 | paravirt_end_context_switch(next); |
5ead97c8 JF |
417 | } |
418 | ||
419 | static unsigned long xen_store_tr(void) | |
420 | { | |
421 | return 0; | |
422 | } | |
423 | ||
a05d2eba | 424 | /* |
cef43bf6 JF |
425 | * Set the page permissions for a particular virtual address. If the |
426 | * address is a vmalloc mapping (or other non-linear mapping), then | |
427 | * find the linear mapping of the page and also set its protections to | |
428 | * match. | |
a05d2eba JF |
429 | */ |
430 | static void set_aliased_prot(void *v, pgprot_t prot) | |
431 | { | |
432 | int level; | |
433 | pte_t *ptep; | |
434 | pte_t pte; | |
435 | unsigned long pfn; | |
436 | struct page *page; | |
437 | ||
438 | ptep = lookup_address((unsigned long)v, &level); | |
439 | BUG_ON(ptep == NULL); | |
440 | ||
441 | pfn = pte_pfn(*ptep); | |
442 | page = pfn_to_page(pfn); | |
443 | ||
444 | pte = pfn_pte(pfn, prot); | |
445 | ||
446 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
447 | BUG(); | |
448 | ||
449 | if (!PageHighMem(page)) { | |
450 | void *av = __va(PFN_PHYS(pfn)); | |
451 | ||
452 | if (av != v) | |
453 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
454 | BUG(); | |
455 | } else | |
456 | kmap_flush_unused(); | |
457 | } | |
458 | ||
38ffbe66 JF |
459 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
460 | { | |
a05d2eba | 461 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
462 | int i; |
463 | ||
a05d2eba JF |
464 | for(i = 0; i < entries; i += entries_per_page) |
465 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
466 | } |
467 | ||
468 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
469 | { | |
a05d2eba | 470 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
471 | int i; |
472 | ||
a05d2eba JF |
473 | for(i = 0; i < entries; i += entries_per_page) |
474 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
475 | } |
476 | ||
5ead97c8 JF |
477 | static void xen_set_ldt(const void *addr, unsigned entries) |
478 | { | |
5ead97c8 JF |
479 | struct mmuext_op *op; |
480 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
481 | ||
ab78f7ad JF |
482 | trace_xen_cpu_set_ldt(addr, entries); |
483 | ||
5ead97c8 JF |
484 | op = mcs.args; |
485 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 486 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
487 | op->arg2.nr_ents = entries; |
488 | ||
489 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
490 | ||
491 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
492 | } | |
493 | ||
6b68f01b | 494 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 495 | { |
5ead97c8 JF |
496 | unsigned long va = dtr->address; |
497 | unsigned int size = dtr->size + 1; | |
498 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 499 | unsigned long frames[pages]; |
5ead97c8 | 500 | int f; |
5ead97c8 | 501 | |
577eebea JF |
502 | /* |
503 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
504 | * 8-byte entries, or 16 4k pages.. | |
505 | */ | |
5ead97c8 JF |
506 | |
507 | BUG_ON(size > 65536); | |
508 | BUG_ON(va & ~PAGE_MASK); | |
509 | ||
5ead97c8 | 510 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 511 | int level; |
577eebea | 512 | pte_t *ptep; |
6ed6bf42 JF |
513 | unsigned long pfn, mfn; |
514 | void *virt; | |
515 | ||
577eebea JF |
516 | /* |
517 | * The GDT is per-cpu and is in the percpu data area. | |
518 | * That can be virtually mapped, so we need to do a | |
519 | * page-walk to get the underlying MFN for the | |
520 | * hypercall. The page can also be in the kernel's | |
521 | * linear range, so we need to RO that mapping too. | |
522 | */ | |
523 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
524 | BUG_ON(ptep == NULL); |
525 | ||
526 | pfn = pte_pfn(*ptep); | |
527 | mfn = pfn_to_mfn(pfn); | |
528 | virt = __va(PFN_PHYS(pfn)); | |
529 | ||
530 | frames[f] = mfn; | |
9976b39b | 531 | |
5ead97c8 | 532 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 533 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
534 | } |
535 | ||
3ce5fa7e JF |
536 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
537 | BUG(); | |
5ead97c8 JF |
538 | } |
539 | ||
577eebea JF |
540 | /* |
541 | * load_gdt for early boot, when the gdt is only mapped once | |
542 | */ | |
ad3062a0 | 543 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
544 | { |
545 | unsigned long va = dtr->address; | |
546 | unsigned int size = dtr->size + 1; | |
547 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
548 | unsigned long frames[pages]; | |
549 | int f; | |
550 | ||
551 | /* | |
552 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
553 | * 8-byte entries, or 16 4k pages.. | |
554 | */ | |
555 | ||
556 | BUG_ON(size > 65536); | |
557 | BUG_ON(va & ~PAGE_MASK); | |
558 | ||
559 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
560 | pte_t pte; | |
561 | unsigned long pfn, mfn; | |
562 | ||
563 | pfn = virt_to_pfn(va); | |
564 | mfn = pfn_to_mfn(pfn); | |
565 | ||
566 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
567 | ||
568 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
569 | BUG(); | |
570 | ||
571 | frames[f] = mfn; | |
572 | } | |
573 | ||
574 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
575 | BUG(); | |
576 | } | |
577 | ||
59290362 DV |
578 | static inline bool desc_equal(const struct desc_struct *d1, |
579 | const struct desc_struct *d2) | |
580 | { | |
581 | return d1->a == d2->a && d1->b == d2->b; | |
582 | } | |
583 | ||
5ead97c8 JF |
584 | static void load_TLS_descriptor(struct thread_struct *t, |
585 | unsigned int cpu, unsigned int i) | |
586 | { | |
1c32cdc6 DV |
587 | struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; |
588 | struct desc_struct *gdt; | |
589 | xmaddr_t maddr; | |
590 | struct multicall_space mc; | |
591 | ||
592 | if (desc_equal(shadow, &t->tls_array[i])) | |
593 | return; | |
594 | ||
595 | *shadow = t->tls_array[i]; | |
596 | ||
597 | gdt = get_cpu_gdt_table(cpu); | |
598 | maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
599 | mc = __xen_mc_entry(0); | |
5ead97c8 JF |
600 | |
601 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
602 | } | |
603 | ||
604 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
605 | { | |
8b84ad94 | 606 | /* |
ccbeed3a TH |
607 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
608 | * and lazy gs handling is enabled, it means we're in a | |
609 | * context switch, and %gs has just been saved. This means we | |
610 | * can zero it out to prevent faults on exit from the | |
611 | * hypervisor if the next process has no %gs. Either way, it | |
612 | * has been saved, and the new value will get loaded properly. | |
613 | * This will go away as soon as Xen has been modified to not | |
614 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
615 | * |
616 | * On x86_64, this hack is not used for %gs, because gs points | |
617 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
618 | * must not zero %gs on x86_64 | |
619 | * | |
620 | * For x86_64, we need to zero %fs, otherwise we may get an | |
621 | * exception between the new %fs descriptor being loaded and | |
622 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 623 | */ |
8a95408e EH |
624 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
625 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 626 | lazy_load_gs(0); |
8a95408e EH |
627 | #else |
628 | loadsegment(fs, 0); | |
629 | #endif | |
630 | } | |
631 | ||
632 | xen_mc_batch(); | |
633 | ||
634 | load_TLS_descriptor(t, cpu, 0); | |
635 | load_TLS_descriptor(t, cpu, 1); | |
636 | load_TLS_descriptor(t, cpu, 2); | |
637 | ||
638 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
639 | } |
640 | ||
a8fc1089 EH |
641 | #ifdef CONFIG_X86_64 |
642 | static void xen_load_gs_index(unsigned int idx) | |
643 | { | |
644 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
645 | BUG(); | |
5ead97c8 | 646 | } |
a8fc1089 | 647 | #endif |
5ead97c8 JF |
648 | |
649 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 650 | const void *ptr) |
5ead97c8 | 651 | { |
cef43bf6 | 652 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 653 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 654 | |
ab78f7ad JF |
655 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
656 | ||
f120f13e JF |
657 | preempt_disable(); |
658 | ||
5ead97c8 JF |
659 | xen_mc_flush(); |
660 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
661 | BUG(); | |
f120f13e JF |
662 | |
663 | preempt_enable(); | |
5ead97c8 JF |
664 | } |
665 | ||
e176d367 | 666 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
667 | struct trap_info *info) |
668 | { | |
6cac5a92 JF |
669 | unsigned long addr; |
670 | ||
6d02c426 | 671 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
672 | return 0; |
673 | ||
674 | info->vector = vector; | |
6cac5a92 JF |
675 | |
676 | addr = gate_offset(*val); | |
677 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
678 | /* |
679 | * Look for known traps using IST, and substitute them | |
680 | * appropriately. The debugger ones are the only ones we care | |
05e36006 LJ |
681 | * about. Xen will handle faults like double_fault, |
682 | * so we should never see them. Warn if | |
b80119bb JF |
683 | * there's an unexpected IST-using fault handler. |
684 | */ | |
6cac5a92 JF |
685 | if (addr == (unsigned long)debug) |
686 | addr = (unsigned long)xen_debug; | |
687 | else if (addr == (unsigned long)int3) | |
688 | addr = (unsigned long)xen_int3; | |
689 | else if (addr == (unsigned long)stack_segment) | |
690 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
691 | else if (addr == (unsigned long)double_fault || |
692 | addr == (unsigned long)nmi) { | |
693 | /* Don't need to handle these */ | |
694 | return 0; | |
695 | #ifdef CONFIG_X86_MCE | |
696 | } else if (addr == (unsigned long)machine_check) { | |
05e36006 LJ |
697 | /* |
698 | * when xen hypervisor inject vMCE to guest, | |
699 | * use native mce handler to handle it | |
700 | */ | |
701 | ; | |
b80119bb JF |
702 | #endif |
703 | } else { | |
704 | /* Some other trap using IST? */ | |
705 | if (WARN_ON(val->ist != 0)) | |
706 | return 0; | |
707 | } | |
6cac5a92 JF |
708 | #endif /* CONFIG_X86_64 */ |
709 | info->address = addr; | |
710 | ||
e176d367 EH |
711 | info->cs = gate_segment(*val); |
712 | info->flags = val->dpl; | |
5ead97c8 | 713 | /* interrupt gates clear IF */ |
6d02c426 JF |
714 | if (val->type == GATE_INTERRUPT) |
715 | info->flags |= 1 << 2; | |
5ead97c8 JF |
716 | |
717 | return 1; | |
718 | } | |
719 | ||
720 | /* Locations of each CPU's IDT */ | |
6b68f01b | 721 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
722 | |
723 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
724 | also update Xen. */ | |
8d947344 | 725 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 726 | { |
5ead97c8 | 727 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
728 | unsigned long start, end; |
729 | ||
ab78f7ad JF |
730 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
731 | ||
f120f13e JF |
732 | preempt_disable(); |
733 | ||
780f36d8 CL |
734 | start = __this_cpu_read(idt_desc.address); |
735 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
736 | |
737 | xen_mc_flush(); | |
738 | ||
8d947344 | 739 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
740 | |
741 | if (p >= start && (p + 8) <= end) { | |
742 | struct trap_info info[2]; | |
743 | ||
744 | info[1].address = 0; | |
745 | ||
e176d367 | 746 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
747 | if (HYPERVISOR_set_trap_table(info)) |
748 | BUG(); | |
749 | } | |
f120f13e JF |
750 | |
751 | preempt_enable(); | |
5ead97c8 JF |
752 | } |
753 | ||
6b68f01b | 754 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 755 | struct trap_info *traps) |
5ead97c8 | 756 | { |
5ead97c8 JF |
757 | unsigned in, out, count; |
758 | ||
e176d367 | 759 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
760 | BUG_ON(count > 256); |
761 | ||
5ead97c8 | 762 | for (in = out = 0; in < count; in++) { |
e176d367 | 763 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 764 | |
e176d367 | 765 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
766 | out++; |
767 | } | |
768 | traps[out].address = 0; | |
f87e4cac JF |
769 | } |
770 | ||
771 | void xen_copy_trap_info(struct trap_info *traps) | |
772 | { | |
6b68f01b | 773 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
774 | |
775 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
776 | } |
777 | ||
778 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
779 | hold a spinlock to protect the static traps[] array (static because | |
780 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 781 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
782 | { |
783 | static DEFINE_SPINLOCK(lock); | |
784 | static struct trap_info traps[257]; | |
f87e4cac | 785 | |
ab78f7ad JF |
786 | trace_xen_cpu_load_idt(desc); |
787 | ||
f87e4cac JF |
788 | spin_lock(&lock); |
789 | ||
f120f13e JF |
790 | __get_cpu_var(idt_desc) = *desc; |
791 | ||
f87e4cac | 792 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
793 | |
794 | xen_mc_flush(); | |
795 | if (HYPERVISOR_set_trap_table(traps)) | |
796 | BUG(); | |
797 | ||
798 | spin_unlock(&lock); | |
799 | } | |
800 | ||
801 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
802 | they're handled differently. */ | |
803 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 804 | const void *desc, int type) |
5ead97c8 | 805 | { |
ab78f7ad JF |
806 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
807 | ||
f120f13e JF |
808 | preempt_disable(); |
809 | ||
014b15be GOC |
810 | switch (type) { |
811 | case DESC_LDT: | |
812 | case DESC_TSS: | |
5ead97c8 JF |
813 | /* ignore */ |
814 | break; | |
815 | ||
816 | default: { | |
9976b39b | 817 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
818 | |
819 | xen_mc_flush(); | |
014b15be | 820 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
821 | BUG(); |
822 | } | |
823 | ||
824 | } | |
f120f13e JF |
825 | |
826 | preempt_enable(); | |
5ead97c8 JF |
827 | } |
828 | ||
577eebea JF |
829 | /* |
830 | * Version of write_gdt_entry for use at early boot-time needed to | |
831 | * update an entry as simply as possible. | |
832 | */ | |
ad3062a0 | 833 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
834 | const void *desc, int type) |
835 | { | |
ab78f7ad JF |
836 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
837 | ||
577eebea JF |
838 | switch (type) { |
839 | case DESC_LDT: | |
840 | case DESC_TSS: | |
841 | /* ignore */ | |
842 | break; | |
843 | ||
844 | default: { | |
845 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
846 | ||
847 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
848 | dt[entry] = *(struct desc_struct *)desc; | |
849 | } | |
850 | ||
851 | } | |
852 | } | |
853 | ||
faca6227 | 854 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 855 | struct thread_struct *thread) |
5ead97c8 | 856 | { |
ab78f7ad JF |
857 | struct multicall_space mcs; |
858 | ||
859 | mcs = xen_mc_entry(0); | |
faca6227 | 860 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
861 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
862 | } | |
863 | ||
864 | static void xen_set_iopl_mask(unsigned mask) | |
865 | { | |
866 | struct physdev_set_iopl set_iopl; | |
867 | ||
868 | /* Force the change at ring 0. */ | |
869 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
870 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
871 | } | |
872 | ||
873 | static void xen_io_delay(void) | |
874 | { | |
875 | } | |
876 | ||
877 | #ifdef CONFIG_X86_LOCAL_APIC | |
558daa28 KRW |
878 | static unsigned long xen_set_apic_id(unsigned int x) |
879 | { | |
880 | WARN_ON(1); | |
881 | return x; | |
882 | } | |
883 | static unsigned int xen_get_apic_id(unsigned long x) | |
884 | { | |
885 | return ((x)>>24) & 0xFFu; | |
886 | } | |
ad66dd34 | 887 | static u32 xen_apic_read(u32 reg) |
5ead97c8 | 888 | { |
558daa28 KRW |
889 | struct xen_platform_op op = { |
890 | .cmd = XENPF_get_cpuinfo, | |
891 | .interface_version = XENPF_INTERFACE_VERSION, | |
892 | .u.pcpu_info.xen_cpuid = 0, | |
893 | }; | |
894 | int ret = 0; | |
895 | ||
896 | /* Shouldn't need this as APIC is turned off for PV, and we only | |
897 | * get called on the bootup processor. But just in case. */ | |
898 | if (!xen_initial_domain() || smp_processor_id()) | |
899 | return 0; | |
900 | ||
901 | if (reg == APIC_LVR) | |
902 | return 0x10; | |
903 | ||
904 | if (reg != APIC_ID) | |
905 | return 0; | |
906 | ||
907 | ret = HYPERVISOR_dom0_op(&op); | |
908 | if (ret) | |
909 | return 0; | |
910 | ||
911 | return op.u.pcpu_info.apic_id << 24; | |
5ead97c8 | 912 | } |
f87e4cac | 913 | |
ad66dd34 | 914 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
915 | { |
916 | /* Warn to see if there's any stray references */ | |
917 | WARN_ON(1); | |
918 | } | |
ad66dd34 | 919 | |
ad66dd34 SS |
920 | static u64 xen_apic_icr_read(void) |
921 | { | |
922 | return 0; | |
923 | } | |
924 | ||
925 | static void xen_apic_icr_write(u32 low, u32 id) | |
926 | { | |
927 | /* Warn to see if there's any stray references */ | |
928 | WARN_ON(1); | |
929 | } | |
930 | ||
931 | static void xen_apic_wait_icr_idle(void) | |
932 | { | |
933 | return; | |
934 | } | |
935 | ||
94a8c3c2 YL |
936 | static u32 xen_safe_apic_wait_icr_idle(void) |
937 | { | |
938 | return 0; | |
939 | } | |
940 | ||
c1eeb2de YL |
941 | static void set_xen_basic_apic_ops(void) |
942 | { | |
943 | apic->read = xen_apic_read; | |
944 | apic->write = xen_apic_write; | |
945 | apic->icr_read = xen_apic_icr_read; | |
946 | apic->icr_write = xen_apic_icr_write; | |
947 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
948 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
558daa28 KRW |
949 | apic->set_apic_id = xen_set_apic_id; |
950 | apic->get_apic_id = xen_get_apic_id; | |
f447d56d BG |
951 | |
952 | #ifdef CONFIG_SMP | |
953 | apic->send_IPI_allbutself = xen_send_IPI_allbutself; | |
954 | apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself; | |
955 | apic->send_IPI_mask = xen_send_IPI_mask; | |
956 | apic->send_IPI_all = xen_send_IPI_all; | |
957 | apic->send_IPI_self = xen_send_IPI_self; | |
958 | #endif | |
c1eeb2de | 959 | } |
ad66dd34 | 960 | |
5ead97c8 JF |
961 | #endif |
962 | ||
7b1333aa JF |
963 | static void xen_clts(void) |
964 | { | |
965 | struct multicall_space mcs; | |
966 | ||
967 | mcs = xen_mc_entry(0); | |
968 | ||
969 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
970 | ||
971 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
972 | } | |
973 | ||
a789ed5f JF |
974 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
975 | ||
976 | static unsigned long xen_read_cr0(void) | |
977 | { | |
2113f469 | 978 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
979 | |
980 | if (unlikely(cr0 == 0)) { | |
981 | cr0 = native_read_cr0(); | |
2113f469 | 982 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
983 | } |
984 | ||
985 | return cr0; | |
986 | } | |
987 | ||
7b1333aa JF |
988 | static void xen_write_cr0(unsigned long cr0) |
989 | { | |
990 | struct multicall_space mcs; | |
991 | ||
2113f469 | 992 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 993 | |
7b1333aa JF |
994 | /* Only pay attention to cr0.TS; everything else is |
995 | ignored. */ | |
996 | mcs = xen_mc_entry(0); | |
997 | ||
998 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
999 | ||
1000 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1001 | } | |
1002 | ||
5ead97c8 JF |
1003 | static void xen_write_cr4(unsigned long cr4) |
1004 | { | |
2956a351 JF |
1005 | cr4 &= ~X86_CR4_PGE; |
1006 | cr4 &= ~X86_CR4_PSE; | |
1007 | ||
1008 | native_write_cr4(cr4); | |
5ead97c8 | 1009 | } |
1a7bbda5 KRW |
1010 | #ifdef CONFIG_X86_64 |
1011 | static inline unsigned long xen_read_cr8(void) | |
1012 | { | |
1013 | return 0; | |
1014 | } | |
1015 | static inline void xen_write_cr8(unsigned long val) | |
1016 | { | |
1017 | BUG_ON(val); | |
1018 | } | |
1019 | #endif | |
1153968a JF |
1020 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
1021 | { | |
1022 | int ret; | |
1023 | ||
1024 | ret = 0; | |
1025 | ||
f63c2f24 | 1026 | switch (msr) { |
1153968a JF |
1027 | #ifdef CONFIG_X86_64 |
1028 | unsigned which; | |
1029 | u64 base; | |
1030 | ||
1031 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
1032 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
1033 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
1034 | ||
1035 | set: | |
1036 | base = ((u64)high << 32) | low; | |
1037 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 1038 | ret = -EIO; |
1153968a JF |
1039 | break; |
1040 | #endif | |
d89961e2 JF |
1041 | |
1042 | case MSR_STAR: | |
1043 | case MSR_CSTAR: | |
1044 | case MSR_LSTAR: | |
1045 | case MSR_SYSCALL_MASK: | |
1046 | case MSR_IA32_SYSENTER_CS: | |
1047 | case MSR_IA32_SYSENTER_ESP: | |
1048 | case MSR_IA32_SYSENTER_EIP: | |
1049 | /* Fast syscall setup is all done in hypercalls, so | |
1050 | these are all ignored. Stub them out here to stop | |
1051 | Xen console noise. */ | |
1052 | break; | |
1053 | ||
41f2e477 JF |
1054 | case MSR_IA32_CR_PAT: |
1055 | if (smp_processor_id() == 0) | |
1056 | xen_set_pat(((u64)high << 32) | low); | |
1057 | break; | |
1058 | ||
1153968a JF |
1059 | default: |
1060 | ret = native_write_msr_safe(msr, low, high); | |
1061 | } | |
1062 | ||
1063 | return ret; | |
1064 | } | |
1065 | ||
0e91398f | 1066 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1067 | { |
1068 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1069 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1070 | xen_start_info->shared_info); | |
1071 | ||
1072 | HYPERVISOR_shared_info = | |
1073 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1074 | } else |
1075 | HYPERVISOR_shared_info = | |
1076 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1077 | ||
2e8fe719 JF |
1078 | #ifndef CONFIG_SMP |
1079 | /* In UP this is as good a place as any to set up shared info */ | |
1080 | xen_setup_vcpu_info_placement(); | |
1081 | #endif | |
d5edbc1f JF |
1082 | |
1083 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1084 | } |
1085 | ||
5f054e31 | 1086 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1087 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1088 | { |
1089 | int cpu; | |
1090 | ||
1091 | for_each_possible_cpu(cpu) | |
1092 | xen_vcpu_setup(cpu); | |
1093 | ||
1094 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1095 | percpu area for all cpus, so make use of it */ | |
1096 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
1097 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1098 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1099 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1100 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1101 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1102 | } |
5ead97c8 JF |
1103 | } |
1104 | ||
ab144f5e AK |
1105 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1106 | unsigned long addr, unsigned len) | |
6487673b JF |
1107 | { |
1108 | char *start, *end, *reloc; | |
1109 | unsigned ret; | |
1110 | ||
1111 | start = end = reloc = NULL; | |
1112 | ||
93b1eab3 JF |
1113 | #define SITE(op, x) \ |
1114 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1115 | if (have_vcpu_info_placement) { \ |
1116 | start = (char *)xen_##x##_direct; \ | |
1117 | end = xen_##x##_direct_end; \ | |
1118 | reloc = xen_##x##_direct_reloc; \ | |
1119 | } \ | |
1120 | goto patch_site | |
1121 | ||
1122 | switch (type) { | |
93b1eab3 JF |
1123 | SITE(pv_irq_ops, irq_enable); |
1124 | SITE(pv_irq_ops, irq_disable); | |
1125 | SITE(pv_irq_ops, save_fl); | |
1126 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1127 | #undef SITE |
1128 | ||
1129 | patch_site: | |
1130 | if (start == NULL || (end-start) > len) | |
1131 | goto default_patch; | |
1132 | ||
ab144f5e | 1133 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1134 | |
1135 | /* Note: because reloc is assigned from something that | |
1136 | appears to be an array, gcc assumes it's non-null, | |
1137 | but doesn't know its relationship with start and | |
1138 | end. */ | |
1139 | if (reloc > start && reloc < end) { | |
1140 | int reloc_off = reloc - start; | |
ab144f5e AK |
1141 | long *relocp = (long *)(insnbuf + reloc_off); |
1142 | long delta = start - (char *)addr; | |
6487673b JF |
1143 | |
1144 | *relocp += delta; | |
1145 | } | |
1146 | break; | |
1147 | ||
1148 | default_patch: | |
1149 | default: | |
ab144f5e AK |
1150 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1151 | addr, len); | |
6487673b JF |
1152 | break; |
1153 | } | |
1154 | ||
1155 | return ret; | |
1156 | } | |
1157 | ||
ad3062a0 | 1158 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1159 | .paravirt_enabled = 1, |
1160 | .shared_kernel_pmd = 0, | |
1161 | ||
318f5a2a AL |
1162 | #ifdef CONFIG_X86_64 |
1163 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1164 | #endif | |
1165 | ||
5ead97c8 | 1166 | .name = "Xen", |
93b1eab3 | 1167 | }; |
5ead97c8 | 1168 | |
ad3062a0 | 1169 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1170 | .patch = xen_patch, |
93b1eab3 | 1171 | }; |
5ead97c8 | 1172 | |
ad3062a0 | 1173 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1174 | .cpuid = xen_cpuid, |
1175 | ||
1176 | .set_debugreg = xen_set_debugreg, | |
1177 | .get_debugreg = xen_get_debugreg, | |
1178 | ||
7b1333aa | 1179 | .clts = xen_clts, |
5ead97c8 | 1180 | |
a789ed5f | 1181 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1182 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1183 | |
5ead97c8 JF |
1184 | .read_cr4 = native_read_cr4, |
1185 | .read_cr4_safe = native_read_cr4_safe, | |
1186 | .write_cr4 = xen_write_cr4, | |
1187 | ||
1a7bbda5 KRW |
1188 | #ifdef CONFIG_X86_64 |
1189 | .read_cr8 = xen_read_cr8, | |
1190 | .write_cr8 = xen_write_cr8, | |
1191 | #endif | |
1192 | ||
5ead97c8 JF |
1193 | .wbinvd = native_wbinvd, |
1194 | ||
1195 | .read_msr = native_read_msr_safe, | |
1153968a | 1196 | .write_msr = xen_write_msr_safe, |
1ab46fd3 | 1197 | |
5ead97c8 JF |
1198 | .read_tsc = native_read_tsc, |
1199 | .read_pmc = native_read_pmc, | |
1200 | ||
cd0608e7 KRW |
1201 | .read_tscp = native_read_tscp, |
1202 | ||
81e103f1 | 1203 | .iret = xen_iret, |
d75cd22f | 1204 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1205 | #ifdef CONFIG_X86_64 |
1206 | .usergs_sysret32 = xen_sysret32, | |
1207 | .usergs_sysret64 = xen_sysret64, | |
1208 | #endif | |
5ead97c8 JF |
1209 | |
1210 | .load_tr_desc = paravirt_nop, | |
1211 | .set_ldt = xen_set_ldt, | |
1212 | .load_gdt = xen_load_gdt, | |
1213 | .load_idt = xen_load_idt, | |
1214 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1215 | #ifdef CONFIG_X86_64 |
1216 | .load_gs_index = xen_load_gs_index, | |
1217 | #endif | |
5ead97c8 | 1218 | |
38ffbe66 JF |
1219 | .alloc_ldt = xen_alloc_ldt, |
1220 | .free_ldt = xen_free_ldt, | |
1221 | ||
5ead97c8 JF |
1222 | .store_gdt = native_store_gdt, |
1223 | .store_idt = native_store_idt, | |
1224 | .store_tr = xen_store_tr, | |
1225 | ||
1226 | .write_ldt_entry = xen_write_ldt_entry, | |
1227 | .write_gdt_entry = xen_write_gdt_entry, | |
1228 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1229 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1230 | |
1231 | .set_iopl_mask = xen_set_iopl_mask, | |
1232 | .io_delay = xen_io_delay, | |
1233 | ||
952d1d70 JF |
1234 | /* Xen takes care of %gs when switching to usermode for us */ |
1235 | .swapgs = paravirt_nop, | |
1236 | ||
224101ed JF |
1237 | .start_context_switch = paravirt_start_context_switch, |
1238 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1239 | }; |
1240 | ||
ad3062a0 | 1241 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1242 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1243 | .startup_ipi_hook = paravirt_nop, |
1244 | #endif | |
93b1eab3 JF |
1245 | }; |
1246 | ||
fefa629a JF |
1247 | static void xen_reboot(int reason) |
1248 | { | |
349c709f JF |
1249 | struct sched_shutdown r = { .reason = reason }; |
1250 | ||
349c709f | 1251 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1252 | BUG(); |
1253 | } | |
1254 | ||
1255 | static void xen_restart(char *msg) | |
1256 | { | |
1257 | xen_reboot(SHUTDOWN_reboot); | |
1258 | } | |
1259 | ||
1260 | static void xen_emergency_restart(void) | |
1261 | { | |
1262 | xen_reboot(SHUTDOWN_reboot); | |
1263 | } | |
1264 | ||
1265 | static void xen_machine_halt(void) | |
1266 | { | |
1267 | xen_reboot(SHUTDOWN_poweroff); | |
1268 | } | |
1269 | ||
b2abe506 TG |
1270 | static void xen_machine_power_off(void) |
1271 | { | |
1272 | if (pm_power_off) | |
1273 | pm_power_off(); | |
1274 | xen_reboot(SHUTDOWN_poweroff); | |
1275 | } | |
1276 | ||
fefa629a JF |
1277 | static void xen_crash_shutdown(struct pt_regs *regs) |
1278 | { | |
1279 | xen_reboot(SHUTDOWN_crash); | |
1280 | } | |
1281 | ||
f09f6d19 DD |
1282 | static int |
1283 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1284 | { | |
086748e5 | 1285 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1286 | return NOTIFY_DONE; |
1287 | } | |
1288 | ||
1289 | static struct notifier_block xen_panic_block = { | |
1290 | .notifier_call= xen_panic_event, | |
1291 | }; | |
1292 | ||
1293 | int xen_panic_handler_init(void) | |
1294 | { | |
1295 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1296 | return 0; | |
1297 | } | |
1298 | ||
ad3062a0 | 1299 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1300 | .restart = xen_restart, |
1301 | .halt = xen_machine_halt, | |
b2abe506 | 1302 | .power_off = xen_machine_power_off, |
fefa629a JF |
1303 | .shutdown = xen_machine_halt, |
1304 | .crash_shutdown = xen_crash_shutdown, | |
1305 | .emergency_restart = xen_emergency_restart, | |
1306 | }; | |
1307 | ||
577eebea JF |
1308 | /* |
1309 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1310 | * we do this, we have to be careful not to call any stack-protected | |
1311 | * function, which is most of the kernel. | |
1312 | */ | |
1313 | static void __init xen_setup_stackprotector(void) | |
1314 | { | |
1315 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1316 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1317 | ||
1318 | setup_stack_canary_segment(0); | |
1319 | switch_to_new_gdt(0); | |
1320 | ||
1321 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1322 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1323 | } | |
1324 | ||
5ead97c8 JF |
1325 | /* First C function to be called on Xen boot */ |
1326 | asmlinkage void __init xen_start_kernel(void) | |
1327 | { | |
ec35a69c KRW |
1328 | struct physdev_set_iopl set_iopl; |
1329 | int rc; | |
5ead97c8 JF |
1330 | |
1331 | if (!xen_start_info) | |
1332 | return; | |
1333 | ||
6e833587 JF |
1334 | xen_domain_type = XEN_PV_DOMAIN; |
1335 | ||
7e77506a IC |
1336 | xen_setup_machphys_mapping(); |
1337 | ||
5ead97c8 | 1338 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1339 | pv_info = xen_info; |
1340 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1341 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1342 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1343 | |
6b18ae3e | 1344 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1345 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1346 | x86_init.oem.banner = xen_banner; |
845b3944 | 1347 | |
409771d2 | 1348 | xen_init_time_ops(); |
93b1eab3 | 1349 | |
ce2eef33 | 1350 | /* |
577eebea | 1351 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1352 | */ |
577eebea | 1353 | |
973df35e JF |
1354 | xen_init_mmu_ops(); |
1355 | ||
577eebea JF |
1356 | /* Prevent unwanted bits from being set in PTEs. */ |
1357 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
8eaffa67 | 1358 | #if 0 |
577eebea | 1359 | if (!xen_initial_domain()) |
8eaffa67 | 1360 | #endif |
577eebea JF |
1361 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
1362 | ||
1363 | __supported_pte_mask |= _PAGE_IOMAP; | |
1364 | ||
817a824b IC |
1365 | /* |
1366 | * Prevent page tables from being allocated in highmem, even | |
1367 | * if CONFIG_HIGHPTE is enabled. | |
1368 | */ | |
1369 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1370 | ||
b75fe4e5 | 1371 | /* Work out if we support NX */ |
4763ed4d | 1372 | x86_configure_nx(); |
b75fe4e5 | 1373 | |
577eebea JF |
1374 | xen_setup_features(); |
1375 | ||
1376 | /* Get mfn list */ | |
1377 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1378 | xen_build_dynamic_phys_to_machine(); | |
1379 | ||
1380 | /* | |
1381 | * Set up kernel GDT and segment registers, mainly so that | |
1382 | * -fstack-protector code can be executed. | |
1383 | */ | |
1384 | xen_setup_stackprotector(); | |
0d1edf46 | 1385 | |
ce2eef33 | 1386 | xen_init_irq_ops(); |
e826fe1b JF |
1387 | xen_init_cpuid_mask(); |
1388 | ||
94a8c3c2 | 1389 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1390 | /* |
94a8c3c2 | 1391 | * set up the basic apic ops. |
ad66dd34 | 1392 | */ |
c1eeb2de | 1393 | set_xen_basic_apic_ops(); |
ad66dd34 | 1394 | #endif |
93b1eab3 | 1395 | |
e57778a1 JF |
1396 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1397 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1398 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1399 | } | |
1400 | ||
fefa629a JF |
1401 | machine_ops = xen_machine_ops; |
1402 | ||
38341432 JF |
1403 | /* |
1404 | * The only reliable way to retain the initial address of the | |
1405 | * percpu gdt_page is to remember it here, so we can go and | |
1406 | * mark it RW later, when the initial percpu area is freed. | |
1407 | */ | |
1408 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1409 | |
a9e7062d | 1410 | xen_smp_init(); |
5ead97c8 | 1411 | |
c1f5db1a IC |
1412 | #ifdef CONFIG_ACPI_NUMA |
1413 | /* | |
1414 | * The pages we from Xen are not related to machine pages, so | |
1415 | * any NUMA information the kernel tries to get from ACPI will | |
1416 | * be meaningless. Prevent it from trying. | |
1417 | */ | |
1418 | acpi_numa = -1; | |
1419 | #endif | |
1420 | ||
60223a32 | 1421 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1422 | possible map and a non-dummy shared_info. */ |
60223a32 | 1423 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1424 | |
55d80856 | 1425 | local_irq_disable(); |
2ce802f6 | 1426 | early_boot_irqs_disabled = true; |
55d80856 | 1427 | |
084a2a4e | 1428 | xen_raw_console_write("mapping kernel into physical memory\n"); |
3699aad0 | 1429 | xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages); |
5ead97c8 | 1430 | |
33a84750 JF |
1431 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1432 | xen_build_mfn_list_list(); | |
1433 | ||
5ead97c8 JF |
1434 | /* keep using Xen gdt for now; no urgent need to change it */ |
1435 | ||
e68266b7 | 1436 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1437 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1438 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1439 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1440 | #else |
1441 | pv_info.kernel_rpl = 0; | |
1442 | #endif | |
5ead97c8 | 1443 | /* set the limit of our address space */ |
fb1d8404 | 1444 | xen_reserve_top(); |
5ead97c8 | 1445 | |
ec35a69c KRW |
1446 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1447 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1448 | * which pokes 0xcf8 port. | |
1449 | */ | |
1450 | set_iopl.iopl = 1; | |
1451 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1452 | if (rc != 0) | |
1453 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1454 | ||
7d087b68 | 1455 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1456 | /* set up basic CPUID stuff */ |
1457 | cpu_detect(&new_cpu_data); | |
1458 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1459 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1460 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1461 | #endif |
5ead97c8 JF |
1462 | |
1463 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1464 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1465 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1466 | ? __pa(xen_start_info->mod_start) : 0; | |
1467 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1468 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1469 | |
6e833587 | 1470 | if (!xen_initial_domain()) { |
83abc70a | 1471 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1472 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1473 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1474 | if (pci_xen) |
1475 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1476 | } else { |
c2419b4a JF |
1477 | const struct dom0_vga_console_info *info = |
1478 | (void *)((char *)xen_start_info + | |
1479 | xen_start_info->console.dom0.info_off); | |
ffb8b233 KRW |
1480 | struct xen_platform_op op = { |
1481 | .cmd = XENPF_firmware_info, | |
1482 | .interface_version = XENPF_INTERFACE_VERSION, | |
1483 | .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, | |
1484 | }; | |
c2419b4a JF |
1485 | |
1486 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1487 | xen_start_info->console.domU.mfn = 0; | |
1488 | xen_start_info->console.domU.evtchn = 0; | |
1489 | ||
ffb8b233 KRW |
1490 | if (HYPERVISOR_dom0_op(&op) == 0) |
1491 | boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; | |
1492 | ||
31b3c9d7 KRW |
1493 | xen_init_apic(); |
1494 | ||
5d990b62 CW |
1495 | /* Make sure ACS will be enabled */ |
1496 | pci_request_acs(); | |
211063dc KRW |
1497 | |
1498 | xen_acpi_sleep_register(); | |
bd49940a KRW |
1499 | |
1500 | /* Avoid searching for BIOS MP tables */ | |
1501 | x86_init.mpparse.find_smp_config = x86_init_noop; | |
1502 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | |
9e124fe1 | 1503 | } |
76a8df7b DV |
1504 | #ifdef CONFIG_PCI |
1505 | /* PCI BIOS service won't work from a PV guest. */ | |
1506 | pci_probe &= ~PCI_PROBE_BIOS; | |
1507 | #endif | |
084a2a4e JF |
1508 | xen_raw_console_write("about to get started...\n"); |
1509 | ||
499d19b8 JF |
1510 | xen_setup_runstate_info(0); |
1511 | ||
5ead97c8 | 1512 | /* Start the world */ |
f5d36de0 | 1513 | #ifdef CONFIG_X86_32 |
f0d43100 | 1514 | i386_start_kernel(); |
f5d36de0 | 1515 | #else |
084a2a4e | 1516 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1517 | #endif |
5ead97c8 | 1518 | } |
bee6ab53 | 1519 | |
9d02b43d OH |
1520 | #ifdef CONFIG_XEN_PVHVM |
1521 | #define HVM_SHARED_INFO_ADDR 0xFE700000UL | |
1522 | static struct shared_info *xen_hvm_shared_info; | |
1523 | static unsigned long xen_hvm_sip_phys; | |
1524 | static int xen_major, xen_minor; | |
1525 | ||
1526 | static void xen_hvm_connect_shared_info(unsigned long pfn) | |
bee6ab53 SY |
1527 | { |
1528 | struct xen_add_to_physmap xatp; | |
bee6ab53 | 1529 | |
bee6ab53 SY |
1530 | xatp.domid = DOMID_SELF; |
1531 | xatp.idx = 0; | |
1532 | xatp.space = XENMAPSPACE_shared_info; | |
9d02b43d | 1533 | xatp.gpfn = pfn; |
bee6ab53 SY |
1534 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) |
1535 | BUG(); | |
1536 | ||
9d02b43d OH |
1537 | } |
1538 | static void __init xen_hvm_set_shared_info(struct shared_info *sip) | |
1539 | { | |
1540 | int cpu; | |
1541 | ||
1542 | HYPERVISOR_shared_info = sip; | |
bee6ab53 | 1543 | |
016b6f5f SS |
1544 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1545 | * page, we use it in the event channel upcall and in some pvclock | |
1546 | * related functions. We don't need the vcpu_info placement | |
1547 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
9d02b43d OH |
1548 | * HVM. */ |
1549 | for_each_online_cpu(cpu) | |
016b6f5f | 1550 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
9d02b43d OH |
1551 | } |
1552 | ||
1553 | /* Reconnect the shared_info pfn to a (new) mfn */ | |
1554 | void xen_hvm_resume_shared_info(void) | |
1555 | { | |
1556 | xen_hvm_connect_shared_info(xen_hvm_sip_phys >> PAGE_SHIFT); | |
1557 | } | |
1558 | ||
1559 | /* Xen tools prior to Xen 4 do not provide a E820_Reserved area for guest usage. | |
1560 | * On these old tools the shared info page will be placed in E820_Ram. | |
1561 | * Xen 4 provides a E820_Reserved area at 0xFC000000, and this code expects | |
1562 | * that nothing is mapped up to HVM_SHARED_INFO_ADDR. | |
1563 | * Xen 4.3+ provides an explicit 1MB area at HVM_SHARED_INFO_ADDR which is used | |
1564 | * here for the shared info page. */ | |
1565 | static void __init xen_hvm_init_shared_info(void) | |
1566 | { | |
1567 | if (xen_major < 4) { | |
1568 | xen_hvm_shared_info = extend_brk(PAGE_SIZE, PAGE_SIZE); | |
1569 | xen_hvm_sip_phys = __pa(xen_hvm_shared_info); | |
1570 | } else { | |
1571 | xen_hvm_sip_phys = HVM_SHARED_INFO_ADDR; | |
1572 | set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_hvm_sip_phys); | |
1573 | xen_hvm_shared_info = | |
1574 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
016b6f5f | 1575 | } |
9d02b43d OH |
1576 | xen_hvm_connect_shared_info(xen_hvm_sip_phys >> PAGE_SHIFT); |
1577 | xen_hvm_set_shared_info(xen_hvm_shared_info); | |
bee6ab53 SY |
1578 | } |
1579 | ||
4ff2d062 OH |
1580 | static void __init init_hvm_pv_info(void) |
1581 | { | |
5eb65be2 | 1582 | uint32_t eax, ebx, ecx, edx, pages, msr, base; |
4ff2d062 OH |
1583 | u64 pfn; |
1584 | ||
1585 | base = xen_cpuid_base(); | |
4ff2d062 OH |
1586 | cpuid(base + 2, &pages, &msr, &ecx, &edx); |
1587 | ||
1588 | pfn = __pa(hypercall_page); | |
1589 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1590 | ||
1591 | xen_setup_features(); | |
1592 | ||
1593 | pv_info.name = "Xen HVM"; | |
1594 | ||
1595 | xen_domain_type = XEN_HVM_DOMAIN; | |
1596 | } | |
1597 | ||
38e20b07 SY |
1598 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1599 | unsigned long action, void *hcpu) | |
1600 | { | |
1601 | int cpu = (long)hcpu; | |
1602 | switch (action) { | |
1603 | case CPU_UP_PREPARE: | |
90d4f553 | 1604 | xen_vcpu_setup(cpu); |
99bbb3a8 SS |
1605 | if (xen_have_vector_callback) |
1606 | xen_init_lock_cpu(cpu); | |
38e20b07 SY |
1607 | break; |
1608 | default: | |
1609 | break; | |
1610 | } | |
1611 | return NOTIFY_OK; | |
1612 | } | |
1613 | ||
ad3062a0 | 1614 | static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = { |
38e20b07 SY |
1615 | .notifier_call = xen_hvm_cpu_notify, |
1616 | }; | |
1617 | ||
bee6ab53 SY |
1618 | static void __init xen_hvm_guest_init(void) |
1619 | { | |
4ff2d062 | 1620 | init_hvm_pv_info(); |
bee6ab53 | 1621 | |
016b6f5f | 1622 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1623 | |
1624 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1625 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1626 | xen_hvm_smp_init(); |
38e20b07 | 1627 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1628 | xen_unplug_emulated_devices(); |
38e20b07 | 1629 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1630 | xen_hvm_init_time_ops(); |
59151001 | 1631 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1632 | } |
1633 | ||
1634 | static bool __init xen_hvm_platform(void) | |
1635 | { | |
9d02b43d OH |
1636 | uint32_t eax, ebx, ecx, edx, base; |
1637 | ||
bee6ab53 SY |
1638 | if (xen_pv_domain()) |
1639 | return false; | |
1640 | ||
9d02b43d OH |
1641 | base = xen_cpuid_base(); |
1642 | if (!base) | |
bee6ab53 SY |
1643 | return false; |
1644 | ||
9d02b43d OH |
1645 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); |
1646 | ||
1647 | xen_major = eax >> 16; | |
1648 | xen_minor = eax & 0xffff; | |
1649 | ||
1650 | printk(KERN_INFO "Xen version %d.%d.\n", xen_major, xen_minor); | |
1651 | ||
bee6ab53 SY |
1652 | return true; |
1653 | } | |
1654 | ||
d9b8ca84 SY |
1655 | bool xen_hvm_need_lapic(void) |
1656 | { | |
1657 | if (xen_pv_domain()) | |
1658 | return false; | |
1659 | if (!xen_hvm_domain()) | |
1660 | return false; | |
1661 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1662 | return false; | |
1663 | return true; | |
1664 | } | |
1665 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1666 | ||
ad3062a0 | 1667 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1668 | .name = "Xen HVM", |
1669 | .detect = xen_hvm_platform, | |
1670 | .init_platform = xen_hvm_guest_init, | |
1671 | }; | |
1672 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1673 | #endif |