Commit | Line | Data |
---|---|---|
5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
96f28bc6 | 34 | #include <linux/edd.h> |
5ead97c8 | 35 | |
1ccbf534 | 36 | #include <xen/xen.h> |
0ec53ecf | 37 | #include <xen/events.h> |
5ead97c8 | 38 | #include <xen/interface/xen.h> |
ecbf29cd | 39 | #include <xen/interface/version.h> |
5ead97c8 JF |
40 | #include <xen/interface/physdev.h> |
41 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 42 | #include <xen/interface/memory.h> |
cef12ee5 | 43 | #include <xen/interface/xen-mca.h> |
5ead97c8 JF |
44 | #include <xen/features.h> |
45 | #include <xen/page.h> | |
38e20b07 | 46 | #include <xen/hvm.h> |
084a2a4e | 47 | #include <xen/hvc-console.h> |
211063dc | 48 | #include <xen/acpi.h> |
d285d683 | 49 | #include <xen/features.h> |
5ead97c8 JF |
50 | |
51 | #include <asm/paravirt.h> | |
7b6aa335 | 52 | #include <asm/apic.h> |
5ead97c8 | 53 | #include <asm/page.h> |
b5401a96 | 54 | #include <asm/xen/pci.h> |
5ead97c8 JF |
55 | #include <asm/xen/hypercall.h> |
56 | #include <asm/xen/hypervisor.h> | |
57 | #include <asm/fixmap.h> | |
58 | #include <asm/processor.h> | |
707ebbc8 | 59 | #include <asm/proto.h> |
1153968a | 60 | #include <asm/msr-index.h> |
6cac5a92 | 61 | #include <asm/traps.h> |
5ead97c8 JF |
62 | #include <asm/setup.h> |
63 | #include <asm/desc.h> | |
817a824b | 64 | #include <asm/pgalloc.h> |
5ead97c8 | 65 | #include <asm/pgtable.h> |
f87e4cac | 66 | #include <asm/tlbflush.h> |
fefa629a | 67 | #include <asm/reboot.h> |
577eebea | 68 | #include <asm/stackprotector.h> |
bee6ab53 | 69 | #include <asm/hypervisor.h> |
73c154c6 | 70 | #include <asm/mwait.h> |
76a8df7b | 71 | #include <asm/pci_x86.h> |
c79c4982 | 72 | #include <asm/pat.h> |
73c154c6 KRW |
73 | |
74 | #ifdef CONFIG_ACPI | |
75 | #include <linux/acpi.h> | |
76 | #include <asm/acpi.h> | |
77 | #include <acpi/pdc_intel.h> | |
78 | #include <acpi/processor.h> | |
79 | #include <xen/interface/platform.h> | |
80 | #endif | |
5ead97c8 JF |
81 | |
82 | #include "xen-ops.h" | |
3b827c1b | 83 | #include "mmu.h" |
f447d56d | 84 | #include "smp.h" |
5ead97c8 JF |
85 | #include "multicalls.h" |
86 | ||
87 | EXPORT_SYMBOL_GPL(hypercall_page); | |
88 | ||
a520996a KRW |
89 | /* |
90 | * Pointer to the xen_vcpu_info structure or | |
91 | * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info | |
92 | * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info | |
93 | * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point | |
94 | * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to | |
95 | * acknowledge pending events. | |
96 | * Also more subtly it is used by the patched version of irq enable/disable | |
97 | * e.g. xen_irq_enable_direct and xen_iret in PV mode. | |
98 | * | |
99 | * The desire to be able to do those mask/unmask operations as a single | |
100 | * instruction by using the per-cpu offset held in %gs is the real reason | |
101 | * vcpu info is in a per-cpu pointer and the original reason for this | |
102 | * hypercall. | |
103 | * | |
104 | */ | |
5ead97c8 | 105 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
a520996a KRW |
106 | |
107 | /* | |
108 | * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info | |
109 | * hypercall. This can be used both in PV and PVHVM mode. The structure | |
110 | * overrides the default per_cpu(xen_vcpu, cpu) value. | |
111 | */ | |
5ead97c8 | 112 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); |
9f79991d | 113 | |
6e833587 JF |
114 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
115 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
116 | ||
7e77506a IC |
117 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
118 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
119 | unsigned long machine_to_phys_nr; |
120 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 121 | |
5ead97c8 JF |
122 | struct start_info *xen_start_info; |
123 | EXPORT_SYMBOL_GPL(xen_start_info); | |
124 | ||
a0d695c8 | 125 | struct shared_info xen_dummy_shared_info; |
60223a32 | 126 | |
38341432 JF |
127 | void *xen_initial_gdt; |
128 | ||
bee6ab53 | 129 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
130 | __read_mostly int xen_have_vector_callback; |
131 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 132 | |
60223a32 JF |
133 | /* |
134 | * Point at some empty memory to start with. We map the real shared_info | |
135 | * page as soon as fixmap is up and running. | |
136 | */ | |
4648da7c | 137 | struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info; |
60223a32 JF |
138 | |
139 | /* | |
140 | * Flag to determine whether vcpu info placement is available on all | |
141 | * VCPUs. We assume it is to start with, and then set it to zero on | |
142 | * the first failure. This is because it can succeed on some VCPUs | |
143 | * and not others, since it can involve hypervisor memory allocation, | |
144 | * or because the guest failed to guarantee all the appropriate | |
145 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
146 | * | |
147 | * Note that any particular CPU may be using a placed vcpu structure, | |
148 | * but we can only optimise if the all are. | |
149 | * | |
150 | * 0: not available, 1: available | |
151 | */ | |
e4d04071 | 152 | static int have_vcpu_info_placement = 1; |
60223a32 | 153 | |
1c32cdc6 DV |
154 | struct tls_descs { |
155 | struct desc_struct desc[3]; | |
156 | }; | |
157 | ||
158 | /* | |
159 | * Updating the 3 TLS descriptors in the GDT on every task switch is | |
160 | * surprisingly expensive so we avoid updating them if they haven't | |
161 | * changed. Since Xen writes different descriptors than the one | |
162 | * passed in the update_descriptor hypercall we keep shadow copies to | |
163 | * compare against. | |
164 | */ | |
165 | static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc); | |
166 | ||
c06ee78d MR |
167 | static void clamp_max_cpus(void) |
168 | { | |
169 | #ifdef CONFIG_SMP | |
170 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
171 | setup_max_cpus = MAX_VIRT_CPUS; | |
172 | #endif | |
173 | } | |
174 | ||
9c7a7942 | 175 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 176 | { |
60223a32 JF |
177 | struct vcpu_register_vcpu_info info; |
178 | int err; | |
179 | struct vcpu_info *vcpup; | |
180 | ||
a0d695c8 | 181 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 182 | |
7f1fc268 KRW |
183 | /* |
184 | * This path is called twice on PVHVM - first during bootup via | |
185 | * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being | |
186 | * hotplugged: cpu_up -> xen_hvm_cpu_notify. | |
187 | * As we can only do the VCPUOP_register_vcpu_info once lets | |
188 | * not over-write its result. | |
189 | * | |
190 | * For PV it is called during restore (xen_vcpu_restore) and bootup | |
191 | * (xen_setup_vcpu_info_placement). The hotplug mechanism does not | |
192 | * use this function. | |
193 | */ | |
194 | if (xen_hvm_domain()) { | |
195 | if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu)) | |
196 | return; | |
197 | } | |
c06ee78d MR |
198 | if (cpu < MAX_VIRT_CPUS) |
199 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 200 | |
c06ee78d MR |
201 | if (!have_vcpu_info_placement) { |
202 | if (cpu >= MAX_VIRT_CPUS) | |
203 | clamp_max_cpus(); | |
204 | return; | |
205 | } | |
60223a32 | 206 | |
c06ee78d | 207 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 208 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
209 | info.offset = offset_in_page(vcpup); |
210 | ||
60223a32 JF |
211 | /* Check to see if the hypervisor will put the vcpu_info |
212 | structure where we want it, which allows direct access via | |
a520996a KRW |
213 | a percpu-variable. |
214 | N.B. This hypercall can _only_ be called once per CPU. Subsequent | |
215 | calls will error out with -EINVAL. This is due to the fact that | |
216 | hypervisor has no unregister variant and this hypercall does not | |
217 | allow to over-write info.mfn and info.offset. | |
218 | */ | |
60223a32 JF |
219 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); |
220 | ||
221 | if (err) { | |
222 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
223 | have_vcpu_info_placement = 0; | |
c06ee78d | 224 | clamp_max_cpus(); |
60223a32 JF |
225 | } else { |
226 | /* This cpu is using the registered vcpu info, even if | |
227 | later ones fail to. */ | |
228 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 229 | } |
5ead97c8 JF |
230 | } |
231 | ||
9c7a7942 JF |
232 | /* |
233 | * On restore, set the vcpu placement up again. | |
234 | * If it fails, then we're in a bad state, since | |
235 | * we can't back out from using it... | |
236 | */ | |
237 | void xen_vcpu_restore(void) | |
238 | { | |
3905bb2a | 239 | int cpu; |
9c7a7942 | 240 | |
9d328a94 | 241 | for_each_possible_cpu(cpu) { |
3905bb2a | 242 | bool other_cpu = (cpu != smp_processor_id()); |
9d328a94 | 243 | bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, cpu, NULL); |
9c7a7942 | 244 | |
9d328a94 | 245 | if (other_cpu && is_up && |
3905bb2a JF |
246 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) |
247 | BUG(); | |
9c7a7942 | 248 | |
3905bb2a | 249 | xen_setup_runstate_info(cpu); |
9c7a7942 | 250 | |
3905bb2a | 251 | if (have_vcpu_info_placement) |
9c7a7942 | 252 | xen_vcpu_setup(cpu); |
9c7a7942 | 253 | |
9d328a94 | 254 | if (other_cpu && is_up && |
3905bb2a JF |
255 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) |
256 | BUG(); | |
9c7a7942 JF |
257 | } |
258 | } | |
259 | ||
5ead97c8 JF |
260 | static void __init xen_banner(void) |
261 | { | |
95c7c23b JF |
262 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
263 | struct xen_extraversion extra; | |
264 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
265 | ||
d285d683 MR |
266 | pr_info("Booting paravirtualized kernel %son %s\n", |
267 | xen_feature(XENFEAT_auto_translated_physmap) ? | |
268 | "with PVH extensions " : "", pv_info.name); | |
95c7c23b JF |
269 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
270 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 271 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 | 272 | } |
394b40f6 KRW |
273 | /* Check if running on Xen version (major, minor) or later */ |
274 | bool | |
275 | xen_running_on_version_or_later(unsigned int major, unsigned int minor) | |
276 | { | |
277 | unsigned int version; | |
278 | ||
279 | if (!xen_domain()) | |
280 | return false; | |
281 | ||
282 | version = HYPERVISOR_xen_version(XENVER_version, NULL); | |
283 | if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) || | |
284 | ((version >> 16) > major)) | |
285 | return true; | |
286 | return false; | |
287 | } | |
5ead97c8 | 288 | |
5e626254 AP |
289 | #define CPUID_THERM_POWER_LEAF 6 |
290 | #define APERFMPERF_PRESENT 0 | |
291 | ||
e826fe1b JF |
292 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
293 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
294 | ||
73c154c6 KRW |
295 | static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask; |
296 | static __read_mostly unsigned int cpuid_leaf5_ecx_val; | |
297 | static __read_mostly unsigned int cpuid_leaf5_edx_val; | |
298 | ||
65ea5b03 PA |
299 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
300 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 301 | { |
82d64699 | 302 | unsigned maskebx = ~0; |
e826fe1b | 303 | unsigned maskecx = ~0; |
5ead97c8 | 304 | unsigned maskedx = ~0; |
73c154c6 | 305 | unsigned setecx = 0; |
5ead97c8 JF |
306 | /* |
307 | * Mask out inconvenient features, to try and disable as many | |
308 | * unsupported kernel subsystems as possible. | |
309 | */ | |
82d64699 JF |
310 | switch (*ax) { |
311 | case 1: | |
e826fe1b | 312 | maskecx = cpuid_leaf1_ecx_mask; |
73c154c6 | 313 | setecx = cpuid_leaf1_ecx_set_mask; |
e826fe1b | 314 | maskedx = cpuid_leaf1_edx_mask; |
82d64699 JF |
315 | break; |
316 | ||
73c154c6 KRW |
317 | case CPUID_MWAIT_LEAF: |
318 | /* Synthesize the values.. */ | |
319 | *ax = 0; | |
320 | *bx = 0; | |
321 | *cx = cpuid_leaf5_ecx_val; | |
322 | *dx = cpuid_leaf5_edx_val; | |
323 | return; | |
324 | ||
5e626254 AP |
325 | case CPUID_THERM_POWER_LEAF: |
326 | /* Disabling APERFMPERF for kernel usage */ | |
327 | maskecx = ~(1 << APERFMPERF_PRESENT); | |
328 | break; | |
329 | ||
82d64699 JF |
330 | case 0xb: |
331 | /* Suppress extended topology stuff */ | |
332 | maskebx = 0; | |
333 | break; | |
e826fe1b | 334 | } |
5ead97c8 JF |
335 | |
336 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
337 | : "=a" (*ax), |
338 | "=b" (*bx), | |
339 | "=c" (*cx), | |
340 | "=d" (*dx) | |
341 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 342 | |
82d64699 | 343 | *bx &= maskebx; |
e826fe1b | 344 | *cx &= maskecx; |
73c154c6 | 345 | *cx |= setecx; |
65ea5b03 | 346 | *dx &= maskedx; |
73c154c6 | 347 | |
5ead97c8 JF |
348 | } |
349 | ||
73c154c6 KRW |
350 | static bool __init xen_check_mwait(void) |
351 | { | |
e3aa4e61 | 352 | #ifdef CONFIG_ACPI |
73c154c6 KRW |
353 | struct xen_platform_op op = { |
354 | .cmd = XENPF_set_processor_pminfo, | |
355 | .u.set_pminfo.id = -1, | |
356 | .u.set_pminfo.type = XEN_PM_PDC, | |
357 | }; | |
358 | uint32_t buf[3]; | |
359 | unsigned int ax, bx, cx, dx; | |
360 | unsigned int mwait_mask; | |
361 | ||
362 | /* We need to determine whether it is OK to expose the MWAIT | |
363 | * capability to the kernel to harvest deeper than C3 states from ACPI | |
364 | * _CST using the processor_harvest_xen.c module. For this to work, we | |
365 | * need to gather the MWAIT_LEAF values (which the cstate.c code | |
366 | * checks against). The hypervisor won't expose the MWAIT flag because | |
367 | * it would break backwards compatibility; so we will find out directly | |
368 | * from the hardware and hypercall. | |
369 | */ | |
370 | if (!xen_initial_domain()) | |
371 | return false; | |
372 | ||
e3aa4e61 LJ |
373 | /* |
374 | * When running under platform earlier than Xen4.2, do not expose | |
375 | * mwait, to avoid the risk of loading native acpi pad driver | |
376 | */ | |
377 | if (!xen_running_on_version_or_later(4, 2)) | |
378 | return false; | |
379 | ||
73c154c6 KRW |
380 | ax = 1; |
381 | cx = 0; | |
382 | ||
383 | native_cpuid(&ax, &bx, &cx, &dx); | |
384 | ||
385 | mwait_mask = (1 << (X86_FEATURE_EST % 32)) | | |
386 | (1 << (X86_FEATURE_MWAIT % 32)); | |
387 | ||
388 | if ((cx & mwait_mask) != mwait_mask) | |
389 | return false; | |
390 | ||
391 | /* We need to emulate the MWAIT_LEAF and for that we need both | |
392 | * ecx and edx. The hypercall provides only partial information. | |
393 | */ | |
394 | ||
395 | ax = CPUID_MWAIT_LEAF; | |
396 | bx = 0; | |
397 | cx = 0; | |
398 | dx = 0; | |
399 | ||
400 | native_cpuid(&ax, &bx, &cx, &dx); | |
401 | ||
402 | /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so, | |
403 | * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3. | |
404 | */ | |
405 | buf[0] = ACPI_PDC_REVISION_ID; | |
406 | buf[1] = 1; | |
407 | buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP); | |
408 | ||
409 | set_xen_guest_handle(op.u.set_pminfo.pdc, buf); | |
410 | ||
411 | if ((HYPERVISOR_dom0_op(&op) == 0) && | |
412 | (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) { | |
413 | cpuid_leaf5_ecx_val = cx; | |
414 | cpuid_leaf5_edx_val = dx; | |
415 | } | |
416 | return true; | |
417 | #else | |
418 | return false; | |
419 | #endif | |
420 | } | |
ad3062a0 | 421 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
422 | { |
423 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 424 | unsigned int xsave_mask; |
e826fe1b JF |
425 | |
426 | cpuid_leaf1_edx_mask = | |
cef12ee5 | 427 | ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
428 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
429 | ||
430 | if (!xen_initial_domain()) | |
431 | cpuid_leaf1_edx_mask &= | |
6efa20e4 | 432 | ~((1 << X86_FEATURE_ACPI)); /* disable ACPI */ |
4ea9b9ac ZD |
433 | |
434 | cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32)); | |
435 | ||
947ccf9c | 436 | ax = 1; |
5e287830 | 437 | cx = 0; |
d285d683 | 438 | cpuid(1, &ax, &bx, &cx, &dx); |
e826fe1b | 439 | |
947ccf9c SH |
440 | xsave_mask = |
441 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
442 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
443 | ||
444 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
445 | if ((cx & xsave_mask) != xsave_mask) | |
446 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
73c154c6 KRW |
447 | if (xen_check_mwait()) |
448 | cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32)); | |
e826fe1b JF |
449 | } |
450 | ||
5ead97c8 JF |
451 | static void xen_set_debugreg(int reg, unsigned long val) |
452 | { | |
453 | HYPERVISOR_set_debugreg(reg, val); | |
454 | } | |
455 | ||
456 | static unsigned long xen_get_debugreg(int reg) | |
457 | { | |
458 | return HYPERVISOR_get_debugreg(reg); | |
459 | } | |
460 | ||
224101ed | 461 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 462 | { |
5ead97c8 | 463 | xen_mc_flush(); |
224101ed | 464 | paravirt_end_context_switch(next); |
5ead97c8 JF |
465 | } |
466 | ||
467 | static unsigned long xen_store_tr(void) | |
468 | { | |
469 | return 0; | |
470 | } | |
471 | ||
a05d2eba | 472 | /* |
cef43bf6 JF |
473 | * Set the page permissions for a particular virtual address. If the |
474 | * address is a vmalloc mapping (or other non-linear mapping), then | |
475 | * find the linear mapping of the page and also set its protections to | |
476 | * match. | |
a05d2eba JF |
477 | */ |
478 | static void set_aliased_prot(void *v, pgprot_t prot) | |
479 | { | |
480 | int level; | |
481 | pte_t *ptep; | |
482 | pte_t pte; | |
483 | unsigned long pfn; | |
484 | struct page *page; | |
485 | ||
486 | ptep = lookup_address((unsigned long)v, &level); | |
487 | BUG_ON(ptep == NULL); | |
488 | ||
489 | pfn = pte_pfn(*ptep); | |
490 | page = pfn_to_page(pfn); | |
491 | ||
492 | pte = pfn_pte(pfn, prot); | |
493 | ||
494 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
495 | BUG(); | |
496 | ||
497 | if (!PageHighMem(page)) { | |
498 | void *av = __va(PFN_PHYS(pfn)); | |
499 | ||
500 | if (av != v) | |
501 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
502 | BUG(); | |
503 | } else | |
504 | kmap_flush_unused(); | |
505 | } | |
506 | ||
38ffbe66 JF |
507 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
508 | { | |
a05d2eba | 509 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
510 | int i; |
511 | ||
a05d2eba JF |
512 | for(i = 0; i < entries; i += entries_per_page) |
513 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
514 | } |
515 | ||
516 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
517 | { | |
a05d2eba | 518 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
519 | int i; |
520 | ||
a05d2eba JF |
521 | for(i = 0; i < entries; i += entries_per_page) |
522 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
523 | } |
524 | ||
5ead97c8 JF |
525 | static void xen_set_ldt(const void *addr, unsigned entries) |
526 | { | |
5ead97c8 JF |
527 | struct mmuext_op *op; |
528 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
529 | ||
ab78f7ad JF |
530 | trace_xen_cpu_set_ldt(addr, entries); |
531 | ||
5ead97c8 JF |
532 | op = mcs.args; |
533 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 534 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
535 | op->arg2.nr_ents = entries; |
536 | ||
537 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
538 | ||
539 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
540 | } | |
541 | ||
6b68f01b | 542 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 543 | { |
5ead97c8 JF |
544 | unsigned long va = dtr->address; |
545 | unsigned int size = dtr->size + 1; | |
546 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 547 | unsigned long frames[pages]; |
5ead97c8 | 548 | int f; |
5ead97c8 | 549 | |
577eebea JF |
550 | /* |
551 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
552 | * 8-byte entries, or 16 4k pages.. | |
553 | */ | |
5ead97c8 JF |
554 | |
555 | BUG_ON(size > 65536); | |
556 | BUG_ON(va & ~PAGE_MASK); | |
557 | ||
5ead97c8 | 558 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 559 | int level; |
577eebea | 560 | pte_t *ptep; |
6ed6bf42 JF |
561 | unsigned long pfn, mfn; |
562 | void *virt; | |
563 | ||
577eebea JF |
564 | /* |
565 | * The GDT is per-cpu and is in the percpu data area. | |
566 | * That can be virtually mapped, so we need to do a | |
567 | * page-walk to get the underlying MFN for the | |
568 | * hypercall. The page can also be in the kernel's | |
569 | * linear range, so we need to RO that mapping too. | |
570 | */ | |
571 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
572 | BUG_ON(ptep == NULL); |
573 | ||
574 | pfn = pte_pfn(*ptep); | |
575 | mfn = pfn_to_mfn(pfn); | |
576 | virt = __va(PFN_PHYS(pfn)); | |
577 | ||
578 | frames[f] = mfn; | |
9976b39b | 579 | |
5ead97c8 | 580 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 581 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
582 | } |
583 | ||
3ce5fa7e JF |
584 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
585 | BUG(); | |
5ead97c8 JF |
586 | } |
587 | ||
577eebea JF |
588 | /* |
589 | * load_gdt for early boot, when the gdt is only mapped once | |
590 | */ | |
ad3062a0 | 591 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
592 | { |
593 | unsigned long va = dtr->address; | |
594 | unsigned int size = dtr->size + 1; | |
595 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
596 | unsigned long frames[pages]; | |
597 | int f; | |
598 | ||
599 | /* | |
600 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
601 | * 8-byte entries, or 16 4k pages.. | |
602 | */ | |
603 | ||
604 | BUG_ON(size > 65536); | |
605 | BUG_ON(va & ~PAGE_MASK); | |
606 | ||
607 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
608 | pte_t pte; | |
609 | unsigned long pfn, mfn; | |
610 | ||
611 | pfn = virt_to_pfn(va); | |
612 | mfn = pfn_to_mfn(pfn); | |
613 | ||
614 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
615 | ||
616 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
617 | BUG(); | |
618 | ||
619 | frames[f] = mfn; | |
620 | } | |
621 | ||
622 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
623 | BUG(); | |
624 | } | |
625 | ||
59290362 DV |
626 | static inline bool desc_equal(const struct desc_struct *d1, |
627 | const struct desc_struct *d2) | |
628 | { | |
629 | return d1->a == d2->a && d1->b == d2->b; | |
630 | } | |
631 | ||
5ead97c8 JF |
632 | static void load_TLS_descriptor(struct thread_struct *t, |
633 | unsigned int cpu, unsigned int i) | |
634 | { | |
1c32cdc6 DV |
635 | struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i]; |
636 | struct desc_struct *gdt; | |
637 | xmaddr_t maddr; | |
638 | struct multicall_space mc; | |
639 | ||
640 | if (desc_equal(shadow, &t->tls_array[i])) | |
641 | return; | |
642 | ||
643 | *shadow = t->tls_array[i]; | |
644 | ||
645 | gdt = get_cpu_gdt_table(cpu); | |
646 | maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); | |
647 | mc = __xen_mc_entry(0); | |
5ead97c8 JF |
648 | |
649 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
650 | } | |
651 | ||
652 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
653 | { | |
8b84ad94 | 654 | /* |
ccbeed3a TH |
655 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
656 | * and lazy gs handling is enabled, it means we're in a | |
657 | * context switch, and %gs has just been saved. This means we | |
658 | * can zero it out to prevent faults on exit from the | |
659 | * hypervisor if the next process has no %gs. Either way, it | |
660 | * has been saved, and the new value will get loaded properly. | |
661 | * This will go away as soon as Xen has been modified to not | |
662 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
663 | * |
664 | * On x86_64, this hack is not used for %gs, because gs points | |
665 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
666 | * must not zero %gs on x86_64 | |
667 | * | |
668 | * For x86_64, we need to zero %fs, otherwise we may get an | |
669 | * exception between the new %fs descriptor being loaded and | |
670 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 671 | */ |
8a95408e EH |
672 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
673 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 674 | lazy_load_gs(0); |
8a95408e EH |
675 | #else |
676 | loadsegment(fs, 0); | |
677 | #endif | |
678 | } | |
679 | ||
680 | xen_mc_batch(); | |
681 | ||
682 | load_TLS_descriptor(t, cpu, 0); | |
683 | load_TLS_descriptor(t, cpu, 1); | |
684 | load_TLS_descriptor(t, cpu, 2); | |
685 | ||
686 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
687 | } |
688 | ||
a8fc1089 EH |
689 | #ifdef CONFIG_X86_64 |
690 | static void xen_load_gs_index(unsigned int idx) | |
691 | { | |
692 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
693 | BUG(); | |
5ead97c8 | 694 | } |
a8fc1089 | 695 | #endif |
5ead97c8 JF |
696 | |
697 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 698 | const void *ptr) |
5ead97c8 | 699 | { |
cef43bf6 | 700 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 701 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 702 | |
ab78f7ad JF |
703 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
704 | ||
f120f13e JF |
705 | preempt_disable(); |
706 | ||
5ead97c8 JF |
707 | xen_mc_flush(); |
708 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
709 | BUG(); | |
f120f13e JF |
710 | |
711 | preempt_enable(); | |
5ead97c8 JF |
712 | } |
713 | ||
e176d367 | 714 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
715 | struct trap_info *info) |
716 | { | |
6cac5a92 JF |
717 | unsigned long addr; |
718 | ||
6d02c426 | 719 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
720 | return 0; |
721 | ||
722 | info->vector = vector; | |
6cac5a92 JF |
723 | |
724 | addr = gate_offset(*val); | |
725 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
726 | /* |
727 | * Look for known traps using IST, and substitute them | |
728 | * appropriately. The debugger ones are the only ones we care | |
05e36006 LJ |
729 | * about. Xen will handle faults like double_fault, |
730 | * so we should never see them. Warn if | |
b80119bb JF |
731 | * there's an unexpected IST-using fault handler. |
732 | */ | |
6cac5a92 JF |
733 | if (addr == (unsigned long)debug) |
734 | addr = (unsigned long)xen_debug; | |
735 | else if (addr == (unsigned long)int3) | |
736 | addr = (unsigned long)xen_int3; | |
737 | else if (addr == (unsigned long)stack_segment) | |
738 | addr = (unsigned long)xen_stack_segment; | |
6efa20e4 | 739 | else if (addr == (unsigned long)double_fault) { |
b80119bb JF |
740 | /* Don't need to handle these */ |
741 | return 0; | |
742 | #ifdef CONFIG_X86_MCE | |
743 | } else if (addr == (unsigned long)machine_check) { | |
05e36006 LJ |
744 | /* |
745 | * when xen hypervisor inject vMCE to guest, | |
746 | * use native mce handler to handle it | |
747 | */ | |
748 | ; | |
b80119bb | 749 | #endif |
6efa20e4 KRW |
750 | } else if (addr == (unsigned long)nmi) |
751 | /* | |
752 | * Use the native version as well. | |
753 | */ | |
754 | ; | |
755 | else { | |
b80119bb JF |
756 | /* Some other trap using IST? */ |
757 | if (WARN_ON(val->ist != 0)) | |
758 | return 0; | |
759 | } | |
6cac5a92 JF |
760 | #endif /* CONFIG_X86_64 */ |
761 | info->address = addr; | |
762 | ||
e176d367 EH |
763 | info->cs = gate_segment(*val); |
764 | info->flags = val->dpl; | |
5ead97c8 | 765 | /* interrupt gates clear IF */ |
6d02c426 JF |
766 | if (val->type == GATE_INTERRUPT) |
767 | info->flags |= 1 << 2; | |
5ead97c8 JF |
768 | |
769 | return 1; | |
770 | } | |
771 | ||
772 | /* Locations of each CPU's IDT */ | |
6b68f01b | 773 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
774 | |
775 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
776 | also update Xen. */ | |
8d947344 | 777 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 778 | { |
5ead97c8 | 779 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
780 | unsigned long start, end; |
781 | ||
ab78f7ad JF |
782 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
783 | ||
f120f13e JF |
784 | preempt_disable(); |
785 | ||
780f36d8 CL |
786 | start = __this_cpu_read(idt_desc.address); |
787 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
788 | |
789 | xen_mc_flush(); | |
790 | ||
8d947344 | 791 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
792 | |
793 | if (p >= start && (p + 8) <= end) { | |
794 | struct trap_info info[2]; | |
795 | ||
796 | info[1].address = 0; | |
797 | ||
e176d367 | 798 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
799 | if (HYPERVISOR_set_trap_table(info)) |
800 | BUG(); | |
801 | } | |
f120f13e JF |
802 | |
803 | preempt_enable(); | |
5ead97c8 JF |
804 | } |
805 | ||
6b68f01b | 806 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 807 | struct trap_info *traps) |
5ead97c8 | 808 | { |
5ead97c8 JF |
809 | unsigned in, out, count; |
810 | ||
e176d367 | 811 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
812 | BUG_ON(count > 256); |
813 | ||
5ead97c8 | 814 | for (in = out = 0; in < count; in++) { |
e176d367 | 815 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 816 | |
e176d367 | 817 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
818 | out++; |
819 | } | |
820 | traps[out].address = 0; | |
f87e4cac JF |
821 | } |
822 | ||
823 | void xen_copy_trap_info(struct trap_info *traps) | |
824 | { | |
6b68f01b | 825 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
826 | |
827 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
828 | } |
829 | ||
830 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
831 | hold a spinlock to protect the static traps[] array (static because | |
832 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 833 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
834 | { |
835 | static DEFINE_SPINLOCK(lock); | |
836 | static struct trap_info traps[257]; | |
f87e4cac | 837 | |
ab78f7ad JF |
838 | trace_xen_cpu_load_idt(desc); |
839 | ||
f87e4cac JF |
840 | spin_lock(&lock); |
841 | ||
f120f13e JF |
842 | __get_cpu_var(idt_desc) = *desc; |
843 | ||
f87e4cac | 844 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
845 | |
846 | xen_mc_flush(); | |
847 | if (HYPERVISOR_set_trap_table(traps)) | |
848 | BUG(); | |
849 | ||
850 | spin_unlock(&lock); | |
851 | } | |
852 | ||
853 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
854 | they're handled differently. */ | |
855 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 856 | const void *desc, int type) |
5ead97c8 | 857 | { |
ab78f7ad JF |
858 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
859 | ||
f120f13e JF |
860 | preempt_disable(); |
861 | ||
014b15be GOC |
862 | switch (type) { |
863 | case DESC_LDT: | |
864 | case DESC_TSS: | |
5ead97c8 JF |
865 | /* ignore */ |
866 | break; | |
867 | ||
868 | default: { | |
9976b39b | 869 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
870 | |
871 | xen_mc_flush(); | |
014b15be | 872 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
873 | BUG(); |
874 | } | |
875 | ||
876 | } | |
f120f13e JF |
877 | |
878 | preempt_enable(); | |
5ead97c8 JF |
879 | } |
880 | ||
577eebea JF |
881 | /* |
882 | * Version of write_gdt_entry for use at early boot-time needed to | |
883 | * update an entry as simply as possible. | |
884 | */ | |
ad3062a0 | 885 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
886 | const void *desc, int type) |
887 | { | |
ab78f7ad JF |
888 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
889 | ||
577eebea JF |
890 | switch (type) { |
891 | case DESC_LDT: | |
892 | case DESC_TSS: | |
893 | /* ignore */ | |
894 | break; | |
895 | ||
896 | default: { | |
897 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
898 | ||
899 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
900 | dt[entry] = *(struct desc_struct *)desc; | |
901 | } | |
902 | ||
903 | } | |
904 | } | |
905 | ||
faca6227 | 906 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 907 | struct thread_struct *thread) |
5ead97c8 | 908 | { |
ab78f7ad JF |
909 | struct multicall_space mcs; |
910 | ||
911 | mcs = xen_mc_entry(0); | |
faca6227 | 912 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
913 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
914 | } | |
915 | ||
916 | static void xen_set_iopl_mask(unsigned mask) | |
917 | { | |
918 | struct physdev_set_iopl set_iopl; | |
919 | ||
920 | /* Force the change at ring 0. */ | |
921 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
922 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
923 | } | |
924 | ||
925 | static void xen_io_delay(void) | |
926 | { | |
927 | } | |
928 | ||
929 | #ifdef CONFIG_X86_LOCAL_APIC | |
558daa28 KRW |
930 | static unsigned long xen_set_apic_id(unsigned int x) |
931 | { | |
932 | WARN_ON(1); | |
933 | return x; | |
934 | } | |
935 | static unsigned int xen_get_apic_id(unsigned long x) | |
936 | { | |
937 | return ((x)>>24) & 0xFFu; | |
938 | } | |
ad66dd34 | 939 | static u32 xen_apic_read(u32 reg) |
5ead97c8 | 940 | { |
558daa28 KRW |
941 | struct xen_platform_op op = { |
942 | .cmd = XENPF_get_cpuinfo, | |
943 | .interface_version = XENPF_INTERFACE_VERSION, | |
944 | .u.pcpu_info.xen_cpuid = 0, | |
945 | }; | |
946 | int ret = 0; | |
947 | ||
948 | /* Shouldn't need this as APIC is turned off for PV, and we only | |
949 | * get called on the bootup processor. But just in case. */ | |
950 | if (!xen_initial_domain() || smp_processor_id()) | |
951 | return 0; | |
952 | ||
953 | if (reg == APIC_LVR) | |
954 | return 0x10; | |
955 | ||
956 | if (reg != APIC_ID) | |
957 | return 0; | |
958 | ||
959 | ret = HYPERVISOR_dom0_op(&op); | |
960 | if (ret) | |
961 | return 0; | |
962 | ||
963 | return op.u.pcpu_info.apic_id << 24; | |
5ead97c8 | 964 | } |
f87e4cac | 965 | |
ad66dd34 | 966 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
967 | { |
968 | /* Warn to see if there's any stray references */ | |
969 | WARN_ON(1); | |
970 | } | |
ad66dd34 | 971 | |
ad66dd34 SS |
972 | static u64 xen_apic_icr_read(void) |
973 | { | |
974 | return 0; | |
975 | } | |
976 | ||
977 | static void xen_apic_icr_write(u32 low, u32 id) | |
978 | { | |
979 | /* Warn to see if there's any stray references */ | |
980 | WARN_ON(1); | |
981 | } | |
982 | ||
983 | static void xen_apic_wait_icr_idle(void) | |
984 | { | |
985 | return; | |
986 | } | |
987 | ||
94a8c3c2 YL |
988 | static u32 xen_safe_apic_wait_icr_idle(void) |
989 | { | |
990 | return 0; | |
991 | } | |
992 | ||
c1eeb2de YL |
993 | static void set_xen_basic_apic_ops(void) |
994 | { | |
995 | apic->read = xen_apic_read; | |
996 | apic->write = xen_apic_write; | |
997 | apic->icr_read = xen_apic_icr_read; | |
998 | apic->icr_write = xen_apic_icr_write; | |
999 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
1000 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
558daa28 KRW |
1001 | apic->set_apic_id = xen_set_apic_id; |
1002 | apic->get_apic_id = xen_get_apic_id; | |
f447d56d BG |
1003 | |
1004 | #ifdef CONFIG_SMP | |
1005 | apic->send_IPI_allbutself = xen_send_IPI_allbutself; | |
1006 | apic->send_IPI_mask_allbutself = xen_send_IPI_mask_allbutself; | |
1007 | apic->send_IPI_mask = xen_send_IPI_mask; | |
1008 | apic->send_IPI_all = xen_send_IPI_all; | |
1009 | apic->send_IPI_self = xen_send_IPI_self; | |
1010 | #endif | |
c1eeb2de | 1011 | } |
ad66dd34 | 1012 | |
5ead97c8 JF |
1013 | #endif |
1014 | ||
7b1333aa JF |
1015 | static void xen_clts(void) |
1016 | { | |
1017 | struct multicall_space mcs; | |
1018 | ||
1019 | mcs = xen_mc_entry(0); | |
1020 | ||
1021 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
1022 | ||
1023 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1024 | } | |
1025 | ||
a789ed5f JF |
1026 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
1027 | ||
1028 | static unsigned long xen_read_cr0(void) | |
1029 | { | |
2113f469 | 1030 | unsigned long cr0 = this_cpu_read(xen_cr0_value); |
a789ed5f JF |
1031 | |
1032 | if (unlikely(cr0 == 0)) { | |
1033 | cr0 = native_read_cr0(); | |
2113f469 | 1034 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f JF |
1035 | } |
1036 | ||
1037 | return cr0; | |
1038 | } | |
1039 | ||
7b1333aa JF |
1040 | static void xen_write_cr0(unsigned long cr0) |
1041 | { | |
1042 | struct multicall_space mcs; | |
1043 | ||
2113f469 | 1044 | this_cpu_write(xen_cr0_value, cr0); |
a789ed5f | 1045 | |
7b1333aa JF |
1046 | /* Only pay attention to cr0.TS; everything else is |
1047 | ignored. */ | |
1048 | mcs = xen_mc_entry(0); | |
1049 | ||
1050 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
1051 | ||
1052 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1053 | } | |
1054 | ||
5ead97c8 JF |
1055 | static void xen_write_cr4(unsigned long cr4) |
1056 | { | |
2956a351 JF |
1057 | cr4 &= ~X86_CR4_PGE; |
1058 | cr4 &= ~X86_CR4_PSE; | |
1059 | ||
1060 | native_write_cr4(cr4); | |
5ead97c8 | 1061 | } |
1a7bbda5 KRW |
1062 | #ifdef CONFIG_X86_64 |
1063 | static inline unsigned long xen_read_cr8(void) | |
1064 | { | |
1065 | return 0; | |
1066 | } | |
1067 | static inline void xen_write_cr8(unsigned long val) | |
1068 | { | |
1069 | BUG_ON(val); | |
1070 | } | |
1071 | #endif | |
1153968a JF |
1072 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
1073 | { | |
1074 | int ret; | |
1075 | ||
1076 | ret = 0; | |
1077 | ||
f63c2f24 | 1078 | switch (msr) { |
1153968a JF |
1079 | #ifdef CONFIG_X86_64 |
1080 | unsigned which; | |
1081 | u64 base; | |
1082 | ||
1083 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
1084 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
1085 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
1086 | ||
1087 | set: | |
1088 | base = ((u64)high << 32) | low; | |
1089 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 1090 | ret = -EIO; |
1153968a JF |
1091 | break; |
1092 | #endif | |
d89961e2 JF |
1093 | |
1094 | case MSR_STAR: | |
1095 | case MSR_CSTAR: | |
1096 | case MSR_LSTAR: | |
1097 | case MSR_SYSCALL_MASK: | |
1098 | case MSR_IA32_SYSENTER_CS: | |
1099 | case MSR_IA32_SYSENTER_ESP: | |
1100 | case MSR_IA32_SYSENTER_EIP: | |
1101 | /* Fast syscall setup is all done in hypercalls, so | |
1102 | these are all ignored. Stub them out here to stop | |
1103 | Xen console noise. */ | |
1104 | break; | |
1105 | ||
41f2e477 JF |
1106 | case MSR_IA32_CR_PAT: |
1107 | if (smp_processor_id() == 0) | |
1108 | xen_set_pat(((u64)high << 32) | low); | |
1109 | break; | |
1110 | ||
1153968a JF |
1111 | default: |
1112 | ret = native_write_msr_safe(msr, low, high); | |
1113 | } | |
1114 | ||
1115 | return ret; | |
1116 | } | |
1117 | ||
0e91398f | 1118 | void xen_setup_shared_info(void) |
5ead97c8 JF |
1119 | { |
1120 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
1121 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
1122 | xen_start_info->shared_info); | |
1123 | ||
1124 | HYPERVISOR_shared_info = | |
1125 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
1126 | } else |
1127 | HYPERVISOR_shared_info = | |
1128 | (struct shared_info *)__va(xen_start_info->shared_info); | |
1129 | ||
2e8fe719 JF |
1130 | #ifndef CONFIG_SMP |
1131 | /* In UP this is as good a place as any to set up shared info */ | |
1132 | xen_setup_vcpu_info_placement(); | |
1133 | #endif | |
d5edbc1f JF |
1134 | |
1135 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
1136 | } |
1137 | ||
5f054e31 | 1138 | /* This is called once we have the cpu_possible_mask */ |
0e91398f | 1139 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
1140 | { |
1141 | int cpu; | |
1142 | ||
1143 | for_each_possible_cpu(cpu) | |
1144 | xen_vcpu_setup(cpu); | |
1145 | ||
1146 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
1147 | percpu area for all cpus, so make use of it */ | |
1148 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
1149 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
1150 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
1151 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
1152 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 1153 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 1154 | } |
5ead97c8 JF |
1155 | } |
1156 | ||
ab144f5e AK |
1157 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
1158 | unsigned long addr, unsigned len) | |
6487673b JF |
1159 | { |
1160 | char *start, *end, *reloc; | |
1161 | unsigned ret; | |
1162 | ||
1163 | start = end = reloc = NULL; | |
1164 | ||
93b1eab3 JF |
1165 | #define SITE(op, x) \ |
1166 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
1167 | if (have_vcpu_info_placement) { \ |
1168 | start = (char *)xen_##x##_direct; \ | |
1169 | end = xen_##x##_direct_end; \ | |
1170 | reloc = xen_##x##_direct_reloc; \ | |
1171 | } \ | |
1172 | goto patch_site | |
1173 | ||
1174 | switch (type) { | |
93b1eab3 JF |
1175 | SITE(pv_irq_ops, irq_enable); |
1176 | SITE(pv_irq_ops, irq_disable); | |
1177 | SITE(pv_irq_ops, save_fl); | |
1178 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
1179 | #undef SITE |
1180 | ||
1181 | patch_site: | |
1182 | if (start == NULL || (end-start) > len) | |
1183 | goto default_patch; | |
1184 | ||
ab144f5e | 1185 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
1186 | |
1187 | /* Note: because reloc is assigned from something that | |
1188 | appears to be an array, gcc assumes it's non-null, | |
1189 | but doesn't know its relationship with start and | |
1190 | end. */ | |
1191 | if (reloc > start && reloc < end) { | |
1192 | int reloc_off = reloc - start; | |
ab144f5e AK |
1193 | long *relocp = (long *)(insnbuf + reloc_off); |
1194 | long delta = start - (char *)addr; | |
6487673b JF |
1195 | |
1196 | *relocp += delta; | |
1197 | } | |
1198 | break; | |
1199 | ||
1200 | default_patch: | |
1201 | default: | |
ab144f5e AK |
1202 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
1203 | addr, len); | |
6487673b JF |
1204 | break; |
1205 | } | |
1206 | ||
1207 | return ret; | |
1208 | } | |
1209 | ||
ad3062a0 | 1210 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
1211 | .paravirt_enabled = 1, |
1212 | .shared_kernel_pmd = 0, | |
1213 | ||
318f5a2a AL |
1214 | #ifdef CONFIG_X86_64 |
1215 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
1216 | #endif | |
1217 | ||
5ead97c8 | 1218 | .name = "Xen", |
93b1eab3 | 1219 | }; |
5ead97c8 | 1220 | |
ad3062a0 | 1221 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 1222 | .patch = xen_patch, |
93b1eab3 | 1223 | }; |
5ead97c8 | 1224 | |
ad3062a0 | 1225 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
1226 | .cpuid = xen_cpuid, |
1227 | ||
1228 | .set_debugreg = xen_set_debugreg, | |
1229 | .get_debugreg = xen_get_debugreg, | |
1230 | ||
7b1333aa | 1231 | .clts = xen_clts, |
5ead97c8 | 1232 | |
a789ed5f | 1233 | .read_cr0 = xen_read_cr0, |
7b1333aa | 1234 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 1235 | |
5ead97c8 JF |
1236 | .read_cr4 = native_read_cr4, |
1237 | .read_cr4_safe = native_read_cr4_safe, | |
1238 | .write_cr4 = xen_write_cr4, | |
1239 | ||
1a7bbda5 KRW |
1240 | #ifdef CONFIG_X86_64 |
1241 | .read_cr8 = xen_read_cr8, | |
1242 | .write_cr8 = xen_write_cr8, | |
1243 | #endif | |
1244 | ||
5ead97c8 JF |
1245 | .wbinvd = native_wbinvd, |
1246 | ||
1247 | .read_msr = native_read_msr_safe, | |
1153968a | 1248 | .write_msr = xen_write_msr_safe, |
1ab46fd3 | 1249 | |
5ead97c8 JF |
1250 | .read_tsc = native_read_tsc, |
1251 | .read_pmc = native_read_pmc, | |
1252 | ||
cd0608e7 KRW |
1253 | .read_tscp = native_read_tscp, |
1254 | ||
81e103f1 | 1255 | .iret = xen_iret, |
d75cd22f | 1256 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
1257 | #ifdef CONFIG_X86_64 |
1258 | .usergs_sysret32 = xen_sysret32, | |
1259 | .usergs_sysret64 = xen_sysret64, | |
1260 | #endif | |
5ead97c8 JF |
1261 | |
1262 | .load_tr_desc = paravirt_nop, | |
1263 | .set_ldt = xen_set_ldt, | |
1264 | .load_gdt = xen_load_gdt, | |
1265 | .load_idt = xen_load_idt, | |
1266 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1267 | #ifdef CONFIG_X86_64 |
1268 | .load_gs_index = xen_load_gs_index, | |
1269 | #endif | |
5ead97c8 | 1270 | |
38ffbe66 JF |
1271 | .alloc_ldt = xen_alloc_ldt, |
1272 | .free_ldt = xen_free_ldt, | |
1273 | ||
5ead97c8 JF |
1274 | .store_idt = native_store_idt, |
1275 | .store_tr = xen_store_tr, | |
1276 | ||
1277 | .write_ldt_entry = xen_write_ldt_entry, | |
1278 | .write_gdt_entry = xen_write_gdt_entry, | |
1279 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1280 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1281 | |
1282 | .set_iopl_mask = xen_set_iopl_mask, | |
1283 | .io_delay = xen_io_delay, | |
1284 | ||
952d1d70 JF |
1285 | /* Xen takes care of %gs when switching to usermode for us */ |
1286 | .swapgs = paravirt_nop, | |
1287 | ||
224101ed JF |
1288 | .start_context_switch = paravirt_start_context_switch, |
1289 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1290 | }; |
1291 | ||
ad3062a0 | 1292 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1293 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1294 | .startup_ipi_hook = paravirt_nop, |
1295 | #endif | |
93b1eab3 JF |
1296 | }; |
1297 | ||
fefa629a JF |
1298 | static void xen_reboot(int reason) |
1299 | { | |
349c709f JF |
1300 | struct sched_shutdown r = { .reason = reason }; |
1301 | ||
349c709f | 1302 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1303 | BUG(); |
1304 | } | |
1305 | ||
1306 | static void xen_restart(char *msg) | |
1307 | { | |
1308 | xen_reboot(SHUTDOWN_reboot); | |
1309 | } | |
1310 | ||
1311 | static void xen_emergency_restart(void) | |
1312 | { | |
1313 | xen_reboot(SHUTDOWN_reboot); | |
1314 | } | |
1315 | ||
1316 | static void xen_machine_halt(void) | |
1317 | { | |
1318 | xen_reboot(SHUTDOWN_poweroff); | |
1319 | } | |
1320 | ||
b2abe506 TG |
1321 | static void xen_machine_power_off(void) |
1322 | { | |
1323 | if (pm_power_off) | |
1324 | pm_power_off(); | |
1325 | xen_reboot(SHUTDOWN_poweroff); | |
1326 | } | |
1327 | ||
fefa629a JF |
1328 | static void xen_crash_shutdown(struct pt_regs *regs) |
1329 | { | |
1330 | xen_reboot(SHUTDOWN_crash); | |
1331 | } | |
1332 | ||
f09f6d19 DD |
1333 | static int |
1334 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1335 | { | |
086748e5 | 1336 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1337 | return NOTIFY_DONE; |
1338 | } | |
1339 | ||
1340 | static struct notifier_block xen_panic_block = { | |
1341 | .notifier_call= xen_panic_event, | |
1342 | }; | |
1343 | ||
1344 | int xen_panic_handler_init(void) | |
1345 | { | |
1346 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1347 | return 0; | |
1348 | } | |
1349 | ||
ad3062a0 | 1350 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1351 | .restart = xen_restart, |
1352 | .halt = xen_machine_halt, | |
b2abe506 | 1353 | .power_off = xen_machine_power_off, |
fefa629a JF |
1354 | .shutdown = xen_machine_halt, |
1355 | .crash_shutdown = xen_crash_shutdown, | |
1356 | .emergency_restart = xen_emergency_restart, | |
1357 | }; | |
1358 | ||
96f28bc6 DV |
1359 | static void __init xen_boot_params_init_edd(void) |
1360 | { | |
1361 | #if IS_ENABLED(CONFIG_EDD) | |
1362 | struct xen_platform_op op; | |
1363 | struct edd_info *edd_info; | |
1364 | u32 *mbr_signature; | |
1365 | unsigned nr; | |
1366 | int ret; | |
1367 | ||
1368 | edd_info = boot_params.eddbuf; | |
1369 | mbr_signature = boot_params.edd_mbr_sig_buffer; | |
1370 | ||
1371 | op.cmd = XENPF_firmware_info; | |
1372 | ||
1373 | op.u.firmware_info.type = XEN_FW_DISK_INFO; | |
1374 | for (nr = 0; nr < EDDMAXNR; nr++) { | |
1375 | struct edd_info *info = edd_info + nr; | |
1376 | ||
1377 | op.u.firmware_info.index = nr; | |
1378 | info->params.length = sizeof(info->params); | |
1379 | set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params, | |
1380 | &info->params); | |
1381 | ret = HYPERVISOR_dom0_op(&op); | |
1382 | if (ret) | |
1383 | break; | |
1384 | ||
1385 | #define C(x) info->x = op.u.firmware_info.u.disk_info.x | |
1386 | C(device); | |
1387 | C(version); | |
1388 | C(interface_support); | |
1389 | C(legacy_max_cylinder); | |
1390 | C(legacy_max_head); | |
1391 | C(legacy_sectors_per_track); | |
1392 | #undef C | |
1393 | } | |
1394 | boot_params.eddbuf_entries = nr; | |
1395 | ||
1396 | op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE; | |
1397 | for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) { | |
1398 | op.u.firmware_info.index = nr; | |
1399 | ret = HYPERVISOR_dom0_op(&op); | |
1400 | if (ret) | |
1401 | break; | |
1402 | mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature; | |
1403 | } | |
1404 | boot_params.edd_mbr_sig_buf_entries = nr; | |
1405 | #endif | |
1406 | } | |
1407 | ||
577eebea JF |
1408 | /* |
1409 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1410 | * we do this, we have to be careful not to call any stack-protected | |
1411 | * function, which is most of the kernel. | |
1412 | */ | |
8d656bbe | 1413 | static void __init xen_setup_gdt(void) |
577eebea | 1414 | { |
8d656bbe MR |
1415 | if (xen_feature(XENFEAT_auto_translated_physmap)) { |
1416 | #ifdef CONFIG_X86_64 | |
1417 | unsigned long dummy; | |
1418 | ||
1419 | switch_to_new_gdt(0); /* GDT and GS set */ | |
1420 | ||
1421 | /* We are switching of the Xen provided GDT to our HVM mode | |
1422 | * GDT. The new GDT has __KERNEL_CS with CS.L = 1 | |
1423 | * and we are jumping to reload it. | |
1424 | */ | |
1425 | asm volatile ("pushq %0\n" | |
1426 | "leaq 1f(%%rip),%0\n" | |
1427 | "pushq %0\n" | |
1428 | "lretq\n" | |
1429 | "1:\n" | |
1430 | : "=&r" (dummy) : "0" (__KERNEL_CS)); | |
1431 | ||
1432 | /* | |
1433 | * While not needed, we also set the %es, %ds, and %fs | |
1434 | * to zero. We don't care about %ss as it is NULL. | |
1435 | * Strictly speaking this is not needed as Xen zeros those | |
1436 | * out (and also MSR_FS_BASE, MSR_GS_BASE, MSR_KERNEL_GS_BASE) | |
1437 | * | |
1438 | * Linux zeros them in cpu_init() and in secondary_startup_64 | |
1439 | * (for BSP). | |
1440 | */ | |
1441 | loadsegment(es, 0); | |
1442 | loadsegment(ds, 0); | |
1443 | loadsegment(fs, 0); | |
1444 | #else | |
1445 | /* PVH: TODO Implement. */ | |
1446 | BUG(); | |
1447 | #endif | |
1448 | return; /* PVH does not need any PV GDT ops. */ | |
1449 | } | |
577eebea JF |
1450 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; |
1451 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1452 | ||
1453 | setup_stack_canary_segment(0); | |
1454 | switch_to_new_gdt(0); | |
1455 | ||
1456 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1457 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1458 | } | |
1459 | ||
d285d683 MR |
1460 | static void __init xen_pvh_early_guest_init(void) |
1461 | { | |
1462 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1463 | return; | |
1464 | ||
1465 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1466 | xen_have_vector_callback = 1; | |
1467 | ||
1468 | #ifdef CONFIG_X86_32 | |
1469 | BUG(); /* PVH: Implement proper support. */ | |
1470 | #endif | |
1471 | } | |
1472 | ||
5ead97c8 JF |
1473 | /* First C function to be called on Xen boot */ |
1474 | asmlinkage void __init xen_start_kernel(void) | |
1475 | { | |
ec35a69c KRW |
1476 | struct physdev_set_iopl set_iopl; |
1477 | int rc; | |
5ead97c8 JF |
1478 | |
1479 | if (!xen_start_info) | |
1480 | return; | |
1481 | ||
6e833587 JF |
1482 | xen_domain_type = XEN_PV_DOMAIN; |
1483 | ||
d285d683 MR |
1484 | xen_setup_features(); |
1485 | xen_pvh_early_guest_init(); | |
7e77506a IC |
1486 | xen_setup_machphys_mapping(); |
1487 | ||
5ead97c8 | 1488 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1489 | pv_info = xen_info; |
1490 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1491 | pv_apic_ops = xen_apic_ops; |
d285d683 MR |
1492 | if (!xen_pvh_domain()) |
1493 | pv_cpu_ops = xen_cpu_ops; | |
93b1eab3 | 1494 | |
6b18ae3e | 1495 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1496 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1497 | x86_init.oem.banner = xen_banner; |
845b3944 | 1498 | |
409771d2 | 1499 | xen_init_time_ops(); |
93b1eab3 | 1500 | |
ce2eef33 | 1501 | /* |
577eebea | 1502 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1503 | */ |
577eebea | 1504 | |
973df35e JF |
1505 | xen_init_mmu_ops(); |
1506 | ||
577eebea JF |
1507 | /* Prevent unwanted bits from being set in PTEs. */ |
1508 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
8eaffa67 | 1509 | #if 0 |
577eebea | 1510 | if (!xen_initial_domain()) |
8eaffa67 | 1511 | #endif |
577eebea JF |
1512 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); |
1513 | ||
1514 | __supported_pte_mask |= _PAGE_IOMAP; | |
1515 | ||
817a824b IC |
1516 | /* |
1517 | * Prevent page tables from being allocated in highmem, even | |
1518 | * if CONFIG_HIGHPTE is enabled. | |
1519 | */ | |
1520 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1521 | ||
b75fe4e5 | 1522 | /* Work out if we support NX */ |
4763ed4d | 1523 | x86_configure_nx(); |
b75fe4e5 | 1524 | |
577eebea | 1525 | /* Get mfn list */ |
696fd7c5 | 1526 | xen_build_dynamic_phys_to_machine(); |
577eebea JF |
1527 | |
1528 | /* | |
1529 | * Set up kernel GDT and segment registers, mainly so that | |
1530 | * -fstack-protector code can be executed. | |
1531 | */ | |
8d656bbe | 1532 | xen_setup_gdt(); |
0d1edf46 | 1533 | |
ce2eef33 | 1534 | xen_init_irq_ops(); |
e826fe1b JF |
1535 | xen_init_cpuid_mask(); |
1536 | ||
94a8c3c2 | 1537 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1538 | /* |
94a8c3c2 | 1539 | * set up the basic apic ops. |
ad66dd34 | 1540 | */ |
c1eeb2de | 1541 | set_xen_basic_apic_ops(); |
ad66dd34 | 1542 | #endif |
93b1eab3 | 1543 | |
e57778a1 JF |
1544 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1545 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1546 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1547 | } | |
1548 | ||
fefa629a JF |
1549 | machine_ops = xen_machine_ops; |
1550 | ||
38341432 JF |
1551 | /* |
1552 | * The only reliable way to retain the initial address of the | |
1553 | * percpu gdt_page is to remember it here, so we can go and | |
1554 | * mark it RW later, when the initial percpu area is freed. | |
1555 | */ | |
1556 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1557 | |
a9e7062d | 1558 | xen_smp_init(); |
5ead97c8 | 1559 | |
c1f5db1a IC |
1560 | #ifdef CONFIG_ACPI_NUMA |
1561 | /* | |
1562 | * The pages we from Xen are not related to machine pages, so | |
1563 | * any NUMA information the kernel tries to get from ACPI will | |
1564 | * be meaningless. Prevent it from trying. | |
1565 | */ | |
1566 | acpi_numa = -1; | |
1567 | #endif | |
c79c4982 KRW |
1568 | #ifdef CONFIG_X86_PAT |
1569 | /* | |
1570 | * For right now disable the PAT. We should remove this once | |
1571 | * git commit 8eaffa67b43e99ae581622c5133e20b0f48bcef1 | |
1572 | * (xen/pat: Disable PAT support for now) is reverted. | |
1573 | */ | |
1574 | pat_enabled = 0; | |
1575 | #endif | |
60223a32 | 1576 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1577 | possible map and a non-dummy shared_info. */ |
60223a32 | 1578 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1579 | |
55d80856 | 1580 | local_irq_disable(); |
2ce802f6 | 1581 | early_boot_irqs_disabled = true; |
55d80856 | 1582 | |
084a2a4e | 1583 | xen_raw_console_write("mapping kernel into physical memory\n"); |
3699aad0 | 1584 | xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base, xen_start_info->nr_pages); |
5ead97c8 | 1585 | |
33a84750 JF |
1586 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1587 | xen_build_mfn_list_list(); | |
1588 | ||
5ead97c8 JF |
1589 | /* keep using Xen gdt for now; no urgent need to change it */ |
1590 | ||
e68266b7 | 1591 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1592 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1593 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1594 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1595 | #else |
1596 | pv_info.kernel_rpl = 0; | |
1597 | #endif | |
5ead97c8 | 1598 | /* set the limit of our address space */ |
fb1d8404 | 1599 | xen_reserve_top(); |
5ead97c8 | 1600 | |
d285d683 MR |
1601 | /* PVH: runs at default kernel iopl of 0 */ |
1602 | if (!xen_pvh_domain()) { | |
1603 | /* | |
1604 | * We used to do this in xen_arch_setup, but that is too late | |
1605 | * on AMD were early_cpu_init (run before ->arch_setup()) calls | |
1606 | * early_amd_init which pokes 0xcf8 port. | |
1607 | */ | |
1608 | set_iopl.iopl = 1; | |
1609 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1610 | if (rc != 0) | |
1611 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1612 | } | |
ec35a69c | 1613 | |
7d087b68 | 1614 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1615 | /* set up basic CPUID stuff */ |
1616 | cpu_detect(&new_cpu_data); | |
60e019eb | 1617 | set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU); |
d560bc61 | 1618 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1619 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1620 | #endif |
5ead97c8 JF |
1621 | |
1622 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1623 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1624 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1625 | ? __pa(xen_start_info->mod_start) : 0; | |
1626 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1627 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1628 | |
6e833587 | 1629 | if (!xen_initial_domain()) { |
83abc70a | 1630 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1631 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1632 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1633 | if (pci_xen) |
1634 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1635 | } else { |
c2419b4a JF |
1636 | const struct dom0_vga_console_info *info = |
1637 | (void *)((char *)xen_start_info + | |
1638 | xen_start_info->console.dom0.info_off); | |
ffb8b233 KRW |
1639 | struct xen_platform_op op = { |
1640 | .cmd = XENPF_firmware_info, | |
1641 | .interface_version = XENPF_INTERFACE_VERSION, | |
1642 | .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS, | |
1643 | }; | |
c2419b4a JF |
1644 | |
1645 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1646 | xen_start_info->console.domU.mfn = 0; | |
1647 | xen_start_info->console.domU.evtchn = 0; | |
1648 | ||
ffb8b233 KRW |
1649 | if (HYPERVISOR_dom0_op(&op) == 0) |
1650 | boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags; | |
1651 | ||
31b3c9d7 KRW |
1652 | xen_init_apic(); |
1653 | ||
5d990b62 CW |
1654 | /* Make sure ACS will be enabled */ |
1655 | pci_request_acs(); | |
211063dc KRW |
1656 | |
1657 | xen_acpi_sleep_register(); | |
bd49940a KRW |
1658 | |
1659 | /* Avoid searching for BIOS MP tables */ | |
1660 | x86_init.mpparse.find_smp_config = x86_init_noop; | |
1661 | x86_init.mpparse.get_smp_config = x86_init_uint_noop; | |
96f28bc6 DV |
1662 | |
1663 | xen_boot_params_init_edd(); | |
9e124fe1 | 1664 | } |
76a8df7b DV |
1665 | #ifdef CONFIG_PCI |
1666 | /* PCI BIOS service won't work from a PV guest. */ | |
1667 | pci_probe &= ~PCI_PROBE_BIOS; | |
1668 | #endif | |
084a2a4e JF |
1669 | xen_raw_console_write("about to get started...\n"); |
1670 | ||
499d19b8 JF |
1671 | xen_setup_runstate_info(0); |
1672 | ||
5ead97c8 | 1673 | /* Start the world */ |
f5d36de0 | 1674 | #ifdef CONFIG_X86_32 |
f0d43100 | 1675 | i386_start_kernel(); |
f5d36de0 | 1676 | #else |
084a2a4e | 1677 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1678 | #endif |
5ead97c8 | 1679 | } |
bee6ab53 | 1680 | |
e9daff24 | 1681 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1682 | { |
e9daff24 | 1683 | int cpu; |
bee6ab53 | 1684 | struct xen_add_to_physmap xatp; |
e9daff24 | 1685 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1686 | |
e9daff24 KRW |
1687 | if (!shared_info_page) |
1688 | shared_info_page = (struct shared_info *) | |
1689 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1690 | xatp.domid = DOMID_SELF; |
1691 | xatp.idx = 0; | |
1692 | xatp.space = XENMAPSPACE_shared_info; | |
e9daff24 | 1693 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; |
bee6ab53 SY |
1694 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) |
1695 | BUG(); | |
1696 | ||
e9daff24 | 1697 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; |
bee6ab53 | 1698 | |
016b6f5f SS |
1699 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1700 | * page, we use it in the event channel upcall and in some pvclock | |
1701 | * related functions. We don't need the vcpu_info placement | |
1702 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
e9daff24 KRW |
1703 | * HVM. |
1704 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1705 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1706 | * in that case multiple vcpus might be online. */ | |
1707 | for_each_online_cpu(cpu) { | |
d5b17dbf KRW |
1708 | /* Leave it to be NULL. */ |
1709 | if (cpu >= MAX_VIRT_CPUS) | |
1710 | continue; | |
016b6f5f SS |
1711 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; |
1712 | } | |
bee6ab53 SY |
1713 | } |
1714 | ||
e9daff24 | 1715 | #ifdef CONFIG_XEN_PVHVM |
4ff2d062 OH |
1716 | static void __init init_hvm_pv_info(void) |
1717 | { | |
e9daff24 | 1718 | int major, minor; |
5eb65be2 | 1719 | uint32_t eax, ebx, ecx, edx, pages, msr, base; |
4ff2d062 OH |
1720 | u64 pfn; |
1721 | ||
1722 | base = xen_cpuid_base(); | |
e9daff24 KRW |
1723 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); |
1724 | ||
1725 | major = eax >> 16; | |
1726 | minor = eax & 0xffff; | |
1727 | printk(KERN_INFO "Xen version %d.%d.\n", major, minor); | |
1728 | ||
4ff2d062 OH |
1729 | cpuid(base + 2, &pages, &msr, &ecx, &edx); |
1730 | ||
1731 | pfn = __pa(hypercall_page); | |
1732 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1733 | ||
1734 | xen_setup_features(); | |
1735 | ||
1736 | pv_info.name = "Xen HVM"; | |
1737 | ||
1738 | xen_domain_type = XEN_HVM_DOMAIN; | |
1739 | } | |
1740 | ||
148f9bb8 PG |
1741 | static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action, |
1742 | void *hcpu) | |
38e20b07 SY |
1743 | { |
1744 | int cpu = (long)hcpu; | |
1745 | switch (action) { | |
1746 | case CPU_UP_PREPARE: | |
90d4f553 | 1747 | xen_vcpu_setup(cpu); |
7918c92a | 1748 | if (xen_have_vector_callback) { |
7918c92a KRW |
1749 | if (xen_feature(XENFEAT_hvm_safe_pvclock)) |
1750 | xen_setup_timer(cpu); | |
1751 | } | |
38e20b07 SY |
1752 | break; |
1753 | default: | |
1754 | break; | |
1755 | } | |
1756 | return NOTIFY_OK; | |
1757 | } | |
1758 | ||
148f9bb8 | 1759 | static struct notifier_block xen_hvm_cpu_notifier = { |
38e20b07 SY |
1760 | .notifier_call = xen_hvm_cpu_notify, |
1761 | }; | |
1762 | ||
bee6ab53 SY |
1763 | static void __init xen_hvm_guest_init(void) |
1764 | { | |
4ff2d062 | 1765 | init_hvm_pv_info(); |
bee6ab53 | 1766 | |
016b6f5f | 1767 | xen_hvm_init_shared_info(); |
38e20b07 | 1768 | |
669b0ae9 VC |
1769 | xen_panic_handler_init(); |
1770 | ||
38e20b07 SY |
1771 | if (xen_feature(XENFEAT_hvm_callback_vector)) |
1772 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1773 | xen_hvm_smp_init(); |
38e20b07 | 1774 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1775 | xen_unplug_emulated_devices(); |
38e20b07 | 1776 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1777 | xen_hvm_init_time_ops(); |
59151001 | 1778 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1779 | } |
1780 | ||
9df56f19 | 1781 | static uint32_t __init xen_hvm_platform(void) |
bee6ab53 SY |
1782 | { |
1783 | if (xen_pv_domain()) | |
9df56f19 | 1784 | return 0; |
bee6ab53 | 1785 | |
9df56f19 | 1786 | return xen_cpuid_base(); |
bee6ab53 SY |
1787 | } |
1788 | ||
d9b8ca84 SY |
1789 | bool xen_hvm_need_lapic(void) |
1790 | { | |
1791 | if (xen_pv_domain()) | |
1792 | return false; | |
1793 | if (!xen_hvm_domain()) | |
1794 | return false; | |
1795 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1796 | return false; | |
1797 | return true; | |
1798 | } | |
1799 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1800 | ||
ad3062a0 | 1801 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1802 | .name = "Xen HVM", |
1803 | .detect = xen_hvm_platform, | |
1804 | .init_platform = xen_hvm_guest_init, | |
4cca6ea0 | 1805 | .x2apic_available = xen_x2apic_para_available, |
bee6ab53 SY |
1806 | }; |
1807 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1808 | #endif |