xen64: save lots of registers
[deliverable/linux.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
084a2a4e 36#include <xen/hvc-console.h>
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37
38#include <asm/paravirt.h>
39#include <asm/page.h>
40#include <asm/xen/hypercall.h>
41#include <asm/xen/hypervisor.h>
42#include <asm/fixmap.h>
43#include <asm/processor.h>
44#include <asm/setup.h>
45#include <asm/desc.h>
46#include <asm/pgtable.h>
f87e4cac 47#include <asm/tlbflush.h>
fefa629a 48#include <asm/reboot.h>
eba0045f 49#include <asm/pgalloc.h>
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50
51#include "xen-ops.h"
3b827c1b 52#include "mmu.h"
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53#include "multicalls.h"
54
55EXPORT_SYMBOL_GPL(hypercall_page);
56
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57DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
58DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
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59
60/*
61 * Note about cr3 (pagetable base) values:
62 *
63 * xen_cr3 contains the current logical cr3 value; it contains the
64 * last set cr3. This may not be the current effective cr3, because
65 * its update may be being lazily deferred. However, a vcpu looking
66 * at its own cr3 can use this value knowing that it everything will
67 * be self-consistent.
68 *
69 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
70 * hypercall to set the vcpu cr3 is complete (so it may be a little
71 * out of date, but it will never be set early). If one vcpu is
72 * looking at another vcpu's cr3 value, it should use this variable.
73 */
74DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
75DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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76
77struct start_info *xen_start_info;
78EXPORT_SYMBOL_GPL(xen_start_info);
79
a0d695c8 80struct shared_info xen_dummy_shared_info;
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81
82/*
83 * Point at some empty memory to start with. We map the real shared_info
84 * page as soon as fixmap is up and running.
85 */
a0d695c8 86struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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87
88/*
89 * Flag to determine whether vcpu info placement is available on all
90 * VCPUs. We assume it is to start with, and then set it to zero on
91 * the first failure. This is because it can succeed on some VCPUs
92 * and not others, since it can involve hypervisor memory allocation,
93 * or because the guest failed to guarantee all the appropriate
94 * constraints on all VCPUs (ie buffer can't cross a page boundary).
95 *
96 * Note that any particular CPU may be using a placed vcpu structure,
97 * but we can only optimise if the all are.
98 *
99 * 0: not available, 1: available
100 */
04c44a08 101static int have_vcpu_info_placement = 1;
60223a32 102
9c7a7942 103static void xen_vcpu_setup(int cpu)
5ead97c8 104{
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105 struct vcpu_register_vcpu_info info;
106 int err;
107 struct vcpu_info *vcpup;
108
a0d695c8 109 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 110 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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111
112 if (!have_vcpu_info_placement)
113 return; /* already tested, not available */
114
115 vcpup = &per_cpu(xen_vcpu_info, cpu);
116
117 info.mfn = virt_to_mfn(vcpup);
118 info.offset = offset_in_page(vcpup);
119
e3d26976 120 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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121 cpu, vcpup, info.mfn, info.offset);
122
123 /* Check to see if the hypervisor will put the vcpu_info
124 structure where we want it, which allows direct access via
125 a percpu-variable. */
126 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
127
128 if (err) {
129 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
130 have_vcpu_info_placement = 0;
131 } else {
132 /* This cpu is using the registered vcpu info, even if
133 later ones fail to. */
134 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 135
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136 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
137 cpu, vcpup);
138 }
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139}
140
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141/*
142 * On restore, set the vcpu placement up again.
143 * If it fails, then we're in a bad state, since
144 * we can't back out from using it...
145 */
146void xen_vcpu_restore(void)
147{
148 if (have_vcpu_info_placement) {
149 int cpu;
150
151 for_each_online_cpu(cpu) {
152 bool other_cpu = (cpu != smp_processor_id());
153
154 if (other_cpu &&
155 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
156 BUG();
157
158 xen_vcpu_setup(cpu);
159
160 if (other_cpu &&
161 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
162 BUG();
163 }
164
165 BUG_ON(!have_vcpu_info_placement);
166 }
167}
168
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169static void __init xen_banner(void)
170{
171 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 172 pv_info.name);
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173 printk(KERN_INFO "Hypervisor signature: %s%s\n",
174 xen_start_info->magic,
175 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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176}
177
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178static void xen_cpuid(unsigned int *ax, unsigned int *bx,
179 unsigned int *cx, unsigned int *dx)
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180{
181 unsigned maskedx = ~0;
182
183 /*
184 * Mask out inconvenient features, to try and disable as many
185 * unsupported kernel subsystems as possible.
186 */
65ea5b03 187 if (*ax == 1)
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188 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
189 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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190 (1 << X86_FEATURE_MCE) | /* disable MCE */
191 (1 << X86_FEATURE_MCA) | /* disable MCA */
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192 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
193
194 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
195 : "=a" (*ax),
196 "=b" (*bx),
197 "=c" (*cx),
198 "=d" (*dx)
199 : "0" (*ax), "2" (*cx));
200 *dx &= maskedx;
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201}
202
203static void xen_set_debugreg(int reg, unsigned long val)
204{
205 HYPERVISOR_set_debugreg(reg, val);
206}
207
208static unsigned long xen_get_debugreg(int reg)
209{
210 return HYPERVISOR_get_debugreg(reg);
211}
212
213static unsigned long xen_save_fl(void)
214{
215 struct vcpu_info *vcpu;
216 unsigned long flags;
217
5ead97c8 218 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 219
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220 /* flag has opposite sense of mask */
221 flags = !vcpu->evtchn_upcall_mask;
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222
223 /* convert to IF type flag
224 -0 -> 0x00000000
225 -1 -> 0xffffffff
226 */
227 return (-flags) & X86_EFLAGS_IF;
228}
229
230static void xen_restore_fl(unsigned long flags)
231{
232 struct vcpu_info *vcpu;
233
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234 /* convert from IF type flag */
235 flags = !(flags & X86_EFLAGS_IF);
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236
237 /* There's a one instruction preempt window here. We need to
238 make sure we're don't switch CPUs between getting the vcpu
239 pointer and updating the mask. */
240 preempt_disable();
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241 vcpu = x86_read_percpu(xen_vcpu);
242 vcpu->evtchn_upcall_mask = flags;
f120f13e 243 preempt_enable_no_resched();
5ead97c8 244
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245 /* Doesn't matter if we get preempted here, because any
246 pending event will get dealt with anyway. */
5ead97c8 247
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248 if (flags == 0) {
249 preempt_check_resched();
250 barrier(); /* unmask then check (avoid races) */
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251 if (unlikely(vcpu->evtchn_upcall_pending))
252 force_evtchn_callback();
f120f13e 253 }
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254}
255
256static void xen_irq_disable(void)
257{
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258 /* There's a one instruction preempt window here. We need to
259 make sure we're don't switch CPUs between getting the vcpu
260 pointer and updating the mask. */
5ead97c8 261 preempt_disable();
f120f13e 262 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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263 preempt_enable_no_resched();
264}
265
266static void xen_irq_enable(void)
267{
268 struct vcpu_info *vcpu;
269
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270 /* We don't need to worry about being preempted here, since
271 either a) interrupts are disabled, so no preemption, or b)
272 the caller is confused and is trying to re-enable interrupts
273 on an indeterminate processor. */
274
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275 vcpu = x86_read_percpu(xen_vcpu);
276 vcpu->evtchn_upcall_mask = 0;
277
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278 /* Doesn't matter if we get preempted here, because any
279 pending event will get dealt with anyway. */
5ead97c8 280
f120f13e 281 barrier(); /* unmask then check (avoid races) */
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282 if (unlikely(vcpu->evtchn_upcall_pending))
283 force_evtchn_callback();
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284}
285
286static void xen_safe_halt(void)
287{
288 /* Blocking includes an implicit local_irq_enable(). */
349c709f 289 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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290 BUG();
291}
292
293static void xen_halt(void)
294{
295 if (irqs_disabled())
296 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
297 else
298 xen_safe_halt();
299}
300
8965c1c0 301static void xen_leave_lazy(void)
5ead97c8 302{
8965c1c0 303 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 304 xen_mc_flush();
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305}
306
307static unsigned long xen_store_tr(void)
308{
309 return 0;
310}
311
312static void xen_set_ldt(const void *addr, unsigned entries)
313{
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314 struct mmuext_op *op;
315 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
316
317 op = mcs.args;
318 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 319 op->arg1.linear_addr = (unsigned long)addr;
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320 op->arg2.nr_ents = entries;
321
322 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
323
324 xen_mc_issue(PARAVIRT_LAZY_CPU);
325}
326
6b68f01b 327static void xen_load_gdt(const struct desc_ptr *dtr)
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328{
329 unsigned long *frames;
330 unsigned long va = dtr->address;
331 unsigned int size = dtr->size + 1;
332 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
333 int f;
334 struct multicall_space mcs;
335
336 /* A GDT can be up to 64k in size, which corresponds to 8192
337 8-byte entries, or 16 4k pages.. */
338
339 BUG_ON(size > 65536);
340 BUG_ON(va & ~PAGE_MASK);
341
342 mcs = xen_mc_entry(sizeof(*frames) * pages);
343 frames = mcs.args;
344
345 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
346 frames[f] = virt_to_mfn(va);
347 make_lowmem_page_readonly((void *)va);
348 }
349
350 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
351
352 xen_mc_issue(PARAVIRT_LAZY_CPU);
353}
354
355static void load_TLS_descriptor(struct thread_struct *t,
356 unsigned int cpu, unsigned int i)
357{
358 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
359 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
360 struct multicall_space mc = __xen_mc_entry(0);
361
362 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
363}
364
365static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
366{
8b84ad94
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367 /*
368 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
369 * it means we're in a context switch, and %gs has just been
370 * saved. This means we can zero it out to prevent faults on
371 * exit from the hypervisor if the next process has no %gs.
372 * Either way, it has been saved, and the new value will get
373 * loaded properly. This will go away as soon as Xen has been
374 * modified to not save/restore %gs for normal hypercalls.
8a95408e
EH
375 *
376 * On x86_64, this hack is not used for %gs, because gs points
377 * to KERNEL_GS_BASE (and uses it for PDA references), so we
378 * must not zero %gs on x86_64
379 *
380 * For x86_64, we need to zero %fs, otherwise we may get an
381 * exception between the new %fs descriptor being loaded and
382 * %fs being effectively cleared at __switch_to().
8b84ad94 383 */
8a95408e
EH
384 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
385#ifdef CONFIG_X86_32
8b84ad94 386 loadsegment(gs, 0);
8a95408e
EH
387#else
388 loadsegment(fs, 0);
389#endif
390 }
391
392 xen_mc_batch();
393
394 load_TLS_descriptor(t, cpu, 0);
395 load_TLS_descriptor(t, cpu, 1);
396 load_TLS_descriptor(t, cpu, 2);
397
398 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
399}
400
a8fc1089
EH
401#ifdef CONFIG_X86_64
402static void xen_load_gs_index(unsigned int idx)
403{
404 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
405 BUG();
406}
407#endif
408
5ead97c8 409static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 410 const void *ptr)
5ead97c8
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411{
412 unsigned long lp = (unsigned long)&dt[entrynum];
413 xmaddr_t mach_lp = virt_to_machine(lp);
75b8bb3e 414 u64 entry = *(u64 *)ptr;
5ead97c8 415
f120f13e
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416 preempt_disable();
417
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418 xen_mc_flush();
419 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
420 BUG();
f120f13e
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421
422 preempt_enable();
5ead97c8
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423}
424
e176d367 425static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
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426 struct trap_info *info)
427{
e176d367 428 if (val->type != 0xf && val->type != 0xe)
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429 return 0;
430
431 info->vector = vector;
e176d367
EH
432 info->address = gate_offset(*val);
433 info->cs = gate_segment(*val);
434 info->flags = val->dpl;
5ead97c8 435 /* interrupt gates clear IF */
e176d367 436 if (val->type == 0xe)
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437 info->flags |= 4;
438
439 return 1;
440}
441
442/* Locations of each CPU's IDT */
6b68f01b 443static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
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444
445/* Set an IDT entry. If the entry is part of the current IDT, then
446 also update Xen. */
8d947344 447static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 448{
5ead97c8 449 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
450 unsigned long start, end;
451
452 preempt_disable();
453
454 start = __get_cpu_var(idt_desc).address;
455 end = start + __get_cpu_var(idt_desc).size + 1;
5ead97c8
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456
457 xen_mc_flush();
458
8d947344 459 native_write_idt_entry(dt, entrynum, g);
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460
461 if (p >= start && (p + 8) <= end) {
462 struct trap_info info[2];
463
464 info[1].address = 0;
465
e176d367 466 if (cvt_gate_to_trap(entrynum, g, &info[0]))
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467 if (HYPERVISOR_set_trap_table(info))
468 BUG();
469 }
f120f13e
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470
471 preempt_enable();
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472}
473
6b68f01b 474static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 475 struct trap_info *traps)
5ead97c8 476{
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477 unsigned in, out, count;
478
e176d367 479 count = (desc->size+1) / sizeof(gate_desc);
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480 BUG_ON(count > 256);
481
5ead97c8 482 for (in = out = 0; in < count; in++) {
e176d367 483 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 484
e176d367 485 if (cvt_gate_to_trap(in, entry, &traps[out]))
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486 out++;
487 }
488 traps[out].address = 0;
f87e4cac
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489}
490
491void xen_copy_trap_info(struct trap_info *traps)
492{
6b68f01b 493 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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494
495 xen_convert_trap_info(desc, traps);
f87e4cac
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496}
497
498/* Load a new IDT into Xen. In principle this can be per-CPU, so we
499 hold a spinlock to protect the static traps[] array (static because
500 it avoids allocation, and saves stack space). */
6b68f01b 501static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
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502{
503 static DEFINE_SPINLOCK(lock);
504 static struct trap_info traps[257];
f87e4cac
JF
505
506 spin_lock(&lock);
507
f120f13e
JF
508 __get_cpu_var(idt_desc) = *desc;
509
f87e4cac 510 xen_convert_trap_info(desc, traps);
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511
512 xen_mc_flush();
513 if (HYPERVISOR_set_trap_table(traps))
514 BUG();
515
516 spin_unlock(&lock);
517}
518
519/* Write a GDT descriptor entry. Ignore LDT descriptors, since
520 they're handled differently. */
521static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 522 const void *desc, int type)
5ead97c8 523{
f120f13e
JF
524 preempt_disable();
525
014b15be
GOC
526 switch (type) {
527 case DESC_LDT:
528 case DESC_TSS:
5ead97c8
JF
529 /* ignore */
530 break;
531
532 default: {
533 xmaddr_t maddr = virt_to_machine(&dt[entry]);
5ead97c8
JF
534
535 xen_mc_flush();
014b15be 536 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
537 BUG();
538 }
539
540 }
f120f13e
JF
541
542 preempt_enable();
5ead97c8
JF
543}
544
faca6227 545static void xen_load_sp0(struct tss_struct *tss,
f120f13e 546 struct thread_struct *thread)
5ead97c8
JF
547{
548 struct multicall_space mcs = xen_mc_entry(0);
faca6227 549 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
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550 xen_mc_issue(PARAVIRT_LAZY_CPU);
551}
552
553static void xen_set_iopl_mask(unsigned mask)
554{
555 struct physdev_set_iopl set_iopl;
556
557 /* Force the change at ring 0. */
558 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
559 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
560}
561
562static void xen_io_delay(void)
563{
564}
565
566#ifdef CONFIG_X86_LOCAL_APIC
42e0a9aa 567static u32 xen_apic_read(unsigned long reg)
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JF
568{
569 return 0;
570}
f87e4cac 571
42e0a9aa 572static void xen_apic_write(unsigned long reg, u32 val)
f87e4cac
JF
573{
574 /* Warn to see if there's any stray references */
575 WARN_ON(1);
576}
5ead97c8
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577#endif
578
579static void xen_flush_tlb(void)
580{
d66bf8fc 581 struct mmuext_op *op;
41e332b2
JF
582 struct multicall_space mcs;
583
584 preempt_disable();
585
586 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 587
d66bf8fc
JF
588 op = mcs.args;
589 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
590 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
591
592 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
593
594 preempt_enable();
5ead97c8
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595}
596
597static void xen_flush_tlb_single(unsigned long addr)
598{
d66bf8fc 599 struct mmuext_op *op;
41e332b2
JF
600 struct multicall_space mcs;
601
602 preempt_disable();
5ead97c8 603
41e332b2 604 mcs = xen_mc_entry(sizeof(*op));
d66bf8fc
JF
605 op = mcs.args;
606 op->cmd = MMUEXT_INVLPG_LOCAL;
607 op->arg1.linear_addr = addr & PAGE_MASK;
608 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
609
610 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
611
612 preempt_enable();
5ead97c8
JF
613}
614
f87e4cac
JF
615static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
616 unsigned long va)
617{
d66bf8fc
JF
618 struct {
619 struct mmuext_op op;
620 cpumask_t mask;
621 } *args;
f87e4cac 622 cpumask_t cpumask = *cpus;
d66bf8fc 623 struct multicall_space mcs;
f87e4cac
JF
624
625 /*
626 * A couple of (to be removed) sanity checks:
627 *
628 * - current CPU must not be in mask
629 * - mask must exist :)
630 */
631 BUG_ON(cpus_empty(cpumask));
632 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
633 BUG_ON(!mm);
634
635 /* If a CPU which we ran on has gone down, OK. */
636 cpus_and(cpumask, cpumask, cpu_online_map);
637 if (cpus_empty(cpumask))
638 return;
639
d66bf8fc
JF
640 mcs = xen_mc_entry(sizeof(*args));
641 args = mcs.args;
642 args->mask = cpumask;
643 args->op.arg2.vcpumask = &args->mask;
644
f87e4cac 645 if (va == TLB_FLUSH_ALL) {
d66bf8fc 646 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 647 } else {
d66bf8fc
JF
648 args->op.cmd = MMUEXT_INVLPG_MULTI;
649 args->op.arg1.linear_addr = va;
f87e4cac
JF
650 }
651
d66bf8fc
JF
652 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
653
654 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
655}
656
7b1333aa
JF
657static void xen_clts(void)
658{
659 struct multicall_space mcs;
660
661 mcs = xen_mc_entry(0);
662
663 MULTI_fpu_taskswitch(mcs.mc, 0);
664
665 xen_mc_issue(PARAVIRT_LAZY_CPU);
666}
667
668static void xen_write_cr0(unsigned long cr0)
669{
670 struct multicall_space mcs;
671
672 /* Only pay attention to cr0.TS; everything else is
673 ignored. */
674 mcs = xen_mc_entry(0);
675
676 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
677
678 xen_mc_issue(PARAVIRT_LAZY_CPU);
679}
680
60223a32
JF
681static void xen_write_cr2(unsigned long cr2)
682{
683 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
684}
685
5ead97c8
JF
686static unsigned long xen_read_cr2(void)
687{
688 return x86_read_percpu(xen_vcpu)->arch.cr2;
689}
690
60223a32
JF
691static unsigned long xen_read_cr2_direct(void)
692{
693 return x86_read_percpu(xen_vcpu_info.arch.cr2);
694}
695
5ead97c8
JF
696static void xen_write_cr4(unsigned long cr4)
697{
2956a351
JF
698 cr4 &= ~X86_CR4_PGE;
699 cr4 &= ~X86_CR4_PSE;
700
701 native_write_cr4(cr4);
5ead97c8
JF
702}
703
5ead97c8
JF
704static unsigned long xen_read_cr3(void)
705{
706 return x86_read_percpu(xen_cr3);
707}
708
9f79991d
JF
709static void set_current_cr3(void *v)
710{
711 x86_write_percpu(xen_current_cr3, (unsigned long)v);
712}
713
5ead97c8
JF
714static void xen_write_cr3(unsigned long cr3)
715{
9f79991d
JF
716 struct mmuext_op *op;
717 struct multicall_space mcs;
718 unsigned long mfn = pfn_to_mfn(PFN_DOWN(cr3));
719
f120f13e
JF
720 BUG_ON(preemptible());
721
9f79991d 722 mcs = xen_mc_entry(sizeof(*op)); /* disables interrupts */
5ead97c8 723
9f79991d
JF
724 /* Update while interrupts are disabled, so its atomic with
725 respect to ipis */
5ead97c8
JF
726 x86_write_percpu(xen_cr3, cr3);
727
9f79991d
JF
728 op = mcs.args;
729 op->cmd = MMUEXT_NEW_BASEPTR;
730 op->arg1.mfn = mfn;
5ead97c8 731
9f79991d 732 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 733
9f79991d
JF
734 /* Update xen_update_cr3 once the batch has actually
735 been submitted. */
736 xen_mc_callback(set_current_cr3, (void *)cr3);
5ead97c8 737
9f79991d 738 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
739}
740
f4f97b3e
JF
741/* Early in boot, while setting up the initial pagetable, assume
742 everything is pinned. */
6944a9c8 743static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 744{
af7ae3b9 745#ifdef CONFIG_FLATMEM
f4f97b3e 746 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 747#endif
5ead97c8
JF
748 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
749}
750
6944a9c8 751/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 752 only init_mm and anything attached to that is pinned. */
6944a9c8 753static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
754{
755 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
756}
757
f6433706 758static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
759{
760 struct mmuext_op op;
f6433706 761 op.cmd = cmd;
74260714
JF
762 op.arg1.mfn = pfn_to_mfn(pfn);
763 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
764 BUG();
765}
766
f4f97b3e
JF
767/* This needs to make sure the new pte page is pinned iff its being
768 attached to a pinned pagetable. */
1c70e9bd 769static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 770{
f4f97b3e 771 struct page *page = pfn_to_page(pfn);
5ead97c8 772
f4f97b3e
JF
773 if (PagePinned(virt_to_page(mm->pgd))) {
774 SetPagePinned(page);
775
74260714 776 if (!PageHighMem(page)) {
f4f97b3e 777 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
778 if (level == PT_PTE)
779 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 780 } else
f4f97b3e
JF
781 /* make sure there are no stray mappings of
782 this page */
783 kmap_flush_unused();
784 }
5ead97c8
JF
785}
786
6944a9c8 787static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 788{
f6433706 789 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
790}
791
6944a9c8 792static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 793{
f6433706 794 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
795}
796
f4f97b3e 797/* This should never happen until we're OK to use struct page */
f6433706 798static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 799{
f4f97b3e
JF
800 struct page *page = pfn_to_page(pfn);
801
802 if (PagePinned(page)) {
74260714 803 if (!PageHighMem(page)) {
a684d69d
MM
804 if (level == PT_PTE)
805 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 806 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 807 }
c946c7de 808 ClearPagePinned(page);
f4f97b3e 809 }
5ead97c8
JF
810}
811
6944a9c8 812static void xen_release_pte(u32 pfn)
f6433706
MM
813{
814 xen_release_ptpage(pfn, PT_PTE);
815}
816
6944a9c8 817static void xen_release_pmd(u32 pfn)
f6433706
MM
818{
819 xen_release_ptpage(pfn, PT_PMD);
820}
821
f6e58732
JF
822#if PAGETABLE_LEVELS == 4
823static void xen_alloc_pud(struct mm_struct *mm, u32 pfn)
824{
825 xen_alloc_ptpage(mm, pfn, PT_PUD);
826}
827
828static void xen_release_pud(u32 pfn)
829{
830 xen_release_ptpage(pfn, PT_PUD);
831}
832#endif
833
f4f97b3e
JF
834#ifdef CONFIG_HIGHPTE
835static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 836{
f4f97b3e
JF
837 pgprot_t prot = PAGE_KERNEL;
838
839 if (PagePinned(page))
840 prot = PAGE_KERNEL_RO;
841
842 if (0 && PageHighMem(page))
843 printk("mapping highpte %lx type %d prot %s\n",
844 page_to_pfn(page), type,
845 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
846
847 return kmap_atomic_prot(page, type, prot);
5ead97c8 848}
f4f97b3e 849#endif
5ead97c8 850
9a4029fd
JF
851static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
852{
853 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
854 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
855 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
856 pte_val_ma(pte));
857
858 return pte;
859}
860
861/* Init-time set_pte while constructing initial pagetables, which
862 doesn't allow RO pagetable pages to be remapped RW */
863static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
864{
865 pte = mask_rw_pte(ptep, pte);
866
867 xen_set_pte(ptep, pte);
868}
869
5ead97c8
JF
870static __init void xen_pagetable_setup_start(pgd_t *base)
871{
5ead97c8
JF
872}
873
0e91398f 874void xen_setup_shared_info(void)
5ead97c8
JF
875{
876 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
877 set_fixmap(FIX_PARAVIRT_BOOTMAP,
878 xen_start_info->shared_info);
879
880 HYPERVISOR_shared_info =
881 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
882 } else
883 HYPERVISOR_shared_info =
884 (struct shared_info *)__va(xen_start_info->shared_info);
885
2e8fe719
JF
886#ifndef CONFIG_SMP
887 /* In UP this is as good a place as any to set up shared info */
888 xen_setup_vcpu_info_placement();
889#endif
d5edbc1f
JF
890
891 xen_setup_mfn_list_list();
2e8fe719
JF
892}
893
894static __init void xen_pagetable_setup_done(pgd_t *base)
895{
0e91398f 896 xen_setup_shared_info();
60223a32 897}
5ead97c8 898
e2426cf8
JF
899static __init void xen_post_allocator_init(void)
900{
8745f8b0 901 pv_mmu_ops.set_pte = xen_set_pte;
e2426cf8
JF
902 pv_mmu_ops.set_pmd = xen_set_pmd;
903 pv_mmu_ops.set_pud = xen_set_pud;
f6e58732
JF
904#if PAGETABLE_LEVELS == 4
905 pv_mmu_ops.set_pgd = xen_set_pgd;
906#endif
e2426cf8 907
8745f8b0
JF
908 /* This will work as long as patching hasn't happened yet
909 (which it hasn't) */
910 pv_mmu_ops.alloc_pte = xen_alloc_pte;
911 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
912 pv_mmu_ops.release_pte = xen_release_pte;
913 pv_mmu_ops.release_pmd = xen_release_pmd;
914#if PAGETABLE_LEVELS == 4
915 pv_mmu_ops.alloc_pud = xen_alloc_pud;
916 pv_mmu_ops.release_pud = xen_release_pud;
917#endif
918
e2426cf8
JF
919 xen_mark_init_mm_pinned();
920}
921
60223a32 922/* This is called once we have the cpu_possible_map */
0e91398f 923void xen_setup_vcpu_info_placement(void)
60223a32
JF
924{
925 int cpu;
926
927 for_each_possible_cpu(cpu)
928 xen_vcpu_setup(cpu);
929
930 /* xen_vcpu_setup managed to place the vcpu_info within the
931 percpu area for all cpus, so make use of it */
5b09b287 932#ifdef CONFIG_X86_32
60223a32
JF
933 if (have_vcpu_info_placement) {
934 printk(KERN_INFO "Xen: using vcpu_info placement\n");
935
93b1eab3
JF
936 pv_irq_ops.save_fl = xen_save_fl_direct;
937 pv_irq_ops.restore_fl = xen_restore_fl_direct;
938 pv_irq_ops.irq_disable = xen_irq_disable_direct;
939 pv_irq_ops.irq_enable = xen_irq_enable_direct;
940 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 941 }
5b09b287 942#endif
5ead97c8
JF
943}
944
ab144f5e
AK
945static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
946 unsigned long addr, unsigned len)
6487673b
JF
947{
948 char *start, *end, *reloc;
949 unsigned ret;
950
951 start = end = reloc = NULL;
952
93b1eab3
JF
953#define SITE(op, x) \
954 case PARAVIRT_PATCH(op.x): \
6487673b
JF
955 if (have_vcpu_info_placement) { \
956 start = (char *)xen_##x##_direct; \
957 end = xen_##x##_direct_end; \
958 reloc = xen_##x##_direct_reloc; \
959 } \
960 goto patch_site
961
962 switch (type) {
5b09b287 963#ifdef CONFIG_X86_32
93b1eab3
JF
964 SITE(pv_irq_ops, irq_enable);
965 SITE(pv_irq_ops, irq_disable);
966 SITE(pv_irq_ops, save_fl);
967 SITE(pv_irq_ops, restore_fl);
5b09b287 968#endif /* CONFIG_X86_32 */
6487673b
JF
969#undef SITE
970
971 patch_site:
972 if (start == NULL || (end-start) > len)
973 goto default_patch;
974
ab144f5e 975 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
976
977 /* Note: because reloc is assigned from something that
978 appears to be an array, gcc assumes it's non-null,
979 but doesn't know its relationship with start and
980 end. */
981 if (reloc > start && reloc < end) {
982 int reloc_off = reloc - start;
ab144f5e
AK
983 long *relocp = (long *)(insnbuf + reloc_off);
984 long delta = start - (char *)addr;
6487673b
JF
985
986 *relocp += delta;
987 }
988 break;
989
990 default_patch:
991 default:
ab144f5e
AK
992 ret = paravirt_patch_default(type, clobbers, insnbuf,
993 addr, len);
6487673b
JF
994 break;
995 }
996
997 return ret;
998}
999
aeaaa59c
JF
1000static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1001{
1002 pte_t pte;
1003
1004 phys >>= PAGE_SHIFT;
1005
1006 switch (idx) {
1007 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1008#ifdef CONFIG_X86_F00F_BUG
1009 case FIX_F00F_IDT:
1010#endif
15664f96 1011#ifdef CONFIG_X86_32
aeaaa59c
JF
1012 case FIX_WP_TEST:
1013 case FIX_VDSO:
15664f96
JF
1014 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1015#else
1016 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1017#endif
aeaaa59c
JF
1018#ifdef CONFIG_X86_LOCAL_APIC
1019 case FIX_APIC_BASE: /* maps dummy local APIC */
1020#endif
1021 pte = pfn_pte(phys, prot);
1022 break;
1023
1024 default:
1025 pte = mfn_pte(phys, prot);
1026 break;
1027 }
1028
1029 __native_set_fixmap(idx, pte);
1030}
1031
93b1eab3 1032static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1033 .paravirt_enabled = 1,
1034 .shared_kernel_pmd = 0,
1035
1036 .name = "Xen",
93b1eab3 1037};
5ead97c8 1038
93b1eab3 1039static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1040 .patch = xen_patch,
5ead97c8 1041
93b1eab3 1042 .banner = xen_banner,
5ead97c8
JF
1043 .memory_setup = xen_memory_setup,
1044 .arch_setup = xen_arch_setup,
e2426cf8 1045 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1046};
5ead97c8 1047
93b1eab3 1048static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1049 .time_init = xen_time_init,
93b1eab3 1050
15c84731
JF
1051 .set_wallclock = xen_set_wallclock,
1052 .get_wallclock = xen_get_wallclock,
e93ef949 1053 .get_tsc_khz = xen_tsc_khz,
ab550288 1054 .sched_clock = xen_sched_clock,
93b1eab3 1055};
15c84731 1056
93b1eab3 1057static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1058 .cpuid = xen_cpuid,
1059
1060 .set_debugreg = xen_set_debugreg,
1061 .get_debugreg = xen_get_debugreg,
1062
7b1333aa 1063 .clts = xen_clts,
5ead97c8
JF
1064
1065 .read_cr0 = native_read_cr0,
7b1333aa 1066 .write_cr0 = xen_write_cr0,
5ead97c8 1067
5ead97c8
JF
1068 .read_cr4 = native_read_cr4,
1069 .read_cr4_safe = native_read_cr4_safe,
1070 .write_cr4 = xen_write_cr4,
1071
5ead97c8
JF
1072 .wbinvd = native_wbinvd,
1073
1074 .read_msr = native_read_msr_safe,
1075 .write_msr = native_write_msr_safe,
1076 .read_tsc = native_read_tsc,
1077 .read_pmc = native_read_pmc,
1078
81e103f1 1079 .iret = xen_iret,
d75cd22f 1080 .irq_enable_sysexit = xen_sysexit,
5ead97c8
JF
1081
1082 .load_tr_desc = paravirt_nop,
1083 .set_ldt = xen_set_ldt,
1084 .load_gdt = xen_load_gdt,
1085 .load_idt = xen_load_idt,
1086 .load_tls = xen_load_tls,
a8fc1089
EH
1087#ifdef CONFIG_X86_64
1088 .load_gs_index = xen_load_gs_index,
1089#endif
5ead97c8
JF
1090
1091 .store_gdt = native_store_gdt,
1092 .store_idt = native_store_idt,
1093 .store_tr = xen_store_tr,
1094
1095 .write_ldt_entry = xen_write_ldt_entry,
1096 .write_gdt_entry = xen_write_gdt_entry,
1097 .write_idt_entry = xen_write_idt_entry,
faca6227 1098 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1099
1100 .set_iopl_mask = xen_set_iopl_mask,
1101 .io_delay = xen_io_delay,
1102
952d1d70
JF
1103 /* Xen takes care of %gs when switching to usermode for us */
1104 .swapgs = paravirt_nop,
1105
8965c1c0
JF
1106 .lazy_mode = {
1107 .enter = paravirt_enter_lazy_cpu,
1108 .leave = xen_leave_lazy,
1109 },
93b1eab3
JF
1110};
1111
0725cbb9
JF
1112static void __init __xen_init_IRQ(void)
1113{
1114#ifdef CONFIG_X86_64
1115 int i;
1116
1117 /* Create identity vector->irq map */
1118 for(i = 0; i < NR_VECTORS; i++) {
1119 int cpu;
1120
1121 for_each_possible_cpu(cpu)
1122 per_cpu(vector_irq, cpu)[i] = i;
1123 }
1124#endif /* CONFIG_X86_64 */
1125
1126 xen_init_IRQ();
1127}
1128
93b1eab3 1129static const struct pv_irq_ops xen_irq_ops __initdata = {
0725cbb9 1130 .init_IRQ = __xen_init_IRQ,
93b1eab3
JF
1131 .save_fl = xen_save_fl,
1132 .restore_fl = xen_restore_fl,
1133 .irq_disable = xen_irq_disable,
1134 .irq_enable = xen_irq_enable,
1135 .safe_halt = xen_safe_halt,
1136 .halt = xen_halt,
fab58420 1137#ifdef CONFIG_X86_64
997409d3 1138 .adjust_exception_frame = xen_adjust_exception_frame,
fab58420 1139#endif
93b1eab3 1140};
5ead97c8 1141
93b1eab3 1142static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1143#ifdef CONFIG_X86_LOCAL_APIC
f87e4cac
JF
1144 .apic_write = xen_apic_write,
1145 .apic_write_atomic = xen_apic_write,
5ead97c8
JF
1146 .apic_read = xen_apic_read,
1147 .setup_boot_clock = paravirt_nop,
1148 .setup_secondary_clock = paravirt_nop,
1149 .startup_ipi_hook = paravirt_nop,
1150#endif
93b1eab3
JF
1151};
1152
1153static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1154 .pagetable_setup_start = xen_pagetable_setup_start,
1155 .pagetable_setup_done = xen_pagetable_setup_done,
1156
1157 .read_cr2 = xen_read_cr2,
1158 .write_cr2 = xen_write_cr2,
1159
1160 .read_cr3 = xen_read_cr3,
1161 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1162
1163 .flush_tlb_user = xen_flush_tlb,
1164 .flush_tlb_kernel = xen_flush_tlb,
1165 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1166 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1167
1168 .pte_update = paravirt_nop,
1169 .pte_update_defer = paravirt_nop,
1170
eba0045f
JF
1171 .pgd_alloc = __paravirt_pgd_alloc,
1172 .pgd_free = paravirt_nop,
1173
6944a9c8
JF
1174 .alloc_pte = xen_alloc_pte_init,
1175 .release_pte = xen_release_pte_init,
1176 .alloc_pmd = xen_alloc_pte_init,
1177 .alloc_pmd_clone = paravirt_nop,
1178 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1179
1180#ifdef CONFIG_HIGHPTE
1181 .kmap_atomic_pte = xen_kmap_atomic_pte,
1182#endif
5ead97c8 1183
22911b3f
JF
1184#ifdef CONFIG_X86_64
1185 .set_pte = xen_set_pte,
1186#else
851fa3c4 1187 .set_pte = xen_set_pte_init,
22911b3f 1188#endif
3b827c1b 1189 .set_pte_at = xen_set_pte_at,
e2426cf8 1190 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1191
08b882c6
JF
1192 .ptep_modify_prot_start = __ptep_modify_prot_start,
1193 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1194
3b827c1b 1195 .pte_val = xen_pte_val,
a15af1c9 1196 .pte_flags = native_pte_val,
3b827c1b
JF
1197 .pgd_val = xen_pgd_val,
1198
1199 .make_pte = xen_make_pte,
1200 .make_pgd = xen_make_pgd,
1201
f6e58732 1202#ifdef CONFIG_X86_PAE
3b827c1b
JF
1203 .set_pte_atomic = xen_set_pte_atomic,
1204 .set_pte_present = xen_set_pte_at,
3b827c1b
JF
1205 .pte_clear = xen_pte_clear,
1206 .pmd_clear = xen_pmd_clear,
f6e58732
JF
1207#endif /* CONFIG_X86_PAE */
1208 .set_pud = xen_set_pud_hyper,
3b827c1b
JF
1209
1210 .make_pmd = xen_make_pmd,
1211 .pmd_val = xen_pmd_val,
3b827c1b 1212
f6e58732
JF
1213#if PAGETABLE_LEVELS == 4
1214 .pud_val = xen_pud_val,
1215 .make_pud = xen_make_pud,
1216 .set_pgd = xen_set_pgd_hyper,
1217
1218 .alloc_pud = xen_alloc_pte_init,
1219 .release_pud = xen_release_pte_init,
1220#endif /* PAGETABLE_LEVELS == 4 */
1221
3b827c1b
JF
1222 .activate_mm = xen_activate_mm,
1223 .dup_mmap = xen_dup_mmap,
1224 .exit_mmap = xen_exit_mmap,
1225
8965c1c0
JF
1226 .lazy_mode = {
1227 .enter = paravirt_enter_lazy_mmu,
1228 .leave = xen_leave_lazy,
1229 },
aeaaa59c
JF
1230
1231 .set_fixmap = xen_set_fixmap,
5ead97c8
JF
1232};
1233
fefa629a
JF
1234static void xen_reboot(int reason)
1235{
349c709f
JF
1236 struct sched_shutdown r = { .reason = reason };
1237
fefa629a
JF
1238#ifdef CONFIG_SMP
1239 smp_send_stop();
1240#endif
1241
349c709f 1242 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1243 BUG();
1244}
1245
1246static void xen_restart(char *msg)
1247{
1248 xen_reboot(SHUTDOWN_reboot);
1249}
1250
1251static void xen_emergency_restart(void)
1252{
1253 xen_reboot(SHUTDOWN_reboot);
1254}
1255
1256static void xen_machine_halt(void)
1257{
1258 xen_reboot(SHUTDOWN_poweroff);
1259}
1260
1261static void xen_crash_shutdown(struct pt_regs *regs)
1262{
1263 xen_reboot(SHUTDOWN_crash);
1264}
1265
1266static const struct machine_ops __initdata xen_machine_ops = {
1267 .restart = xen_restart,
1268 .halt = xen_machine_halt,
1269 .power_off = xen_machine_halt,
1270 .shutdown = xen_machine_halt,
1271 .crash_shutdown = xen_crash_shutdown,
1272 .emergency_restart = xen_emergency_restart,
1273};
1274
6487673b 1275
fb1d8404
JF
1276static void __init xen_reserve_top(void)
1277{
f5d36de0 1278#ifdef CONFIG_X86_32
fb1d8404
JF
1279 unsigned long top = HYPERVISOR_VIRT_START;
1280 struct xen_platform_parameters pp;
1281
1282 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1283 top = pp.virt_start;
1284
1285 reserve_top_address(-top + 2 * PAGE_SIZE);
f5d36de0 1286#endif /* CONFIG_X86_32 */
fb1d8404
JF
1287}
1288
084a2a4e
JF
1289/*
1290 * Like __va(), but returns address in the kernel mapping (which is
1291 * all we have until the physical memory mapping has been set up.
1292 */
1293static void *__ka(phys_addr_t paddr)
1294{
39dbc5bd 1295#ifdef CONFIG_X86_64
084a2a4e 1296 return (void *)(paddr + __START_KERNEL_map);
39dbc5bd
JF
1297#else
1298 return __va(paddr);
1299#endif
084a2a4e
JF
1300}
1301
1302/* Convert a machine address to physical address */
1303static unsigned long m2p(phys_addr_t maddr)
1304{
1305 phys_addr_t paddr;
1306
1307 maddr &= PTE_MASK;
1308 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1309
1310 return paddr;
1311}
1312
1313/* Convert a machine address to kernel virtual */
1314static void *m2v(phys_addr_t maddr)
1315{
1316 return __ka(m2p(maddr));
1317}
1318
39dbc5bd 1319#ifdef CONFIG_X86_64
084a2a4e
JF
1320static void walk(pgd_t *pgd, unsigned long addr)
1321{
1322 unsigned l4idx = pgd_index(addr);
1323 unsigned l3idx = pud_index(addr);
1324 unsigned l2idx = pmd_index(addr);
1325 unsigned l1idx = pte_index(addr);
1326 pgd_t l4;
1327 pud_t l3;
1328 pmd_t l2;
1329 pte_t l1;
1330
1331 xen_raw_printk("walk %p, %lx -> %d %d %d %d\n",
1332 pgd, addr, l4idx, l3idx, l2idx, l1idx);
1333
1334 l4 = pgd[l4idx];
1335 xen_raw_printk(" l4: %016lx\n", l4.pgd);
1336 xen_raw_printk(" %016lx\n", pgd_val(l4));
1337
1338 l3 = ((pud_t *)(m2v(l4.pgd)))[l3idx];
1339 xen_raw_printk(" l3: %016lx\n", l3.pud);
1340 xen_raw_printk(" %016lx\n", pud_val(l3));
1341
1342 l2 = ((pmd_t *)(m2v(l3.pud)))[l2idx];
1343 xen_raw_printk(" l2: %016lx\n", l2.pmd);
1344 xen_raw_printk(" %016lx\n", pmd_val(l2));
1345
1346 l1 = ((pte_t *)(m2v(l2.pmd)))[l1idx];
1347 xen_raw_printk(" l1: %016lx\n", l1.pte);
1348 xen_raw_printk(" %016lx\n", pte_val(l1));
1349}
39dbc5bd 1350#endif
084a2a4e
JF
1351
1352static void set_page_prot(void *addr, pgprot_t prot)
1353{
1354 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1355 pte_t pte = pfn_pte(pfn, prot);
1356
39dbc5bd 1357 xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016llx pte=%016llx\n",
084a2a4e
JF
1358 addr, pfn, get_phys_to_machine(pfn),
1359 pgprot_val(prot), pte.pte);
1360
1361 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1362 BUG();
1363}
1364
d114e198
JF
1365/*
1366 * Identity map, in addition to plain kernel map. This needs to be
1367 * large enough to allocate page table pages to allocate the rest.
1368 * Each page can map 2MB.
1369 */
1370static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
1371
39dbc5bd 1372static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
d114e198
JF
1373{
1374 unsigned pmdidx, pteidx;
1375 unsigned ident_pte;
1376 unsigned long pfn;
1377
1378 ident_pte = 0;
1379 pfn = 0;
1380 for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1381 pte_t *pte_page;
1382
d114e198 1383 /* Reuse or allocate a page of ptes */
39dbc5bd
JF
1384 if (pmd_present(pmd[pmdidx]))
1385 pte_page = m2v(pmd[pmdidx].pmd);
d114e198
JF
1386 else {
1387 /* Check for free pte pages */
1388 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1389 break;
1390
1391 pte_page = &level1_ident_pgt[ident_pte];
1392 ident_pte += PTRS_PER_PTE;
1393
39dbc5bd 1394 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
d114e198
JF
1395 }
1396
1397 /* Install mappings */
1398 for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1399 pte_t pte;
1400
1401 if (pfn > max_pfn_mapped)
1402 max_pfn_mapped = pfn;
1403
1404 if (!pte_none(pte_page[pteidx]))
1405 continue;
1406
1407 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1408 pte_page[pteidx] = pte;
1409 }
1410 }
1411
1412 for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1413 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
39dbc5bd
JF
1414
1415 set_page_prot(pmd, PAGE_KERNEL_RO);
1416}
1417
1418#ifdef CONFIG_X86_64
1419static void convert_pfn_mfn(void *v)
1420{
1421 pte_t *pte = v;
1422 int i;
1423
1424 /* All levels are converted the same way, so just treat them
1425 as ptes. */
1426 for(i = 0; i < PTRS_PER_PTE; i++)
1427 pte[i] = xen_make_pte(pte[i].pte);
d114e198
JF
1428}
1429
084a2a4e
JF
1430/*
1431 * Set up the inital kernel pagetable.
1432 *
1433 * We can construct this by grafting the Xen provided pagetable into
1434 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1435 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1436 * means that only the kernel has a physical mapping to start with -
1437 * but that's enough to get __va working. We need to fill in the rest
1438 * of the physical mapping once some sort of allocator has been set
1439 * up.
1440 */
d114e198 1441static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e
JF
1442{
1443 pud_t *l3;
1444 pmd_t *l2;
1445
1446 /* Zap identity mapping */
1447 init_level4_pgt[0] = __pgd(0);
1448
1449 /* Pre-constructed entries are in pfn, so convert to mfn */
1450 convert_pfn_mfn(init_level4_pgt);
1451 convert_pfn_mfn(level3_ident_pgt);
1452 convert_pfn_mfn(level3_kernel_pgt);
1453
1454 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1455 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1456
1457 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1458 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1459
1460 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1461 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1462 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1463
d114e198 1464 /* Set up identity map */
39dbc5bd 1465 xen_map_identity_early(level2_ident_pgt, max_pfn);
d114e198 1466
084a2a4e
JF
1467 /* Make pagetable pieces RO */
1468 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1469 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1470 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
084a2a4e
JF
1471 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1472 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1473
1474 /* Pin down new L4 */
39dbc5bd
JF
1475 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1476 PFN_DOWN(__pa_symbol(init_level4_pgt)));
084a2a4e
JF
1477
1478 /* Unpin Xen-provided one */
1479 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1480
1481 /* Switch over */
1482 pgd = init_level4_pgt;
1483 xen_write_cr3(__pa(pgd));
1484
d114e198
JF
1485 reserve_early(__pa(xen_start_info->pt_base),
1486 __pa(xen_start_info->pt_base +
1487 xen_start_info->nr_pt_frames * PAGE_SIZE),
1488 "XEN PAGETABLES");
084a2a4e
JF
1489
1490 return pgd;
1491}
39dbc5bd
JF
1492#else /* !CONFIG_X86_64 */
1493static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1494
d114e198 1495static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e 1496{
39dbc5bd
JF
1497 pmd_t *kernel_pmd;
1498
084a2a4e
JF
1499 init_pg_tables_start = __pa(pgd);
1500 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1501 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1502
39dbc5bd
JF
1503 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1504 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
d114e198 1505
39dbc5bd
JF
1506 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1507
1508 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1509 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1510 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1511
1512 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1513 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1514 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1515
1516 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1517
1518 xen_write_cr3(__pa(swapper_pg_dir));
1519
1520 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1521
1522 return swapper_pg_dir;
084a2a4e
JF
1523}
1524#endif /* CONFIG_X86_64 */
1525
5ead97c8
JF
1526/* First C function to be called on Xen boot */
1527asmlinkage void __init xen_start_kernel(void)
1528{
1529 pgd_t *pgd;
1530
1531 if (!xen_start_info)
1532 return;
1533
7999f4b4 1534 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1535
e57778a1
JF
1536 xen_setup_features();
1537
5ead97c8 1538 /* Install Xen paravirt ops */
93b1eab3
JF
1539 pv_info = xen_info;
1540 pv_init_ops = xen_init_ops;
1541 pv_time_ops = xen_time_ops;
1542 pv_cpu_ops = xen_cpu_ops;
1543 pv_irq_ops = xen_irq_ops;
1544 pv_apic_ops = xen_apic_ops;
1545 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1546
e57778a1
JF
1547 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1548 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1549 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1550 }
1551
fefa629a
JF
1552 machine_ops = xen_machine_ops;
1553
f5d36de0
JF
1554#ifdef CONFIG_X86_64
1555 /* Disable until direct per-cpu data access. */
1556 have_vcpu_info_placement = 0;
5b09b287 1557 x86_64_init_pda();
f5d36de0
JF
1558#endif
1559
a9e7062d 1560 xen_smp_init();
5ead97c8 1561
5ead97c8
JF
1562 /* Get mfn list */
1563 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1564 xen_build_dynamic_phys_to_machine();
5ead97c8
JF
1565
1566 pgd = (pgd_t *)xen_start_info->pt_base;
1567
084a2a4e
JF
1568 /* Prevent unwanted bits from being set in PTEs. */
1569 __supported_pte_mask &= ~_PAGE_GLOBAL;
1570 if (!is_initial_xendomain())
1571 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1572
1573 /* Don't do the full vcpu_info placement stuff until we have a
1574 possible map and a non-dummy shared_info. */
1575 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1576
1577 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1578 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
5ead97c8 1579
084a2a4e 1580 init_mm.pgd = pgd;
5ead97c8
JF
1581
1582 /* keep using Xen gdt for now; no urgent need to change it */
1583
93b1eab3 1584 pv_info.kernel_rpl = 1;
5ead97c8 1585 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1586 pv_info.kernel_rpl = 0;
5ead97c8
JF
1587
1588 /* set the limit of our address space */
fb1d8404 1589 xen_reserve_top();
5ead97c8 1590
7d087b68 1591#ifdef CONFIG_X86_32
5ead97c8
JF
1592 /* set up basic CPUID stuff */
1593 cpu_detect(&new_cpu_data);
1594 new_cpu_data.hard_math = 1;
1595 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1596#endif
5ead97c8
JF
1597
1598 /* Poke various useful things into boot_params */
30c82645
PA
1599 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1600 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1601 ? __pa(xen_start_info->mod_start) : 0;
1602 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1603 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1604
9e124fe1 1605 if (!is_initial_xendomain()) {
83abc70a 1606 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1607 add_preferred_console("tty", 0, NULL);
b8c2d3df 1608 add_preferred_console("hvc", 0, NULL);
9e124fe1 1609 }
b8c2d3df 1610
084a2a4e
JF
1611 xen_raw_console_write("about to get started...\n");
1612
1613#if 0
1614 xen_raw_printk("&boot_params=%p __pa(&boot_params)=%lx __va(__pa(&boot_params))=%lx\n",
1615 &boot_params, __pa_symbol(&boot_params),
1616 __va(__pa_symbol(&boot_params)));
1617
1618 walk(pgd, &boot_params);
1619 walk(pgd, __va(__pa(&boot_params)));
1620#endif
1621
5ead97c8 1622 /* Start the world */
f5d36de0 1623#ifdef CONFIG_X86_32
f0d43100 1624 i386_start_kernel();
f5d36de0 1625#else
084a2a4e 1626 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1627#endif
5ead97c8 1628}
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