xen/evtchn: use xen_vcpu_id mapping
[deliverable/linux.git] / arch / x86 / xen / enlighten.c
CommitLineData
5ead97c8
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
38e20b07 14#include <linux/cpu.h>
5ead97c8
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15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/smp.h>
18#include <linux/preempt.h>
f120f13e 19#include <linux/hardirq.h>
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20#include <linux/percpu.h>
21#include <linux/delay.h>
22#include <linux/start_kernel.h>
23#include <linux/sched.h>
6cac5a92 24#include <linux/kprobes.h>
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25#include <linux/bootmem.h>
26#include <linux/module.h>
f4f97b3e
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27#include <linux/mm.h>
28#include <linux/page-flags.h>
29#include <linux/highmem.h>
b8c2d3df 30#include <linux/console.h>
5d990b62 31#include <linux/pci.h>
5a0e3ad6 32#include <linux/gfp.h>
236260b9 33#include <linux/memblock.h>
96f28bc6 34#include <linux/edd.h>
983bb6d2 35#include <linux/frame.h>
5ead97c8 36
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37#ifdef CONFIG_KEXEC_CORE
38#include <linux/kexec.h>
39#endif
40
1ccbf534 41#include <xen/xen.h>
0ec53ecf 42#include <xen/events.h>
5ead97c8 43#include <xen/interface/xen.h>
ecbf29cd 44#include <xen/interface/version.h>
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45#include <xen/interface/physdev.h>
46#include <xen/interface/vcpu.h>
bee6ab53 47#include <xen/interface/memory.h>
f221b04f 48#include <xen/interface/nmi.h>
cef12ee5 49#include <xen/interface/xen-mca.h>
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50#include <xen/features.h>
51#include <xen/page.h>
38e20b07 52#include <xen/hvm.h>
084a2a4e 53#include <xen/hvc-console.h>
211063dc 54#include <xen/acpi.h>
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55
56#include <asm/paravirt.h>
7b6aa335 57#include <asm/apic.h>
5ead97c8 58#include <asm/page.h>
b5401a96 59#include <asm/xen/pci.h>
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60#include <asm/xen/hypercall.h>
61#include <asm/xen/hypervisor.h>
88e957d6 62#include <asm/xen/cpuid.h>
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63#include <asm/fixmap.h>
64#include <asm/processor.h>
707ebbc8 65#include <asm/proto.h>
1153968a 66#include <asm/msr-index.h>
6cac5a92 67#include <asm/traps.h>
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68#include <asm/setup.h>
69#include <asm/desc.h>
817a824b 70#include <asm/pgalloc.h>
5ead97c8 71#include <asm/pgtable.h>
f87e4cac 72#include <asm/tlbflush.h>
fefa629a 73#include <asm/reboot.h>
577eebea 74#include <asm/stackprotector.h>
bee6ab53 75#include <asm/hypervisor.h>
f221b04f 76#include <asm/mach_traps.h>
73c154c6 77#include <asm/mwait.h>
76a8df7b 78#include <asm/pci_x86.h>
a314e3eb 79#include <asm/cpu.h>
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80
81#ifdef CONFIG_ACPI
82#include <linux/acpi.h>
83#include <asm/acpi.h>
84#include <acpi/pdc_intel.h>
85#include <acpi/processor.h>
86#include <xen/interface/platform.h>
87#endif
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88
89#include "xen-ops.h"
3b827c1b 90#include "mmu.h"
f447d56d 91#include "smp.h"
5ead97c8 92#include "multicalls.h"
65d0cf0b 93#include "pmu.h"
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94
95EXPORT_SYMBOL_GPL(hypercall_page);
96
a520996a
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97/*
98 * Pointer to the xen_vcpu_info structure or
99 * &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info
100 * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info
101 * but if the hypervisor supports VCPUOP_register_vcpu_info then it can point
102 * to xen_vcpu_info. The pointer is used in __xen_evtchn_do_upcall to
103 * acknowledge pending events.
104 * Also more subtly it is used by the patched version of irq enable/disable
105 * e.g. xen_irq_enable_direct and xen_iret in PV mode.
106 *
107 * The desire to be able to do those mask/unmask operations as a single
108 * instruction by using the per-cpu offset held in %gs is the real reason
109 * vcpu info is in a per-cpu pointer and the original reason for this
110 * hypercall.
111 *
112 */
5ead97c8 113DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
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114
115/*
116 * Per CPU pages used if hypervisor supports VCPUOP_register_vcpu_info
117 * hypercall. This can be used both in PV and PVHVM mode. The structure
118 * overrides the default per_cpu(xen_vcpu, cpu) value.
119 */
5ead97c8 120DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 121
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122/* Linux <-> Xen vCPU id mapping */
123DEFINE_PER_CPU(int, xen_vcpu_id) = -1;
124EXPORT_PER_CPU_SYMBOL(xen_vcpu_id);
125
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126enum xen_domain_type xen_domain_type = XEN_NATIVE;
127EXPORT_SYMBOL_GPL(xen_domain_type);
128
7e77506a
IC
129unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START;
130EXPORT_SYMBOL(machine_to_phys_mapping);
ccbcdf7c
JB
131unsigned long machine_to_phys_nr;
132EXPORT_SYMBOL(machine_to_phys_nr);
7e77506a 133
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134struct start_info *xen_start_info;
135EXPORT_SYMBOL_GPL(xen_start_info);
136
a0d695c8 137struct shared_info xen_dummy_shared_info;
60223a32 138
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139void *xen_initial_gdt;
140
bee6ab53 141RESERVE_BRK(shared_info_page_brk, PAGE_SIZE);
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142__read_mostly int xen_have_vector_callback;
143EXPORT_SYMBOL_GPL(xen_have_vector_callback);
bee6ab53 144
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145/*
146 * Point at some empty memory to start with. We map the real shared_info
147 * page as soon as fixmap is up and running.
148 */
4648da7c 149struct shared_info *HYPERVISOR_shared_info = &xen_dummy_shared_info;
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150
151/*
152 * Flag to determine whether vcpu info placement is available on all
153 * VCPUs. We assume it is to start with, and then set it to zero on
154 * the first failure. This is because it can succeed on some VCPUs
155 * and not others, since it can involve hypervisor memory allocation,
156 * or because the guest failed to guarantee all the appropriate
157 * constraints on all VCPUs (ie buffer can't cross a page boundary).
158 *
159 * Note that any particular CPU may be using a placed vcpu structure,
160 * but we can only optimise if the all are.
161 *
162 * 0: not available, 1: available
163 */
e4d04071 164static int have_vcpu_info_placement = 1;
60223a32 165
1c32cdc6
DV
166struct tls_descs {
167 struct desc_struct desc[3];
168};
169
170/*
171 * Updating the 3 TLS descriptors in the GDT on every task switch is
172 * surprisingly expensive so we avoid updating them if they haven't
173 * changed. Since Xen writes different descriptors than the one
174 * passed in the update_descriptor hypercall we keep shadow copies to
175 * compare against.
176 */
177static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
178
c06ee78d
MR
179static void clamp_max_cpus(void)
180{
181#ifdef CONFIG_SMP
182 if (setup_max_cpus > MAX_VIRT_CPUS)
183 setup_max_cpus = MAX_VIRT_CPUS;
184#endif
185}
186
9c7a7942 187static void xen_vcpu_setup(int cpu)
5ead97c8 188{
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189 struct vcpu_register_vcpu_info info;
190 int err;
191 struct vcpu_info *vcpup;
192
a0d695c8 193 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
60223a32 194
7f1fc268
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195 /*
196 * This path is called twice on PVHVM - first during bootup via
197 * smp_init -> xen_hvm_cpu_notify, and then if the VCPU is being
198 * hotplugged: cpu_up -> xen_hvm_cpu_notify.
199 * As we can only do the VCPUOP_register_vcpu_info once lets
200 * not over-write its result.
201 *
202 * For PV it is called during restore (xen_vcpu_restore) and bootup
203 * (xen_setup_vcpu_info_placement). The hotplug mechanism does not
204 * use this function.
205 */
206 if (xen_hvm_domain()) {
207 if (per_cpu(xen_vcpu, cpu) == &per_cpu(xen_vcpu_info, cpu))
208 return;
209 }
e15a8621
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210 if (xen_vcpu_nr(cpu) < MAX_VIRT_CPUS)
211 per_cpu(xen_vcpu, cpu) =
212 &HYPERVISOR_shared_info->vcpu_info[xen_vcpu_nr(cpu)];
60223a32 213
c06ee78d
MR
214 if (!have_vcpu_info_placement) {
215 if (cpu >= MAX_VIRT_CPUS)
216 clamp_max_cpus();
217 return;
218 }
60223a32 219
c06ee78d 220 vcpup = &per_cpu(xen_vcpu_info, cpu);
9976b39b 221 info.mfn = arbitrary_virt_to_mfn(vcpup);
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222 info.offset = offset_in_page(vcpup);
223
60223a32
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224 /* Check to see if the hypervisor will put the vcpu_info
225 structure where we want it, which allows direct access via
a520996a
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226 a percpu-variable.
227 N.B. This hypercall can _only_ be called once per CPU. Subsequent
228 calls will error out with -EINVAL. This is due to the fact that
229 hypervisor has no unregister variant and this hypercall does not
230 allow to over-write info.mfn and info.offset.
231 */
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232 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, xen_vcpu_nr(cpu),
233 &info);
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234
235 if (err) {
236 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
237 have_vcpu_info_placement = 0;
c06ee78d 238 clamp_max_cpus();
60223a32
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239 } else {
240 /* This cpu is using the registered vcpu info, even if
241 later ones fail to. */
242 per_cpu(xen_vcpu, cpu) = vcpup;
60223a32 243 }
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244}
245
9c7a7942
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246/*
247 * On restore, set the vcpu placement up again.
248 * If it fails, then we're in a bad state, since
249 * we can't back out from using it...
250 */
251void xen_vcpu_restore(void)
252{
3905bb2a 253 int cpu;
9c7a7942 254
9d328a94 255 for_each_possible_cpu(cpu) {
3905bb2a 256 bool other_cpu = (cpu != smp_processor_id());
ad5475f9
VK
257 bool is_up = HYPERVISOR_vcpu_op(VCPUOP_is_up, xen_vcpu_nr(cpu),
258 NULL);
9c7a7942 259
9d328a94 260 if (other_cpu && is_up &&
ad5475f9 261 HYPERVISOR_vcpu_op(VCPUOP_down, xen_vcpu_nr(cpu), NULL))
3905bb2a 262 BUG();
9c7a7942 263
3905bb2a 264 xen_setup_runstate_info(cpu);
9c7a7942 265
3905bb2a 266 if (have_vcpu_info_placement)
9c7a7942 267 xen_vcpu_setup(cpu);
9c7a7942 268
9d328a94 269 if (other_cpu && is_up &&
ad5475f9 270 HYPERVISOR_vcpu_op(VCPUOP_up, xen_vcpu_nr(cpu), NULL))
3905bb2a 271 BUG();
9c7a7942
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272 }
273}
274
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275static void __init xen_banner(void)
276{
95c7c23b
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277 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
278 struct xen_extraversion extra;
279 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
280
d285d683
MR
281 pr_info("Booting paravirtualized kernel %son %s\n",
282 xen_feature(XENFEAT_auto_translated_physmap) ?
283 "with PVH extensions " : "", pv_info.name);
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284 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
285 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 286 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
5ead97c8 287}
394b40f6
KRW
288/* Check if running on Xen version (major, minor) or later */
289bool
290xen_running_on_version_or_later(unsigned int major, unsigned int minor)
291{
292 unsigned int version;
293
294 if (!xen_domain())
295 return false;
296
297 version = HYPERVISOR_xen_version(XENVER_version, NULL);
298 if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
299 ((version >> 16) > major))
300 return true;
301 return false;
302}
5ead97c8 303
5e626254
AP
304#define CPUID_THERM_POWER_LEAF 6
305#define APERFMPERF_PRESENT 0
306
e826fe1b
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307static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
308static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
309
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KRW
310static __read_mostly unsigned int cpuid_leaf1_ecx_set_mask;
311static __read_mostly unsigned int cpuid_leaf5_ecx_val;
312static __read_mostly unsigned int cpuid_leaf5_edx_val;
313
65ea5b03
PA
314static void xen_cpuid(unsigned int *ax, unsigned int *bx,
315 unsigned int *cx, unsigned int *dx)
5ead97c8 316{
82d64699 317 unsigned maskebx = ~0;
e826fe1b 318 unsigned maskecx = ~0;
5ead97c8 319 unsigned maskedx = ~0;
73c154c6 320 unsigned setecx = 0;
5ead97c8
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321 /*
322 * Mask out inconvenient features, to try and disable as many
323 * unsupported kernel subsystems as possible.
324 */
82d64699
JF
325 switch (*ax) {
326 case 1:
e826fe1b 327 maskecx = cpuid_leaf1_ecx_mask;
73c154c6 328 setecx = cpuid_leaf1_ecx_set_mask;
e826fe1b 329 maskedx = cpuid_leaf1_edx_mask;
82d64699
JF
330 break;
331
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KRW
332 case CPUID_MWAIT_LEAF:
333 /* Synthesize the values.. */
334 *ax = 0;
335 *bx = 0;
336 *cx = cpuid_leaf5_ecx_val;
337 *dx = cpuid_leaf5_edx_val;
338 return;
339
5e626254
AP
340 case CPUID_THERM_POWER_LEAF:
341 /* Disabling APERFMPERF for kernel usage */
342 maskecx = ~(1 << APERFMPERF_PRESENT);
343 break;
344
82d64699
JF
345 case 0xb:
346 /* Suppress extended topology stuff */
347 maskebx = 0;
348 break;
e826fe1b 349 }
5ead97c8
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350
351 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
352 : "=a" (*ax),
353 "=b" (*bx),
354 "=c" (*cx),
355 "=d" (*dx)
356 : "0" (*ax), "2" (*cx));
e826fe1b 357
82d64699 358 *bx &= maskebx;
e826fe1b 359 *cx &= maskecx;
73c154c6 360 *cx |= setecx;
65ea5b03 361 *dx &= maskedx;
5ead97c8 362}
983bb6d2 363STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
5ead97c8 364
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KRW
365static bool __init xen_check_mwait(void)
366{
e3aa4e61 367#ifdef CONFIG_ACPI
73c154c6
KRW
368 struct xen_platform_op op = {
369 .cmd = XENPF_set_processor_pminfo,
370 .u.set_pminfo.id = -1,
371 .u.set_pminfo.type = XEN_PM_PDC,
372 };
373 uint32_t buf[3];
374 unsigned int ax, bx, cx, dx;
375 unsigned int mwait_mask;
376
377 /* We need to determine whether it is OK to expose the MWAIT
378 * capability to the kernel to harvest deeper than C3 states from ACPI
379 * _CST using the processor_harvest_xen.c module. For this to work, we
380 * need to gather the MWAIT_LEAF values (which the cstate.c code
381 * checks against). The hypervisor won't expose the MWAIT flag because
382 * it would break backwards compatibility; so we will find out directly
383 * from the hardware and hypercall.
384 */
385 if (!xen_initial_domain())
386 return false;
387
e3aa4e61
LJ
388 /*
389 * When running under platform earlier than Xen4.2, do not expose
390 * mwait, to avoid the risk of loading native acpi pad driver
391 */
392 if (!xen_running_on_version_or_later(4, 2))
393 return false;
394
73c154c6
KRW
395 ax = 1;
396 cx = 0;
397
398 native_cpuid(&ax, &bx, &cx, &dx);
399
400 mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
401 (1 << (X86_FEATURE_MWAIT % 32));
402
403 if ((cx & mwait_mask) != mwait_mask)
404 return false;
405
406 /* We need to emulate the MWAIT_LEAF and for that we need both
407 * ecx and edx. The hypercall provides only partial information.
408 */
409
410 ax = CPUID_MWAIT_LEAF;
411 bx = 0;
412 cx = 0;
413 dx = 0;
414
415 native_cpuid(&ax, &bx, &cx, &dx);
416
417 /* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
418 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
419 */
420 buf[0] = ACPI_PDC_REVISION_ID;
421 buf[1] = 1;
422 buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
423
424 set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
425
cfafae94 426 if ((HYPERVISOR_platform_op(&op) == 0) &&
73c154c6
KRW
427 (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
428 cpuid_leaf5_ecx_val = cx;
429 cpuid_leaf5_edx_val = dx;
430 }
431 return true;
432#else
433 return false;
434#endif
435}
ad3062a0 436static void __init xen_init_cpuid_mask(void)
e826fe1b
JF
437{
438 unsigned int ax, bx, cx, dx;
947ccf9c 439 unsigned int xsave_mask;
e826fe1b
JF
440
441 cpuid_leaf1_edx_mask =
cef12ee5 442 ~((1 << X86_FEATURE_MTRR) | /* disable MTRR */
e826fe1b
JF
443 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
444
445 if (!xen_initial_domain())
446 cpuid_leaf1_edx_mask &=
6efa20e4 447 ~((1 << X86_FEATURE_ACPI)); /* disable ACPI */
4ea9b9ac
ZD
448
449 cpuid_leaf1_ecx_mask &= ~(1 << (X86_FEATURE_X2APIC % 32));
450
947ccf9c 451 ax = 1;
5e287830 452 cx = 0;
d285d683 453 cpuid(1, &ax, &bx, &cx, &dx);
e826fe1b 454
947ccf9c
SH
455 xsave_mask =
456 (1 << (X86_FEATURE_XSAVE % 32)) |
457 (1 << (X86_FEATURE_OSXSAVE % 32));
458
459 /* Xen will set CR4.OSXSAVE if supported and not disabled by force */
460 if ((cx & xsave_mask) != xsave_mask)
461 cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */
73c154c6
KRW
462 if (xen_check_mwait())
463 cpuid_leaf1_ecx_set_mask = (1 << (X86_FEATURE_MWAIT % 32));
e826fe1b
JF
464}
465
5ead97c8
JF
466static void xen_set_debugreg(int reg, unsigned long val)
467{
468 HYPERVISOR_set_debugreg(reg, val);
469}
470
471static unsigned long xen_get_debugreg(int reg)
472{
473 return HYPERVISOR_get_debugreg(reg);
474}
475
224101ed 476static void xen_end_context_switch(struct task_struct *next)
5ead97c8 477{
5ead97c8 478 xen_mc_flush();
224101ed 479 paravirt_end_context_switch(next);
5ead97c8
JF
480}
481
482static unsigned long xen_store_tr(void)
483{
484 return 0;
485}
486
a05d2eba 487/*
cef43bf6
JF
488 * Set the page permissions for a particular virtual address. If the
489 * address is a vmalloc mapping (or other non-linear mapping), then
490 * find the linear mapping of the page and also set its protections to
491 * match.
a05d2eba
JF
492 */
493static void set_aliased_prot(void *v, pgprot_t prot)
494{
495 int level;
496 pte_t *ptep;
497 pte_t pte;
498 unsigned long pfn;
499 struct page *page;
aa1acff3 500 unsigned char dummy;
a05d2eba
JF
501
502 ptep = lookup_address((unsigned long)v, &level);
503 BUG_ON(ptep == NULL);
504
505 pfn = pte_pfn(*ptep);
506 page = pfn_to_page(pfn);
507
508 pte = pfn_pte(pfn, prot);
509
aa1acff3
AL
510 /*
511 * Careful: update_va_mapping() will fail if the virtual address
512 * we're poking isn't populated in the page tables. We don't
513 * need to worry about the direct map (that's always in the page
514 * tables), but we need to be careful about vmap space. In
515 * particular, the top level page table can lazily propagate
516 * entries between processes, so if we've switched mms since we
517 * vmapped the target in the first place, we might not have the
518 * top-level page table entry populated.
519 *
520 * We disable preemption because we want the same mm active when
521 * we probe the target and when we issue the hypercall. We'll
522 * have the same nominal mm, but if we're a kernel thread, lazy
523 * mm dropping could change our pgd.
524 *
525 * Out of an abundance of caution, this uses __get_user() to fault
526 * in the target address just in case there's some obscure case
527 * in which the target address isn't readable.
528 */
529
530 preempt_disable();
531
532 pagefault_disable(); /* Avoid warnings due to being atomic. */
533 __get_user(dummy, (unsigned char __user __force *)v);
534 pagefault_enable();
535
a05d2eba
JF
536 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
537 BUG();
538
539 if (!PageHighMem(page)) {
540 void *av = __va(PFN_PHYS(pfn));
541
542 if (av != v)
543 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
544 BUG();
545 } else
546 kmap_flush_unused();
aa1acff3
AL
547
548 preempt_enable();
a05d2eba
JF
549}
550
38ffbe66
JF
551static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
552{
a05d2eba 553 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
554 int i;
555
aa1acff3
AL
556 /*
557 * We need to mark the all aliases of the LDT pages RO. We
558 * don't need to call vm_flush_aliases(), though, since that's
559 * only responsible for flushing aliases out the TLBs, not the
560 * page tables, and Xen will flush the TLB for us if needed.
561 *
562 * To avoid confusing future readers: none of this is necessary
563 * to load the LDT. The hypervisor only checks this when the
564 * LDT is faulted in due to subsequent descriptor access.
565 */
566
a05d2eba
JF
567 for(i = 0; i < entries; i += entries_per_page)
568 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
JF
569}
570
571static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
572{
a05d2eba 573 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
JF
574 int i;
575
a05d2eba
JF
576 for(i = 0; i < entries; i += entries_per_page)
577 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
JF
578}
579
5ead97c8
JF
580static void xen_set_ldt(const void *addr, unsigned entries)
581{
5ead97c8
JF
582 struct mmuext_op *op;
583 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
584
ab78f7ad
JF
585 trace_xen_cpu_set_ldt(addr, entries);
586
5ead97c8
JF
587 op = mcs.args;
588 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 589 op->arg1.linear_addr = (unsigned long)addr;
5ead97c8
JF
590 op->arg2.nr_ents = entries;
591
592 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
593
594 xen_mc_issue(PARAVIRT_LAZY_CPU);
595}
596
6b68f01b 597static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8 598{
5ead97c8
JF
599 unsigned long va = dtr->address;
600 unsigned int size = dtr->size + 1;
585423c8 601 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
3ce5fa7e 602 unsigned long frames[pages];
5ead97c8 603 int f;
5ead97c8 604
577eebea
JF
605 /*
606 * A GDT can be up to 64k in size, which corresponds to 8192
607 * 8-byte entries, or 16 4k pages..
608 */
5ead97c8
JF
609
610 BUG_ON(size > 65536);
611 BUG_ON(va & ~PAGE_MASK);
612
5ead97c8 613 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
6ed6bf42 614 int level;
577eebea 615 pte_t *ptep;
6ed6bf42
JF
616 unsigned long pfn, mfn;
617 void *virt;
618
577eebea
JF
619 /*
620 * The GDT is per-cpu and is in the percpu data area.
621 * That can be virtually mapped, so we need to do a
622 * page-walk to get the underlying MFN for the
623 * hypercall. The page can also be in the kernel's
624 * linear range, so we need to RO that mapping too.
625 */
626 ptep = lookup_address(va, &level);
6ed6bf42
JF
627 BUG_ON(ptep == NULL);
628
629 pfn = pte_pfn(*ptep);
630 mfn = pfn_to_mfn(pfn);
631 virt = __va(PFN_PHYS(pfn));
632
633 frames[f] = mfn;
9976b39b 634
5ead97c8 635 make_lowmem_page_readonly((void *)va);
6ed6bf42 636 make_lowmem_page_readonly(virt);
5ead97c8
JF
637 }
638
3ce5fa7e
JF
639 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
640 BUG();
5ead97c8
JF
641}
642
577eebea
JF
643/*
644 * load_gdt for early boot, when the gdt is only mapped once
645 */
ad3062a0 646static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
577eebea
JF
647{
648 unsigned long va = dtr->address;
649 unsigned int size = dtr->size + 1;
585423c8 650 unsigned pages = DIV_ROUND_UP(size, PAGE_SIZE);
577eebea
JF
651 unsigned long frames[pages];
652 int f;
653
654 /*
655 * A GDT can be up to 64k in size, which corresponds to 8192
656 * 8-byte entries, or 16 4k pages..
657 */
658
659 BUG_ON(size > 65536);
660 BUG_ON(va & ~PAGE_MASK);
661
662 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
663 pte_t pte;
664 unsigned long pfn, mfn;
665
666 pfn = virt_to_pfn(va);
667 mfn = pfn_to_mfn(pfn);
668
669 pte = pfn_pte(pfn, PAGE_KERNEL_RO);
670
671 if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
672 BUG();
673
674 frames[f] = mfn;
675 }
676
677 if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct)))
678 BUG();
679}
680
59290362
DV
681static inline bool desc_equal(const struct desc_struct *d1,
682 const struct desc_struct *d2)
683{
684 return d1->a == d2->a && d1->b == d2->b;
685}
686
5ead97c8
JF
687static void load_TLS_descriptor(struct thread_struct *t,
688 unsigned int cpu, unsigned int i)
689{
1c32cdc6
DV
690 struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
691 struct desc_struct *gdt;
692 xmaddr_t maddr;
693 struct multicall_space mc;
694
695 if (desc_equal(shadow, &t->tls_array[i]))
696 return;
697
698 *shadow = t->tls_array[i];
699
700 gdt = get_cpu_gdt_table(cpu);
701 maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
702 mc = __xen_mc_entry(0);
5ead97c8
JF
703
704 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
705}
706
707static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
708{
8b84ad94 709 /*
ccbeed3a
TH
710 * XXX sleazy hack: If we're being called in a lazy-cpu zone
711 * and lazy gs handling is enabled, it means we're in a
712 * context switch, and %gs has just been saved. This means we
713 * can zero it out to prevent faults on exit from the
714 * hypervisor if the next process has no %gs. Either way, it
715 * has been saved, and the new value will get loaded properly.
716 * This will go away as soon as Xen has been modified to not
717 * save/restore %gs for normal hypercalls.
8a95408e
EH
718 *
719 * On x86_64, this hack is not used for %gs, because gs points
720 * to KERNEL_GS_BASE (and uses it for PDA references), so we
721 * must not zero %gs on x86_64
722 *
723 * For x86_64, we need to zero %fs, otherwise we may get an
724 * exception between the new %fs descriptor being loaded and
725 * %fs being effectively cleared at __switch_to().
8b84ad94 726 */
8a95408e
EH
727 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
728#ifdef CONFIG_X86_32
ccbeed3a 729 lazy_load_gs(0);
8a95408e
EH
730#else
731 loadsegment(fs, 0);
732#endif
733 }
734
735 xen_mc_batch();
736
737 load_TLS_descriptor(t, cpu, 0);
738 load_TLS_descriptor(t, cpu, 1);
739 load_TLS_descriptor(t, cpu, 2);
740
741 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
742}
743
a8fc1089
EH
744#ifdef CONFIG_X86_64
745static void xen_load_gs_index(unsigned int idx)
746{
747 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
748 BUG();
5ead97c8 749}
a8fc1089 750#endif
5ead97c8
JF
751
752static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 753 const void *ptr)
5ead97c8 754{
cef43bf6 755 xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
75b8bb3e 756 u64 entry = *(u64 *)ptr;
5ead97c8 757
ab78f7ad
JF
758 trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
759
f120f13e
JF
760 preempt_disable();
761
5ead97c8
JF
762 xen_mc_flush();
763 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
764 BUG();
f120f13e
JF
765
766 preempt_enable();
5ead97c8
JF
767}
768
e176d367 769static int cvt_gate_to_trap(int vector, const gate_desc *val,
5ead97c8
JF
770 struct trap_info *info)
771{
6cac5a92
JF
772 unsigned long addr;
773
6d02c426 774 if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
5ead97c8
JF
775 return 0;
776
777 info->vector = vector;
6cac5a92
JF
778
779 addr = gate_offset(*val);
780#ifdef CONFIG_X86_64
b80119bb
JF
781 /*
782 * Look for known traps using IST, and substitute them
783 * appropriately. The debugger ones are the only ones we care
05e36006
LJ
784 * about. Xen will handle faults like double_fault,
785 * so we should never see them. Warn if
b80119bb
JF
786 * there's an unexpected IST-using fault handler.
787 */
6cac5a92
JF
788 if (addr == (unsigned long)debug)
789 addr = (unsigned long)xen_debug;
790 else if (addr == (unsigned long)int3)
791 addr = (unsigned long)xen_int3;
792 else if (addr == (unsigned long)stack_segment)
793 addr = (unsigned long)xen_stack_segment;
6efa20e4 794 else if (addr == (unsigned long)double_fault) {
b80119bb
JF
795 /* Don't need to handle these */
796 return 0;
797#ifdef CONFIG_X86_MCE
798 } else if (addr == (unsigned long)machine_check) {
05e36006
LJ
799 /*
800 * when xen hypervisor inject vMCE to guest,
801 * use native mce handler to handle it
802 */
803 ;
b80119bb 804#endif
6efa20e4
KRW
805 } else if (addr == (unsigned long)nmi)
806 /*
807 * Use the native version as well.
808 */
809 ;
810 else {
b80119bb
JF
811 /* Some other trap using IST? */
812 if (WARN_ON(val->ist != 0))
813 return 0;
814 }
6cac5a92
JF
815#endif /* CONFIG_X86_64 */
816 info->address = addr;
817
e176d367
EH
818 info->cs = gate_segment(*val);
819 info->flags = val->dpl;
5ead97c8 820 /* interrupt gates clear IF */
6d02c426
JF
821 if (val->type == GATE_INTERRUPT)
822 info->flags |= 1 << 2;
5ead97c8
JF
823
824 return 1;
825}
826
827/* Locations of each CPU's IDT */
6b68f01b 828static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
5ead97c8
JF
829
830/* Set an IDT entry. If the entry is part of the current IDT, then
831 also update Xen. */
8d947344 832static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 833{
5ead97c8 834 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
JF
835 unsigned long start, end;
836
ab78f7ad
JF
837 trace_xen_cpu_write_idt_entry(dt, entrynum, g);
838
f120f13e
JF
839 preempt_disable();
840
780f36d8
CL
841 start = __this_cpu_read(idt_desc.address);
842 end = start + __this_cpu_read(idt_desc.size) + 1;
5ead97c8
JF
843
844 xen_mc_flush();
845
8d947344 846 native_write_idt_entry(dt, entrynum, g);
5ead97c8
JF
847
848 if (p >= start && (p + 8) <= end) {
849 struct trap_info info[2];
850
851 info[1].address = 0;
852
e176d367 853 if (cvt_gate_to_trap(entrynum, g, &info[0]))
5ead97c8
JF
854 if (HYPERVISOR_set_trap_table(info))
855 BUG();
856 }
f120f13e
JF
857
858 preempt_enable();
5ead97c8
JF
859}
860
6b68f01b 861static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 862 struct trap_info *traps)
5ead97c8 863{
5ead97c8
JF
864 unsigned in, out, count;
865
e176d367 866 count = (desc->size+1) / sizeof(gate_desc);
5ead97c8
JF
867 BUG_ON(count > 256);
868
5ead97c8 869 for (in = out = 0; in < count; in++) {
e176d367 870 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 871
e176d367 872 if (cvt_gate_to_trap(in, entry, &traps[out]))
5ead97c8
JF
873 out++;
874 }
875 traps[out].address = 0;
f87e4cac
JF
876}
877
878void xen_copy_trap_info(struct trap_info *traps)
879{
89cbc767 880 const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
f87e4cac
JF
881
882 xen_convert_trap_info(desc, traps);
f87e4cac
JF
883}
884
885/* Load a new IDT into Xen. In principle this can be per-CPU, so we
886 hold a spinlock to protect the static traps[] array (static because
887 it avoids allocation, and saves stack space). */
6b68f01b 888static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
889{
890 static DEFINE_SPINLOCK(lock);
891 static struct trap_info traps[257];
f87e4cac 892
ab78f7ad
JF
893 trace_xen_cpu_load_idt(desc);
894
f87e4cac
JF
895 spin_lock(&lock);
896
89cbc767 897 memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
f120f13e 898
f87e4cac 899 xen_convert_trap_info(desc, traps);
5ead97c8
JF
900
901 xen_mc_flush();
902 if (HYPERVISOR_set_trap_table(traps))
903 BUG();
904
905 spin_unlock(&lock);
906}
907
908/* Write a GDT descriptor entry. Ignore LDT descriptors, since
909 they're handled differently. */
910static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 911 const void *desc, int type)
5ead97c8 912{
ab78f7ad
JF
913 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
914
f120f13e
JF
915 preempt_disable();
916
014b15be
GOC
917 switch (type) {
918 case DESC_LDT:
919 case DESC_TSS:
5ead97c8
JF
920 /* ignore */
921 break;
922
923 default: {
9976b39b 924 xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
5ead97c8
JF
925
926 xen_mc_flush();
014b15be 927 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
928 BUG();
929 }
930
931 }
f120f13e
JF
932
933 preempt_enable();
5ead97c8
JF
934}
935
577eebea
JF
936/*
937 * Version of write_gdt_entry for use at early boot-time needed to
938 * update an entry as simply as possible.
939 */
ad3062a0 940static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
577eebea
JF
941 const void *desc, int type)
942{
ab78f7ad
JF
943 trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
944
577eebea
JF
945 switch (type) {
946 case DESC_LDT:
947 case DESC_TSS:
948 /* ignore */
949 break;
950
951 default: {
952 xmaddr_t maddr = virt_to_machine(&dt[entry]);
953
954 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
955 dt[entry] = *(struct desc_struct *)desc;
956 }
957
958 }
959}
960
faca6227 961static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 962 struct thread_struct *thread)
5ead97c8 963{
ab78f7ad
JF
964 struct multicall_space mcs;
965
966 mcs = xen_mc_entry(0);
faca6227 967 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8 968 xen_mc_issue(PARAVIRT_LAZY_CPU);
8ef46a67 969 tss->x86_tss.sp0 = thread->sp0;
5ead97c8
JF
970}
971
b7a58459 972void xen_set_iopl_mask(unsigned mask)
5ead97c8
JF
973{
974 struct physdev_set_iopl set_iopl;
975
976 /* Force the change at ring 0. */
977 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
978 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
979}
980
981static void xen_io_delay(void)
982{
983}
984
7b1333aa
JF
985static void xen_clts(void)
986{
987 struct multicall_space mcs;
988
989 mcs = xen_mc_entry(0);
990
991 MULTI_fpu_taskswitch(mcs.mc, 0);
992
993 xen_mc_issue(PARAVIRT_LAZY_CPU);
994}
995
a789ed5f
JF
996static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
997
998static unsigned long xen_read_cr0(void)
999{
2113f469 1000 unsigned long cr0 = this_cpu_read(xen_cr0_value);
a789ed5f
JF
1001
1002 if (unlikely(cr0 == 0)) {
1003 cr0 = native_read_cr0();
2113f469 1004 this_cpu_write(xen_cr0_value, cr0);
a789ed5f
JF
1005 }
1006
1007 return cr0;
1008}
1009
7b1333aa
JF
1010static void xen_write_cr0(unsigned long cr0)
1011{
1012 struct multicall_space mcs;
1013
2113f469 1014 this_cpu_write(xen_cr0_value, cr0);
a789ed5f 1015
7b1333aa
JF
1016 /* Only pay attention to cr0.TS; everything else is
1017 ignored. */
1018 mcs = xen_mc_entry(0);
1019
1020 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
1021
1022 xen_mc_issue(PARAVIRT_LAZY_CPU);
1023}
1024
5ead97c8
JF
1025static void xen_write_cr4(unsigned long cr4)
1026{
3375d828 1027 cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
2956a351
JF
1028
1029 native_write_cr4(cr4);
5ead97c8 1030}
1a7bbda5
KRW
1031#ifdef CONFIG_X86_64
1032static inline unsigned long xen_read_cr8(void)
1033{
1034 return 0;
1035}
1036static inline void xen_write_cr8(unsigned long val)
1037{
1038 BUG_ON(val);
1039}
1040#endif
31795b47
BO
1041
1042static u64 xen_read_msr_safe(unsigned int msr, int *err)
1043{
1044 u64 val;
1045
6b08cd63
BO
1046 if (pmu_msr_read(msr, &val, err))
1047 return val;
1048
31795b47
BO
1049 val = native_read_msr_safe(msr, err);
1050 switch (msr) {
1051 case MSR_IA32_APICBASE:
1052#ifdef CONFIG_X86_X2APIC
1053 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
1054#endif
1055 val &= ~X2APIC_ENABLE;
1056 break;
1057 }
1058 return val;
1059}
1060
1153968a
JF
1061static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1062{
1063 int ret;
1064
1065 ret = 0;
1066
f63c2f24 1067 switch (msr) {
1153968a
JF
1068#ifdef CONFIG_X86_64
1069 unsigned which;
1070 u64 base;
1071
1072 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
1073 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
1074 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
1075
1076 set:
1077 base = ((u64)high << 32) | low;
1078 if (HYPERVISOR_set_segment_base(which, base) != 0)
0cc0213e 1079 ret = -EIO;
1153968a
JF
1080 break;
1081#endif
d89961e2
JF
1082
1083 case MSR_STAR:
1084 case MSR_CSTAR:
1085 case MSR_LSTAR:
1086 case MSR_SYSCALL_MASK:
1087 case MSR_IA32_SYSENTER_CS:
1088 case MSR_IA32_SYSENTER_ESP:
1089 case MSR_IA32_SYSENTER_EIP:
1090 /* Fast syscall setup is all done in hypercalls, so
1091 these are all ignored. Stub them out here to stop
1092 Xen console noise. */
2ecf91b6 1093 break;
41f2e477 1094
1153968a 1095 default:
6b08cd63
BO
1096 if (!pmu_msr_write(msr, low, high, &ret))
1097 ret = native_write_msr_safe(msr, low, high);
1153968a
JF
1098 }
1099
1100 return ret;
1101}
1102
dd2f4a00
AL
1103static u64 xen_read_msr(unsigned int msr)
1104{
1105 /*
1106 * This will silently swallow a #GP from RDMSR. It may be worth
1107 * changing that.
1108 */
1109 int err;
1110
1111 return xen_read_msr_safe(msr, &err);
1112}
1113
1114static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
1115{
1116 /*
1117 * This will silently swallow a #GP from WRMSR. It may be worth
1118 * changing that.
1119 */
1120 xen_write_msr_safe(msr, low, high);
1121}
1122
0e91398f 1123void xen_setup_shared_info(void)
5ead97c8
JF
1124{
1125 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1126 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1127 xen_start_info->shared_info);
1128
1129 HYPERVISOR_shared_info =
1130 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1131 } else
1132 HYPERVISOR_shared_info =
1133 (struct shared_info *)__va(xen_start_info->shared_info);
1134
2e8fe719
JF
1135#ifndef CONFIG_SMP
1136 /* In UP this is as good a place as any to set up shared info */
1137 xen_setup_vcpu_info_placement();
1138#endif
d5edbc1f
JF
1139
1140 xen_setup_mfn_list_list();
2e8fe719
JF
1141}
1142
5f054e31 1143/* This is called once we have the cpu_possible_mask */
0e91398f 1144void xen_setup_vcpu_info_placement(void)
60223a32
JF
1145{
1146 int cpu;
1147
88e957d6
VK
1148 for_each_possible_cpu(cpu) {
1149 /* Set up direct vCPU id mapping for PV guests. */
1150 per_cpu(xen_vcpu_id, cpu) = cpu;
60223a32 1151 xen_vcpu_setup(cpu);
88e957d6 1152 }
60223a32
JF
1153
1154 /* xen_vcpu_setup managed to place the vcpu_info within the
2771374d
MR
1155 * percpu area for all cpus, so make use of it. Note that for
1156 * PVH we want to use native IRQ mechanism. */
1157 if (have_vcpu_info_placement && !xen_pvh_domain()) {
ecb93d1c
JF
1158 pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
1159 pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
1160 pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
1161 pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
93b1eab3 1162 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1163 }
5ead97c8
JF
1164}
1165
ab144f5e
AK
1166static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1167 unsigned long addr, unsigned len)
6487673b
JF
1168{
1169 char *start, *end, *reloc;
1170 unsigned ret;
1171
1172 start = end = reloc = NULL;
1173
93b1eab3
JF
1174#define SITE(op, x) \
1175 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1176 if (have_vcpu_info_placement) { \
1177 start = (char *)xen_##x##_direct; \
1178 end = xen_##x##_direct_end; \
1179 reloc = xen_##x##_direct_reloc; \
1180 } \
1181 goto patch_site
1182
1183 switch (type) {
93b1eab3
JF
1184 SITE(pv_irq_ops, irq_enable);
1185 SITE(pv_irq_ops, irq_disable);
1186 SITE(pv_irq_ops, save_fl);
1187 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1188#undef SITE
1189
1190 patch_site:
1191 if (start == NULL || (end-start) > len)
1192 goto default_patch;
1193
ab144f5e 1194 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1195
1196 /* Note: because reloc is assigned from something that
1197 appears to be an array, gcc assumes it's non-null,
1198 but doesn't know its relationship with start and
1199 end. */
1200 if (reloc > start && reloc < end) {
1201 int reloc_off = reloc - start;
ab144f5e
AK
1202 long *relocp = (long *)(insnbuf + reloc_off);
1203 long delta = start - (char *)addr;
6487673b
JF
1204
1205 *relocp += delta;
1206 }
1207 break;
1208
1209 default_patch:
1210 default:
ab144f5e
AK
1211 ret = paravirt_patch_default(type, clobbers, insnbuf,
1212 addr, len);
6487673b
JF
1213 break;
1214 }
1215
1216 return ret;
1217}
1218
ad3062a0 1219static const struct pv_info xen_info __initconst = {
5ead97c8
JF
1220 .shared_kernel_pmd = 0,
1221
318f5a2a
AL
1222#ifdef CONFIG_X86_64
1223 .extra_user_64bit_cs = FLAT_USER_CS64,
1224#endif
5ead97c8 1225 .name = "Xen",
93b1eab3 1226};
5ead97c8 1227
ad3062a0 1228static const struct pv_init_ops xen_init_ops __initconst = {
6487673b 1229 .patch = xen_patch,
93b1eab3 1230};
5ead97c8 1231
ad3062a0 1232static const struct pv_cpu_ops xen_cpu_ops __initconst = {
5ead97c8
JF
1233 .cpuid = xen_cpuid,
1234
1235 .set_debugreg = xen_set_debugreg,
1236 .get_debugreg = xen_get_debugreg,
1237
7b1333aa 1238 .clts = xen_clts,
5ead97c8 1239
a789ed5f 1240 .read_cr0 = xen_read_cr0,
7b1333aa 1241 .write_cr0 = xen_write_cr0,
5ead97c8 1242
5ead97c8
JF
1243 .read_cr4 = native_read_cr4,
1244 .read_cr4_safe = native_read_cr4_safe,
1245 .write_cr4 = xen_write_cr4,
1246
1a7bbda5
KRW
1247#ifdef CONFIG_X86_64
1248 .read_cr8 = xen_read_cr8,
1249 .write_cr8 = xen_write_cr8,
1250#endif
1251
5ead97c8
JF
1252 .wbinvd = native_wbinvd,
1253
dd2f4a00
AL
1254 .read_msr = xen_read_msr,
1255 .write_msr = xen_write_msr,
1256
c2ee03b2
AL
1257 .read_msr_safe = xen_read_msr_safe,
1258 .write_msr_safe = xen_write_msr_safe,
1ab46fd3 1259
65d0cf0b 1260 .read_pmc = xen_read_pmc,
5ead97c8 1261
81e103f1 1262 .iret = xen_iret,
6fcac6d3 1263#ifdef CONFIG_X86_64
6fcac6d3
JF
1264 .usergs_sysret64 = xen_sysret64,
1265#endif
5ead97c8
JF
1266
1267 .load_tr_desc = paravirt_nop,
1268 .set_ldt = xen_set_ldt,
1269 .load_gdt = xen_load_gdt,
1270 .load_idt = xen_load_idt,
1271 .load_tls = xen_load_tls,
a8fc1089
EH
1272#ifdef CONFIG_X86_64
1273 .load_gs_index = xen_load_gs_index,
1274#endif
5ead97c8 1275
38ffbe66
JF
1276 .alloc_ldt = xen_alloc_ldt,
1277 .free_ldt = xen_free_ldt,
1278
5ead97c8
JF
1279 .store_idt = native_store_idt,
1280 .store_tr = xen_store_tr,
1281
1282 .write_ldt_entry = xen_write_ldt_entry,
1283 .write_gdt_entry = xen_write_gdt_entry,
1284 .write_idt_entry = xen_write_idt_entry,
faca6227 1285 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1286
1287 .set_iopl_mask = xen_set_iopl_mask,
1288 .io_delay = xen_io_delay,
1289
952d1d70
JF
1290 /* Xen takes care of %gs when switching to usermode for us */
1291 .swapgs = paravirt_nop,
1292
224101ed
JF
1293 .start_context_switch = paravirt_start_context_switch,
1294 .end_context_switch = xen_end_context_switch,
93b1eab3
JF
1295};
1296
fefa629a
JF
1297static void xen_reboot(int reason)
1298{
349c709f 1299 struct sched_shutdown r = { .reason = reason };
65d0cf0b
BO
1300 int cpu;
1301
1302 for_each_online_cpu(cpu)
1303 xen_pmu_finish(cpu);
349c709f 1304
349c709f 1305 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1306 BUG();
1307}
1308
1309static void xen_restart(char *msg)
1310{
1311 xen_reboot(SHUTDOWN_reboot);
1312}
1313
1314static void xen_emergency_restart(void)
1315{
1316 xen_reboot(SHUTDOWN_reboot);
1317}
1318
1319static void xen_machine_halt(void)
1320{
1321 xen_reboot(SHUTDOWN_poweroff);
1322}
1323
b2abe506
TG
1324static void xen_machine_power_off(void)
1325{
1326 if (pm_power_off)
1327 pm_power_off();
1328 xen_reboot(SHUTDOWN_poweroff);
1329}
1330
fefa629a
JF
1331static void xen_crash_shutdown(struct pt_regs *regs)
1332{
1333 xen_reboot(SHUTDOWN_crash);
1334}
1335
f09f6d19
DD
1336static int
1337xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr)
1338{
086748e5 1339 xen_reboot(SHUTDOWN_crash);
f09f6d19
DD
1340 return NOTIFY_DONE;
1341}
1342
1343static struct notifier_block xen_panic_block = {
1344 .notifier_call= xen_panic_event,
bc5eb201 1345 .priority = INT_MIN
f09f6d19
DD
1346};
1347
1348int xen_panic_handler_init(void)
1349{
1350 atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block);
1351 return 0;
1352}
1353
ad3062a0 1354static const struct machine_ops xen_machine_ops __initconst = {
fefa629a
JF
1355 .restart = xen_restart,
1356 .halt = xen_machine_halt,
b2abe506 1357 .power_off = xen_machine_power_off,
fefa629a
JF
1358 .shutdown = xen_machine_halt,
1359 .crash_shutdown = xen_crash_shutdown,
1360 .emergency_restart = xen_emergency_restart,
1361};
1362
f221b04f
JB
1363static unsigned char xen_get_nmi_reason(void)
1364{
1365 unsigned char reason = 0;
1366
1367 /* Construct a value which looks like it came from port 0x61. */
1368 if (test_bit(_XEN_NMIREASON_io_error,
1369 &HYPERVISOR_shared_info->arch.nmi_reason))
1370 reason |= NMI_REASON_IOCHK;
1371 if (test_bit(_XEN_NMIREASON_pci_serr,
1372 &HYPERVISOR_shared_info->arch.nmi_reason))
1373 reason |= NMI_REASON_SERR;
1374
1375 return reason;
1376}
1377
96f28bc6
DV
1378static void __init xen_boot_params_init_edd(void)
1379{
1380#if IS_ENABLED(CONFIG_EDD)
1381 struct xen_platform_op op;
1382 struct edd_info *edd_info;
1383 u32 *mbr_signature;
1384 unsigned nr;
1385 int ret;
1386
1387 edd_info = boot_params.eddbuf;
1388 mbr_signature = boot_params.edd_mbr_sig_buffer;
1389
1390 op.cmd = XENPF_firmware_info;
1391
1392 op.u.firmware_info.type = XEN_FW_DISK_INFO;
1393 for (nr = 0; nr < EDDMAXNR; nr++) {
1394 struct edd_info *info = edd_info + nr;
1395
1396 op.u.firmware_info.index = nr;
1397 info->params.length = sizeof(info->params);
1398 set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1399 &info->params);
cfafae94 1400 ret = HYPERVISOR_platform_op(&op);
96f28bc6
DV
1401 if (ret)
1402 break;
1403
1404#define C(x) info->x = op.u.firmware_info.u.disk_info.x
1405 C(device);
1406 C(version);
1407 C(interface_support);
1408 C(legacy_max_cylinder);
1409 C(legacy_max_head);
1410 C(legacy_sectors_per_track);
1411#undef C
1412 }
1413 boot_params.eddbuf_entries = nr;
1414
1415 op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1416 for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1417 op.u.firmware_info.index = nr;
cfafae94 1418 ret = HYPERVISOR_platform_op(&op);
96f28bc6
DV
1419 if (ret)
1420 break;
1421 mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1422 }
1423 boot_params.edd_mbr_sig_buf_entries = nr;
1424#endif
1425}
1426
577eebea
JF
1427/*
1428 * Set up the GDT and segment registers for -fstack-protector. Until
1429 * we do this, we have to be careful not to call any stack-protected
1430 * function, which is most of the kernel.
5840c84b
MR
1431 *
1432 * Note, that it is __ref because the only caller of this after init
1433 * is PVH which is not going to use xen_load_gdt_boot or other
1434 * __init functions.
577eebea 1435 */
c9f6e997 1436static void __ref xen_setup_gdt(int cpu)
577eebea 1437{
8d656bbe
MR
1438 if (xen_feature(XENFEAT_auto_translated_physmap)) {
1439#ifdef CONFIG_X86_64
1440 unsigned long dummy;
1441
5840c84b
MR
1442 load_percpu_segment(cpu); /* We need to access per-cpu area */
1443 switch_to_new_gdt(cpu); /* GDT and GS set */
8d656bbe
MR
1444
1445 /* We are switching of the Xen provided GDT to our HVM mode
1446 * GDT. The new GDT has __KERNEL_CS with CS.L = 1
1447 * and we are jumping to reload it.
1448 */
1449 asm volatile ("pushq %0\n"
1450 "leaq 1f(%%rip),%0\n"
1451 "pushq %0\n"
1452 "lretq\n"
1453 "1:\n"
1454 : "=&r" (dummy) : "0" (__KERNEL_CS));
1455
1456 /*
1457 * While not needed, we also set the %es, %ds, and %fs
1458 * to zero. We don't care about %ss as it is NULL.
1459 * Strictly speaking this is not needed as Xen zeros those
1460 * out (and also MSR_FS_BASE, MSR_GS_BASE, MSR_KERNEL_GS_BASE)
1461 *
1462 * Linux zeros them in cpu_init() and in secondary_startup_64
1463 * (for BSP).
1464 */
1465 loadsegment(es, 0);
1466 loadsegment(ds, 0);
1467 loadsegment(fs, 0);
1468#else
1469 /* PVH: TODO Implement. */
1470 BUG();
1471#endif
1472 return; /* PVH does not need any PV GDT ops. */
1473 }
577eebea
JF
1474 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1475 pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1476
1477 setup_stack_canary_segment(0);
1478 switch_to_new_gdt(0);
1479
1480 pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1481 pv_cpu_ops.load_gdt = xen_load_gdt;
1482}
1483
a2ef5dc2 1484#ifdef CONFIG_XEN_PVH
c9f6e997
RPM
1485/*
1486 * A PV guest starts with default flags that are not set for PVH, set them
1487 * here asap.
1488 */
1489static void xen_pvh_set_cr_flags(int cpu)
1490{
1491
1492 /* Some of these are setup in 'secondary_startup_64'. The others:
1493 * X86_CR0_TS, X86_CR0_PE, X86_CR0_ET are set by Xen for HVM guests
1494 * (which PVH shared codepaths), while X86_CR0_PG is for PVH. */
1495 write_cr0(read_cr0() | X86_CR0_MP | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM);
afca5013
MR
1496
1497 if (!cpu)
1498 return;
1499 /*
1500 * For BSP, PSE PGE are set in probe_page_size_mask(), for APs
21c4cd10 1501 * set them here. For all, OSFXSR OSXMMEXCPT are set in fpu__init_cpu().
afca5013 1502 */
16bf9226 1503 if (boot_cpu_has(X86_FEATURE_PSE))
375074cc 1504 cr4_set_bits_and_update_boot(X86_CR4_PSE);
afca5013 1505
c109bf95 1506 if (boot_cpu_has(X86_FEATURE_PGE))
375074cc 1507 cr4_set_bits_and_update_boot(X86_CR4_PGE);
c9f6e997
RPM
1508}
1509
1510/*
1511 * Note, that it is ref - because the only caller of this after init
1512 * is PVH which is not going to use xen_load_gdt_boot or other
1513 * __init functions.
1514 */
1515void __ref xen_pvh_secondary_vcpu_init(int cpu)
1516{
1517 xen_setup_gdt(cpu);
1518 xen_pvh_set_cr_flags(cpu);
1519}
1520
d285d683
MR
1521static void __init xen_pvh_early_guest_init(void)
1522{
1523 if (!xen_feature(XENFEAT_auto_translated_physmap))
1524 return;
1525
c9f6e997
RPM
1526 if (!xen_feature(XENFEAT_hvm_callback_vector))
1527 return;
1528
1529 xen_have_vector_callback = 1;
a2ef5dc2
MR
1530
1531 xen_pvh_early_cpu_init(0, false);
c9f6e997 1532 xen_pvh_set_cr_flags(0);
d285d683
MR
1533
1534#ifdef CONFIG_X86_32
1535 BUG(); /* PVH: Implement proper support. */
1536#endif
1537}
a2ef5dc2 1538#endif /* CONFIG_XEN_PVH */
d285d683 1539
8d152e7a
LR
1540static void __init xen_dom0_set_legacy_features(void)
1541{
1542 x86_platform.legacy.rtc = 1;
1543}
1544
5ead97c8 1545/* First C function to be called on Xen boot */
2605fc21 1546asmlinkage __visible void __init xen_start_kernel(void)
5ead97c8 1547{
ec35a69c 1548 struct physdev_set_iopl set_iopl;
d1e9abd6 1549 unsigned long initrd_start = 0;
ec35a69c 1550 int rc;
5ead97c8
JF
1551
1552 if (!xen_start_info)
1553 return;
1554
6e833587
JF
1555 xen_domain_type = XEN_PV_DOMAIN;
1556
d285d683 1557 xen_setup_features();
a2ef5dc2 1558#ifdef CONFIG_XEN_PVH
d285d683 1559 xen_pvh_early_guest_init();
a2ef5dc2 1560#endif
7e77506a
IC
1561 xen_setup_machphys_mapping();
1562
5ead97c8 1563 /* Install Xen paravirt ops */
93b1eab3
JF
1564 pv_info = xen_info;
1565 pv_init_ops = xen_init_ops;
f221b04f 1566 if (!xen_pvh_domain()) {
d285d683 1567 pv_cpu_ops = xen_cpu_ops;
93b1eab3 1568
f221b04f
JB
1569 x86_platform.get_nmi_reason = xen_get_nmi_reason;
1570 }
1571
abacaadc
DV
1572 if (xen_feature(XENFEAT_auto_translated_physmap))
1573 x86_init.resources.memory_setup = xen_auto_xlated_memory_setup;
1574 else
1575 x86_init.resources.memory_setup = xen_memory_setup;
42bbdb43 1576 x86_init.oem.arch_setup = xen_arch_setup;
6f30c1ac 1577 x86_init.oem.banner = xen_banner;
845b3944 1578
409771d2 1579 xen_init_time_ops();
93b1eab3 1580
ce2eef33 1581 /*
577eebea 1582 * Set up some pagetable state before starting to set any ptes.
ce2eef33 1583 */
577eebea 1584
973df35e
JF
1585 xen_init_mmu_ops();
1586
577eebea
JF
1587 /* Prevent unwanted bits from being set in PTEs. */
1588 __supported_pte_mask &= ~_PAGE_GLOBAL;
577eebea 1589
817a824b
IC
1590 /*
1591 * Prevent page tables from being allocated in highmem, even
1592 * if CONFIG_HIGHPTE is enabled.
1593 */
1594 __userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1595
b75fe4e5 1596 /* Work out if we support NX */
4763ed4d 1597 x86_configure_nx();
b75fe4e5 1598
577eebea 1599 /* Get mfn list */
696fd7c5 1600 xen_build_dynamic_phys_to_machine();
577eebea
JF
1601
1602 /*
1603 * Set up kernel GDT and segment registers, mainly so that
1604 * -fstack-protector code can be executed.
1605 */
5840c84b 1606 xen_setup_gdt(0);
0d1edf46 1607
ce2eef33 1608 xen_init_irq_ops();
e826fe1b
JF
1609 xen_init_cpuid_mask();
1610
94a8c3c2 1611#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1612 /*
94a8c3c2 1613 * set up the basic apic ops.
ad66dd34 1614 */
feb44f1f 1615 xen_init_apic();
ad66dd34 1616#endif
93b1eab3 1617
e57778a1
JF
1618 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1619 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1620 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1621 }
1622
fefa629a
JF
1623 machine_ops = xen_machine_ops;
1624
38341432
JF
1625 /*
1626 * The only reliable way to retain the initial address of the
1627 * percpu gdt_page is to remember it here, so we can go and
1628 * mark it RW later, when the initial percpu area is freed.
1629 */
1630 xen_initial_gdt = &per_cpu(gdt_page, 0);
795f99b6 1631
a9e7062d 1632 xen_smp_init();
5ead97c8 1633
c1f5db1a
IC
1634#ifdef CONFIG_ACPI_NUMA
1635 /*
1636 * The pages we from Xen are not related to machine pages, so
1637 * any NUMA information the kernel tries to get from ACPI will
1638 * be meaningless. Prevent it from trying.
1639 */
1640 acpi_numa = -1;
c79c4982 1641#endif
60223a32 1642 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1643 possible map and a non-dummy shared_info. */
60223a32 1644 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1645
55d80856 1646 local_irq_disable();
2ce802f6 1647 early_boot_irqs_disabled = true;
55d80856 1648
084a2a4e 1649 xen_raw_console_write("mapping kernel into physical memory\n");
6c2681c8
JG
1650 xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1651 xen_start_info->nr_pages);
1652 xen_reserve_special_pages();
5ead97c8 1653
5ead97c8
JF
1654 /* keep using Xen gdt for now; no urgent need to change it */
1655
e68266b7 1656#ifdef CONFIG_X86_32
93b1eab3 1657 pv_info.kernel_rpl = 1;
5ead97c8 1658 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1659 pv_info.kernel_rpl = 0;
e68266b7
IC
1660#else
1661 pv_info.kernel_rpl = 0;
1662#endif
5ead97c8 1663 /* set the limit of our address space */
fb1d8404 1664 xen_reserve_top();
5ead97c8 1665
d285d683
MR
1666 /* PVH: runs at default kernel iopl of 0 */
1667 if (!xen_pvh_domain()) {
1668 /*
1669 * We used to do this in xen_arch_setup, but that is too late
1670 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1671 * early_amd_init which pokes 0xcf8 port.
1672 */
1673 set_iopl.iopl = 1;
1674 rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1675 if (rc != 0)
1676 xen_raw_printk("physdev_op failed %d\n", rc);
1677 }
ec35a69c 1678
7d087b68 1679#ifdef CONFIG_X86_32
5ead97c8
JF
1680 /* set up basic CPUID stuff */
1681 cpu_detect(&new_cpu_data);
60e019eb 1682 set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
d560bc61 1683 new_cpu_data.wp_works_ok = 1;
16aaa537 1684 new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1);
7d087b68 1685#endif
5ead97c8 1686
d1e9abd6
JG
1687 if (xen_start_info->mod_start) {
1688 if (xen_start_info->flags & SIF_MOD_START_PFN)
1689 initrd_start = PFN_PHYS(xen_start_info->mod_start);
1690 else
1691 initrd_start = __pa(xen_start_info->mod_start);
1692 }
1693
5ead97c8 1694 /* Poke various useful things into boot_params */
30c82645 1695 boot_params.hdr.type_of_loader = (9 << 4) | 0;
d1e9abd6 1696 boot_params.hdr.ramdisk_image = initrd_start;
30c82645 1697 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1698 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
ea179481 1699 boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
5ead97c8 1700
6e833587 1701 if (!xen_initial_domain()) {
83abc70a 1702 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1703 add_preferred_console("tty", 0, NULL);
b8c2d3df 1704 add_preferred_console("hvc", 0, NULL);
b5401a96
AN
1705 if (pci_xen)
1706 x86_init.pci.arch_init = pci_xen_init;
5d990b62 1707 } else {
c2419b4a
JF
1708 const struct dom0_vga_console_info *info =
1709 (void *)((char *)xen_start_info +
1710 xen_start_info->console.dom0.info_off);
ffb8b233
KRW
1711 struct xen_platform_op op = {
1712 .cmd = XENPF_firmware_info,
1713 .interface_version = XENPF_INTERFACE_VERSION,
1714 .u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1715 };
c2419b4a 1716
8d152e7a
LR
1717 x86_platform.set_legacy_features =
1718 xen_dom0_set_legacy_features;
c2419b4a
JF
1719 xen_init_vga(info, xen_start_info->console.dom0.info_size);
1720 xen_start_info->console.domU.mfn = 0;
1721 xen_start_info->console.domU.evtchn = 0;
1722
cfafae94 1723 if (HYPERVISOR_platform_op(&op) == 0)
ffb8b233
KRW
1724 boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1725
5d990b62
CW
1726 /* Make sure ACS will be enabled */
1727 pci_request_acs();
211063dc
KRW
1728
1729 xen_acpi_sleep_register();
bd49940a
KRW
1730
1731 /* Avoid searching for BIOS MP tables */
1732 x86_init.mpparse.find_smp_config = x86_init_noop;
1733 x86_init.mpparse.get_smp_config = x86_init_uint_noop;
96f28bc6
DV
1734
1735 xen_boot_params_init_edd();
9e124fe1 1736 }
76a8df7b
DV
1737#ifdef CONFIG_PCI
1738 /* PCI BIOS service won't work from a PV guest. */
1739 pci_probe &= ~PCI_PROBE_BIOS;
1740#endif
084a2a4e
JF
1741 xen_raw_console_write("about to get started...\n");
1742
88e957d6
VK
1743 /* Let's presume PV guests always boot on vCPU with id 0. */
1744 per_cpu(xen_vcpu_id, 0) = 0;
1745
499d19b8
JF
1746 xen_setup_runstate_info(0);
1747
c7341d6a 1748 xen_efi_init();
be81c8a1 1749
5ead97c8 1750 /* Start the world */
f5d36de0 1751#ifdef CONFIG_X86_32
f0d43100 1752 i386_start_kernel();
f5d36de0 1753#else
5054daa2 1754 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
084a2a4e 1755 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1756#endif
5ead97c8 1757}
bee6ab53 1758
e9daff24 1759void __ref xen_hvm_init_shared_info(void)
bee6ab53 1760{
e9daff24 1761 int cpu;
bee6ab53 1762 struct xen_add_to_physmap xatp;
e9daff24 1763 static struct shared_info *shared_info_page = 0;
bee6ab53 1764
e9daff24
KRW
1765 if (!shared_info_page)
1766 shared_info_page = (struct shared_info *)
1767 extend_brk(PAGE_SIZE, PAGE_SIZE);
bee6ab53
SY
1768 xatp.domid = DOMID_SELF;
1769 xatp.idx = 0;
1770 xatp.space = XENMAPSPACE_shared_info;
e9daff24 1771 xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
bee6ab53
SY
1772 if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1773 BUG();
1774
e9daff24 1775 HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
bee6ab53 1776
016b6f5f
SS
1777 /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1778 * page, we use it in the event channel upcall and in some pvclock
1779 * related functions. We don't need the vcpu_info placement
1780 * optimizations because we don't use any pv_mmu or pv_irq op on
e9daff24
KRW
1781 * HVM.
1782 * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1783 * online but xen_hvm_init_shared_info is run at resume time too and
1784 * in that case multiple vcpus might be online. */
1785 for_each_online_cpu(cpu) {
d5b17dbf 1786 /* Leave it to be NULL. */
e15a8621 1787 if (xen_vcpu_nr(cpu) >= MAX_VIRT_CPUS)
d5b17dbf 1788 continue;
e15a8621
VK
1789 per_cpu(xen_vcpu, cpu) =
1790 &HYPERVISOR_shared_info->vcpu_info[xen_vcpu_nr(cpu)];
016b6f5f 1791 }
bee6ab53
SY
1792}
1793
e9daff24 1794#ifdef CONFIG_XEN_PVHVM
4ff2d062
OH
1795static void __init init_hvm_pv_info(void)
1796{
e9daff24 1797 int major, minor;
5eb65be2 1798 uint32_t eax, ebx, ecx, edx, pages, msr, base;
4ff2d062
OH
1799 u64 pfn;
1800
1801 base = xen_cpuid_base();
e9daff24
KRW
1802 cpuid(base + 1, &eax, &ebx, &ecx, &edx);
1803
1804 major = eax >> 16;
1805 minor = eax & 0xffff;
1806 printk(KERN_INFO "Xen version %d.%d.\n", major, minor);
1807
4ff2d062
OH
1808 cpuid(base + 2, &pages, &msr, &ecx, &edx);
1809
1810 pfn = __pa(hypercall_page);
1811 wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32));
1812
1813 xen_setup_features();
1814
88e957d6
VK
1815 cpuid(base + 4, &eax, &ebx, &ecx, &edx);
1816 if (eax & XEN_HVM_CPUID_VCPU_ID_PRESENT)
1817 this_cpu_write(xen_vcpu_id, ebx);
1818 else
1819 this_cpu_write(xen_vcpu_id, smp_processor_id());
1820
4ff2d062
OH
1821 pv_info.name = "Xen HVM";
1822
1823 xen_domain_type = XEN_HVM_DOMAIN;
1824}
1825
148f9bb8
PG
1826static int xen_hvm_cpu_notify(struct notifier_block *self, unsigned long action,
1827 void *hcpu)
38e20b07
SY
1828{
1829 int cpu = (long)hcpu;
1830 switch (action) {
1831 case CPU_UP_PREPARE:
88e957d6
VK
1832 if (cpu_acpi_id(cpu) != U32_MAX)
1833 per_cpu(xen_vcpu_id, cpu) = cpu_acpi_id(cpu);
1834 else
1835 per_cpu(xen_vcpu_id, cpu) = cpu;
90d4f553 1836 xen_vcpu_setup(cpu);
7918c92a 1837 if (xen_have_vector_callback) {
7918c92a
KRW
1838 if (xen_feature(XENFEAT_hvm_safe_pvclock))
1839 xen_setup_timer(cpu);
1840 }
38e20b07
SY
1841 break;
1842 default:
1843 break;
1844 }
1845 return NOTIFY_OK;
1846}
1847
148f9bb8 1848static struct notifier_block xen_hvm_cpu_notifier = {
38e20b07
SY
1849 .notifier_call = xen_hvm_cpu_notify,
1850};
1851
0b34a166
VK
1852#ifdef CONFIG_KEXEC_CORE
1853static void xen_hvm_shutdown(void)
1854{
1855 native_machine_shutdown();
1856 if (kexec_in_progress)
1857 xen_reboot(SHUTDOWN_soft_reset);
1858}
1859
1860static void xen_hvm_crash_shutdown(struct pt_regs *regs)
1861{
1862 native_machine_crash_shutdown(regs);
1863 xen_reboot(SHUTDOWN_soft_reset);
1864}
1865#endif
1866
bee6ab53
SY
1867static void __init xen_hvm_guest_init(void)
1868{
a71dbdaa
BO
1869 if (xen_pv_domain())
1870 return;
1871
4ff2d062 1872 init_hvm_pv_info();
bee6ab53 1873
016b6f5f 1874 xen_hvm_init_shared_info();
38e20b07 1875
669b0ae9
VC
1876 xen_panic_handler_init();
1877
38e20b07
SY
1878 if (xen_feature(XENFEAT_hvm_callback_vector))
1879 xen_have_vector_callback = 1;
99bbb3a8 1880 xen_hvm_smp_init();
38e20b07 1881 register_cpu_notifier(&xen_hvm_cpu_notifier);
c1c5413a 1882 xen_unplug_emulated_devices();
38e20b07 1883 x86_init.irqs.intr_init = xen_init_IRQ;
409771d2 1884 xen_hvm_init_time_ops();
59151001 1885 xen_hvm_init_mmu_ops();
0b34a166
VK
1886#ifdef CONFIG_KEXEC_CORE
1887 machine_ops.shutdown = xen_hvm_shutdown;
1888 machine_ops.crash_shutdown = xen_hvm_crash_shutdown;
1889#endif
bee6ab53 1890}
a71dbdaa 1891#endif
bee6ab53 1892
8d693b91
KRW
1893static bool xen_nopv = false;
1894static __init int xen_parse_nopv(char *arg)
1895{
1896 xen_nopv = true;
1897 return 0;
1898}
1899early_param("xen_nopv", xen_parse_nopv);
1900
a71dbdaa 1901static uint32_t __init xen_platform(void)
bee6ab53 1902{
8d693b91
KRW
1903 if (xen_nopv)
1904 return 0;
1905
9df56f19 1906 return xen_cpuid_base();
bee6ab53
SY
1907}
1908
d9b8ca84
SY
1909bool xen_hvm_need_lapic(void)
1910{
8d693b91
KRW
1911 if (xen_nopv)
1912 return false;
d9b8ca84
SY
1913 if (xen_pv_domain())
1914 return false;
1915 if (!xen_hvm_domain())
1916 return false;
1917 if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback)
1918 return false;
1919 return true;
1920}
1921EXPORT_SYMBOL_GPL(xen_hvm_need_lapic);
1922
a71dbdaa
BO
1923static void xen_set_cpu_features(struct cpuinfo_x86 *c)
1924{
91e2eea9 1925 if (xen_pv_domain()) {
a71dbdaa 1926 clear_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
91e2eea9
BO
1927 set_cpu_cap(c, X86_FEATURE_XENPV);
1928 }
a71dbdaa
BO
1929}
1930
1931const struct hypervisor_x86 x86_hyper_xen = {
1932 .name = "Xen",
1933 .detect = xen_platform,
1934#ifdef CONFIG_XEN_PVHVM
bee6ab53 1935 .init_platform = xen_hvm_guest_init,
a71dbdaa 1936#endif
4cca6ea0 1937 .x2apic_available = xen_x2apic_para_available,
a71dbdaa 1938 .set_cpu_features = xen_set_cpu_features,
bee6ab53 1939};
a71dbdaa 1940EXPORT_SYMBOL(x86_hyper_xen);
a314e3eb
SS
1941
1942#ifdef CONFIG_HOTPLUG_CPU
1943void xen_arch_register_cpu(int num)
1944{
1945 arch_register_cpu(num);
1946}
1947EXPORT_SYMBOL(xen_arch_register_cpu);
1948
1949void xen_arch_unregister_cpu(int num)
1950{
1951 arch_unregister_cpu(num);
1952}
1953EXPORT_SYMBOL(xen_arch_unregister_cpu);
1954#endif
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