Commit | Line | Data |
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5ead97c8 JF |
1 | /* |
2 | * Core of Xen paravirt_ops implementation. | |
3 | * | |
4 | * This file contains the xen_paravirt_ops structure itself, and the | |
5 | * implementations for: | |
6 | * - privileged instructions | |
7 | * - interrupt flags | |
8 | * - segment operations | |
9 | * - booting and setup | |
10 | * | |
11 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
12 | */ | |
13 | ||
38e20b07 | 14 | #include <linux/cpu.h> |
5ead97c8 JF |
15 | #include <linux/kernel.h> |
16 | #include <linux/init.h> | |
17 | #include <linux/smp.h> | |
18 | #include <linux/preempt.h> | |
f120f13e | 19 | #include <linux/hardirq.h> |
5ead97c8 JF |
20 | #include <linux/percpu.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/start_kernel.h> | |
23 | #include <linux/sched.h> | |
6cac5a92 | 24 | #include <linux/kprobes.h> |
5ead97c8 JF |
25 | #include <linux/bootmem.h> |
26 | #include <linux/module.h> | |
f4f97b3e JF |
27 | #include <linux/mm.h> |
28 | #include <linux/page-flags.h> | |
29 | #include <linux/highmem.h> | |
b8c2d3df | 30 | #include <linux/console.h> |
5d990b62 | 31 | #include <linux/pci.h> |
5a0e3ad6 | 32 | #include <linux/gfp.h> |
236260b9 | 33 | #include <linux/memblock.h> |
5ead97c8 | 34 | |
1ccbf534 | 35 | #include <xen/xen.h> |
5ead97c8 | 36 | #include <xen/interface/xen.h> |
ecbf29cd | 37 | #include <xen/interface/version.h> |
5ead97c8 JF |
38 | #include <xen/interface/physdev.h> |
39 | #include <xen/interface/vcpu.h> | |
bee6ab53 | 40 | #include <xen/interface/memory.h> |
5ead97c8 JF |
41 | #include <xen/features.h> |
42 | #include <xen/page.h> | |
38e20b07 | 43 | #include <xen/hvm.h> |
084a2a4e | 44 | #include <xen/hvc-console.h> |
5ead97c8 JF |
45 | |
46 | #include <asm/paravirt.h> | |
7b6aa335 | 47 | #include <asm/apic.h> |
5ead97c8 | 48 | #include <asm/page.h> |
b5401a96 | 49 | #include <asm/xen/pci.h> |
5ead97c8 JF |
50 | #include <asm/xen/hypercall.h> |
51 | #include <asm/xen/hypervisor.h> | |
52 | #include <asm/fixmap.h> | |
53 | #include <asm/processor.h> | |
707ebbc8 | 54 | #include <asm/proto.h> |
1153968a | 55 | #include <asm/msr-index.h> |
6cac5a92 | 56 | #include <asm/traps.h> |
5ead97c8 JF |
57 | #include <asm/setup.h> |
58 | #include <asm/desc.h> | |
817a824b | 59 | #include <asm/pgalloc.h> |
5ead97c8 | 60 | #include <asm/pgtable.h> |
f87e4cac | 61 | #include <asm/tlbflush.h> |
fefa629a | 62 | #include <asm/reboot.h> |
577eebea | 63 | #include <asm/stackprotector.h> |
bee6ab53 | 64 | #include <asm/hypervisor.h> |
5ead97c8 JF |
65 | |
66 | #include "xen-ops.h" | |
3b827c1b | 67 | #include "mmu.h" |
5ead97c8 JF |
68 | #include "multicalls.h" |
69 | ||
70 | EXPORT_SYMBOL_GPL(hypercall_page); | |
71 | ||
5ead97c8 JF |
72 | DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu); |
73 | DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info); | |
9f79991d | 74 | |
6e833587 JF |
75 | enum xen_domain_type xen_domain_type = XEN_NATIVE; |
76 | EXPORT_SYMBOL_GPL(xen_domain_type); | |
77 | ||
7e77506a IC |
78 | unsigned long *machine_to_phys_mapping = (void *)MACH2PHYS_VIRT_START; |
79 | EXPORT_SYMBOL(machine_to_phys_mapping); | |
ccbcdf7c JB |
80 | unsigned long machine_to_phys_nr; |
81 | EXPORT_SYMBOL(machine_to_phys_nr); | |
7e77506a | 82 | |
5ead97c8 JF |
83 | struct start_info *xen_start_info; |
84 | EXPORT_SYMBOL_GPL(xen_start_info); | |
85 | ||
a0d695c8 | 86 | struct shared_info xen_dummy_shared_info; |
60223a32 | 87 | |
38341432 JF |
88 | void *xen_initial_gdt; |
89 | ||
bee6ab53 | 90 | RESERVE_BRK(shared_info_page_brk, PAGE_SIZE); |
38e20b07 SY |
91 | __read_mostly int xen_have_vector_callback; |
92 | EXPORT_SYMBOL_GPL(xen_have_vector_callback); | |
bee6ab53 | 93 | |
60223a32 JF |
94 | /* |
95 | * Point at some empty memory to start with. We map the real shared_info | |
96 | * page as soon as fixmap is up and running. | |
97 | */ | |
a0d695c8 | 98 | struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info; |
60223a32 JF |
99 | |
100 | /* | |
101 | * Flag to determine whether vcpu info placement is available on all | |
102 | * VCPUs. We assume it is to start with, and then set it to zero on | |
103 | * the first failure. This is because it can succeed on some VCPUs | |
104 | * and not others, since it can involve hypervisor memory allocation, | |
105 | * or because the guest failed to guarantee all the appropriate | |
106 | * constraints on all VCPUs (ie buffer can't cross a page boundary). | |
107 | * | |
108 | * Note that any particular CPU may be using a placed vcpu structure, | |
109 | * but we can only optimise if the all are. | |
110 | * | |
111 | * 0: not available, 1: available | |
112 | */ | |
e4d04071 | 113 | static int have_vcpu_info_placement = 1; |
60223a32 | 114 | |
c06ee78d MR |
115 | static void clamp_max_cpus(void) |
116 | { | |
117 | #ifdef CONFIG_SMP | |
118 | if (setup_max_cpus > MAX_VIRT_CPUS) | |
119 | setup_max_cpus = MAX_VIRT_CPUS; | |
120 | #endif | |
121 | } | |
122 | ||
9c7a7942 | 123 | static void xen_vcpu_setup(int cpu) |
5ead97c8 | 124 | { |
60223a32 JF |
125 | struct vcpu_register_vcpu_info info; |
126 | int err; | |
127 | struct vcpu_info *vcpup; | |
128 | ||
a0d695c8 | 129 | BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info); |
60223a32 | 130 | |
c06ee78d MR |
131 | if (cpu < MAX_VIRT_CPUS) |
132 | per_cpu(xen_vcpu,cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
60223a32 | 133 | |
c06ee78d MR |
134 | if (!have_vcpu_info_placement) { |
135 | if (cpu >= MAX_VIRT_CPUS) | |
136 | clamp_max_cpus(); | |
137 | return; | |
138 | } | |
60223a32 | 139 | |
c06ee78d | 140 | vcpup = &per_cpu(xen_vcpu_info, cpu); |
9976b39b | 141 | info.mfn = arbitrary_virt_to_mfn(vcpup); |
60223a32 JF |
142 | info.offset = offset_in_page(vcpup); |
143 | ||
60223a32 JF |
144 | /* Check to see if the hypervisor will put the vcpu_info |
145 | structure where we want it, which allows direct access via | |
146 | a percpu-variable. */ | |
147 | err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info); | |
148 | ||
149 | if (err) { | |
150 | printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err); | |
151 | have_vcpu_info_placement = 0; | |
c06ee78d | 152 | clamp_max_cpus(); |
60223a32 JF |
153 | } else { |
154 | /* This cpu is using the registered vcpu info, even if | |
155 | later ones fail to. */ | |
156 | per_cpu(xen_vcpu, cpu) = vcpup; | |
60223a32 | 157 | } |
5ead97c8 JF |
158 | } |
159 | ||
9c7a7942 JF |
160 | /* |
161 | * On restore, set the vcpu placement up again. | |
162 | * If it fails, then we're in a bad state, since | |
163 | * we can't back out from using it... | |
164 | */ | |
165 | void xen_vcpu_restore(void) | |
166 | { | |
3905bb2a | 167 | int cpu; |
9c7a7942 | 168 | |
3905bb2a JF |
169 | for_each_online_cpu(cpu) { |
170 | bool other_cpu = (cpu != smp_processor_id()); | |
9c7a7942 | 171 | |
3905bb2a JF |
172 | if (other_cpu && |
173 | HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL)) | |
174 | BUG(); | |
9c7a7942 | 175 | |
3905bb2a | 176 | xen_setup_runstate_info(cpu); |
9c7a7942 | 177 | |
3905bb2a | 178 | if (have_vcpu_info_placement) |
9c7a7942 | 179 | xen_vcpu_setup(cpu); |
9c7a7942 | 180 | |
3905bb2a JF |
181 | if (other_cpu && |
182 | HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL)) | |
183 | BUG(); | |
9c7a7942 JF |
184 | } |
185 | } | |
186 | ||
5ead97c8 JF |
187 | static void __init xen_banner(void) |
188 | { | |
95c7c23b JF |
189 | unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL); |
190 | struct xen_extraversion extra; | |
191 | HYPERVISOR_xen_version(XENVER_extraversion, &extra); | |
192 | ||
5ead97c8 | 193 | printk(KERN_INFO "Booting paravirtualized kernel on %s\n", |
93b1eab3 | 194 | pv_info.name); |
95c7c23b JF |
195 | printk(KERN_INFO "Xen version: %d.%d%s%s\n", |
196 | version >> 16, version & 0xffff, extra.extraversion, | |
e57778a1 | 197 | xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); |
5ead97c8 JF |
198 | } |
199 | ||
e826fe1b JF |
200 | static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; |
201 | static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; | |
202 | ||
65ea5b03 PA |
203 | static void xen_cpuid(unsigned int *ax, unsigned int *bx, |
204 | unsigned int *cx, unsigned int *dx) | |
5ead97c8 | 205 | { |
82d64699 | 206 | unsigned maskebx = ~0; |
e826fe1b | 207 | unsigned maskecx = ~0; |
5ead97c8 JF |
208 | unsigned maskedx = ~0; |
209 | ||
210 | /* | |
211 | * Mask out inconvenient features, to try and disable as many | |
212 | * unsupported kernel subsystems as possible. | |
213 | */ | |
82d64699 JF |
214 | switch (*ax) { |
215 | case 1: | |
e826fe1b JF |
216 | maskecx = cpuid_leaf1_ecx_mask; |
217 | maskedx = cpuid_leaf1_edx_mask; | |
82d64699 JF |
218 | break; |
219 | ||
220 | case 0xb: | |
221 | /* Suppress extended topology stuff */ | |
222 | maskebx = 0; | |
223 | break; | |
e826fe1b | 224 | } |
5ead97c8 JF |
225 | |
226 | asm(XEN_EMULATE_PREFIX "cpuid" | |
65ea5b03 PA |
227 | : "=a" (*ax), |
228 | "=b" (*bx), | |
229 | "=c" (*cx), | |
230 | "=d" (*dx) | |
231 | : "0" (*ax), "2" (*cx)); | |
e826fe1b | 232 | |
82d64699 | 233 | *bx &= maskebx; |
e826fe1b | 234 | *cx &= maskecx; |
65ea5b03 | 235 | *dx &= maskedx; |
5ead97c8 JF |
236 | } |
237 | ||
ad3062a0 | 238 | static void __init xen_init_cpuid_mask(void) |
e826fe1b JF |
239 | { |
240 | unsigned int ax, bx, cx, dx; | |
947ccf9c | 241 | unsigned int xsave_mask; |
e826fe1b JF |
242 | |
243 | cpuid_leaf1_edx_mask = | |
244 | ~((1 << X86_FEATURE_MCE) | /* disable MCE */ | |
245 | (1 << X86_FEATURE_MCA) | /* disable MCA */ | |
ff12849a | 246 | (1 << X86_FEATURE_MTRR) | /* disable MTRR */ |
e826fe1b JF |
247 | (1 << X86_FEATURE_ACC)); /* thermal monitoring */ |
248 | ||
249 | if (!xen_initial_domain()) | |
250 | cpuid_leaf1_edx_mask &= | |
251 | ~((1 << X86_FEATURE_APIC) | /* disable local APIC */ | |
252 | (1 << X86_FEATURE_ACPI)); /* disable ACPI */ | |
947ccf9c | 253 | ax = 1; |
5e287830 | 254 | cx = 0; |
947ccf9c | 255 | xen_cpuid(&ax, &bx, &cx, &dx); |
e826fe1b | 256 | |
947ccf9c SH |
257 | xsave_mask = |
258 | (1 << (X86_FEATURE_XSAVE % 32)) | | |
259 | (1 << (X86_FEATURE_OSXSAVE % 32)); | |
260 | ||
261 | /* Xen will set CR4.OSXSAVE if supported and not disabled by force */ | |
262 | if ((cx & xsave_mask) != xsave_mask) | |
263 | cpuid_leaf1_ecx_mask &= ~xsave_mask; /* disable XSAVE & OSXSAVE */ | |
e826fe1b JF |
264 | } |
265 | ||
5ead97c8 JF |
266 | static void xen_set_debugreg(int reg, unsigned long val) |
267 | { | |
268 | HYPERVISOR_set_debugreg(reg, val); | |
269 | } | |
270 | ||
271 | static unsigned long xen_get_debugreg(int reg) | |
272 | { | |
273 | return HYPERVISOR_get_debugreg(reg); | |
274 | } | |
275 | ||
224101ed | 276 | static void xen_end_context_switch(struct task_struct *next) |
5ead97c8 | 277 | { |
5ead97c8 | 278 | xen_mc_flush(); |
224101ed | 279 | paravirt_end_context_switch(next); |
5ead97c8 JF |
280 | } |
281 | ||
282 | static unsigned long xen_store_tr(void) | |
283 | { | |
284 | return 0; | |
285 | } | |
286 | ||
a05d2eba | 287 | /* |
cef43bf6 JF |
288 | * Set the page permissions for a particular virtual address. If the |
289 | * address is a vmalloc mapping (or other non-linear mapping), then | |
290 | * find the linear mapping of the page and also set its protections to | |
291 | * match. | |
a05d2eba JF |
292 | */ |
293 | static void set_aliased_prot(void *v, pgprot_t prot) | |
294 | { | |
295 | int level; | |
296 | pte_t *ptep; | |
297 | pte_t pte; | |
298 | unsigned long pfn; | |
299 | struct page *page; | |
300 | ||
301 | ptep = lookup_address((unsigned long)v, &level); | |
302 | BUG_ON(ptep == NULL); | |
303 | ||
304 | pfn = pte_pfn(*ptep); | |
305 | page = pfn_to_page(pfn); | |
306 | ||
307 | pte = pfn_pte(pfn, prot); | |
308 | ||
309 | if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0)) | |
310 | BUG(); | |
311 | ||
312 | if (!PageHighMem(page)) { | |
313 | void *av = __va(PFN_PHYS(pfn)); | |
314 | ||
315 | if (av != v) | |
316 | if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0)) | |
317 | BUG(); | |
318 | } else | |
319 | kmap_flush_unused(); | |
320 | } | |
321 | ||
38ffbe66 JF |
322 | static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries) |
323 | { | |
a05d2eba | 324 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
325 | int i; |
326 | ||
a05d2eba JF |
327 | for(i = 0; i < entries; i += entries_per_page) |
328 | set_aliased_prot(ldt + i, PAGE_KERNEL_RO); | |
38ffbe66 JF |
329 | } |
330 | ||
331 | static void xen_free_ldt(struct desc_struct *ldt, unsigned entries) | |
332 | { | |
a05d2eba | 333 | const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE; |
38ffbe66 JF |
334 | int i; |
335 | ||
a05d2eba JF |
336 | for(i = 0; i < entries; i += entries_per_page) |
337 | set_aliased_prot(ldt + i, PAGE_KERNEL); | |
38ffbe66 JF |
338 | } |
339 | ||
5ead97c8 JF |
340 | static void xen_set_ldt(const void *addr, unsigned entries) |
341 | { | |
5ead97c8 JF |
342 | struct mmuext_op *op; |
343 | struct multicall_space mcs = xen_mc_entry(sizeof(*op)); | |
344 | ||
ab78f7ad JF |
345 | trace_xen_cpu_set_ldt(addr, entries); |
346 | ||
5ead97c8 JF |
347 | op = mcs.args; |
348 | op->cmd = MMUEXT_SET_LDT; | |
4dbf7af6 | 349 | op->arg1.linear_addr = (unsigned long)addr; |
5ead97c8 JF |
350 | op->arg2.nr_ents = entries; |
351 | ||
352 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
353 | ||
354 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
355 | } | |
356 | ||
6b68f01b | 357 | static void xen_load_gdt(const struct desc_ptr *dtr) |
5ead97c8 | 358 | { |
5ead97c8 JF |
359 | unsigned long va = dtr->address; |
360 | unsigned int size = dtr->size + 1; | |
361 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
3ce5fa7e | 362 | unsigned long frames[pages]; |
5ead97c8 | 363 | int f; |
5ead97c8 | 364 | |
577eebea JF |
365 | /* |
366 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
367 | * 8-byte entries, or 16 4k pages.. | |
368 | */ | |
5ead97c8 JF |
369 | |
370 | BUG_ON(size > 65536); | |
371 | BUG_ON(va & ~PAGE_MASK); | |
372 | ||
5ead97c8 | 373 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { |
6ed6bf42 | 374 | int level; |
577eebea | 375 | pte_t *ptep; |
6ed6bf42 JF |
376 | unsigned long pfn, mfn; |
377 | void *virt; | |
378 | ||
577eebea JF |
379 | /* |
380 | * The GDT is per-cpu and is in the percpu data area. | |
381 | * That can be virtually mapped, so we need to do a | |
382 | * page-walk to get the underlying MFN for the | |
383 | * hypercall. The page can also be in the kernel's | |
384 | * linear range, so we need to RO that mapping too. | |
385 | */ | |
386 | ptep = lookup_address(va, &level); | |
6ed6bf42 JF |
387 | BUG_ON(ptep == NULL); |
388 | ||
389 | pfn = pte_pfn(*ptep); | |
390 | mfn = pfn_to_mfn(pfn); | |
391 | virt = __va(PFN_PHYS(pfn)); | |
392 | ||
393 | frames[f] = mfn; | |
9976b39b | 394 | |
5ead97c8 | 395 | make_lowmem_page_readonly((void *)va); |
6ed6bf42 | 396 | make_lowmem_page_readonly(virt); |
5ead97c8 JF |
397 | } |
398 | ||
3ce5fa7e JF |
399 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) |
400 | BUG(); | |
5ead97c8 JF |
401 | } |
402 | ||
577eebea JF |
403 | /* |
404 | * load_gdt for early boot, when the gdt is only mapped once | |
405 | */ | |
ad3062a0 | 406 | static void __init xen_load_gdt_boot(const struct desc_ptr *dtr) |
577eebea JF |
407 | { |
408 | unsigned long va = dtr->address; | |
409 | unsigned int size = dtr->size + 1; | |
410 | unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE; | |
411 | unsigned long frames[pages]; | |
412 | int f; | |
413 | ||
414 | /* | |
415 | * A GDT can be up to 64k in size, which corresponds to 8192 | |
416 | * 8-byte entries, or 16 4k pages.. | |
417 | */ | |
418 | ||
419 | BUG_ON(size > 65536); | |
420 | BUG_ON(va & ~PAGE_MASK); | |
421 | ||
422 | for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) { | |
423 | pte_t pte; | |
424 | unsigned long pfn, mfn; | |
425 | ||
426 | pfn = virt_to_pfn(va); | |
427 | mfn = pfn_to_mfn(pfn); | |
428 | ||
429 | pte = pfn_pte(pfn, PAGE_KERNEL_RO); | |
430 | ||
431 | if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0)) | |
432 | BUG(); | |
433 | ||
434 | frames[f] = mfn; | |
435 | } | |
436 | ||
437 | if (HYPERVISOR_set_gdt(frames, size / sizeof(struct desc_struct))) | |
438 | BUG(); | |
439 | } | |
440 | ||
5ead97c8 JF |
441 | static void load_TLS_descriptor(struct thread_struct *t, |
442 | unsigned int cpu, unsigned int i) | |
443 | { | |
444 | struct desc_struct *gdt = get_cpu_gdt_table(cpu); | |
9976b39b | 445 | xmaddr_t maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]); |
5ead97c8 JF |
446 | struct multicall_space mc = __xen_mc_entry(0); |
447 | ||
448 | MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]); | |
449 | } | |
450 | ||
451 | static void xen_load_tls(struct thread_struct *t, unsigned int cpu) | |
452 | { | |
8b84ad94 | 453 | /* |
ccbeed3a TH |
454 | * XXX sleazy hack: If we're being called in a lazy-cpu zone |
455 | * and lazy gs handling is enabled, it means we're in a | |
456 | * context switch, and %gs has just been saved. This means we | |
457 | * can zero it out to prevent faults on exit from the | |
458 | * hypervisor if the next process has no %gs. Either way, it | |
459 | * has been saved, and the new value will get loaded properly. | |
460 | * This will go away as soon as Xen has been modified to not | |
461 | * save/restore %gs for normal hypercalls. | |
8a95408e EH |
462 | * |
463 | * On x86_64, this hack is not used for %gs, because gs points | |
464 | * to KERNEL_GS_BASE (and uses it for PDA references), so we | |
465 | * must not zero %gs on x86_64 | |
466 | * | |
467 | * For x86_64, we need to zero %fs, otherwise we may get an | |
468 | * exception between the new %fs descriptor being loaded and | |
469 | * %fs being effectively cleared at __switch_to(). | |
8b84ad94 | 470 | */ |
8a95408e EH |
471 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) { |
472 | #ifdef CONFIG_X86_32 | |
ccbeed3a | 473 | lazy_load_gs(0); |
8a95408e EH |
474 | #else |
475 | loadsegment(fs, 0); | |
476 | #endif | |
477 | } | |
478 | ||
479 | xen_mc_batch(); | |
480 | ||
481 | load_TLS_descriptor(t, cpu, 0); | |
482 | load_TLS_descriptor(t, cpu, 1); | |
483 | load_TLS_descriptor(t, cpu, 2); | |
484 | ||
485 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
5ead97c8 JF |
486 | } |
487 | ||
a8fc1089 EH |
488 | #ifdef CONFIG_X86_64 |
489 | static void xen_load_gs_index(unsigned int idx) | |
490 | { | |
491 | if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx)) | |
492 | BUG(); | |
5ead97c8 | 493 | } |
a8fc1089 | 494 | #endif |
5ead97c8 JF |
495 | |
496 | static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, | |
75b8bb3e | 497 | const void *ptr) |
5ead97c8 | 498 | { |
cef43bf6 | 499 | xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]); |
75b8bb3e | 500 | u64 entry = *(u64 *)ptr; |
5ead97c8 | 501 | |
ab78f7ad JF |
502 | trace_xen_cpu_write_ldt_entry(dt, entrynum, entry); |
503 | ||
f120f13e JF |
504 | preempt_disable(); |
505 | ||
5ead97c8 JF |
506 | xen_mc_flush(); |
507 | if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry)) | |
508 | BUG(); | |
f120f13e JF |
509 | |
510 | preempt_enable(); | |
5ead97c8 JF |
511 | } |
512 | ||
e176d367 | 513 | static int cvt_gate_to_trap(int vector, const gate_desc *val, |
5ead97c8 JF |
514 | struct trap_info *info) |
515 | { | |
6cac5a92 JF |
516 | unsigned long addr; |
517 | ||
6d02c426 | 518 | if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT) |
5ead97c8 JF |
519 | return 0; |
520 | ||
521 | info->vector = vector; | |
6cac5a92 JF |
522 | |
523 | addr = gate_offset(*val); | |
524 | #ifdef CONFIG_X86_64 | |
b80119bb JF |
525 | /* |
526 | * Look for known traps using IST, and substitute them | |
527 | * appropriately. The debugger ones are the only ones we care | |
528 | * about. Xen will handle faults like double_fault and | |
529 | * machine_check, so we should never see them. Warn if | |
530 | * there's an unexpected IST-using fault handler. | |
531 | */ | |
6cac5a92 JF |
532 | if (addr == (unsigned long)debug) |
533 | addr = (unsigned long)xen_debug; | |
534 | else if (addr == (unsigned long)int3) | |
535 | addr = (unsigned long)xen_int3; | |
536 | else if (addr == (unsigned long)stack_segment) | |
537 | addr = (unsigned long)xen_stack_segment; | |
b80119bb JF |
538 | else if (addr == (unsigned long)double_fault || |
539 | addr == (unsigned long)nmi) { | |
540 | /* Don't need to handle these */ | |
541 | return 0; | |
542 | #ifdef CONFIG_X86_MCE | |
543 | } else if (addr == (unsigned long)machine_check) { | |
544 | return 0; | |
545 | #endif | |
546 | } else { | |
547 | /* Some other trap using IST? */ | |
548 | if (WARN_ON(val->ist != 0)) | |
549 | return 0; | |
550 | } | |
6cac5a92 JF |
551 | #endif /* CONFIG_X86_64 */ |
552 | info->address = addr; | |
553 | ||
e176d367 EH |
554 | info->cs = gate_segment(*val); |
555 | info->flags = val->dpl; | |
5ead97c8 | 556 | /* interrupt gates clear IF */ |
6d02c426 JF |
557 | if (val->type == GATE_INTERRUPT) |
558 | info->flags |= 1 << 2; | |
5ead97c8 JF |
559 | |
560 | return 1; | |
561 | } | |
562 | ||
563 | /* Locations of each CPU's IDT */ | |
6b68f01b | 564 | static DEFINE_PER_CPU(struct desc_ptr, idt_desc); |
5ead97c8 JF |
565 | |
566 | /* Set an IDT entry. If the entry is part of the current IDT, then | |
567 | also update Xen. */ | |
8d947344 | 568 | static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g) |
5ead97c8 | 569 | { |
5ead97c8 | 570 | unsigned long p = (unsigned long)&dt[entrynum]; |
f120f13e JF |
571 | unsigned long start, end; |
572 | ||
ab78f7ad JF |
573 | trace_xen_cpu_write_idt_entry(dt, entrynum, g); |
574 | ||
f120f13e JF |
575 | preempt_disable(); |
576 | ||
780f36d8 CL |
577 | start = __this_cpu_read(idt_desc.address); |
578 | end = start + __this_cpu_read(idt_desc.size) + 1; | |
5ead97c8 JF |
579 | |
580 | xen_mc_flush(); | |
581 | ||
8d947344 | 582 | native_write_idt_entry(dt, entrynum, g); |
5ead97c8 JF |
583 | |
584 | if (p >= start && (p + 8) <= end) { | |
585 | struct trap_info info[2]; | |
586 | ||
587 | info[1].address = 0; | |
588 | ||
e176d367 | 589 | if (cvt_gate_to_trap(entrynum, g, &info[0])) |
5ead97c8 JF |
590 | if (HYPERVISOR_set_trap_table(info)) |
591 | BUG(); | |
592 | } | |
f120f13e JF |
593 | |
594 | preempt_enable(); | |
5ead97c8 JF |
595 | } |
596 | ||
6b68f01b | 597 | static void xen_convert_trap_info(const struct desc_ptr *desc, |
f87e4cac | 598 | struct trap_info *traps) |
5ead97c8 | 599 | { |
5ead97c8 JF |
600 | unsigned in, out, count; |
601 | ||
e176d367 | 602 | count = (desc->size+1) / sizeof(gate_desc); |
5ead97c8 JF |
603 | BUG_ON(count > 256); |
604 | ||
5ead97c8 | 605 | for (in = out = 0; in < count; in++) { |
e176d367 | 606 | gate_desc *entry = (gate_desc*)(desc->address) + in; |
5ead97c8 | 607 | |
e176d367 | 608 | if (cvt_gate_to_trap(in, entry, &traps[out])) |
5ead97c8 JF |
609 | out++; |
610 | } | |
611 | traps[out].address = 0; | |
f87e4cac JF |
612 | } |
613 | ||
614 | void xen_copy_trap_info(struct trap_info *traps) | |
615 | { | |
6b68f01b | 616 | const struct desc_ptr *desc = &__get_cpu_var(idt_desc); |
f87e4cac JF |
617 | |
618 | xen_convert_trap_info(desc, traps); | |
f87e4cac JF |
619 | } |
620 | ||
621 | /* Load a new IDT into Xen. In principle this can be per-CPU, so we | |
622 | hold a spinlock to protect the static traps[] array (static because | |
623 | it avoids allocation, and saves stack space). */ | |
6b68f01b | 624 | static void xen_load_idt(const struct desc_ptr *desc) |
f87e4cac JF |
625 | { |
626 | static DEFINE_SPINLOCK(lock); | |
627 | static struct trap_info traps[257]; | |
f87e4cac | 628 | |
ab78f7ad JF |
629 | trace_xen_cpu_load_idt(desc); |
630 | ||
f87e4cac JF |
631 | spin_lock(&lock); |
632 | ||
f120f13e JF |
633 | __get_cpu_var(idt_desc) = *desc; |
634 | ||
f87e4cac | 635 | xen_convert_trap_info(desc, traps); |
5ead97c8 JF |
636 | |
637 | xen_mc_flush(); | |
638 | if (HYPERVISOR_set_trap_table(traps)) | |
639 | BUG(); | |
640 | ||
641 | spin_unlock(&lock); | |
642 | } | |
643 | ||
644 | /* Write a GDT descriptor entry. Ignore LDT descriptors, since | |
645 | they're handled differently. */ | |
646 | static void xen_write_gdt_entry(struct desc_struct *dt, int entry, | |
014b15be | 647 | const void *desc, int type) |
5ead97c8 | 648 | { |
ab78f7ad JF |
649 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
650 | ||
f120f13e JF |
651 | preempt_disable(); |
652 | ||
014b15be GOC |
653 | switch (type) { |
654 | case DESC_LDT: | |
655 | case DESC_TSS: | |
5ead97c8 JF |
656 | /* ignore */ |
657 | break; | |
658 | ||
659 | default: { | |
9976b39b | 660 | xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]); |
5ead97c8 JF |
661 | |
662 | xen_mc_flush(); | |
014b15be | 663 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) |
5ead97c8 JF |
664 | BUG(); |
665 | } | |
666 | ||
667 | } | |
f120f13e JF |
668 | |
669 | preempt_enable(); | |
5ead97c8 JF |
670 | } |
671 | ||
577eebea JF |
672 | /* |
673 | * Version of write_gdt_entry for use at early boot-time needed to | |
674 | * update an entry as simply as possible. | |
675 | */ | |
ad3062a0 | 676 | static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry, |
577eebea JF |
677 | const void *desc, int type) |
678 | { | |
ab78f7ad JF |
679 | trace_xen_cpu_write_gdt_entry(dt, entry, desc, type); |
680 | ||
577eebea JF |
681 | switch (type) { |
682 | case DESC_LDT: | |
683 | case DESC_TSS: | |
684 | /* ignore */ | |
685 | break; | |
686 | ||
687 | default: { | |
688 | xmaddr_t maddr = virt_to_machine(&dt[entry]); | |
689 | ||
690 | if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc)) | |
691 | dt[entry] = *(struct desc_struct *)desc; | |
692 | } | |
693 | ||
694 | } | |
695 | } | |
696 | ||
faca6227 | 697 | static void xen_load_sp0(struct tss_struct *tss, |
a05d2eba | 698 | struct thread_struct *thread) |
5ead97c8 | 699 | { |
ab78f7ad JF |
700 | struct multicall_space mcs; |
701 | ||
702 | mcs = xen_mc_entry(0); | |
faca6227 | 703 | MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0); |
5ead97c8 JF |
704 | xen_mc_issue(PARAVIRT_LAZY_CPU); |
705 | } | |
706 | ||
707 | static void xen_set_iopl_mask(unsigned mask) | |
708 | { | |
709 | struct physdev_set_iopl set_iopl; | |
710 | ||
711 | /* Force the change at ring 0. */ | |
712 | set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3; | |
713 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
714 | } | |
715 | ||
716 | static void xen_io_delay(void) | |
717 | { | |
718 | } | |
719 | ||
720 | #ifdef CONFIG_X86_LOCAL_APIC | |
ad66dd34 | 721 | static u32 xen_apic_read(u32 reg) |
5ead97c8 JF |
722 | { |
723 | return 0; | |
724 | } | |
f87e4cac | 725 | |
ad66dd34 | 726 | static void xen_apic_write(u32 reg, u32 val) |
f87e4cac JF |
727 | { |
728 | /* Warn to see if there's any stray references */ | |
729 | WARN_ON(1); | |
730 | } | |
ad66dd34 | 731 | |
ad66dd34 SS |
732 | static u64 xen_apic_icr_read(void) |
733 | { | |
734 | return 0; | |
735 | } | |
736 | ||
737 | static void xen_apic_icr_write(u32 low, u32 id) | |
738 | { | |
739 | /* Warn to see if there's any stray references */ | |
740 | WARN_ON(1); | |
741 | } | |
742 | ||
743 | static void xen_apic_wait_icr_idle(void) | |
744 | { | |
745 | return; | |
746 | } | |
747 | ||
94a8c3c2 YL |
748 | static u32 xen_safe_apic_wait_icr_idle(void) |
749 | { | |
750 | return 0; | |
751 | } | |
752 | ||
c1eeb2de YL |
753 | static void set_xen_basic_apic_ops(void) |
754 | { | |
755 | apic->read = xen_apic_read; | |
756 | apic->write = xen_apic_write; | |
757 | apic->icr_read = xen_apic_icr_read; | |
758 | apic->icr_write = xen_apic_icr_write; | |
759 | apic->wait_icr_idle = xen_apic_wait_icr_idle; | |
760 | apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle; | |
761 | } | |
ad66dd34 | 762 | |
5ead97c8 JF |
763 | #endif |
764 | ||
7b1333aa JF |
765 | static void xen_clts(void) |
766 | { | |
767 | struct multicall_space mcs; | |
768 | ||
769 | mcs = xen_mc_entry(0); | |
770 | ||
771 | MULTI_fpu_taskswitch(mcs.mc, 0); | |
772 | ||
773 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
774 | } | |
775 | ||
a789ed5f JF |
776 | static DEFINE_PER_CPU(unsigned long, xen_cr0_value); |
777 | ||
778 | static unsigned long xen_read_cr0(void) | |
779 | { | |
780 | unsigned long cr0 = percpu_read(xen_cr0_value); | |
781 | ||
782 | if (unlikely(cr0 == 0)) { | |
783 | cr0 = native_read_cr0(); | |
784 | percpu_write(xen_cr0_value, cr0); | |
785 | } | |
786 | ||
787 | return cr0; | |
788 | } | |
789 | ||
7b1333aa JF |
790 | static void xen_write_cr0(unsigned long cr0) |
791 | { | |
792 | struct multicall_space mcs; | |
793 | ||
a789ed5f JF |
794 | percpu_write(xen_cr0_value, cr0); |
795 | ||
7b1333aa JF |
796 | /* Only pay attention to cr0.TS; everything else is |
797 | ignored. */ | |
798 | mcs = xen_mc_entry(0); | |
799 | ||
800 | MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); | |
801 | ||
802 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
803 | } | |
804 | ||
5ead97c8 JF |
805 | static void xen_write_cr4(unsigned long cr4) |
806 | { | |
2956a351 JF |
807 | cr4 &= ~X86_CR4_PGE; |
808 | cr4 &= ~X86_CR4_PSE; | |
809 | ||
810 | native_write_cr4(cr4); | |
5ead97c8 JF |
811 | } |
812 | ||
1153968a JF |
813 | static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) |
814 | { | |
815 | int ret; | |
816 | ||
817 | ret = 0; | |
818 | ||
f63c2f24 | 819 | switch (msr) { |
1153968a JF |
820 | #ifdef CONFIG_X86_64 |
821 | unsigned which; | |
822 | u64 base; | |
823 | ||
824 | case MSR_FS_BASE: which = SEGBASE_FS; goto set; | |
825 | case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set; | |
826 | case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set; | |
827 | ||
828 | set: | |
829 | base = ((u64)high << 32) | low; | |
830 | if (HYPERVISOR_set_segment_base(which, base) != 0) | |
0cc0213e | 831 | ret = -EIO; |
1153968a JF |
832 | break; |
833 | #endif | |
d89961e2 JF |
834 | |
835 | case MSR_STAR: | |
836 | case MSR_CSTAR: | |
837 | case MSR_LSTAR: | |
838 | case MSR_SYSCALL_MASK: | |
839 | case MSR_IA32_SYSENTER_CS: | |
840 | case MSR_IA32_SYSENTER_ESP: | |
841 | case MSR_IA32_SYSENTER_EIP: | |
842 | /* Fast syscall setup is all done in hypercalls, so | |
843 | these are all ignored. Stub them out here to stop | |
844 | Xen console noise. */ | |
845 | break; | |
846 | ||
41f2e477 JF |
847 | case MSR_IA32_CR_PAT: |
848 | if (smp_processor_id() == 0) | |
849 | xen_set_pat(((u64)high << 32) | low); | |
850 | break; | |
851 | ||
1153968a JF |
852 | default: |
853 | ret = native_write_msr_safe(msr, low, high); | |
854 | } | |
855 | ||
856 | return ret; | |
857 | } | |
858 | ||
0e91398f | 859 | void xen_setup_shared_info(void) |
5ead97c8 JF |
860 | { |
861 | if (!xen_feature(XENFEAT_auto_translated_physmap)) { | |
15664f96 JF |
862 | set_fixmap(FIX_PARAVIRT_BOOTMAP, |
863 | xen_start_info->shared_info); | |
864 | ||
865 | HYPERVISOR_shared_info = | |
866 | (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP); | |
5ead97c8 JF |
867 | } else |
868 | HYPERVISOR_shared_info = | |
869 | (struct shared_info *)__va(xen_start_info->shared_info); | |
870 | ||
2e8fe719 JF |
871 | #ifndef CONFIG_SMP |
872 | /* In UP this is as good a place as any to set up shared info */ | |
873 | xen_setup_vcpu_info_placement(); | |
874 | #endif | |
d5edbc1f JF |
875 | |
876 | xen_setup_mfn_list_list(); | |
2e8fe719 JF |
877 | } |
878 | ||
60223a32 | 879 | /* This is called once we have the cpu_possible_map */ |
0e91398f | 880 | void xen_setup_vcpu_info_placement(void) |
60223a32 JF |
881 | { |
882 | int cpu; | |
883 | ||
884 | for_each_possible_cpu(cpu) | |
885 | xen_vcpu_setup(cpu); | |
886 | ||
887 | /* xen_vcpu_setup managed to place the vcpu_info within the | |
888 | percpu area for all cpus, so make use of it */ | |
889 | if (have_vcpu_info_placement) { | |
ecb93d1c JF |
890 | pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct); |
891 | pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct); | |
892 | pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct); | |
893 | pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct); | |
93b1eab3 | 894 | pv_mmu_ops.read_cr2 = xen_read_cr2_direct; |
60223a32 | 895 | } |
5ead97c8 JF |
896 | } |
897 | ||
ab144f5e AK |
898 | static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf, |
899 | unsigned long addr, unsigned len) | |
6487673b JF |
900 | { |
901 | char *start, *end, *reloc; | |
902 | unsigned ret; | |
903 | ||
904 | start = end = reloc = NULL; | |
905 | ||
93b1eab3 JF |
906 | #define SITE(op, x) \ |
907 | case PARAVIRT_PATCH(op.x): \ | |
6487673b JF |
908 | if (have_vcpu_info_placement) { \ |
909 | start = (char *)xen_##x##_direct; \ | |
910 | end = xen_##x##_direct_end; \ | |
911 | reloc = xen_##x##_direct_reloc; \ | |
912 | } \ | |
913 | goto patch_site | |
914 | ||
915 | switch (type) { | |
93b1eab3 JF |
916 | SITE(pv_irq_ops, irq_enable); |
917 | SITE(pv_irq_ops, irq_disable); | |
918 | SITE(pv_irq_ops, save_fl); | |
919 | SITE(pv_irq_ops, restore_fl); | |
6487673b JF |
920 | #undef SITE |
921 | ||
922 | patch_site: | |
923 | if (start == NULL || (end-start) > len) | |
924 | goto default_patch; | |
925 | ||
ab144f5e | 926 | ret = paravirt_patch_insns(insnbuf, len, start, end); |
6487673b JF |
927 | |
928 | /* Note: because reloc is assigned from something that | |
929 | appears to be an array, gcc assumes it's non-null, | |
930 | but doesn't know its relationship with start and | |
931 | end. */ | |
932 | if (reloc > start && reloc < end) { | |
933 | int reloc_off = reloc - start; | |
ab144f5e AK |
934 | long *relocp = (long *)(insnbuf + reloc_off); |
935 | long delta = start - (char *)addr; | |
6487673b JF |
936 | |
937 | *relocp += delta; | |
938 | } | |
939 | break; | |
940 | ||
941 | default_patch: | |
942 | default: | |
ab144f5e AK |
943 | ret = paravirt_patch_default(type, clobbers, insnbuf, |
944 | addr, len); | |
6487673b JF |
945 | break; |
946 | } | |
947 | ||
948 | return ret; | |
949 | } | |
950 | ||
ad3062a0 | 951 | static const struct pv_info xen_info __initconst = { |
5ead97c8 JF |
952 | .paravirt_enabled = 1, |
953 | .shared_kernel_pmd = 0, | |
954 | ||
318f5a2a AL |
955 | #ifdef CONFIG_X86_64 |
956 | .extra_user_64bit_cs = FLAT_USER_CS64, | |
957 | #endif | |
958 | ||
5ead97c8 | 959 | .name = "Xen", |
93b1eab3 | 960 | }; |
5ead97c8 | 961 | |
ad3062a0 | 962 | static const struct pv_init_ops xen_init_ops __initconst = { |
6487673b | 963 | .patch = xen_patch, |
93b1eab3 | 964 | }; |
5ead97c8 | 965 | |
ad3062a0 | 966 | static const struct pv_cpu_ops xen_cpu_ops __initconst = { |
5ead97c8 JF |
967 | .cpuid = xen_cpuid, |
968 | ||
969 | .set_debugreg = xen_set_debugreg, | |
970 | .get_debugreg = xen_get_debugreg, | |
971 | ||
7b1333aa | 972 | .clts = xen_clts, |
5ead97c8 | 973 | |
a789ed5f | 974 | .read_cr0 = xen_read_cr0, |
7b1333aa | 975 | .write_cr0 = xen_write_cr0, |
5ead97c8 | 976 | |
5ead97c8 JF |
977 | .read_cr4 = native_read_cr4, |
978 | .read_cr4_safe = native_read_cr4_safe, | |
979 | .write_cr4 = xen_write_cr4, | |
980 | ||
5ead97c8 JF |
981 | .wbinvd = native_wbinvd, |
982 | ||
983 | .read_msr = native_read_msr_safe, | |
1153968a | 984 | .write_msr = xen_write_msr_safe, |
5ead97c8 JF |
985 | .read_tsc = native_read_tsc, |
986 | .read_pmc = native_read_pmc, | |
987 | ||
81e103f1 | 988 | .iret = xen_iret, |
d75cd22f | 989 | .irq_enable_sysexit = xen_sysexit, |
6fcac6d3 JF |
990 | #ifdef CONFIG_X86_64 |
991 | .usergs_sysret32 = xen_sysret32, | |
992 | .usergs_sysret64 = xen_sysret64, | |
993 | #endif | |
5ead97c8 JF |
994 | |
995 | .load_tr_desc = paravirt_nop, | |
996 | .set_ldt = xen_set_ldt, | |
997 | .load_gdt = xen_load_gdt, | |
998 | .load_idt = xen_load_idt, | |
999 | .load_tls = xen_load_tls, | |
a8fc1089 EH |
1000 | #ifdef CONFIG_X86_64 |
1001 | .load_gs_index = xen_load_gs_index, | |
1002 | #endif | |
5ead97c8 | 1003 | |
38ffbe66 JF |
1004 | .alloc_ldt = xen_alloc_ldt, |
1005 | .free_ldt = xen_free_ldt, | |
1006 | ||
5ead97c8 JF |
1007 | .store_gdt = native_store_gdt, |
1008 | .store_idt = native_store_idt, | |
1009 | .store_tr = xen_store_tr, | |
1010 | ||
1011 | .write_ldt_entry = xen_write_ldt_entry, | |
1012 | .write_gdt_entry = xen_write_gdt_entry, | |
1013 | .write_idt_entry = xen_write_idt_entry, | |
faca6227 | 1014 | .load_sp0 = xen_load_sp0, |
5ead97c8 JF |
1015 | |
1016 | .set_iopl_mask = xen_set_iopl_mask, | |
1017 | .io_delay = xen_io_delay, | |
1018 | ||
952d1d70 JF |
1019 | /* Xen takes care of %gs when switching to usermode for us */ |
1020 | .swapgs = paravirt_nop, | |
1021 | ||
224101ed JF |
1022 | .start_context_switch = paravirt_start_context_switch, |
1023 | .end_context_switch = xen_end_context_switch, | |
93b1eab3 JF |
1024 | }; |
1025 | ||
ad3062a0 | 1026 | static const struct pv_apic_ops xen_apic_ops __initconst = { |
5ead97c8 | 1027 | #ifdef CONFIG_X86_LOCAL_APIC |
5ead97c8 JF |
1028 | .startup_ipi_hook = paravirt_nop, |
1029 | #endif | |
93b1eab3 JF |
1030 | }; |
1031 | ||
fefa629a JF |
1032 | static void xen_reboot(int reason) |
1033 | { | |
349c709f JF |
1034 | struct sched_shutdown r = { .reason = reason }; |
1035 | ||
349c709f | 1036 | if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r)) |
fefa629a JF |
1037 | BUG(); |
1038 | } | |
1039 | ||
1040 | static void xen_restart(char *msg) | |
1041 | { | |
1042 | xen_reboot(SHUTDOWN_reboot); | |
1043 | } | |
1044 | ||
1045 | static void xen_emergency_restart(void) | |
1046 | { | |
1047 | xen_reboot(SHUTDOWN_reboot); | |
1048 | } | |
1049 | ||
1050 | static void xen_machine_halt(void) | |
1051 | { | |
1052 | xen_reboot(SHUTDOWN_poweroff); | |
1053 | } | |
1054 | ||
b2abe506 TG |
1055 | static void xen_machine_power_off(void) |
1056 | { | |
1057 | if (pm_power_off) | |
1058 | pm_power_off(); | |
1059 | xen_reboot(SHUTDOWN_poweroff); | |
1060 | } | |
1061 | ||
fefa629a JF |
1062 | static void xen_crash_shutdown(struct pt_regs *regs) |
1063 | { | |
1064 | xen_reboot(SHUTDOWN_crash); | |
1065 | } | |
1066 | ||
f09f6d19 DD |
1067 | static int |
1068 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | |
1069 | { | |
086748e5 | 1070 | xen_reboot(SHUTDOWN_crash); |
f09f6d19 DD |
1071 | return NOTIFY_DONE; |
1072 | } | |
1073 | ||
1074 | static struct notifier_block xen_panic_block = { | |
1075 | .notifier_call= xen_panic_event, | |
1076 | }; | |
1077 | ||
1078 | int xen_panic_handler_init(void) | |
1079 | { | |
1080 | atomic_notifier_chain_register(&panic_notifier_list, &xen_panic_block); | |
1081 | return 0; | |
1082 | } | |
1083 | ||
ad3062a0 | 1084 | static const struct machine_ops xen_machine_ops __initconst = { |
fefa629a JF |
1085 | .restart = xen_restart, |
1086 | .halt = xen_machine_halt, | |
b2abe506 | 1087 | .power_off = xen_machine_power_off, |
fefa629a JF |
1088 | .shutdown = xen_machine_halt, |
1089 | .crash_shutdown = xen_crash_shutdown, | |
1090 | .emergency_restart = xen_emergency_restart, | |
1091 | }; | |
1092 | ||
577eebea JF |
1093 | /* |
1094 | * Set up the GDT and segment registers for -fstack-protector. Until | |
1095 | * we do this, we have to be careful not to call any stack-protected | |
1096 | * function, which is most of the kernel. | |
1097 | */ | |
1098 | static void __init xen_setup_stackprotector(void) | |
1099 | { | |
1100 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot; | |
1101 | pv_cpu_ops.load_gdt = xen_load_gdt_boot; | |
1102 | ||
1103 | setup_stack_canary_segment(0); | |
1104 | switch_to_new_gdt(0); | |
1105 | ||
1106 | pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry; | |
1107 | pv_cpu_ops.load_gdt = xen_load_gdt; | |
1108 | } | |
1109 | ||
5ead97c8 JF |
1110 | /* First C function to be called on Xen boot */ |
1111 | asmlinkage void __init xen_start_kernel(void) | |
1112 | { | |
ec35a69c KRW |
1113 | struct physdev_set_iopl set_iopl; |
1114 | int rc; | |
5ead97c8 JF |
1115 | pgd_t *pgd; |
1116 | ||
1117 | if (!xen_start_info) | |
1118 | return; | |
1119 | ||
6e833587 JF |
1120 | xen_domain_type = XEN_PV_DOMAIN; |
1121 | ||
7e77506a IC |
1122 | xen_setup_machphys_mapping(); |
1123 | ||
5ead97c8 | 1124 | /* Install Xen paravirt ops */ |
93b1eab3 JF |
1125 | pv_info = xen_info; |
1126 | pv_init_ops = xen_init_ops; | |
93b1eab3 | 1127 | pv_cpu_ops = xen_cpu_ops; |
93b1eab3 | 1128 | pv_apic_ops = xen_apic_ops; |
93b1eab3 | 1129 | |
6b18ae3e | 1130 | x86_init.resources.memory_setup = xen_memory_setup; |
42bbdb43 | 1131 | x86_init.oem.arch_setup = xen_arch_setup; |
6f30c1ac | 1132 | x86_init.oem.banner = xen_banner; |
845b3944 | 1133 | |
409771d2 | 1134 | xen_init_time_ops(); |
93b1eab3 | 1135 | |
ce2eef33 | 1136 | /* |
577eebea | 1137 | * Set up some pagetable state before starting to set any ptes. |
ce2eef33 | 1138 | */ |
577eebea | 1139 | |
973df35e JF |
1140 | xen_init_mmu_ops(); |
1141 | ||
577eebea JF |
1142 | /* Prevent unwanted bits from being set in PTEs. */ |
1143 | __supported_pte_mask &= ~_PAGE_GLOBAL; | |
1144 | if (!xen_initial_domain()) | |
1145 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1146 | ||
1147 | __supported_pte_mask |= _PAGE_IOMAP; | |
1148 | ||
817a824b IC |
1149 | /* |
1150 | * Prevent page tables from being allocated in highmem, even | |
1151 | * if CONFIG_HIGHPTE is enabled. | |
1152 | */ | |
1153 | __userpte_alloc_gfp &= ~__GFP_HIGHMEM; | |
1154 | ||
b75fe4e5 | 1155 | /* Work out if we support NX */ |
4763ed4d | 1156 | x86_configure_nx(); |
b75fe4e5 | 1157 | |
577eebea JF |
1158 | xen_setup_features(); |
1159 | ||
1160 | /* Get mfn list */ | |
1161 | if (!xen_feature(XENFEAT_auto_translated_physmap)) | |
1162 | xen_build_dynamic_phys_to_machine(); | |
1163 | ||
1164 | /* | |
1165 | * Set up kernel GDT and segment registers, mainly so that | |
1166 | * -fstack-protector code can be executed. | |
1167 | */ | |
1168 | xen_setup_stackprotector(); | |
0d1edf46 | 1169 | |
ce2eef33 | 1170 | xen_init_irq_ops(); |
e826fe1b JF |
1171 | xen_init_cpuid_mask(); |
1172 | ||
94a8c3c2 | 1173 | #ifdef CONFIG_X86_LOCAL_APIC |
ad66dd34 | 1174 | /* |
94a8c3c2 | 1175 | * set up the basic apic ops. |
ad66dd34 | 1176 | */ |
c1eeb2de | 1177 | set_xen_basic_apic_ops(); |
ad66dd34 | 1178 | #endif |
93b1eab3 | 1179 | |
e57778a1 JF |
1180 | if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) { |
1181 | pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start; | |
1182 | pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit; | |
1183 | } | |
1184 | ||
fefa629a JF |
1185 | machine_ops = xen_machine_ops; |
1186 | ||
38341432 JF |
1187 | /* |
1188 | * The only reliable way to retain the initial address of the | |
1189 | * percpu gdt_page is to remember it here, so we can go and | |
1190 | * mark it RW later, when the initial percpu area is freed. | |
1191 | */ | |
1192 | xen_initial_gdt = &per_cpu(gdt_page, 0); | |
795f99b6 | 1193 | |
a9e7062d | 1194 | xen_smp_init(); |
5ead97c8 | 1195 | |
c1f5db1a IC |
1196 | #ifdef CONFIG_ACPI_NUMA |
1197 | /* | |
1198 | * The pages we from Xen are not related to machine pages, so | |
1199 | * any NUMA information the kernel tries to get from ACPI will | |
1200 | * be meaningless. Prevent it from trying. | |
1201 | */ | |
1202 | acpi_numa = -1; | |
1203 | #endif | |
1204 | ||
5ead97c8 JF |
1205 | pgd = (pgd_t *)xen_start_info->pt_base; |
1206 | ||
7347b408 AN |
1207 | if (!xen_initial_domain()) |
1208 | __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD); | |
1209 | ||
1210 | __supported_pte_mask |= _PAGE_IOMAP; | |
60223a32 | 1211 | /* Don't do the full vcpu_info placement stuff until we have a |
2e8fe719 | 1212 | possible map and a non-dummy shared_info. */ |
60223a32 | 1213 | per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0]; |
5ead97c8 | 1214 | |
55d80856 | 1215 | local_irq_disable(); |
2ce802f6 | 1216 | early_boot_irqs_disabled = true; |
55d80856 | 1217 | |
084a2a4e | 1218 | xen_raw_console_write("mapping kernel into physical memory\n"); |
d114e198 | 1219 | pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages); |
4ec5387c | 1220 | xen_ident_map_ISA(); |
5ead97c8 | 1221 | |
33a84750 JF |
1222 | /* Allocate and initialize top and mid mfn levels for p2m structure */ |
1223 | xen_build_mfn_list_list(); | |
1224 | ||
5ead97c8 JF |
1225 | /* keep using Xen gdt for now; no urgent need to change it */ |
1226 | ||
e68266b7 | 1227 | #ifdef CONFIG_X86_32 |
93b1eab3 | 1228 | pv_info.kernel_rpl = 1; |
5ead97c8 | 1229 | if (xen_feature(XENFEAT_supervisor_mode_kernel)) |
93b1eab3 | 1230 | pv_info.kernel_rpl = 0; |
e68266b7 IC |
1231 | #else |
1232 | pv_info.kernel_rpl = 0; | |
1233 | #endif | |
5ead97c8 | 1234 | /* set the limit of our address space */ |
fb1d8404 | 1235 | xen_reserve_top(); |
5ead97c8 | 1236 | |
ec35a69c KRW |
1237 | /* We used to do this in xen_arch_setup, but that is too late on AMD |
1238 | * were early_cpu_init (run before ->arch_setup()) calls early_amd_init | |
1239 | * which pokes 0xcf8 port. | |
1240 | */ | |
1241 | set_iopl.iopl = 1; | |
1242 | rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl); | |
1243 | if (rc != 0) | |
1244 | xen_raw_printk("physdev_op failed %d\n", rc); | |
1245 | ||
7d087b68 | 1246 | #ifdef CONFIG_X86_32 |
5ead97c8 JF |
1247 | /* set up basic CPUID stuff */ |
1248 | cpu_detect(&new_cpu_data); | |
1249 | new_cpu_data.hard_math = 1; | |
d560bc61 | 1250 | new_cpu_data.wp_works_ok = 1; |
5ead97c8 | 1251 | new_cpu_data.x86_capability[0] = cpuid_edx(1); |
7d087b68 | 1252 | #endif |
5ead97c8 JF |
1253 | |
1254 | /* Poke various useful things into boot_params */ | |
30c82645 PA |
1255 | boot_params.hdr.type_of_loader = (9 << 4) | 0; |
1256 | boot_params.hdr.ramdisk_image = xen_start_info->mod_start | |
1257 | ? __pa(xen_start_info->mod_start) : 0; | |
1258 | boot_params.hdr.ramdisk_size = xen_start_info->mod_len; | |
b7c3c5c1 | 1259 | boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line); |
5ead97c8 | 1260 | |
6e833587 | 1261 | if (!xen_initial_domain()) { |
83abc70a | 1262 | add_preferred_console("xenboot", 0, NULL); |
9e124fe1 | 1263 | add_preferred_console("tty", 0, NULL); |
b8c2d3df | 1264 | add_preferred_console("hvc", 0, NULL); |
b5401a96 AN |
1265 | if (pci_xen) |
1266 | x86_init.pci.arch_init = pci_xen_init; | |
5d990b62 | 1267 | } else { |
c2419b4a JF |
1268 | const struct dom0_vga_console_info *info = |
1269 | (void *)((char *)xen_start_info + | |
1270 | xen_start_info->console.dom0.info_off); | |
1271 | ||
1272 | xen_init_vga(info, xen_start_info->console.dom0.info_size); | |
1273 | xen_start_info->console.domU.mfn = 0; | |
1274 | xen_start_info->console.domU.evtchn = 0; | |
1275 | ||
5d990b62 CW |
1276 | /* Make sure ACS will be enabled */ |
1277 | pci_request_acs(); | |
9e124fe1 | 1278 | } |
5d990b62 | 1279 | |
b8c2d3df | 1280 | |
084a2a4e JF |
1281 | xen_raw_console_write("about to get started...\n"); |
1282 | ||
499d19b8 JF |
1283 | xen_setup_runstate_info(0); |
1284 | ||
5ead97c8 | 1285 | /* Start the world */ |
f5d36de0 | 1286 | #ifdef CONFIG_X86_32 |
f0d43100 | 1287 | i386_start_kernel(); |
f5d36de0 | 1288 | #else |
084a2a4e | 1289 | x86_64_start_reservations((char *)__pa_symbol(&boot_params)); |
f5d36de0 | 1290 | #endif |
5ead97c8 | 1291 | } |
bee6ab53 | 1292 | |
bee6ab53 SY |
1293 | static int init_hvm_pv_info(int *major, int *minor) |
1294 | { | |
1295 | uint32_t eax, ebx, ecx, edx, pages, msr, base; | |
1296 | u64 pfn; | |
1297 | ||
1298 | base = xen_cpuid_base(); | |
1299 | cpuid(base + 1, &eax, &ebx, &ecx, &edx); | |
1300 | ||
1301 | *major = eax >> 16; | |
1302 | *minor = eax & 0xffff; | |
1303 | printk(KERN_INFO "Xen version %d.%d.\n", *major, *minor); | |
1304 | ||
1305 | cpuid(base + 2, &pages, &msr, &ecx, &edx); | |
1306 | ||
1307 | pfn = __pa(hypercall_page); | |
1308 | wrmsr_safe(msr, (u32)pfn, (u32)(pfn >> 32)); | |
1309 | ||
1310 | xen_setup_features(); | |
1311 | ||
cff520b9 | 1312 | pv_info.name = "Xen HVM"; |
bee6ab53 SY |
1313 | |
1314 | xen_domain_type = XEN_HVM_DOMAIN; | |
1315 | ||
1316 | return 0; | |
1317 | } | |
1318 | ||
44b46c3e | 1319 | void __ref xen_hvm_init_shared_info(void) |
bee6ab53 | 1320 | { |
016b6f5f | 1321 | int cpu; |
bee6ab53 | 1322 | struct xen_add_to_physmap xatp; |
016b6f5f | 1323 | static struct shared_info *shared_info_page = 0; |
bee6ab53 | 1324 | |
016b6f5f SS |
1325 | if (!shared_info_page) |
1326 | shared_info_page = (struct shared_info *) | |
1327 | extend_brk(PAGE_SIZE, PAGE_SIZE); | |
bee6ab53 SY |
1328 | xatp.domid = DOMID_SELF; |
1329 | xatp.idx = 0; | |
1330 | xatp.space = XENMAPSPACE_shared_info; | |
1331 | xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT; | |
1332 | if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp)) | |
1333 | BUG(); | |
1334 | ||
1335 | HYPERVISOR_shared_info = (struct shared_info *)shared_info_page; | |
1336 | ||
016b6f5f SS |
1337 | /* xen_vcpu is a pointer to the vcpu_info struct in the shared_info |
1338 | * page, we use it in the event channel upcall and in some pvclock | |
1339 | * related functions. We don't need the vcpu_info placement | |
1340 | * optimizations because we don't use any pv_mmu or pv_irq op on | |
1341 | * HVM. | |
1342 | * When xen_hvm_init_shared_info is run at boot time only vcpu 0 is | |
1343 | * online but xen_hvm_init_shared_info is run at resume time too and | |
1344 | * in that case multiple vcpus might be online. */ | |
1345 | for_each_online_cpu(cpu) { | |
1346 | per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu]; | |
1347 | } | |
bee6ab53 SY |
1348 | } |
1349 | ||
ca65f9fc | 1350 | #ifdef CONFIG_XEN_PVHVM |
38e20b07 SY |
1351 | static int __cpuinit xen_hvm_cpu_notify(struct notifier_block *self, |
1352 | unsigned long action, void *hcpu) | |
1353 | { | |
1354 | int cpu = (long)hcpu; | |
1355 | switch (action) { | |
1356 | case CPU_UP_PREPARE: | |
90d4f553 | 1357 | xen_vcpu_setup(cpu); |
99bbb3a8 SS |
1358 | if (xen_have_vector_callback) |
1359 | xen_init_lock_cpu(cpu); | |
38e20b07 SY |
1360 | break; |
1361 | default: | |
1362 | break; | |
1363 | } | |
1364 | return NOTIFY_OK; | |
1365 | } | |
1366 | ||
ad3062a0 | 1367 | static struct notifier_block xen_hvm_cpu_notifier __cpuinitdata = { |
38e20b07 SY |
1368 | .notifier_call = xen_hvm_cpu_notify, |
1369 | }; | |
1370 | ||
bee6ab53 SY |
1371 | static void __init xen_hvm_guest_init(void) |
1372 | { | |
1373 | int r; | |
1374 | int major, minor; | |
1375 | ||
1376 | r = init_hvm_pv_info(&major, &minor); | |
1377 | if (r < 0) | |
1378 | return; | |
1379 | ||
016b6f5f | 1380 | xen_hvm_init_shared_info(); |
38e20b07 SY |
1381 | |
1382 | if (xen_feature(XENFEAT_hvm_callback_vector)) | |
1383 | xen_have_vector_callback = 1; | |
99bbb3a8 | 1384 | xen_hvm_smp_init(); |
38e20b07 | 1385 | register_cpu_notifier(&xen_hvm_cpu_notifier); |
c1c5413a | 1386 | xen_unplug_emulated_devices(); |
38e20b07 | 1387 | x86_init.irqs.intr_init = xen_init_IRQ; |
409771d2 | 1388 | xen_hvm_init_time_ops(); |
59151001 | 1389 | xen_hvm_init_mmu_ops(); |
bee6ab53 SY |
1390 | } |
1391 | ||
1392 | static bool __init xen_hvm_platform(void) | |
1393 | { | |
1394 | if (xen_pv_domain()) | |
1395 | return false; | |
1396 | ||
1397 | if (!xen_cpuid_base()) | |
1398 | return false; | |
1399 | ||
1400 | return true; | |
1401 | } | |
1402 | ||
d9b8ca84 SY |
1403 | bool xen_hvm_need_lapic(void) |
1404 | { | |
1405 | if (xen_pv_domain()) | |
1406 | return false; | |
1407 | if (!xen_hvm_domain()) | |
1408 | return false; | |
1409 | if (xen_feature(XENFEAT_hvm_pirqs) && xen_have_vector_callback) | |
1410 | return false; | |
1411 | return true; | |
1412 | } | |
1413 | EXPORT_SYMBOL_GPL(xen_hvm_need_lapic); | |
1414 | ||
ad3062a0 | 1415 | const struct hypervisor_x86 x86_hyper_xen_hvm __refconst = { |
bee6ab53 SY |
1416 | .name = "Xen HVM", |
1417 | .detect = xen_hvm_platform, | |
1418 | .init_platform = xen_hvm_guest_init, | |
1419 | }; | |
1420 | EXPORT_SYMBOL(x86_hyper_xen_hvm); | |
ca65f9fc | 1421 | #endif |