xen64: map an initial chunk of physical memory
[deliverable/linux.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
084a2a4e 36#include <xen/hvc-console.h>
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37
38#include <asm/paravirt.h>
39#include <asm/page.h>
40#include <asm/xen/hypercall.h>
41#include <asm/xen/hypervisor.h>
42#include <asm/fixmap.h>
43#include <asm/processor.h>
44#include <asm/setup.h>
45#include <asm/desc.h>
46#include <asm/pgtable.h>
f87e4cac 47#include <asm/tlbflush.h>
fefa629a 48#include <asm/reboot.h>
eba0045f 49#include <asm/pgalloc.h>
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50
51#include "xen-ops.h"
3b827c1b 52#include "mmu.h"
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53#include "multicalls.h"
54
55EXPORT_SYMBOL_GPL(hypercall_page);
56
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57DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
58DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
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59
60/*
61 * Note about cr3 (pagetable base) values:
62 *
63 * xen_cr3 contains the current logical cr3 value; it contains the
64 * last set cr3. This may not be the current effective cr3, because
65 * its update may be being lazily deferred. However, a vcpu looking
66 * at its own cr3 can use this value knowing that it everything will
67 * be self-consistent.
68 *
69 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
70 * hypercall to set the vcpu cr3 is complete (so it may be a little
71 * out of date, but it will never be set early). If one vcpu is
72 * looking at another vcpu's cr3 value, it should use this variable.
73 */
74DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
75DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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76
77struct start_info *xen_start_info;
78EXPORT_SYMBOL_GPL(xen_start_info);
79
a0d695c8 80struct shared_info xen_dummy_shared_info;
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81
82/*
83 * Point at some empty memory to start with. We map the real shared_info
84 * page as soon as fixmap is up and running.
85 */
a0d695c8 86struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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87
88/*
89 * Flag to determine whether vcpu info placement is available on all
90 * VCPUs. We assume it is to start with, and then set it to zero on
91 * the first failure. This is because it can succeed on some VCPUs
92 * and not others, since it can involve hypervisor memory allocation,
93 * or because the guest failed to guarantee all the appropriate
94 * constraints on all VCPUs (ie buffer can't cross a page boundary).
95 *
96 * Note that any particular CPU may be using a placed vcpu structure,
97 * but we can only optimise if the all are.
98 *
99 * 0: not available, 1: available
100 */
04c44a08 101static int have_vcpu_info_placement = 1;
60223a32 102
9c7a7942 103static void xen_vcpu_setup(int cpu)
5ead97c8 104{
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105 struct vcpu_register_vcpu_info info;
106 int err;
107 struct vcpu_info *vcpup;
108
a0d695c8 109 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 110 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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111
112 if (!have_vcpu_info_placement)
113 return; /* already tested, not available */
114
115 vcpup = &per_cpu(xen_vcpu_info, cpu);
116
117 info.mfn = virt_to_mfn(vcpup);
118 info.offset = offset_in_page(vcpup);
119
e3d26976 120 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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121 cpu, vcpup, info.mfn, info.offset);
122
123 /* Check to see if the hypervisor will put the vcpu_info
124 structure where we want it, which allows direct access via
125 a percpu-variable. */
126 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
127
128 if (err) {
129 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
130 have_vcpu_info_placement = 0;
131 } else {
132 /* This cpu is using the registered vcpu info, even if
133 later ones fail to. */
134 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 135
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136 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
137 cpu, vcpup);
138 }
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139}
140
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141/*
142 * On restore, set the vcpu placement up again.
143 * If it fails, then we're in a bad state, since
144 * we can't back out from using it...
145 */
146void xen_vcpu_restore(void)
147{
148 if (have_vcpu_info_placement) {
149 int cpu;
150
151 for_each_online_cpu(cpu) {
152 bool other_cpu = (cpu != smp_processor_id());
153
154 if (other_cpu &&
155 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
156 BUG();
157
158 xen_vcpu_setup(cpu);
159
160 if (other_cpu &&
161 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
162 BUG();
163 }
164
165 BUG_ON(!have_vcpu_info_placement);
166 }
167}
168
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169static void __init xen_banner(void)
170{
171 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 172 pv_info.name);
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173 printk(KERN_INFO "Hypervisor signature: %s%s\n",
174 xen_start_info->magic,
175 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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176}
177
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178static void xen_cpuid(unsigned int *ax, unsigned int *bx,
179 unsigned int *cx, unsigned int *dx)
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180{
181 unsigned maskedx = ~0;
182
183 /*
184 * Mask out inconvenient features, to try and disable as many
185 * unsupported kernel subsystems as possible.
186 */
65ea5b03 187 if (*ax == 1)
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188 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
189 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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190 (1 << X86_FEATURE_MCE) | /* disable MCE */
191 (1 << X86_FEATURE_MCA) | /* disable MCA */
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192 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
193
194 asm(XEN_EMULATE_PREFIX "cpuid"
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195 : "=a" (*ax),
196 "=b" (*bx),
197 "=c" (*cx),
198 "=d" (*dx)
199 : "0" (*ax), "2" (*cx));
200 *dx &= maskedx;
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201}
202
203static void xen_set_debugreg(int reg, unsigned long val)
204{
205 HYPERVISOR_set_debugreg(reg, val);
206}
207
208static unsigned long xen_get_debugreg(int reg)
209{
210 return HYPERVISOR_get_debugreg(reg);
211}
212
213static unsigned long xen_save_fl(void)
214{
215 struct vcpu_info *vcpu;
216 unsigned long flags;
217
5ead97c8 218 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 219
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220 /* flag has opposite sense of mask */
221 flags = !vcpu->evtchn_upcall_mask;
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222
223 /* convert to IF type flag
224 -0 -> 0x00000000
225 -1 -> 0xffffffff
226 */
227 return (-flags) & X86_EFLAGS_IF;
228}
229
230static void xen_restore_fl(unsigned long flags)
231{
232 struct vcpu_info *vcpu;
233
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234 /* convert from IF type flag */
235 flags = !(flags & X86_EFLAGS_IF);
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236
237 /* There's a one instruction preempt window here. We need to
238 make sure we're don't switch CPUs between getting the vcpu
239 pointer and updating the mask. */
240 preempt_disable();
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241 vcpu = x86_read_percpu(xen_vcpu);
242 vcpu->evtchn_upcall_mask = flags;
f120f13e 243 preempt_enable_no_resched();
5ead97c8 244
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245 /* Doesn't matter if we get preempted here, because any
246 pending event will get dealt with anyway. */
5ead97c8 247
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248 if (flags == 0) {
249 preempt_check_resched();
250 barrier(); /* unmask then check (avoid races) */
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251 if (unlikely(vcpu->evtchn_upcall_pending))
252 force_evtchn_callback();
f120f13e 253 }
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254}
255
256static void xen_irq_disable(void)
257{
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258 /* There's a one instruction preempt window here. We need to
259 make sure we're don't switch CPUs between getting the vcpu
260 pointer and updating the mask. */
5ead97c8 261 preempt_disable();
f120f13e 262 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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263 preempt_enable_no_resched();
264}
265
266static void xen_irq_enable(void)
267{
268 struct vcpu_info *vcpu;
269
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270 /* We don't need to worry about being preempted here, since
271 either a) interrupts are disabled, so no preemption, or b)
272 the caller is confused and is trying to re-enable interrupts
273 on an indeterminate processor. */
274
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275 vcpu = x86_read_percpu(xen_vcpu);
276 vcpu->evtchn_upcall_mask = 0;
277
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278 /* Doesn't matter if we get preempted here, because any
279 pending event will get dealt with anyway. */
5ead97c8 280
f120f13e 281 barrier(); /* unmask then check (avoid races) */
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282 if (unlikely(vcpu->evtchn_upcall_pending))
283 force_evtchn_callback();
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284}
285
286static void xen_safe_halt(void)
287{
288 /* Blocking includes an implicit local_irq_enable(). */
349c709f 289 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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290 BUG();
291}
292
293static void xen_halt(void)
294{
295 if (irqs_disabled())
296 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
297 else
298 xen_safe_halt();
299}
300
8965c1c0 301static void xen_leave_lazy(void)
5ead97c8 302{
8965c1c0 303 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 304 xen_mc_flush();
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305}
306
307static unsigned long xen_store_tr(void)
308{
309 return 0;
310}
311
312static void xen_set_ldt(const void *addr, unsigned entries)
313{
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314 struct mmuext_op *op;
315 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
316
317 op = mcs.args;
318 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 319 op->arg1.linear_addr = (unsigned long)addr;
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320 op->arg2.nr_ents = entries;
321
322 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
323
324 xen_mc_issue(PARAVIRT_LAZY_CPU);
325}
326
6b68f01b 327static void xen_load_gdt(const struct desc_ptr *dtr)
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328{
329 unsigned long *frames;
330 unsigned long va = dtr->address;
331 unsigned int size = dtr->size + 1;
332 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
333 int f;
334 struct multicall_space mcs;
335
336 /* A GDT can be up to 64k in size, which corresponds to 8192
337 8-byte entries, or 16 4k pages.. */
338
339 BUG_ON(size > 65536);
340 BUG_ON(va & ~PAGE_MASK);
341
342 mcs = xen_mc_entry(sizeof(*frames) * pages);
343 frames = mcs.args;
344
345 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
346 frames[f] = virt_to_mfn(va);
347 make_lowmem_page_readonly((void *)va);
348 }
349
350 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
351
352 xen_mc_issue(PARAVIRT_LAZY_CPU);
353}
354
355static void load_TLS_descriptor(struct thread_struct *t,
356 unsigned int cpu, unsigned int i)
357{
358 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
359 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
360 struct multicall_space mc = __xen_mc_entry(0);
361
362 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
363}
364
365static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
366{
367 xen_mc_batch();
368
369 load_TLS_descriptor(t, cpu, 0);
370 load_TLS_descriptor(t, cpu, 1);
371 load_TLS_descriptor(t, cpu, 2);
372
373 xen_mc_issue(PARAVIRT_LAZY_CPU);
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374
375 /*
376 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
377 * it means we're in a context switch, and %gs has just been
378 * saved. This means we can zero it out to prevent faults on
379 * exit from the hypervisor if the next process has no %gs.
380 * Either way, it has been saved, and the new value will get
381 * loaded properly. This will go away as soon as Xen has been
382 * modified to not save/restore %gs for normal hypercalls.
383 */
8965c1c0 384 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
8b84ad94 385 loadsegment(gs, 0);
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386}
387
388static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 389 const void *ptr)
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390{
391 unsigned long lp = (unsigned long)&dt[entrynum];
392 xmaddr_t mach_lp = virt_to_machine(lp);
75b8bb3e 393 u64 entry = *(u64 *)ptr;
5ead97c8 394
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395 preempt_disable();
396
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397 xen_mc_flush();
398 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
399 BUG();
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400
401 preempt_enable();
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402}
403
404static int cvt_gate_to_trap(int vector, u32 low, u32 high,
405 struct trap_info *info)
406{
407 u8 type, dpl;
408
409 type = (high >> 8) & 0x1f;
410 dpl = (high >> 13) & 3;
411
412 if (type != 0xf && type != 0xe)
413 return 0;
414
415 info->vector = vector;
416 info->address = (high & 0xffff0000) | (low & 0x0000ffff);
417 info->cs = low >> 16;
418 info->flags = dpl;
419 /* interrupt gates clear IF */
420 if (type == 0xe)
421 info->flags |= 4;
422
423 return 1;
424}
425
426/* Locations of each CPU's IDT */
6b68f01b 427static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
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428
429/* Set an IDT entry. If the entry is part of the current IDT, then
430 also update Xen. */
8d947344 431static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 432{
5ead97c8 433 unsigned long p = (unsigned long)&dt[entrynum];
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434 unsigned long start, end;
435
436 preempt_disable();
437
438 start = __get_cpu_var(idt_desc).address;
439 end = start + __get_cpu_var(idt_desc).size + 1;
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440
441 xen_mc_flush();
442
8d947344 443 native_write_idt_entry(dt, entrynum, g);
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444
445 if (p >= start && (p + 8) <= end) {
446 struct trap_info info[2];
8d947344 447 u32 *desc = (u32 *)g;
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448
449 info[1].address = 0;
450
8d947344 451 if (cvt_gate_to_trap(entrynum, desc[0], desc[1], &info[0]))
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452 if (HYPERVISOR_set_trap_table(info))
453 BUG();
454 }
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455
456 preempt_enable();
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457}
458
6b68f01b 459static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 460 struct trap_info *traps)
5ead97c8 461{
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462 unsigned in, out, count;
463
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464 count = (desc->size+1) / 8;
465 BUG_ON(count > 256);
466
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467 for (in = out = 0; in < count; in++) {
468 const u32 *entry = (u32 *)(desc->address + in * 8);
469
470 if (cvt_gate_to_trap(in, entry[0], entry[1], &traps[out]))
471 out++;
472 }
473 traps[out].address = 0;
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474}
475
476void xen_copy_trap_info(struct trap_info *traps)
477{
6b68f01b 478 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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479
480 xen_convert_trap_info(desc, traps);
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481}
482
483/* Load a new IDT into Xen. In principle this can be per-CPU, so we
484 hold a spinlock to protect the static traps[] array (static because
485 it avoids allocation, and saves stack space). */
6b68f01b 486static void xen_load_idt(const struct desc_ptr *desc)
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487{
488 static DEFINE_SPINLOCK(lock);
489 static struct trap_info traps[257];
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490
491 spin_lock(&lock);
492
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493 __get_cpu_var(idt_desc) = *desc;
494
f87e4cac 495 xen_convert_trap_info(desc, traps);
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496
497 xen_mc_flush();
498 if (HYPERVISOR_set_trap_table(traps))
499 BUG();
500
501 spin_unlock(&lock);
502}
503
504/* Write a GDT descriptor entry. Ignore LDT descriptors, since
505 they're handled differently. */
506static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 507 const void *desc, int type)
5ead97c8 508{
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509 preempt_disable();
510
014b15be
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511 switch (type) {
512 case DESC_LDT:
513 case DESC_TSS:
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514 /* ignore */
515 break;
516
517 default: {
518 xmaddr_t maddr = virt_to_machine(&dt[entry]);
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519
520 xen_mc_flush();
014b15be 521 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
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522 BUG();
523 }
524
525 }
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526
527 preempt_enable();
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528}
529
faca6227 530static void xen_load_sp0(struct tss_struct *tss,
f120f13e 531 struct thread_struct *thread)
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532{
533 struct multicall_space mcs = xen_mc_entry(0);
faca6227 534 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
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535 xen_mc_issue(PARAVIRT_LAZY_CPU);
536}
537
538static void xen_set_iopl_mask(unsigned mask)
539{
540 struct physdev_set_iopl set_iopl;
541
542 /* Force the change at ring 0. */
543 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
544 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
545}
546
547static void xen_io_delay(void)
548{
549}
550
551#ifdef CONFIG_X86_LOCAL_APIC
42e0a9aa 552static u32 xen_apic_read(unsigned long reg)
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553{
554 return 0;
555}
f87e4cac 556
42e0a9aa 557static void xen_apic_write(unsigned long reg, u32 val)
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558{
559 /* Warn to see if there's any stray references */
560 WARN_ON(1);
561}
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562#endif
563
564static void xen_flush_tlb(void)
565{
d66bf8fc 566 struct mmuext_op *op;
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567 struct multicall_space mcs;
568
569 preempt_disable();
570
571 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 572
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573 op = mcs.args;
574 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
575 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
576
577 xen_mc_issue(PARAVIRT_LAZY_MMU);
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578
579 preempt_enable();
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580}
581
582static void xen_flush_tlb_single(unsigned long addr)
583{
d66bf8fc 584 struct mmuext_op *op;
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585 struct multicall_space mcs;
586
587 preempt_disable();
5ead97c8 588
41e332b2 589 mcs = xen_mc_entry(sizeof(*op));
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590 op = mcs.args;
591 op->cmd = MMUEXT_INVLPG_LOCAL;
592 op->arg1.linear_addr = addr & PAGE_MASK;
593 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
594
595 xen_mc_issue(PARAVIRT_LAZY_MMU);
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596
597 preempt_enable();
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598}
599
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600static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
601 unsigned long va)
602{
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603 struct {
604 struct mmuext_op op;
605 cpumask_t mask;
606 } *args;
f87e4cac 607 cpumask_t cpumask = *cpus;
d66bf8fc 608 struct multicall_space mcs;
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609
610 /*
611 * A couple of (to be removed) sanity checks:
612 *
613 * - current CPU must not be in mask
614 * - mask must exist :)
615 */
616 BUG_ON(cpus_empty(cpumask));
617 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
618 BUG_ON(!mm);
619
620 /* If a CPU which we ran on has gone down, OK. */
621 cpus_and(cpumask, cpumask, cpu_online_map);
622 if (cpus_empty(cpumask))
623 return;
624
d66bf8fc
JF
625 mcs = xen_mc_entry(sizeof(*args));
626 args = mcs.args;
627 args->mask = cpumask;
628 args->op.arg2.vcpumask = &args->mask;
629
f87e4cac 630 if (va == TLB_FLUSH_ALL) {
d66bf8fc 631 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 632 } else {
d66bf8fc
JF
633 args->op.cmd = MMUEXT_INVLPG_MULTI;
634 args->op.arg1.linear_addr = va;
f87e4cac
JF
635 }
636
d66bf8fc
JF
637 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
638
639 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
640}
641
7b1333aa
JF
642static void xen_clts(void)
643{
644 struct multicall_space mcs;
645
646 mcs = xen_mc_entry(0);
647
648 MULTI_fpu_taskswitch(mcs.mc, 0);
649
650 xen_mc_issue(PARAVIRT_LAZY_CPU);
651}
652
653static void xen_write_cr0(unsigned long cr0)
654{
655 struct multicall_space mcs;
656
657 /* Only pay attention to cr0.TS; everything else is
658 ignored. */
659 mcs = xen_mc_entry(0);
660
661 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
662
663 xen_mc_issue(PARAVIRT_LAZY_CPU);
664}
665
60223a32
JF
666static void xen_write_cr2(unsigned long cr2)
667{
668 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
669}
670
5ead97c8
JF
671static unsigned long xen_read_cr2(void)
672{
673 return x86_read_percpu(xen_vcpu)->arch.cr2;
674}
675
60223a32
JF
676static unsigned long xen_read_cr2_direct(void)
677{
678 return x86_read_percpu(xen_vcpu_info.arch.cr2);
679}
680
5ead97c8
JF
681static void xen_write_cr4(unsigned long cr4)
682{
2956a351
JF
683 cr4 &= ~X86_CR4_PGE;
684 cr4 &= ~X86_CR4_PSE;
685
686 native_write_cr4(cr4);
5ead97c8
JF
687}
688
5ead97c8
JF
689static unsigned long xen_read_cr3(void)
690{
691 return x86_read_percpu(xen_cr3);
692}
693
9f79991d
JF
694static void set_current_cr3(void *v)
695{
696 x86_write_percpu(xen_current_cr3, (unsigned long)v);
697}
698
5ead97c8
JF
699static void xen_write_cr3(unsigned long cr3)
700{
9f79991d
JF
701 struct mmuext_op *op;
702 struct multicall_space mcs;
703 unsigned long mfn = pfn_to_mfn(PFN_DOWN(cr3));
704
f120f13e
JF
705 BUG_ON(preemptible());
706
9f79991d 707 mcs = xen_mc_entry(sizeof(*op)); /* disables interrupts */
5ead97c8 708
9f79991d
JF
709 /* Update while interrupts are disabled, so its atomic with
710 respect to ipis */
5ead97c8
JF
711 x86_write_percpu(xen_cr3, cr3);
712
9f79991d
JF
713 op = mcs.args;
714 op->cmd = MMUEXT_NEW_BASEPTR;
715 op->arg1.mfn = mfn;
5ead97c8 716
9f79991d 717 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 718
9f79991d
JF
719 /* Update xen_update_cr3 once the batch has actually
720 been submitted. */
721 xen_mc_callback(set_current_cr3, (void *)cr3);
5ead97c8 722
9f79991d 723 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
724}
725
f4f97b3e
JF
726/* Early in boot, while setting up the initial pagetable, assume
727 everything is pinned. */
6944a9c8 728static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 729{
af7ae3b9 730#ifdef CONFIG_FLATMEM
f4f97b3e 731 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 732#endif
5ead97c8
JF
733 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
734}
735
6944a9c8 736/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 737 only init_mm and anything attached to that is pinned. */
6944a9c8 738static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
739{
740 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
741}
742
f6433706 743static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
744{
745 struct mmuext_op op;
f6433706 746 op.cmd = cmd;
74260714
JF
747 op.arg1.mfn = pfn_to_mfn(pfn);
748 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
749 BUG();
750}
751
f4f97b3e
JF
752/* This needs to make sure the new pte page is pinned iff its being
753 attached to a pinned pagetable. */
1c70e9bd 754static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 755{
f4f97b3e 756 struct page *page = pfn_to_page(pfn);
5ead97c8 757
f4f97b3e
JF
758 if (PagePinned(virt_to_page(mm->pgd))) {
759 SetPagePinned(page);
760
74260714 761 if (!PageHighMem(page)) {
f4f97b3e 762 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
763 if (level == PT_PTE)
764 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 765 } else
f4f97b3e
JF
766 /* make sure there are no stray mappings of
767 this page */
768 kmap_flush_unused();
769 }
5ead97c8
JF
770}
771
6944a9c8 772static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 773{
f6433706 774 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
775}
776
6944a9c8 777static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 778{
f6433706 779 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
780}
781
f4f97b3e 782/* This should never happen until we're OK to use struct page */
f6433706 783static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 784{
f4f97b3e
JF
785 struct page *page = pfn_to_page(pfn);
786
787 if (PagePinned(page)) {
74260714 788 if (!PageHighMem(page)) {
a684d69d
MM
789 if (level == PT_PTE)
790 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 791 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 792 }
c946c7de 793 ClearPagePinned(page);
f4f97b3e 794 }
5ead97c8
JF
795}
796
6944a9c8 797static void xen_release_pte(u32 pfn)
f6433706
MM
798{
799 xen_release_ptpage(pfn, PT_PTE);
800}
801
6944a9c8 802static void xen_release_pmd(u32 pfn)
f6433706
MM
803{
804 xen_release_ptpage(pfn, PT_PMD);
805}
806
f6e58732
JF
807#if PAGETABLE_LEVELS == 4
808static void xen_alloc_pud(struct mm_struct *mm, u32 pfn)
809{
810 xen_alloc_ptpage(mm, pfn, PT_PUD);
811}
812
813static void xen_release_pud(u32 pfn)
814{
815 xen_release_ptpage(pfn, PT_PUD);
816}
817#endif
818
f4f97b3e
JF
819#ifdef CONFIG_HIGHPTE
820static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 821{
f4f97b3e
JF
822 pgprot_t prot = PAGE_KERNEL;
823
824 if (PagePinned(page))
825 prot = PAGE_KERNEL_RO;
826
827 if (0 && PageHighMem(page))
828 printk("mapping highpte %lx type %d prot %s\n",
829 page_to_pfn(page), type,
830 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
831
832 return kmap_atomic_prot(page, type, prot);
5ead97c8 833}
f4f97b3e 834#endif
5ead97c8 835
9a4029fd
JF
836static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
837{
838 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
839 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
840 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
841 pte_val_ma(pte));
842
843 return pte;
844}
845
846/* Init-time set_pte while constructing initial pagetables, which
847 doesn't allow RO pagetable pages to be remapped RW */
848static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
849{
850 pte = mask_rw_pte(ptep, pte);
851
852 xen_set_pte(ptep, pte);
853}
854
5ead97c8
JF
855static __init void xen_pagetable_setup_start(pgd_t *base)
856{
a312b37b 857#ifdef CONFIG_X86_32
5ead97c8 858 pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base;
3843fc25 859 int i;
5ead97c8
JF
860
861 init_mm.pgd = base;
862 /*
3843fc25
JF
863 * copy top-level of Xen-supplied pagetable into place. This
864 * is a stand-in while we copy the pmd pages.
5ead97c8
JF
865 */
866 memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t));
867
3843fc25
JF
868 /*
869 * For PAE, need to allocate new pmds, rather than
870 * share Xen's, since Xen doesn't like pmd's being
871 * shared between address spaces.
872 */
873 for (i = 0; i < PTRS_PER_PGD; i++) {
874 if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) {
875 pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
5ead97c8 876
3843fc25
JF
877 memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]),
878 PAGE_SIZE);
5ead97c8 879
3843fc25 880 make_lowmem_page_readonly(pmd);
5ead97c8 881
3843fc25
JF
882 set_pgd(&base[i], __pgd(1 + __pa(pmd)));
883 } else
884 pgd_clear(&base[i]);
5ead97c8
JF
885 }
886
887 /* make sure zero_page is mapped RO so we can use it in pagetables */
888 make_lowmem_page_readonly(empty_zero_page);
889 make_lowmem_page_readonly(base);
890 /*
891 * Switch to new pagetable. This is done before
892 * pagetable_init has done anything so that the new pages
893 * added to the table can be prepared properly for Xen.
894 */
895 xen_write_cr3(__pa(base));
2b540781
JF
896
897 /* Unpin initial Xen pagetable */
898 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
899 PFN_DOWN(__pa(xen_start_info->pt_base)));
a312b37b 900#endif /* CONFIG_X86_32 */
5ead97c8
JF
901}
902
0e91398f 903void xen_setup_shared_info(void)
5ead97c8
JF
904{
905 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
906 set_fixmap(FIX_PARAVIRT_BOOTMAP,
907 xen_start_info->shared_info);
908
909 HYPERVISOR_shared_info =
910 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
911 } else
912 HYPERVISOR_shared_info =
913 (struct shared_info *)__va(xen_start_info->shared_info);
914
2e8fe719
JF
915#ifndef CONFIG_SMP
916 /* In UP this is as good a place as any to set up shared info */
917 xen_setup_vcpu_info_placement();
918#endif
d5edbc1f
JF
919
920 xen_setup_mfn_list_list();
2e8fe719
JF
921}
922
923static __init void xen_pagetable_setup_done(pgd_t *base)
924{
925 /* This will work as long as patching hasn't happened yet
926 (which it hasn't) */
6944a9c8
JF
927 pv_mmu_ops.alloc_pte = xen_alloc_pte;
928 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
929 pv_mmu_ops.release_pte = xen_release_pte;
930 pv_mmu_ops.release_pmd = xen_release_pmd;
f6e58732
JF
931#if PAGETABLE_LEVELS == 4
932 pv_mmu_ops.alloc_pud = xen_alloc_pud;
933 pv_mmu_ops.release_pud = xen_release_pud;
934#endif
935
2e8fe719
JF
936 pv_mmu_ops.set_pte = xen_set_pte;
937
0e91398f 938 xen_setup_shared_info();
2e8fe719 939
a312b37b 940#ifdef CONFIG_X86_32
f4f97b3e
JF
941 /* Actually pin the pagetable down, but we can't set PG_pinned
942 yet because the page structures don't exist yet. */
3843fc25 943 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base)));
a312b37b 944#endif
60223a32 945}
5ead97c8 946
e2426cf8
JF
947static __init void xen_post_allocator_init(void)
948{
949 pv_mmu_ops.set_pmd = xen_set_pmd;
950 pv_mmu_ops.set_pud = xen_set_pud;
f6e58732
JF
951#if PAGETABLE_LEVELS == 4
952 pv_mmu_ops.set_pgd = xen_set_pgd;
953#endif
e2426cf8
JF
954
955 xen_mark_init_mm_pinned();
956}
957
60223a32 958/* This is called once we have the cpu_possible_map */
0e91398f 959void xen_setup_vcpu_info_placement(void)
60223a32
JF
960{
961 int cpu;
962
963 for_each_possible_cpu(cpu)
964 xen_vcpu_setup(cpu);
965
966 /* xen_vcpu_setup managed to place the vcpu_info within the
967 percpu area for all cpus, so make use of it */
5b09b287 968#ifdef CONFIG_X86_32
60223a32
JF
969 if (have_vcpu_info_placement) {
970 printk(KERN_INFO "Xen: using vcpu_info placement\n");
971
93b1eab3
JF
972 pv_irq_ops.save_fl = xen_save_fl_direct;
973 pv_irq_ops.restore_fl = xen_restore_fl_direct;
974 pv_irq_ops.irq_disable = xen_irq_disable_direct;
975 pv_irq_ops.irq_enable = xen_irq_enable_direct;
976 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 977 }
5b09b287 978#endif
5ead97c8
JF
979}
980
ab144f5e
AK
981static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
982 unsigned long addr, unsigned len)
6487673b
JF
983{
984 char *start, *end, *reloc;
985 unsigned ret;
986
987 start = end = reloc = NULL;
988
93b1eab3
JF
989#define SITE(op, x) \
990 case PARAVIRT_PATCH(op.x): \
6487673b
JF
991 if (have_vcpu_info_placement) { \
992 start = (char *)xen_##x##_direct; \
993 end = xen_##x##_direct_end; \
994 reloc = xen_##x##_direct_reloc; \
995 } \
996 goto patch_site
997
998 switch (type) {
5b09b287 999#ifdef CONFIG_X86_32
93b1eab3
JF
1000 SITE(pv_irq_ops, irq_enable);
1001 SITE(pv_irq_ops, irq_disable);
1002 SITE(pv_irq_ops, save_fl);
1003 SITE(pv_irq_ops, restore_fl);
5b09b287 1004#endif /* CONFIG_X86_32 */
6487673b
JF
1005#undef SITE
1006
1007 patch_site:
1008 if (start == NULL || (end-start) > len)
1009 goto default_patch;
1010
ab144f5e 1011 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1012
1013 /* Note: because reloc is assigned from something that
1014 appears to be an array, gcc assumes it's non-null,
1015 but doesn't know its relationship with start and
1016 end. */
1017 if (reloc > start && reloc < end) {
1018 int reloc_off = reloc - start;
ab144f5e
AK
1019 long *relocp = (long *)(insnbuf + reloc_off);
1020 long delta = start - (char *)addr;
6487673b
JF
1021
1022 *relocp += delta;
1023 }
1024 break;
1025
1026 default_patch:
1027 default:
ab144f5e
AK
1028 ret = paravirt_patch_default(type, clobbers, insnbuf,
1029 addr, len);
6487673b
JF
1030 break;
1031 }
1032
1033 return ret;
1034}
1035
aeaaa59c
JF
1036static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1037{
1038 pte_t pte;
1039
1040 phys >>= PAGE_SHIFT;
1041
1042 switch (idx) {
1043 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1044#ifdef CONFIG_X86_F00F_BUG
1045 case FIX_F00F_IDT:
1046#endif
15664f96 1047#ifdef CONFIG_X86_32
aeaaa59c
JF
1048 case FIX_WP_TEST:
1049 case FIX_VDSO:
15664f96
JF
1050 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1051#else
1052 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1053#endif
aeaaa59c
JF
1054#ifdef CONFIG_X86_LOCAL_APIC
1055 case FIX_APIC_BASE: /* maps dummy local APIC */
1056#endif
1057 pte = pfn_pte(phys, prot);
1058 break;
1059
1060 default:
1061 pte = mfn_pte(phys, prot);
1062 break;
1063 }
1064
1065 __native_set_fixmap(idx, pte);
1066}
1067
93b1eab3 1068static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1069 .paravirt_enabled = 1,
1070 .shared_kernel_pmd = 0,
1071
1072 .name = "Xen",
93b1eab3 1073};
5ead97c8 1074
93b1eab3 1075static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1076 .patch = xen_patch,
5ead97c8 1077
93b1eab3 1078 .banner = xen_banner,
5ead97c8
JF
1079 .memory_setup = xen_memory_setup,
1080 .arch_setup = xen_arch_setup,
e2426cf8 1081 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1082};
5ead97c8 1083
93b1eab3 1084static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1085 .time_init = xen_time_init,
93b1eab3 1086
15c84731
JF
1087 .set_wallclock = xen_set_wallclock,
1088 .get_wallclock = xen_get_wallclock,
e93ef949 1089 .get_tsc_khz = xen_tsc_khz,
ab550288 1090 .sched_clock = xen_sched_clock,
93b1eab3 1091};
15c84731 1092
93b1eab3 1093static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1094 .cpuid = xen_cpuid,
1095
1096 .set_debugreg = xen_set_debugreg,
1097 .get_debugreg = xen_get_debugreg,
1098
7b1333aa 1099 .clts = xen_clts,
5ead97c8
JF
1100
1101 .read_cr0 = native_read_cr0,
7b1333aa 1102 .write_cr0 = xen_write_cr0,
5ead97c8 1103
5ead97c8
JF
1104 .read_cr4 = native_read_cr4,
1105 .read_cr4_safe = native_read_cr4_safe,
1106 .write_cr4 = xen_write_cr4,
1107
5ead97c8
JF
1108 .wbinvd = native_wbinvd,
1109
1110 .read_msr = native_read_msr_safe,
1111 .write_msr = native_write_msr_safe,
1112 .read_tsc = native_read_tsc,
1113 .read_pmc = native_read_pmc,
1114
81e103f1 1115 .iret = xen_iret,
d75cd22f 1116 .irq_enable_sysexit = xen_sysexit,
5ead97c8
JF
1117
1118 .load_tr_desc = paravirt_nop,
1119 .set_ldt = xen_set_ldt,
1120 .load_gdt = xen_load_gdt,
1121 .load_idt = xen_load_idt,
1122 .load_tls = xen_load_tls,
1123
1124 .store_gdt = native_store_gdt,
1125 .store_idt = native_store_idt,
1126 .store_tr = xen_store_tr,
1127
1128 .write_ldt_entry = xen_write_ldt_entry,
1129 .write_gdt_entry = xen_write_gdt_entry,
1130 .write_idt_entry = xen_write_idt_entry,
faca6227 1131 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1132
1133 .set_iopl_mask = xen_set_iopl_mask,
1134 .io_delay = xen_io_delay,
1135
8965c1c0
JF
1136 .lazy_mode = {
1137 .enter = paravirt_enter_lazy_cpu,
1138 .leave = xen_leave_lazy,
1139 },
93b1eab3
JF
1140};
1141
1142static const struct pv_irq_ops xen_irq_ops __initdata = {
1143 .init_IRQ = xen_init_IRQ,
1144 .save_fl = xen_save_fl,
1145 .restore_fl = xen_restore_fl,
1146 .irq_disable = xen_irq_disable,
1147 .irq_enable = xen_irq_enable,
1148 .safe_halt = xen_safe_halt,
1149 .halt = xen_halt,
fab58420
JF
1150#ifdef CONFIG_X86_64
1151 .adjust_exception_frame = paravirt_nop,
1152#endif
93b1eab3 1153};
5ead97c8 1154
93b1eab3 1155static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1156#ifdef CONFIG_X86_LOCAL_APIC
f87e4cac
JF
1157 .apic_write = xen_apic_write,
1158 .apic_write_atomic = xen_apic_write,
5ead97c8
JF
1159 .apic_read = xen_apic_read,
1160 .setup_boot_clock = paravirt_nop,
1161 .setup_secondary_clock = paravirt_nop,
1162 .startup_ipi_hook = paravirt_nop,
1163#endif
93b1eab3
JF
1164};
1165
1166static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1167 .pagetable_setup_start = xen_pagetable_setup_start,
1168 .pagetable_setup_done = xen_pagetable_setup_done,
1169
1170 .read_cr2 = xen_read_cr2,
1171 .write_cr2 = xen_write_cr2,
1172
1173 .read_cr3 = xen_read_cr3,
1174 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1175
1176 .flush_tlb_user = xen_flush_tlb,
1177 .flush_tlb_kernel = xen_flush_tlb,
1178 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1179 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1180
1181 .pte_update = paravirt_nop,
1182 .pte_update_defer = paravirt_nop,
1183
eba0045f
JF
1184 .pgd_alloc = __paravirt_pgd_alloc,
1185 .pgd_free = paravirt_nop,
1186
6944a9c8
JF
1187 .alloc_pte = xen_alloc_pte_init,
1188 .release_pte = xen_release_pte_init,
1189 .alloc_pmd = xen_alloc_pte_init,
1190 .alloc_pmd_clone = paravirt_nop,
1191 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1192
1193#ifdef CONFIG_HIGHPTE
1194 .kmap_atomic_pte = xen_kmap_atomic_pte,
1195#endif
5ead97c8 1196
22911b3f
JF
1197#ifdef CONFIG_X86_64
1198 .set_pte = xen_set_pte,
1199#else
851fa3c4 1200 .set_pte = xen_set_pte_init,
22911b3f 1201#endif
3b827c1b 1202 .set_pte_at = xen_set_pte_at,
e2426cf8 1203 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1204
08b882c6
JF
1205 .ptep_modify_prot_start = __ptep_modify_prot_start,
1206 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1207
3b827c1b 1208 .pte_val = xen_pte_val,
a15af1c9 1209 .pte_flags = native_pte_val,
3b827c1b
JF
1210 .pgd_val = xen_pgd_val,
1211
1212 .make_pte = xen_make_pte,
1213 .make_pgd = xen_make_pgd,
1214
f6e58732 1215#ifdef CONFIG_X86_PAE
3b827c1b
JF
1216 .set_pte_atomic = xen_set_pte_atomic,
1217 .set_pte_present = xen_set_pte_at,
3b827c1b
JF
1218 .pte_clear = xen_pte_clear,
1219 .pmd_clear = xen_pmd_clear,
f6e58732
JF
1220#endif /* CONFIG_X86_PAE */
1221 .set_pud = xen_set_pud_hyper,
3b827c1b
JF
1222
1223 .make_pmd = xen_make_pmd,
1224 .pmd_val = xen_pmd_val,
3b827c1b 1225
f6e58732
JF
1226#if PAGETABLE_LEVELS == 4
1227 .pud_val = xen_pud_val,
1228 .make_pud = xen_make_pud,
1229 .set_pgd = xen_set_pgd_hyper,
1230
1231 .alloc_pud = xen_alloc_pte_init,
1232 .release_pud = xen_release_pte_init,
1233#endif /* PAGETABLE_LEVELS == 4 */
1234
3b827c1b
JF
1235 .activate_mm = xen_activate_mm,
1236 .dup_mmap = xen_dup_mmap,
1237 .exit_mmap = xen_exit_mmap,
1238
8965c1c0
JF
1239 .lazy_mode = {
1240 .enter = paravirt_enter_lazy_mmu,
1241 .leave = xen_leave_lazy,
1242 },
aeaaa59c
JF
1243
1244 .set_fixmap = xen_set_fixmap,
5ead97c8
JF
1245};
1246
fefa629a
JF
1247static void xen_reboot(int reason)
1248{
349c709f
JF
1249 struct sched_shutdown r = { .reason = reason };
1250
fefa629a
JF
1251#ifdef CONFIG_SMP
1252 smp_send_stop();
1253#endif
1254
349c709f 1255 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1256 BUG();
1257}
1258
1259static void xen_restart(char *msg)
1260{
1261 xen_reboot(SHUTDOWN_reboot);
1262}
1263
1264static void xen_emergency_restart(void)
1265{
1266 xen_reboot(SHUTDOWN_reboot);
1267}
1268
1269static void xen_machine_halt(void)
1270{
1271 xen_reboot(SHUTDOWN_poweroff);
1272}
1273
1274static void xen_crash_shutdown(struct pt_regs *regs)
1275{
1276 xen_reboot(SHUTDOWN_crash);
1277}
1278
1279static const struct machine_ops __initdata xen_machine_ops = {
1280 .restart = xen_restart,
1281 .halt = xen_machine_halt,
1282 .power_off = xen_machine_halt,
1283 .shutdown = xen_machine_halt,
1284 .crash_shutdown = xen_crash_shutdown,
1285 .emergency_restart = xen_emergency_restart,
1286};
1287
6487673b 1288
fb1d8404
JF
1289static void __init xen_reserve_top(void)
1290{
f5d36de0 1291#ifdef CONFIG_X86_32
fb1d8404
JF
1292 unsigned long top = HYPERVISOR_VIRT_START;
1293 struct xen_platform_parameters pp;
1294
1295 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1296 top = pp.virt_start;
1297
1298 reserve_top_address(-top + 2 * PAGE_SIZE);
f5d36de0 1299#endif /* CONFIG_X86_32 */
fb1d8404
JF
1300}
1301
084a2a4e
JF
1302#ifdef CONFIG_X86_64
1303/*
1304 * Like __va(), but returns address in the kernel mapping (which is
1305 * all we have until the physical memory mapping has been set up.
1306 */
1307static void *__ka(phys_addr_t paddr)
1308{
1309 return (void *)(paddr + __START_KERNEL_map);
1310}
1311
1312/* Convert a machine address to physical address */
1313static unsigned long m2p(phys_addr_t maddr)
1314{
1315 phys_addr_t paddr;
1316
1317 maddr &= PTE_MASK;
1318 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1319
1320 return paddr;
1321}
1322
1323/* Convert a machine address to kernel virtual */
1324static void *m2v(phys_addr_t maddr)
1325{
1326 return __ka(m2p(maddr));
1327}
1328
1329static void walk(pgd_t *pgd, unsigned long addr)
1330{
1331 unsigned l4idx = pgd_index(addr);
1332 unsigned l3idx = pud_index(addr);
1333 unsigned l2idx = pmd_index(addr);
1334 unsigned l1idx = pte_index(addr);
1335 pgd_t l4;
1336 pud_t l3;
1337 pmd_t l2;
1338 pte_t l1;
1339
1340 xen_raw_printk("walk %p, %lx -> %d %d %d %d\n",
1341 pgd, addr, l4idx, l3idx, l2idx, l1idx);
1342
1343 l4 = pgd[l4idx];
1344 xen_raw_printk(" l4: %016lx\n", l4.pgd);
1345 xen_raw_printk(" %016lx\n", pgd_val(l4));
1346
1347 l3 = ((pud_t *)(m2v(l4.pgd)))[l3idx];
1348 xen_raw_printk(" l3: %016lx\n", l3.pud);
1349 xen_raw_printk(" %016lx\n", pud_val(l3));
1350
1351 l2 = ((pmd_t *)(m2v(l3.pud)))[l2idx];
1352 xen_raw_printk(" l2: %016lx\n", l2.pmd);
1353 xen_raw_printk(" %016lx\n", pmd_val(l2));
1354
1355 l1 = ((pte_t *)(m2v(l2.pmd)))[l1idx];
1356 xen_raw_printk(" l1: %016lx\n", l1.pte);
1357 xen_raw_printk(" %016lx\n", pte_val(l1));
1358}
1359
1360static void set_page_prot(void *addr, pgprot_t prot)
1361{
1362 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1363 pte_t pte = pfn_pte(pfn, prot);
1364
1365 xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016x pte=%016x\n",
1366 addr, pfn, get_phys_to_machine(pfn),
1367 pgprot_val(prot), pte.pte);
1368
1369 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1370 BUG();
1371}
1372
1373static void convert_pfn_mfn(void *v)
1374{
1375 pte_t *pte = v;
1376 int i;
1377
1378 /* All levels are converted the same way, so just treat them
1379 as ptes. */
1380 for(i = 0; i < PTRS_PER_PTE; i++)
1381 pte[i] = xen_make_pte(pte[i].pte);
1382}
1383
d114e198
JF
1384/*
1385 * Identity map, in addition to plain kernel map. This needs to be
1386 * large enough to allocate page table pages to allocate the rest.
1387 * Each page can map 2MB.
1388 */
1389static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
1390
1391static __init void xen_map_identity_early(unsigned long max_pfn)
1392{
1393 unsigned pmdidx, pteidx;
1394 unsigned ident_pte;
1395 unsigned long pfn;
1396
1397 ident_pte = 0;
1398 pfn = 0;
1399 for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1400 pte_t *pte_page;
1401
1402 BUG_ON(level2_ident_pgt[pmdidx].pmd != level2_kernel_pgt[pmdidx].pmd);
1403
1404 /* Reuse or allocate a page of ptes */
1405 if (pmd_present(level2_ident_pgt[pmdidx]))
1406 pte_page = m2v(level2_ident_pgt[pmdidx].pmd);
1407 else {
1408 /* Check for free pte pages */
1409 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1410 break;
1411
1412 pte_page = &level1_ident_pgt[ident_pte];
1413 ident_pte += PTRS_PER_PTE;
1414
1415 /* Install new l1 in l2(s) */
1416 level2_ident_pgt[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1417 level2_kernel_pgt[pmdidx] = level2_ident_pgt[pmdidx];
1418 }
1419
1420 /* Install mappings */
1421 for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1422 pte_t pte;
1423
1424 if (pfn > max_pfn_mapped)
1425 max_pfn_mapped = pfn;
1426
1427 if (!pte_none(pte_page[pteidx]))
1428 continue;
1429
1430 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1431 pte_page[pteidx] = pte;
1432 }
1433 }
1434
1435 for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1436 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1437}
1438
084a2a4e
JF
1439/*
1440 * Set up the inital kernel pagetable.
1441 *
1442 * We can construct this by grafting the Xen provided pagetable into
1443 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1444 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1445 * means that only the kernel has a physical mapping to start with -
1446 * but that's enough to get __va working. We need to fill in the rest
1447 * of the physical mapping once some sort of allocator has been set
1448 * up.
1449 */
d114e198 1450static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e
JF
1451{
1452 pud_t *l3;
1453 pmd_t *l2;
1454
1455 /* Zap identity mapping */
1456 init_level4_pgt[0] = __pgd(0);
1457
1458 /* Pre-constructed entries are in pfn, so convert to mfn */
1459 convert_pfn_mfn(init_level4_pgt);
1460 convert_pfn_mfn(level3_ident_pgt);
1461 convert_pfn_mfn(level3_kernel_pgt);
1462
1463 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1464 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1465
1466 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1467 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1468
1469 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1470 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1471 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1472
d114e198
JF
1473 /* Set up identity map */
1474 xen_map_identity_early(max_pfn);
1475
084a2a4e
JF
1476 /* Make pagetable pieces RO */
1477 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1478 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1479 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1480 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1481 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1482 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1483
1484 /* Pin down new L4 */
d114e198 1485 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa_symbol(init_level4_pgt)));
084a2a4e
JF
1486
1487 /* Unpin Xen-provided one */
1488 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1489
1490 /* Switch over */
1491 pgd = init_level4_pgt;
1492 xen_write_cr3(__pa(pgd));
1493
d114e198
JF
1494 reserve_early(__pa(xen_start_info->pt_base),
1495 __pa(xen_start_info->pt_base +
1496 xen_start_info->nr_pt_frames * PAGE_SIZE),
1497 "XEN PAGETABLES");
084a2a4e
JF
1498
1499 return pgd;
1500}
1501#else
d114e198 1502static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e
JF
1503{
1504 init_pg_tables_start = __pa(pgd);
1505 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1506 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1507
d114e198
JF
1508 x86_write_percpu(xen_cr3, __pa(pgd));
1509 x86_write_percpu(xen_current_cr3, __pa(pgd));
1510
084a2a4e
JF
1511 return pgd;
1512}
1513#endif /* CONFIG_X86_64 */
1514
5ead97c8
JF
1515/* First C function to be called on Xen boot */
1516asmlinkage void __init xen_start_kernel(void)
1517{
1518 pgd_t *pgd;
1519
1520 if (!xen_start_info)
1521 return;
1522
7999f4b4 1523 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1524
e57778a1
JF
1525 xen_setup_features();
1526
5ead97c8 1527 /* Install Xen paravirt ops */
93b1eab3
JF
1528 pv_info = xen_info;
1529 pv_init_ops = xen_init_ops;
1530 pv_time_ops = xen_time_ops;
1531 pv_cpu_ops = xen_cpu_ops;
1532 pv_irq_ops = xen_irq_ops;
1533 pv_apic_ops = xen_apic_ops;
1534 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1535
e57778a1
JF
1536 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1537 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1538 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1539 }
1540
fefa629a
JF
1541 machine_ops = xen_machine_ops;
1542
f5d36de0
JF
1543#ifdef CONFIG_X86_64
1544 /* Disable until direct per-cpu data access. */
1545 have_vcpu_info_placement = 0;
5b09b287 1546 x86_64_init_pda();
f5d36de0
JF
1547#endif
1548
a9e7062d 1549 xen_smp_init();
5ead97c8 1550
5ead97c8
JF
1551 /* Get mfn list */
1552 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1553 xen_build_dynamic_phys_to_machine();
5ead97c8
JF
1554
1555 pgd = (pgd_t *)xen_start_info->pt_base;
1556
084a2a4e
JF
1557 /* Prevent unwanted bits from being set in PTEs. */
1558 __supported_pte_mask &= ~_PAGE_GLOBAL;
1559 if (!is_initial_xendomain())
1560 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1561
1562 /* Don't do the full vcpu_info placement stuff until we have a
1563 possible map and a non-dummy shared_info. */
1564 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
1565
1566 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1567 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
5ead97c8 1568
084a2a4e 1569 init_mm.pgd = pgd;
5ead97c8
JF
1570
1571 /* keep using Xen gdt for now; no urgent need to change it */
1572
93b1eab3 1573 pv_info.kernel_rpl = 1;
5ead97c8 1574 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1575 pv_info.kernel_rpl = 0;
5ead97c8
JF
1576
1577 /* set the limit of our address space */
fb1d8404 1578 xen_reserve_top();
5ead97c8 1579
7d087b68 1580#ifdef CONFIG_X86_32
5ead97c8
JF
1581 /* set up basic CPUID stuff */
1582 cpu_detect(&new_cpu_data);
1583 new_cpu_data.hard_math = 1;
1584 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1585#endif
5ead97c8
JF
1586
1587 /* Poke various useful things into boot_params */
30c82645
PA
1588 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1589 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1590 ? __pa(xen_start_info->mod_start) : 0;
1591 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
5ead97c8 1592
9e124fe1 1593 if (!is_initial_xendomain()) {
83abc70a 1594 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1595 add_preferred_console("tty", 0, NULL);
b8c2d3df 1596 add_preferred_console("hvc", 0, NULL);
9e124fe1 1597 }
b8c2d3df 1598
084a2a4e
JF
1599 xen_raw_console_write("about to get started...\n");
1600
1601#if 0
1602 xen_raw_printk("&boot_params=%p __pa(&boot_params)=%lx __va(__pa(&boot_params))=%lx\n",
1603 &boot_params, __pa_symbol(&boot_params),
1604 __va(__pa_symbol(&boot_params)));
1605
1606 walk(pgd, &boot_params);
1607 walk(pgd, __va(__pa(&boot_params)));
1608#endif
1609
5ead97c8 1610 /* Start the world */
f5d36de0 1611#ifdef CONFIG_X86_32
f0d43100 1612 i386_start_kernel();
f5d36de0 1613#else
084a2a4e 1614 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1615#endif
5ead97c8 1616}
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