Merge branch 'x86/spinlocks' into x86/xen
[deliverable/linux.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
084a2a4e 36#include <xen/hvc-console.h>
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37
38#include <asm/paravirt.h>
39#include <asm/page.h>
40#include <asm/xen/hypercall.h>
41#include <asm/xen/hypervisor.h>
42#include <asm/fixmap.h>
43#include <asm/processor.h>
1153968a 44#include <asm/msr-index.h>
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45#include <asm/setup.h>
46#include <asm/desc.h>
47#include <asm/pgtable.h>
f87e4cac 48#include <asm/tlbflush.h>
fefa629a 49#include <asm/reboot.h>
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50
51#include "xen-ops.h"
3b827c1b 52#include "mmu.h"
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53#include "multicalls.h"
54
55EXPORT_SYMBOL_GPL(hypercall_page);
56
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57DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
58DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
9f79991d 59
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60/*
61 * Identity map, in addition to plain kernel map. This needs to be
62 * large enough to allocate page table pages to allocate the rest.
63 * Each page can map 2MB.
64 */
65static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
66
67#ifdef CONFIG_X86_64
68/* l3 pud for userspace vsyscall mapping */
69static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
70#endif /* CONFIG_X86_64 */
71
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72/*
73 * Note about cr3 (pagetable base) values:
74 *
75 * xen_cr3 contains the current logical cr3 value; it contains the
76 * last set cr3. This may not be the current effective cr3, because
77 * its update may be being lazily deferred. However, a vcpu looking
78 * at its own cr3 can use this value knowing that it everything will
79 * be self-consistent.
80 *
81 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
82 * hypercall to set the vcpu cr3 is complete (so it may be a little
83 * out of date, but it will never be set early). If one vcpu is
84 * looking at another vcpu's cr3 value, it should use this variable.
85 */
86DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
87DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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88
89struct start_info *xen_start_info;
90EXPORT_SYMBOL_GPL(xen_start_info);
91
a0d695c8 92struct shared_info xen_dummy_shared_info;
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93
94/*
95 * Point at some empty memory to start with. We map the real shared_info
96 * page as soon as fixmap is up and running.
97 */
a0d695c8 98struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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99
100/*
101 * Flag to determine whether vcpu info placement is available on all
102 * VCPUs. We assume it is to start with, and then set it to zero on
103 * the first failure. This is because it can succeed on some VCPUs
104 * and not others, since it can involve hypervisor memory allocation,
105 * or because the guest failed to guarantee all the appropriate
106 * constraints on all VCPUs (ie buffer can't cross a page boundary).
107 *
108 * Note that any particular CPU may be using a placed vcpu structure,
109 * but we can only optimise if the all are.
110 *
111 * 0: not available, 1: available
112 */
04c44a08 113static int have_vcpu_info_placement = 1;
60223a32 114
9c7a7942 115static void xen_vcpu_setup(int cpu)
5ead97c8 116{
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117 struct vcpu_register_vcpu_info info;
118 int err;
119 struct vcpu_info *vcpup;
120
a0d695c8 121 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 122 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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123
124 if (!have_vcpu_info_placement)
125 return; /* already tested, not available */
126
127 vcpup = &per_cpu(xen_vcpu_info, cpu);
128
129 info.mfn = virt_to_mfn(vcpup);
130 info.offset = offset_in_page(vcpup);
131
e3d26976 132 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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133 cpu, vcpup, info.mfn, info.offset);
134
135 /* Check to see if the hypervisor will put the vcpu_info
136 structure where we want it, which allows direct access via
137 a percpu-variable. */
138 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
139
140 if (err) {
141 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
142 have_vcpu_info_placement = 0;
143 } else {
144 /* This cpu is using the registered vcpu info, even if
145 later ones fail to. */
146 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 147
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148 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
149 cpu, vcpup);
150 }
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151}
152
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153/*
154 * On restore, set the vcpu placement up again.
155 * If it fails, then we're in a bad state, since
156 * we can't back out from using it...
157 */
158void xen_vcpu_restore(void)
159{
160 if (have_vcpu_info_placement) {
161 int cpu;
162
163 for_each_online_cpu(cpu) {
164 bool other_cpu = (cpu != smp_processor_id());
165
166 if (other_cpu &&
167 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
168 BUG();
169
170 xen_vcpu_setup(cpu);
171
172 if (other_cpu &&
173 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
174 BUG();
175 }
176
177 BUG_ON(!have_vcpu_info_placement);
178 }
179}
180
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181static void __init xen_banner(void)
182{
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183 unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
184 struct xen_extraversion extra;
185 HYPERVISOR_xen_version(XENVER_extraversion, &extra);
186
5ead97c8 187 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 188 pv_info.name);
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189 printk(KERN_INFO "Xen version: %d.%d%s%s\n",
190 version >> 16, version & 0xffff, extra.extraversion,
e57778a1 191 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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192}
193
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PA
194static void xen_cpuid(unsigned int *ax, unsigned int *bx,
195 unsigned int *cx, unsigned int *dx)
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196{
197 unsigned maskedx = ~0;
198
199 /*
200 * Mask out inconvenient features, to try and disable as many
201 * unsupported kernel subsystems as possible.
202 */
65ea5b03 203 if (*ax == 1)
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204 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
205 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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206 (1 << X86_FEATURE_MCE) | /* disable MCE */
207 (1 << X86_FEATURE_MCA) | /* disable MCA */
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208 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
209
210 asm(XEN_EMULATE_PREFIX "cpuid"
65ea5b03
PA
211 : "=a" (*ax),
212 "=b" (*bx),
213 "=c" (*cx),
214 "=d" (*dx)
215 : "0" (*ax), "2" (*cx));
216 *dx &= maskedx;
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217}
218
219static void xen_set_debugreg(int reg, unsigned long val)
220{
221 HYPERVISOR_set_debugreg(reg, val);
222}
223
224static unsigned long xen_get_debugreg(int reg)
225{
226 return HYPERVISOR_get_debugreg(reg);
227}
228
229static unsigned long xen_save_fl(void)
230{
231 struct vcpu_info *vcpu;
232 unsigned long flags;
233
5ead97c8 234 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 235
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236 /* flag has opposite sense of mask */
237 flags = !vcpu->evtchn_upcall_mask;
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238
239 /* convert to IF type flag
240 -0 -> 0x00000000
241 -1 -> 0xffffffff
242 */
243 return (-flags) & X86_EFLAGS_IF;
244}
245
246static void xen_restore_fl(unsigned long flags)
247{
248 struct vcpu_info *vcpu;
249
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250 /* convert from IF type flag */
251 flags = !(flags & X86_EFLAGS_IF);
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252
253 /* There's a one instruction preempt window here. We need to
254 make sure we're don't switch CPUs between getting the vcpu
255 pointer and updating the mask. */
256 preempt_disable();
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257 vcpu = x86_read_percpu(xen_vcpu);
258 vcpu->evtchn_upcall_mask = flags;
f120f13e 259 preempt_enable_no_resched();
5ead97c8 260
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261 /* Doesn't matter if we get preempted here, because any
262 pending event will get dealt with anyway. */
5ead97c8 263
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264 if (flags == 0) {
265 preempt_check_resched();
266 barrier(); /* unmask then check (avoid races) */
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267 if (unlikely(vcpu->evtchn_upcall_pending))
268 force_evtchn_callback();
f120f13e 269 }
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270}
271
272static void xen_irq_disable(void)
273{
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274 /* There's a one instruction preempt window here. We need to
275 make sure we're don't switch CPUs between getting the vcpu
276 pointer and updating the mask. */
5ead97c8 277 preempt_disable();
f120f13e 278 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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279 preempt_enable_no_resched();
280}
281
282static void xen_irq_enable(void)
283{
284 struct vcpu_info *vcpu;
285
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286 /* We don't need to worry about being preempted here, since
287 either a) interrupts are disabled, so no preemption, or b)
288 the caller is confused and is trying to re-enable interrupts
289 on an indeterminate processor. */
290
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291 vcpu = x86_read_percpu(xen_vcpu);
292 vcpu->evtchn_upcall_mask = 0;
293
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294 /* Doesn't matter if we get preempted here, because any
295 pending event will get dealt with anyway. */
5ead97c8 296
f120f13e 297 barrier(); /* unmask then check (avoid races) */
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298 if (unlikely(vcpu->evtchn_upcall_pending))
299 force_evtchn_callback();
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300}
301
302static void xen_safe_halt(void)
303{
304 /* Blocking includes an implicit local_irq_enable(). */
349c709f 305 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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306 BUG();
307}
308
309static void xen_halt(void)
310{
311 if (irqs_disabled())
312 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
313 else
314 xen_safe_halt();
315}
316
8965c1c0 317static void xen_leave_lazy(void)
5ead97c8 318{
8965c1c0 319 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 320 xen_mc_flush();
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321}
322
323static unsigned long xen_store_tr(void)
324{
325 return 0;
326}
327
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328/*
329 * If 'v' is a vmalloc mapping, then find the linear mapping of the
330 * page (if any) and also set its protections to match:
331 */
332static void set_aliased_prot(void *v, pgprot_t prot)
333{
334 int level;
335 pte_t *ptep;
336 pte_t pte;
337 unsigned long pfn;
338 struct page *page;
339
340 ptep = lookup_address((unsigned long)v, &level);
341 BUG_ON(ptep == NULL);
342
343 pfn = pte_pfn(*ptep);
344 page = pfn_to_page(pfn);
345
346 pte = pfn_pte(pfn, prot);
347
348 if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
349 BUG();
350
351 if (!PageHighMem(page)) {
352 void *av = __va(PFN_PHYS(pfn));
353
354 if (av != v)
355 if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
356 BUG();
357 } else
358 kmap_flush_unused();
359}
360
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361static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
362{
a05d2eba 363 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
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364 int i;
365
a05d2eba
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366 for(i = 0; i < entries; i += entries_per_page)
367 set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
38ffbe66
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368}
369
370static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
371{
a05d2eba 372 const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
38ffbe66
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373 int i;
374
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375 for(i = 0; i < entries; i += entries_per_page)
376 set_aliased_prot(ldt + i, PAGE_KERNEL);
38ffbe66
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377}
378
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379static void xen_set_ldt(const void *addr, unsigned entries)
380{
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381 struct mmuext_op *op;
382 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
383
384 op = mcs.args;
385 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 386 op->arg1.linear_addr = (unsigned long)addr;
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387 op->arg2.nr_ents = entries;
388
389 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
390
391 xen_mc_issue(PARAVIRT_LAZY_CPU);
392}
393
6b68f01b 394static void xen_load_gdt(const struct desc_ptr *dtr)
5ead97c8
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395{
396 unsigned long *frames;
397 unsigned long va = dtr->address;
398 unsigned int size = dtr->size + 1;
399 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
400 int f;
401 struct multicall_space mcs;
402
403 /* A GDT can be up to 64k in size, which corresponds to 8192
404 8-byte entries, or 16 4k pages.. */
405
406 BUG_ON(size > 65536);
407 BUG_ON(va & ~PAGE_MASK);
408
409 mcs = xen_mc_entry(sizeof(*frames) * pages);
410 frames = mcs.args;
411
412 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
413 frames[f] = virt_to_mfn(va);
414 make_lowmem_page_readonly((void *)va);
415 }
416
417 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
418
419 xen_mc_issue(PARAVIRT_LAZY_CPU);
420}
421
422static void load_TLS_descriptor(struct thread_struct *t,
423 unsigned int cpu, unsigned int i)
424{
425 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
426 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
427 struct multicall_space mc = __xen_mc_entry(0);
428
429 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
430}
431
432static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
433{
8b84ad94
JF
434 /*
435 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
436 * it means we're in a context switch, and %gs has just been
437 * saved. This means we can zero it out to prevent faults on
438 * exit from the hypervisor if the next process has no %gs.
439 * Either way, it has been saved, and the new value will get
440 * loaded properly. This will go away as soon as Xen has been
441 * modified to not save/restore %gs for normal hypercalls.
8a95408e
EH
442 *
443 * On x86_64, this hack is not used for %gs, because gs points
444 * to KERNEL_GS_BASE (and uses it for PDA references), so we
445 * must not zero %gs on x86_64
446 *
447 * For x86_64, we need to zero %fs, otherwise we may get an
448 * exception between the new %fs descriptor being loaded and
449 * %fs being effectively cleared at __switch_to().
8b84ad94 450 */
8a95408e
EH
451 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
452#ifdef CONFIG_X86_32
8b84ad94 453 loadsegment(gs, 0);
8a95408e
EH
454#else
455 loadsegment(fs, 0);
456#endif
457 }
458
459 xen_mc_batch();
460
461 load_TLS_descriptor(t, cpu, 0);
462 load_TLS_descriptor(t, cpu, 1);
463 load_TLS_descriptor(t, cpu, 2);
464
465 xen_mc_issue(PARAVIRT_LAZY_CPU);
5ead97c8
JF
466}
467
a8fc1089
EH
468#ifdef CONFIG_X86_64
469static void xen_load_gs_index(unsigned int idx)
470{
471 if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
472 BUG();
5ead97c8 473}
a8fc1089 474#endif
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475
476static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 477 const void *ptr)
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478{
479 unsigned long lp = (unsigned long)&dt[entrynum];
a05d2eba 480 xmaddr_t mach_lp = arbitrary_virt_to_machine(lp);
75b8bb3e 481 u64 entry = *(u64 *)ptr;
5ead97c8 482
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483 preempt_disable();
484
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485 xen_mc_flush();
486 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
487 BUG();
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488
489 preempt_enable();
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490}
491
e176d367 492static int cvt_gate_to_trap(int vector, const gate_desc *val,
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493 struct trap_info *info)
494{
e176d367 495 if (val->type != 0xf && val->type != 0xe)
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496 return 0;
497
498 info->vector = vector;
e176d367
EH
499 info->address = gate_offset(*val);
500 info->cs = gate_segment(*val);
501 info->flags = val->dpl;
5ead97c8 502 /* interrupt gates clear IF */
e176d367 503 if (val->type == 0xe)
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504 info->flags |= 4;
505
506 return 1;
507}
508
509/* Locations of each CPU's IDT */
6b68f01b 510static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
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511
512/* Set an IDT entry. If the entry is part of the current IDT, then
513 also update Xen. */
8d947344 514static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 515{
5ead97c8 516 unsigned long p = (unsigned long)&dt[entrynum];
f120f13e
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517 unsigned long start, end;
518
519 preempt_disable();
520
521 start = __get_cpu_var(idt_desc).address;
522 end = start + __get_cpu_var(idt_desc).size + 1;
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523
524 xen_mc_flush();
525
8d947344 526 native_write_idt_entry(dt, entrynum, g);
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527
528 if (p >= start && (p + 8) <= end) {
529 struct trap_info info[2];
530
531 info[1].address = 0;
532
e176d367 533 if (cvt_gate_to_trap(entrynum, g, &info[0]))
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534 if (HYPERVISOR_set_trap_table(info))
535 BUG();
536 }
f120f13e
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537
538 preempt_enable();
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539}
540
6b68f01b 541static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 542 struct trap_info *traps)
5ead97c8 543{
5ead97c8
JF
544 unsigned in, out, count;
545
e176d367 546 count = (desc->size+1) / sizeof(gate_desc);
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JF
547 BUG_ON(count > 256);
548
5ead97c8 549 for (in = out = 0; in < count; in++) {
e176d367 550 gate_desc *entry = (gate_desc*)(desc->address) + in;
5ead97c8 551
e176d367 552 if (cvt_gate_to_trap(in, entry, &traps[out]))
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553 out++;
554 }
555 traps[out].address = 0;
f87e4cac
JF
556}
557
558void xen_copy_trap_info(struct trap_info *traps)
559{
6b68f01b 560 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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JF
561
562 xen_convert_trap_info(desc, traps);
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JF
563}
564
565/* Load a new IDT into Xen. In principle this can be per-CPU, so we
566 hold a spinlock to protect the static traps[] array (static because
567 it avoids allocation, and saves stack space). */
6b68f01b 568static void xen_load_idt(const struct desc_ptr *desc)
f87e4cac
JF
569{
570 static DEFINE_SPINLOCK(lock);
571 static struct trap_info traps[257];
f87e4cac
JF
572
573 spin_lock(&lock);
574
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575 __get_cpu_var(idt_desc) = *desc;
576
f87e4cac 577 xen_convert_trap_info(desc, traps);
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578
579 xen_mc_flush();
580 if (HYPERVISOR_set_trap_table(traps))
581 BUG();
582
583 spin_unlock(&lock);
584}
585
586/* Write a GDT descriptor entry. Ignore LDT descriptors, since
587 they're handled differently. */
588static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 589 const void *desc, int type)
5ead97c8 590{
f120f13e
JF
591 preempt_disable();
592
014b15be
GOC
593 switch (type) {
594 case DESC_LDT:
595 case DESC_TSS:
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596 /* ignore */
597 break;
598
599 default: {
600 xmaddr_t maddr = virt_to_machine(&dt[entry]);
5ead97c8
JF
601
602 xen_mc_flush();
014b15be 603 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
5ead97c8
JF
604 BUG();
605 }
606
607 }
f120f13e
JF
608
609 preempt_enable();
5ead97c8
JF
610}
611
faca6227 612static void xen_load_sp0(struct tss_struct *tss,
a05d2eba 613 struct thread_struct *thread)
5ead97c8
JF
614{
615 struct multicall_space mcs = xen_mc_entry(0);
faca6227 616 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
5ead97c8
JF
617 xen_mc_issue(PARAVIRT_LAZY_CPU);
618}
619
620static void xen_set_iopl_mask(unsigned mask)
621{
622 struct physdev_set_iopl set_iopl;
623
624 /* Force the change at ring 0. */
625 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
626 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
627}
628
629static void xen_io_delay(void)
630{
631}
632
633#ifdef CONFIG_X86_LOCAL_APIC
42e0a9aa 634static u32 xen_apic_read(unsigned long reg)
5ead97c8
JF
635{
636 return 0;
637}
f87e4cac 638
42e0a9aa 639static void xen_apic_write(unsigned long reg, u32 val)
f87e4cac
JF
640{
641 /* Warn to see if there's any stray references */
642 WARN_ON(1);
643}
5ead97c8
JF
644#endif
645
646static void xen_flush_tlb(void)
647{
d66bf8fc 648 struct mmuext_op *op;
41e332b2
JF
649 struct multicall_space mcs;
650
651 preempt_disable();
652
653 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 654
d66bf8fc
JF
655 op = mcs.args;
656 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
657 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
658
659 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
660
661 preempt_enable();
5ead97c8
JF
662}
663
664static void xen_flush_tlb_single(unsigned long addr)
665{
d66bf8fc 666 struct mmuext_op *op;
41e332b2
JF
667 struct multicall_space mcs;
668
669 preempt_disable();
5ead97c8 670
41e332b2 671 mcs = xen_mc_entry(sizeof(*op));
d66bf8fc
JF
672 op = mcs.args;
673 op->cmd = MMUEXT_INVLPG_LOCAL;
674 op->arg1.linear_addr = addr & PAGE_MASK;
675 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
676
677 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
678
679 preempt_enable();
5ead97c8
JF
680}
681
f87e4cac
JF
682static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
683 unsigned long va)
684{
d66bf8fc
JF
685 struct {
686 struct mmuext_op op;
687 cpumask_t mask;
688 } *args;
f87e4cac 689 cpumask_t cpumask = *cpus;
d66bf8fc 690 struct multicall_space mcs;
f87e4cac
JF
691
692 /*
693 * A couple of (to be removed) sanity checks:
694 *
695 * - current CPU must not be in mask
696 * - mask must exist :)
697 */
698 BUG_ON(cpus_empty(cpumask));
699 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
700 BUG_ON(!mm);
701
702 /* If a CPU which we ran on has gone down, OK. */
703 cpus_and(cpumask, cpumask, cpu_online_map);
704 if (cpus_empty(cpumask))
705 return;
706
d66bf8fc
JF
707 mcs = xen_mc_entry(sizeof(*args));
708 args = mcs.args;
709 args->mask = cpumask;
710 args->op.arg2.vcpumask = &args->mask;
711
f87e4cac 712 if (va == TLB_FLUSH_ALL) {
d66bf8fc 713 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 714 } else {
d66bf8fc
JF
715 args->op.cmd = MMUEXT_INVLPG_MULTI;
716 args->op.arg1.linear_addr = va;
f87e4cac
JF
717 }
718
d66bf8fc
JF
719 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
720
721 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
722}
723
7b1333aa
JF
724static void xen_clts(void)
725{
726 struct multicall_space mcs;
727
728 mcs = xen_mc_entry(0);
729
730 MULTI_fpu_taskswitch(mcs.mc, 0);
731
732 xen_mc_issue(PARAVIRT_LAZY_CPU);
733}
734
735static void xen_write_cr0(unsigned long cr0)
736{
737 struct multicall_space mcs;
738
739 /* Only pay attention to cr0.TS; everything else is
740 ignored. */
741 mcs = xen_mc_entry(0);
742
743 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
744
745 xen_mc_issue(PARAVIRT_LAZY_CPU);
746}
747
60223a32
JF
748static void xen_write_cr2(unsigned long cr2)
749{
750 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
751}
752
5ead97c8
JF
753static unsigned long xen_read_cr2(void)
754{
755 return x86_read_percpu(xen_vcpu)->arch.cr2;
756}
757
60223a32
JF
758static unsigned long xen_read_cr2_direct(void)
759{
760 return x86_read_percpu(xen_vcpu_info.arch.cr2);
761}
762
5ead97c8
JF
763static void xen_write_cr4(unsigned long cr4)
764{
2956a351
JF
765 cr4 &= ~X86_CR4_PGE;
766 cr4 &= ~X86_CR4_PSE;
767
768 native_write_cr4(cr4);
5ead97c8
JF
769}
770
5ead97c8
JF
771static unsigned long xen_read_cr3(void)
772{
773 return x86_read_percpu(xen_cr3);
774}
775
9f79991d
JF
776static void set_current_cr3(void *v)
777{
778 x86_write_percpu(xen_current_cr3, (unsigned long)v);
779}
780
d6182fbf 781static void __xen_write_cr3(bool kernel, unsigned long cr3)
5ead97c8 782{
9f79991d
JF
783 struct mmuext_op *op;
784 struct multicall_space mcs;
d6182fbf 785 unsigned long mfn;
9f79991d 786
d6182fbf
JF
787 if (cr3)
788 mfn = pfn_to_mfn(PFN_DOWN(cr3));
789 else
790 mfn = 0;
f120f13e 791
d6182fbf 792 WARN_ON(mfn == 0 && kernel);
5ead97c8 793
d6182fbf 794 mcs = __xen_mc_entry(sizeof(*op));
5ead97c8 795
9f79991d 796 op = mcs.args;
d6182fbf 797 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
9f79991d 798 op->arg1.mfn = mfn;
5ead97c8 799
9f79991d 800 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 801
d6182fbf
JF
802 if (kernel) {
803 x86_write_percpu(xen_cr3, cr3);
804
805 /* Update xen_current_cr3 once the batch has actually
806 been submitted. */
807 xen_mc_callback(set_current_cr3, (void *)cr3);
808 }
809}
810
811static void xen_write_cr3(unsigned long cr3)
812{
813 BUG_ON(preemptible());
814
815 xen_mc_batch(); /* disables interrupts */
816
817 /* Update while interrupts are disabled, so its atomic with
818 respect to ipis */
819 x86_write_percpu(xen_cr3, cr3);
820
821 __xen_write_cr3(true, cr3);
822
823#ifdef CONFIG_X86_64
824 {
825 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
826 if (user_pgd)
827 __xen_write_cr3(false, __pa(user_pgd));
828 else
829 __xen_write_cr3(false, 0);
830 }
831#endif
5ead97c8 832
9f79991d 833 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
834}
835
1153968a
JF
836static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
837{
838 int ret;
839
840 ret = 0;
841
842 switch(msr) {
843#ifdef CONFIG_X86_64
844 unsigned which;
845 u64 base;
846
847 case MSR_FS_BASE: which = SEGBASE_FS; goto set;
848 case MSR_KERNEL_GS_BASE: which = SEGBASE_GS_USER; goto set;
849 case MSR_GS_BASE: which = SEGBASE_GS_KERNEL; goto set;
850
851 set:
852 base = ((u64)high << 32) | low;
853 if (HYPERVISOR_set_segment_base(which, base) != 0)
854 ret = -EFAULT;
855 break;
856#endif
d89961e2
JF
857
858 case MSR_STAR:
859 case MSR_CSTAR:
860 case MSR_LSTAR:
861 case MSR_SYSCALL_MASK:
862 case MSR_IA32_SYSENTER_CS:
863 case MSR_IA32_SYSENTER_ESP:
864 case MSR_IA32_SYSENTER_EIP:
865 /* Fast syscall setup is all done in hypercalls, so
866 these are all ignored. Stub them out here to stop
867 Xen console noise. */
868 break;
869
1153968a
JF
870 default:
871 ret = native_write_msr_safe(msr, low, high);
872 }
873
874 return ret;
875}
876
f4f97b3e
JF
877/* Early in boot, while setting up the initial pagetable, assume
878 everything is pinned. */
6944a9c8 879static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 880{
af7ae3b9 881#ifdef CONFIG_FLATMEM
f4f97b3e 882 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 883#endif
5ead97c8
JF
884 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
885}
886
6944a9c8 887/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 888 only init_mm and anything attached to that is pinned. */
6944a9c8 889static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
890{
891 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
892}
893
f6433706 894static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
895{
896 struct mmuext_op op;
f6433706 897 op.cmd = cmd;
74260714
JF
898 op.arg1.mfn = pfn_to_mfn(pfn);
899 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
900 BUG();
901}
902
f4f97b3e
JF
903/* This needs to make sure the new pte page is pinned iff its being
904 attached to a pinned pagetable. */
1c70e9bd 905static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 906{
f4f97b3e 907 struct page *page = pfn_to_page(pfn);
5ead97c8 908
f4f97b3e
JF
909 if (PagePinned(virt_to_page(mm->pgd))) {
910 SetPagePinned(page);
911
74260714 912 if (!PageHighMem(page)) {
f4f97b3e 913 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
914 if (level == PT_PTE)
915 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 916 } else
f4f97b3e
JF
917 /* make sure there are no stray mappings of
918 this page */
919 kmap_flush_unused();
920 }
5ead97c8
JF
921}
922
6944a9c8 923static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 924{
f6433706 925 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
926}
927
6944a9c8 928static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 929{
f6433706 930 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
931}
932
d6182fbf
JF
933static int xen_pgd_alloc(struct mm_struct *mm)
934{
935 pgd_t *pgd = mm->pgd;
936 int ret = 0;
937
938 BUG_ON(PagePinned(virt_to_page(pgd)));
939
940#ifdef CONFIG_X86_64
941 {
942 struct page *page = virt_to_page(pgd);
bf18bf94 943 pgd_t *user_pgd;
d6182fbf
JF
944
945 BUG_ON(page->private != 0);
946
bf18bf94
JF
947 ret = -ENOMEM;
948
949 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
950 page->private = (unsigned long)user_pgd;
951
952 if (user_pgd != NULL) {
953 user_pgd[pgd_index(VSYSCALL_START)] =
954 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
955 ret = 0;
956 }
d6182fbf
JF
957
958 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
959 }
960#endif
961
962 return ret;
963}
964
965static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
966{
967#ifdef CONFIG_X86_64
968 pgd_t *user_pgd = xen_get_user_pgd(pgd);
969
970 if (user_pgd)
971 free_page((unsigned long)user_pgd);
972#endif
973}
974
f4f97b3e 975/* This should never happen until we're OK to use struct page */
f6433706 976static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 977{
f4f97b3e
JF
978 struct page *page = pfn_to_page(pfn);
979
980 if (PagePinned(page)) {
74260714 981 if (!PageHighMem(page)) {
a684d69d
MM
982 if (level == PT_PTE)
983 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 984 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 985 }
c946c7de 986 ClearPagePinned(page);
f4f97b3e 987 }
5ead97c8
JF
988}
989
6944a9c8 990static void xen_release_pte(u32 pfn)
f6433706
MM
991{
992 xen_release_ptpage(pfn, PT_PTE);
993}
994
6944a9c8 995static void xen_release_pmd(u32 pfn)
f6433706
MM
996{
997 xen_release_ptpage(pfn, PT_PMD);
998}
999
f6e58732
JF
1000#if PAGETABLE_LEVELS == 4
1001static void xen_alloc_pud(struct mm_struct *mm, u32 pfn)
1002{
1003 xen_alloc_ptpage(mm, pfn, PT_PUD);
1004}
1005
1006static void xen_release_pud(u32 pfn)
1007{
1008 xen_release_ptpage(pfn, PT_PUD);
1009}
1010#endif
1011
f4f97b3e
JF
1012#ifdef CONFIG_HIGHPTE
1013static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 1014{
f4f97b3e
JF
1015 pgprot_t prot = PAGE_KERNEL;
1016
1017 if (PagePinned(page))
1018 prot = PAGE_KERNEL_RO;
1019
1020 if (0 && PageHighMem(page))
1021 printk("mapping highpte %lx type %d prot %s\n",
1022 page_to_pfn(page), type,
1023 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1024
1025 return kmap_atomic_prot(page, type, prot);
5ead97c8 1026}
f4f97b3e 1027#endif
5ead97c8 1028
9a4029fd
JF
1029static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1030{
1031 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1032 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1033 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1034 pte_val_ma(pte));
1035
1036 return pte;
1037}
1038
1039/* Init-time set_pte while constructing initial pagetables, which
1040 doesn't allow RO pagetable pages to be remapped RW */
1041static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1042{
1043 pte = mask_rw_pte(ptep, pte);
1044
1045 xen_set_pte(ptep, pte);
1046}
1047
5ead97c8
JF
1048static __init void xen_pagetable_setup_start(pgd_t *base)
1049{
5ead97c8
JF
1050}
1051
0e91398f 1052void xen_setup_shared_info(void)
5ead97c8
JF
1053{
1054 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
15664f96
JF
1055 set_fixmap(FIX_PARAVIRT_BOOTMAP,
1056 xen_start_info->shared_info);
1057
1058 HYPERVISOR_shared_info =
1059 (struct shared_info *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
5ead97c8
JF
1060 } else
1061 HYPERVISOR_shared_info =
1062 (struct shared_info *)__va(xen_start_info->shared_info);
1063
2e8fe719
JF
1064#ifndef CONFIG_SMP
1065 /* In UP this is as good a place as any to set up shared info */
1066 xen_setup_vcpu_info_placement();
1067#endif
d5edbc1f
JF
1068
1069 xen_setup_mfn_list_list();
2e8fe719
JF
1070}
1071
1072static __init void xen_pagetable_setup_done(pgd_t *base)
1073{
0e91398f 1074 xen_setup_shared_info();
60223a32 1075}
5ead97c8 1076
e2426cf8
JF
1077static __init void xen_post_allocator_init(void)
1078{
8745f8b0 1079 pv_mmu_ops.set_pte = xen_set_pte;
e2426cf8
JF
1080 pv_mmu_ops.set_pmd = xen_set_pmd;
1081 pv_mmu_ops.set_pud = xen_set_pud;
f6e58732
JF
1082#if PAGETABLE_LEVELS == 4
1083 pv_mmu_ops.set_pgd = xen_set_pgd;
1084#endif
e2426cf8 1085
2e8fe719
JF
1086 /* This will work as long as patching hasn't happened yet
1087 (which it hasn't) */
6944a9c8
JF
1088 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1089 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1090 pv_mmu_ops.release_pte = xen_release_pte;
1091 pv_mmu_ops.release_pmd = xen_release_pmd;
8745f8b0
JF
1092#if PAGETABLE_LEVELS == 4
1093 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1094 pv_mmu_ops.release_pud = xen_release_pud;
1095#endif
e2426cf8 1096
bf18bf94
JF
1097#ifdef CONFIG_X86_64
1098 SetPagePinned(virt_to_page(level3_user_vsyscall));
1099#endif
e2426cf8
JF
1100 xen_mark_init_mm_pinned();
1101}
1102
60223a32 1103/* This is called once we have the cpu_possible_map */
0e91398f 1104void xen_setup_vcpu_info_placement(void)
60223a32
JF
1105{
1106 int cpu;
1107
1108 for_each_possible_cpu(cpu)
1109 xen_vcpu_setup(cpu);
1110
1111 /* xen_vcpu_setup managed to place the vcpu_info within the
1112 percpu area for all cpus, so make use of it */
5b09b287 1113#ifdef CONFIG_X86_32
60223a32
JF
1114 if (have_vcpu_info_placement) {
1115 printk(KERN_INFO "Xen: using vcpu_info placement\n");
1116
93b1eab3
JF
1117 pv_irq_ops.save_fl = xen_save_fl_direct;
1118 pv_irq_ops.restore_fl = xen_restore_fl_direct;
1119 pv_irq_ops.irq_disable = xen_irq_disable_direct;
1120 pv_irq_ops.irq_enable = xen_irq_enable_direct;
1121 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 1122 }
5b09b287 1123#endif
5ead97c8
JF
1124}
1125
ab144f5e
AK
1126static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
1127 unsigned long addr, unsigned len)
6487673b
JF
1128{
1129 char *start, *end, *reloc;
1130 unsigned ret;
1131
1132 start = end = reloc = NULL;
1133
93b1eab3
JF
1134#define SITE(op, x) \
1135 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1136 if (have_vcpu_info_placement) { \
1137 start = (char *)xen_##x##_direct; \
1138 end = xen_##x##_direct_end; \
1139 reloc = xen_##x##_direct_reloc; \
1140 } \
1141 goto patch_site
1142
1143 switch (type) {
5b09b287 1144#ifdef CONFIG_X86_32
93b1eab3
JF
1145 SITE(pv_irq_ops, irq_enable);
1146 SITE(pv_irq_ops, irq_disable);
1147 SITE(pv_irq_ops, save_fl);
1148 SITE(pv_irq_ops, restore_fl);
5b09b287 1149#endif /* CONFIG_X86_32 */
6487673b
JF
1150#undef SITE
1151
1152 patch_site:
1153 if (start == NULL || (end-start) > len)
1154 goto default_patch;
1155
ab144f5e 1156 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1157
1158 /* Note: because reloc is assigned from something that
1159 appears to be an array, gcc assumes it's non-null,
1160 but doesn't know its relationship with start and
1161 end. */
1162 if (reloc > start && reloc < end) {
1163 int reloc_off = reloc - start;
ab144f5e
AK
1164 long *relocp = (long *)(insnbuf + reloc_off);
1165 long delta = start - (char *)addr;
6487673b
JF
1166
1167 *relocp += delta;
1168 }
1169 break;
1170
1171 default_patch:
1172 default:
ab144f5e
AK
1173 ret = paravirt_patch_default(type, clobbers, insnbuf,
1174 addr, len);
6487673b
JF
1175 break;
1176 }
1177
1178 return ret;
1179}
1180
aeaaa59c
JF
1181static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1182{
1183 pte_t pte;
1184
1185 phys >>= PAGE_SHIFT;
1186
1187 switch (idx) {
1188 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1189#ifdef CONFIG_X86_F00F_BUG
1190 case FIX_F00F_IDT:
1191#endif
15664f96 1192#ifdef CONFIG_X86_32
aeaaa59c
JF
1193 case FIX_WP_TEST:
1194 case FIX_VDSO:
b3fe1243 1195# ifdef CONFIG_HIGHMEM
15664f96 1196 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
b3fe1243 1197# endif
15664f96
JF
1198#else
1199 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1200#endif
aeaaa59c
JF
1201#ifdef CONFIG_X86_LOCAL_APIC
1202 case FIX_APIC_BASE: /* maps dummy local APIC */
1203#endif
1204 pte = pfn_pte(phys, prot);
1205 break;
1206
1207 default:
1208 pte = mfn_pte(phys, prot);
1209 break;
1210 }
1211
1212 __native_set_fixmap(idx, pte);
bf18bf94
JF
1213
1214#ifdef CONFIG_X86_64
1215 /* Replicate changes to map the vsyscall page into the user
1216 pagetable vsyscall mapping. */
1217 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1218 unsigned long vaddr = __fix_to_virt(idx);
1219 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1220 }
1221#endif
aeaaa59c
JF
1222}
1223
93b1eab3 1224static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1225 .paravirt_enabled = 1,
1226 .shared_kernel_pmd = 0,
1227
1228 .name = "Xen",
93b1eab3 1229};
5ead97c8 1230
93b1eab3 1231static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1232 .patch = xen_patch,
5ead97c8 1233
93b1eab3 1234 .banner = xen_banner,
5ead97c8
JF
1235 .memory_setup = xen_memory_setup,
1236 .arch_setup = xen_arch_setup,
e2426cf8 1237 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1238};
5ead97c8 1239
93b1eab3 1240static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1241 .time_init = xen_time_init,
93b1eab3 1242
15c84731
JF
1243 .set_wallclock = xen_set_wallclock,
1244 .get_wallclock = xen_get_wallclock,
e93ef949 1245 .get_tsc_khz = xen_tsc_khz,
ab550288 1246 .sched_clock = xen_sched_clock,
93b1eab3 1247};
15c84731 1248
93b1eab3 1249static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1250 .cpuid = xen_cpuid,
1251
1252 .set_debugreg = xen_set_debugreg,
1253 .get_debugreg = xen_get_debugreg,
1254
7b1333aa 1255 .clts = xen_clts,
5ead97c8
JF
1256
1257 .read_cr0 = native_read_cr0,
7b1333aa 1258 .write_cr0 = xen_write_cr0,
5ead97c8 1259
5ead97c8
JF
1260 .read_cr4 = native_read_cr4,
1261 .read_cr4_safe = native_read_cr4_safe,
1262 .write_cr4 = xen_write_cr4,
1263
5ead97c8
JF
1264 .wbinvd = native_wbinvd,
1265
1266 .read_msr = native_read_msr_safe,
1153968a 1267 .write_msr = xen_write_msr_safe,
5ead97c8
JF
1268 .read_tsc = native_read_tsc,
1269 .read_pmc = native_read_pmc,
1270
81e103f1 1271 .iret = xen_iret,
d75cd22f 1272 .irq_enable_sysexit = xen_sysexit,
6fcac6d3
JF
1273#ifdef CONFIG_X86_64
1274 .usergs_sysret32 = xen_sysret32,
1275 .usergs_sysret64 = xen_sysret64,
1276#endif
5ead97c8
JF
1277
1278 .load_tr_desc = paravirt_nop,
1279 .set_ldt = xen_set_ldt,
1280 .load_gdt = xen_load_gdt,
1281 .load_idt = xen_load_idt,
1282 .load_tls = xen_load_tls,
a8fc1089
EH
1283#ifdef CONFIG_X86_64
1284 .load_gs_index = xen_load_gs_index,
1285#endif
5ead97c8 1286
38ffbe66
JF
1287 .alloc_ldt = xen_alloc_ldt,
1288 .free_ldt = xen_free_ldt,
1289
5ead97c8
JF
1290 .store_gdt = native_store_gdt,
1291 .store_idt = native_store_idt,
1292 .store_tr = xen_store_tr,
1293
1294 .write_ldt_entry = xen_write_ldt_entry,
1295 .write_gdt_entry = xen_write_gdt_entry,
1296 .write_idt_entry = xen_write_idt_entry,
faca6227 1297 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1298
1299 .set_iopl_mask = xen_set_iopl_mask,
1300 .io_delay = xen_io_delay,
1301
952d1d70
JF
1302 /* Xen takes care of %gs when switching to usermode for us */
1303 .swapgs = paravirt_nop,
1304
8965c1c0
JF
1305 .lazy_mode = {
1306 .enter = paravirt_enter_lazy_cpu,
1307 .leave = xen_leave_lazy,
1308 },
93b1eab3
JF
1309};
1310
0725cbb9
JF
1311static void __init __xen_init_IRQ(void)
1312{
1313#ifdef CONFIG_X86_64
1314 int i;
1315
1316 /* Create identity vector->irq map */
1317 for(i = 0; i < NR_VECTORS; i++) {
1318 int cpu;
1319
1320 for_each_possible_cpu(cpu)
1321 per_cpu(vector_irq, cpu)[i] = i;
1322 }
1323#endif /* CONFIG_X86_64 */
1324
1325 xen_init_IRQ();
1326}
1327
93b1eab3 1328static const struct pv_irq_ops xen_irq_ops __initdata = {
0725cbb9 1329 .init_IRQ = __xen_init_IRQ,
93b1eab3
JF
1330 .save_fl = xen_save_fl,
1331 .restore_fl = xen_restore_fl,
1332 .irq_disable = xen_irq_disable,
1333 .irq_enable = xen_irq_enable,
1334 .safe_halt = xen_safe_halt,
1335 .halt = xen_halt,
fab58420 1336#ifdef CONFIG_X86_64
997409d3 1337 .adjust_exception_frame = xen_adjust_exception_frame,
fab58420 1338#endif
93b1eab3 1339};
5ead97c8 1340
93b1eab3 1341static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1342#ifdef CONFIG_X86_LOCAL_APIC
f87e4cac 1343 .apic_write = xen_apic_write,
5ead97c8
JF
1344 .apic_read = xen_apic_read,
1345 .setup_boot_clock = paravirt_nop,
1346 .setup_secondary_clock = paravirt_nop,
1347 .startup_ipi_hook = paravirt_nop,
1348#endif
93b1eab3
JF
1349};
1350
1351static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1352 .pagetable_setup_start = xen_pagetable_setup_start,
1353 .pagetable_setup_done = xen_pagetable_setup_done,
1354
1355 .read_cr2 = xen_read_cr2,
1356 .write_cr2 = xen_write_cr2,
1357
1358 .read_cr3 = xen_read_cr3,
1359 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1360
1361 .flush_tlb_user = xen_flush_tlb,
1362 .flush_tlb_kernel = xen_flush_tlb,
1363 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1364 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1365
1366 .pte_update = paravirt_nop,
1367 .pte_update_defer = paravirt_nop,
1368
d6182fbf
JF
1369 .pgd_alloc = xen_pgd_alloc,
1370 .pgd_free = xen_pgd_free,
eba0045f 1371
6944a9c8
JF
1372 .alloc_pte = xen_alloc_pte_init,
1373 .release_pte = xen_release_pte_init,
1374 .alloc_pmd = xen_alloc_pte_init,
1375 .alloc_pmd_clone = paravirt_nop,
1376 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1377
1378#ifdef CONFIG_HIGHPTE
1379 .kmap_atomic_pte = xen_kmap_atomic_pte,
1380#endif
5ead97c8 1381
22911b3f
JF
1382#ifdef CONFIG_X86_64
1383 .set_pte = xen_set_pte,
1384#else
851fa3c4 1385 .set_pte = xen_set_pte_init,
22911b3f 1386#endif
3b827c1b 1387 .set_pte_at = xen_set_pte_at,
e2426cf8 1388 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1389
08b882c6
JF
1390 .ptep_modify_prot_start = __ptep_modify_prot_start,
1391 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1392
3b827c1b 1393 .pte_val = xen_pte_val,
b56afe1d 1394 .pte_flags = native_pte_flags,
3b827c1b
JF
1395 .pgd_val = xen_pgd_val,
1396
1397 .make_pte = xen_make_pte,
1398 .make_pgd = xen_make_pgd,
1399
f6e58732 1400#ifdef CONFIG_X86_PAE
3b827c1b
JF
1401 .set_pte_atomic = xen_set_pte_atomic,
1402 .set_pte_present = xen_set_pte_at,
3b827c1b
JF
1403 .pte_clear = xen_pte_clear,
1404 .pmd_clear = xen_pmd_clear,
f6e58732
JF
1405#endif /* CONFIG_X86_PAE */
1406 .set_pud = xen_set_pud_hyper,
3b827c1b
JF
1407
1408 .make_pmd = xen_make_pmd,
1409 .pmd_val = xen_pmd_val,
3b827c1b 1410
f6e58732
JF
1411#if PAGETABLE_LEVELS == 4
1412 .pud_val = xen_pud_val,
1413 .make_pud = xen_make_pud,
1414 .set_pgd = xen_set_pgd_hyper,
1415
1416 .alloc_pud = xen_alloc_pte_init,
1417 .release_pud = xen_release_pte_init,
1418#endif /* PAGETABLE_LEVELS == 4 */
1419
3b827c1b
JF
1420 .activate_mm = xen_activate_mm,
1421 .dup_mmap = xen_dup_mmap,
1422 .exit_mmap = xen_exit_mmap,
1423
8965c1c0
JF
1424 .lazy_mode = {
1425 .enter = paravirt_enter_lazy_mmu,
1426 .leave = xen_leave_lazy,
1427 },
aeaaa59c
JF
1428
1429 .set_fixmap = xen_set_fixmap,
5ead97c8
JF
1430};
1431
fefa629a
JF
1432static void xen_reboot(int reason)
1433{
349c709f
JF
1434 struct sched_shutdown r = { .reason = reason };
1435
fefa629a
JF
1436#ifdef CONFIG_SMP
1437 smp_send_stop();
1438#endif
1439
349c709f 1440 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1441 BUG();
1442}
1443
1444static void xen_restart(char *msg)
1445{
1446 xen_reboot(SHUTDOWN_reboot);
1447}
1448
1449static void xen_emergency_restart(void)
1450{
1451 xen_reboot(SHUTDOWN_reboot);
1452}
1453
1454static void xen_machine_halt(void)
1455{
1456 xen_reboot(SHUTDOWN_poweroff);
1457}
1458
1459static void xen_crash_shutdown(struct pt_regs *regs)
1460{
1461 xen_reboot(SHUTDOWN_crash);
1462}
1463
1464static const struct machine_ops __initdata xen_machine_ops = {
1465 .restart = xen_restart,
1466 .halt = xen_machine_halt,
1467 .power_off = xen_machine_halt,
1468 .shutdown = xen_machine_halt,
1469 .crash_shutdown = xen_crash_shutdown,
1470 .emergency_restart = xen_emergency_restart,
1471};
1472
6487673b 1473
fb1d8404
JF
1474static void __init xen_reserve_top(void)
1475{
f5d36de0 1476#ifdef CONFIG_X86_32
fb1d8404
JF
1477 unsigned long top = HYPERVISOR_VIRT_START;
1478 struct xen_platform_parameters pp;
1479
1480 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1481 top = pp.virt_start;
1482
1483 reserve_top_address(-top + 2 * PAGE_SIZE);
f5d36de0 1484#endif /* CONFIG_X86_32 */
fb1d8404
JF
1485}
1486
084a2a4e
JF
1487/*
1488 * Like __va(), but returns address in the kernel mapping (which is
1489 * all we have until the physical memory mapping has been set up.
1490 */
1491static void *__ka(phys_addr_t paddr)
1492{
39dbc5bd 1493#ifdef CONFIG_X86_64
084a2a4e 1494 return (void *)(paddr + __START_KERNEL_map);
39dbc5bd
JF
1495#else
1496 return __va(paddr);
1497#endif
fb1d8404
JF
1498}
1499
084a2a4e
JF
1500/* Convert a machine address to physical address */
1501static unsigned long m2p(phys_addr_t maddr)
1502{
1503 phys_addr_t paddr;
1504
59438c9f 1505 maddr &= PTE_PFN_MASK;
084a2a4e
JF
1506 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1507
1508 return paddr;
fb1d8404
JF
1509}
1510
084a2a4e
JF
1511/* Convert a machine address to kernel virtual */
1512static void *m2v(phys_addr_t maddr)
1513{
1514 return __ka(m2p(maddr));
1515}
1516
39dbc5bd 1517#ifdef CONFIG_X86_64
084a2a4e
JF
1518static void walk(pgd_t *pgd, unsigned long addr)
1519{
1520 unsigned l4idx = pgd_index(addr);
1521 unsigned l3idx = pud_index(addr);
1522 unsigned l2idx = pmd_index(addr);
1523 unsigned l1idx = pte_index(addr);
1524 pgd_t l4;
1525 pud_t l3;
1526 pmd_t l2;
1527 pte_t l1;
1528
1529 xen_raw_printk("walk %p, %lx -> %d %d %d %d\n",
1530 pgd, addr, l4idx, l3idx, l2idx, l1idx);
1531
1532 l4 = pgd[l4idx];
1533 xen_raw_printk(" l4: %016lx\n", l4.pgd);
1534 xen_raw_printk(" %016lx\n", pgd_val(l4));
1535
1536 l3 = ((pud_t *)(m2v(l4.pgd)))[l3idx];
1537 xen_raw_printk(" l3: %016lx\n", l3.pud);
1538 xen_raw_printk(" %016lx\n", pud_val(l3));
1539
1540 l2 = ((pmd_t *)(m2v(l3.pud)))[l2idx];
1541 xen_raw_printk(" l2: %016lx\n", l2.pmd);
1542 xen_raw_printk(" %016lx\n", pmd_val(l2));
1543
1544 l1 = ((pte_t *)(m2v(l2.pmd)))[l1idx];
1545 xen_raw_printk(" l1: %016lx\n", l1.pte);
1546 xen_raw_printk(" %016lx\n", pte_val(l1));
1547}
39dbc5bd 1548#endif
084a2a4e
JF
1549
1550static void set_page_prot(void *addr, pgprot_t prot)
1551{
1552 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1553 pte_t pte = pfn_pte(pfn, prot);
1554
39dbc5bd 1555 xen_raw_printk("addr=%p pfn=%lx mfn=%lx prot=%016llx pte=%016llx\n",
084a2a4e
JF
1556 addr, pfn, get_phys_to_machine(pfn),
1557 pgprot_val(prot), pte.pte);
1558
1559 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1560 BUG();
1561}
1562
39dbc5bd 1563static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
d114e198
JF
1564{
1565 unsigned pmdidx, pteidx;
1566 unsigned ident_pte;
1567 unsigned long pfn;
1568
1569 ident_pte = 0;
1570 pfn = 0;
1571 for(pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1572 pte_t *pte_page;
1573
d114e198 1574 /* Reuse or allocate a page of ptes */
39dbc5bd
JF
1575 if (pmd_present(pmd[pmdidx]))
1576 pte_page = m2v(pmd[pmdidx].pmd);
d114e198
JF
1577 else {
1578 /* Check for free pte pages */
1579 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1580 break;
1581
1582 pte_page = &level1_ident_pgt[ident_pte];
1583 ident_pte += PTRS_PER_PTE;
1584
39dbc5bd 1585 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
d114e198
JF
1586 }
1587
1588 /* Install mappings */
1589 for(pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1590 pte_t pte;
1591
1592 if (pfn > max_pfn_mapped)
1593 max_pfn_mapped = pfn;
1594
1595 if (!pte_none(pte_page[pteidx]))
1596 continue;
1597
1598 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1599 pte_page[pteidx] = pte;
1600 }
1601 }
1602
1603 for(pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1604 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
39dbc5bd
JF
1605
1606 set_page_prot(pmd, PAGE_KERNEL_RO);
1607}
1608
1609#ifdef CONFIG_X86_64
1610static void convert_pfn_mfn(void *v)
1611{
1612 pte_t *pte = v;
1613 int i;
1614
1615 /* All levels are converted the same way, so just treat them
1616 as ptes. */
1617 for(i = 0; i < PTRS_PER_PTE; i++)
1618 pte[i] = xen_make_pte(pte[i].pte);
d114e198
JF
1619}
1620
084a2a4e
JF
1621/*
1622 * Set up the inital kernel pagetable.
1623 *
1624 * We can construct this by grafting the Xen provided pagetable into
1625 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1626 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1627 * means that only the kernel has a physical mapping to start with -
1628 * but that's enough to get __va working. We need to fill in the rest
1629 * of the physical mapping once some sort of allocator has been set
1630 * up.
1631 */
d114e198 1632static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e
JF
1633{
1634 pud_t *l3;
1635 pmd_t *l2;
1636
1637 /* Zap identity mapping */
1638 init_level4_pgt[0] = __pgd(0);
1639
1640 /* Pre-constructed entries are in pfn, so convert to mfn */
1641 convert_pfn_mfn(init_level4_pgt);
1642 convert_pfn_mfn(level3_ident_pgt);
1643 convert_pfn_mfn(level3_kernel_pgt);
1644
1645 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1646 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1647
1648 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1649 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1650
1651 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1652 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1653 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1654
d114e198 1655 /* Set up identity map */
39dbc5bd 1656 xen_map_identity_early(level2_ident_pgt, max_pfn);
d114e198 1657
084a2a4e
JF
1658 /* Make pagetable pieces RO */
1659 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1660 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1661 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
bf18bf94 1662 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
084a2a4e
JF
1663 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1664 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1665
1666 /* Pin down new L4 */
39dbc5bd
JF
1667 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1668 PFN_DOWN(__pa_symbol(init_level4_pgt)));
084a2a4e
JF
1669
1670 /* Unpin Xen-provided one */
1671 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1672
1673 /* Switch over */
1674 pgd = init_level4_pgt;
d6182fbf
JF
1675
1676 /*
1677 * At this stage there can be no user pgd, and no page
1678 * structure to attach it to, so make sure we just set kernel
1679 * pgd.
1680 */
1681 xen_mc_batch();
1682 __xen_write_cr3(true, __pa(pgd));
1683 xen_mc_issue(PARAVIRT_LAZY_CPU);
084a2a4e 1684
d114e198
JF
1685 reserve_early(__pa(xen_start_info->pt_base),
1686 __pa(xen_start_info->pt_base +
1687 xen_start_info->nr_pt_frames * PAGE_SIZE),
1688 "XEN PAGETABLES");
084a2a4e
JF
1689
1690 return pgd;
1691}
39dbc5bd
JF
1692#else /* !CONFIG_X86_64 */
1693static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1694
d114e198 1695static __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
084a2a4e 1696{
39dbc5bd
JF
1697 pmd_t *kernel_pmd;
1698
084a2a4e
JF
1699 init_pg_tables_start = __pa(pgd);
1700 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1701 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1702
39dbc5bd
JF
1703 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1704 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
d114e198 1705
39dbc5bd
JF
1706 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1707
1708 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1709 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1710 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1711
1712 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1713 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1714 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1715
1716 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1717
1718 xen_write_cr3(__pa(swapper_pg_dir));
1719
1720 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1721
1722 return swapper_pg_dir;
fb1d8404 1723}
084a2a4e 1724#endif /* CONFIG_X86_64 */
fb1d8404 1725
5ead97c8
JF
1726/* First C function to be called on Xen boot */
1727asmlinkage void __init xen_start_kernel(void)
1728{
1729 pgd_t *pgd;
1730
1731 if (!xen_start_info)
1732 return;
1733
7999f4b4 1734 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1735
e57778a1
JF
1736 xen_setup_features();
1737
5ead97c8 1738 /* Install Xen paravirt ops */
93b1eab3
JF
1739 pv_info = xen_info;
1740 pv_init_ops = xen_init_ops;
1741 pv_time_ops = xen_time_ops;
1742 pv_cpu_ops = xen_cpu_ops;
1743 pv_irq_ops = xen_irq_ops;
1744 pv_apic_ops = xen_apic_ops;
1745 pv_mmu_ops = xen_mmu_ops;
93b1eab3 1746
e57778a1
JF
1747 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1748 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1749 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1750 }
1751
fefa629a
JF
1752 machine_ops = xen_machine_ops;
1753
f5d36de0
JF
1754#ifdef CONFIG_X86_64
1755 /* Disable until direct per-cpu data access. */
1756 have_vcpu_info_placement = 0;
5b09b287 1757 x86_64_init_pda();
f87e4cac 1758#endif
5ead97c8 1759
a9e7062d 1760 xen_smp_init();
5ead97c8
JF
1761
1762 /* Get mfn list */
1763 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1764 xen_build_dynamic_phys_to_machine();
5ead97c8
JF
1765
1766 pgd = (pgd_t *)xen_start_info->pt_base;
1767
084a2a4e
JF
1768 /* Prevent unwanted bits from being set in PTEs. */
1769 __supported_pte_mask &= ~_PAGE_GLOBAL;
1770 if (!is_initial_xendomain())
1771 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
60223a32 1772
60223a32 1773 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1774 possible map and a non-dummy shared_info. */
60223a32 1775 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1776
084a2a4e 1777 xen_raw_console_write("mapping kernel into physical memory\n");
d114e198 1778 pgd = xen_setup_kernel_pagetable(pgd, xen_start_info->nr_pages);
5ead97c8 1779
084a2a4e 1780 init_mm.pgd = pgd;
5ead97c8
JF
1781
1782 /* keep using Xen gdt for now; no urgent need to change it */
1783
93b1eab3 1784 pv_info.kernel_rpl = 1;
5ead97c8 1785 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1786 pv_info.kernel_rpl = 0;
5ead97c8
JF
1787
1788 /* set the limit of our address space */
fb1d8404 1789 xen_reserve_top();
5ead97c8 1790
7d087b68 1791#ifdef CONFIG_X86_32
5ead97c8
JF
1792 /* set up basic CPUID stuff */
1793 cpu_detect(&new_cpu_data);
1794 new_cpu_data.hard_math = 1;
1795 new_cpu_data.x86_capability[0] = cpuid_edx(1);
7d087b68 1796#endif
5ead97c8
JF
1797
1798 /* Poke various useful things into boot_params */
30c82645
PA
1799 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1800 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1801 ? __pa(xen_start_info->mod_start) : 0;
1802 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
b7c3c5c1 1803 boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
5ead97c8 1804
9e124fe1 1805 if (!is_initial_xendomain()) {
83abc70a 1806 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1807 add_preferred_console("tty", 0, NULL);
b8c2d3df 1808 add_preferred_console("hvc", 0, NULL);
9e124fe1 1809 }
b8c2d3df 1810
084a2a4e
JF
1811 xen_raw_console_write("about to get started...\n");
1812
1813#if 0
1814 xen_raw_printk("&boot_params=%p __pa(&boot_params)=%lx __va(__pa(&boot_params))=%lx\n",
1815 &boot_params, __pa_symbol(&boot_params),
1816 __va(__pa_symbol(&boot_params)));
1817
1818 walk(pgd, &boot_params);
1819 walk(pgd, __va(__pa(&boot_params)));
1820#endif
b8c2d3df 1821
5ead97c8 1822 /* Start the world */
f5d36de0 1823#ifdef CONFIG_X86_32
f0d43100 1824 i386_start_kernel();
f5d36de0 1825#else
084a2a4e 1826 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
f5d36de0 1827#endif
5ead97c8 1828}
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