x86: make 64bit have get_apic_id
[deliverable/linux.git] / arch / x86 / xen / enlighten.c
CommitLineData
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1/*
2 * Core of Xen paravirt_ops implementation.
3 *
4 * This file contains the xen_paravirt_ops structure itself, and the
5 * implementations for:
6 * - privileged instructions
7 * - interrupt flags
8 * - segment operations
9 * - booting and setup
10 *
11 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/smp.h>
17#include <linux/preempt.h>
f120f13e 18#include <linux/hardirq.h>
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19#include <linux/percpu.h>
20#include <linux/delay.h>
21#include <linux/start_kernel.h>
22#include <linux/sched.h>
23#include <linux/bootmem.h>
24#include <linux/module.h>
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25#include <linux/mm.h>
26#include <linux/page-flags.h>
27#include <linux/highmem.h>
b8c2d3df 28#include <linux/console.h>
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29
30#include <xen/interface/xen.h>
31#include <xen/interface/physdev.h>
32#include <xen/interface/vcpu.h>
fefa629a 33#include <xen/interface/sched.h>
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34#include <xen/features.h>
35#include <xen/page.h>
36
37#include <asm/paravirt.h>
38#include <asm/page.h>
39#include <asm/xen/hypercall.h>
40#include <asm/xen/hypervisor.h>
41#include <asm/fixmap.h>
42#include <asm/processor.h>
43#include <asm/setup.h>
44#include <asm/desc.h>
45#include <asm/pgtable.h>
f87e4cac 46#include <asm/tlbflush.h>
fefa629a 47#include <asm/reboot.h>
eba0045f 48#include <asm/pgalloc.h>
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49
50#include "xen-ops.h"
3b827c1b 51#include "mmu.h"
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52#include "multicalls.h"
53
54EXPORT_SYMBOL_GPL(hypercall_page);
55
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56DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
57DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
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58
59/*
60 * Note about cr3 (pagetable base) values:
61 *
62 * xen_cr3 contains the current logical cr3 value; it contains the
63 * last set cr3. This may not be the current effective cr3, because
64 * its update may be being lazily deferred. However, a vcpu looking
65 * at its own cr3 can use this value knowing that it everything will
66 * be self-consistent.
67 *
68 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
69 * hypercall to set the vcpu cr3 is complete (so it may be a little
70 * out of date, but it will never be set early). If one vcpu is
71 * looking at another vcpu's cr3 value, it should use this variable.
72 */
73DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
74DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
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75
76struct start_info *xen_start_info;
77EXPORT_SYMBOL_GPL(xen_start_info);
78
a0d695c8 79struct shared_info xen_dummy_shared_info;
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80
81/*
82 * Point at some empty memory to start with. We map the real shared_info
83 * page as soon as fixmap is up and running.
84 */
a0d695c8 85struct shared_info *HYPERVISOR_shared_info = (void *)&xen_dummy_shared_info;
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86
87/*
88 * Flag to determine whether vcpu info placement is available on all
89 * VCPUs. We assume it is to start with, and then set it to zero on
90 * the first failure. This is because it can succeed on some VCPUs
91 * and not others, since it can involve hypervisor memory allocation,
92 * or because the guest failed to guarantee all the appropriate
93 * constraints on all VCPUs (ie buffer can't cross a page boundary).
94 *
95 * Note that any particular CPU may be using a placed vcpu structure,
96 * but we can only optimise if the all are.
97 *
98 * 0: not available, 1: available
99 */
04c44a08 100static int have_vcpu_info_placement = 1;
60223a32 101
9c7a7942 102static void xen_vcpu_setup(int cpu)
5ead97c8 103{
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104 struct vcpu_register_vcpu_info info;
105 int err;
106 struct vcpu_info *vcpup;
107
a0d695c8 108 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
5ead97c8 109 per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
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110
111 if (!have_vcpu_info_placement)
112 return; /* already tested, not available */
113
114 vcpup = &per_cpu(xen_vcpu_info, cpu);
115
116 info.mfn = virt_to_mfn(vcpup);
117 info.offset = offset_in_page(vcpup);
118
e3d26976 119 printk(KERN_DEBUG "trying to map vcpu_info %d at %p, mfn %llx, offset %d\n",
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120 cpu, vcpup, info.mfn, info.offset);
121
122 /* Check to see if the hypervisor will put the vcpu_info
123 structure where we want it, which allows direct access via
124 a percpu-variable. */
125 err = HYPERVISOR_vcpu_op(VCPUOP_register_vcpu_info, cpu, &info);
126
127 if (err) {
128 printk(KERN_DEBUG "register_vcpu_info failed: err=%d\n", err);
129 have_vcpu_info_placement = 0;
130 } else {
131 /* This cpu is using the registered vcpu info, even if
132 later ones fail to. */
133 per_cpu(xen_vcpu, cpu) = vcpup;
6487673b 134
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135 printk(KERN_DEBUG "cpu %d using vcpu_info at %p\n",
136 cpu, vcpup);
137 }
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138}
139
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140/*
141 * On restore, set the vcpu placement up again.
142 * If it fails, then we're in a bad state, since
143 * we can't back out from using it...
144 */
145void xen_vcpu_restore(void)
146{
147 if (have_vcpu_info_placement) {
148 int cpu;
149
150 for_each_online_cpu(cpu) {
151 bool other_cpu = (cpu != smp_processor_id());
152
153 if (other_cpu &&
154 HYPERVISOR_vcpu_op(VCPUOP_down, cpu, NULL))
155 BUG();
156
157 xen_vcpu_setup(cpu);
158
159 if (other_cpu &&
160 HYPERVISOR_vcpu_op(VCPUOP_up, cpu, NULL))
161 BUG();
162 }
163
164 BUG_ON(!have_vcpu_info_placement);
165 }
166}
167
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168static void __init xen_banner(void)
169{
170 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
93b1eab3 171 pv_info.name);
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172 printk(KERN_INFO "Hypervisor signature: %s%s\n",
173 xen_start_info->magic,
174 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
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175}
176
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177static void xen_cpuid(unsigned int *ax, unsigned int *bx,
178 unsigned int *cx, unsigned int *dx)
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179{
180 unsigned maskedx = ~0;
181
182 /*
183 * Mask out inconvenient features, to try and disable as many
184 * unsupported kernel subsystems as possible.
185 */
65ea5b03 186 if (*ax == 1)
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187 maskedx = ~((1 << X86_FEATURE_APIC) | /* disable APIC */
188 (1 << X86_FEATURE_ACPI) | /* disable ACPI */
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189 (1 << X86_FEATURE_MCE) | /* disable MCE */
190 (1 << X86_FEATURE_MCA) | /* disable MCA */
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191 (1 << X86_FEATURE_ACC)); /* thermal monitoring */
192
193 asm(XEN_EMULATE_PREFIX "cpuid"
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194 : "=a" (*ax),
195 "=b" (*bx),
196 "=c" (*cx),
197 "=d" (*dx)
198 : "0" (*ax), "2" (*cx));
199 *dx &= maskedx;
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200}
201
202static void xen_set_debugreg(int reg, unsigned long val)
203{
204 HYPERVISOR_set_debugreg(reg, val);
205}
206
207static unsigned long xen_get_debugreg(int reg)
208{
209 return HYPERVISOR_get_debugreg(reg);
210}
211
212static unsigned long xen_save_fl(void)
213{
214 struct vcpu_info *vcpu;
215 unsigned long flags;
216
5ead97c8 217 vcpu = x86_read_percpu(xen_vcpu);
f120f13e 218
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219 /* flag has opposite sense of mask */
220 flags = !vcpu->evtchn_upcall_mask;
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221
222 /* convert to IF type flag
223 -0 -> 0x00000000
224 -1 -> 0xffffffff
225 */
226 return (-flags) & X86_EFLAGS_IF;
227}
228
229static void xen_restore_fl(unsigned long flags)
230{
231 struct vcpu_info *vcpu;
232
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233 /* convert from IF type flag */
234 flags = !(flags & X86_EFLAGS_IF);
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235
236 /* There's a one instruction preempt window here. We need to
237 make sure we're don't switch CPUs between getting the vcpu
238 pointer and updating the mask. */
239 preempt_disable();
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240 vcpu = x86_read_percpu(xen_vcpu);
241 vcpu->evtchn_upcall_mask = flags;
f120f13e 242 preempt_enable_no_resched();
5ead97c8 243
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244 /* Doesn't matter if we get preempted here, because any
245 pending event will get dealt with anyway. */
5ead97c8 246
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247 if (flags == 0) {
248 preempt_check_resched();
249 barrier(); /* unmask then check (avoid races) */
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250 if (unlikely(vcpu->evtchn_upcall_pending))
251 force_evtchn_callback();
f120f13e 252 }
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253}
254
255static void xen_irq_disable(void)
256{
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257 /* There's a one instruction preempt window here. We need to
258 make sure we're don't switch CPUs between getting the vcpu
259 pointer and updating the mask. */
5ead97c8 260 preempt_disable();
f120f13e 261 x86_read_percpu(xen_vcpu)->evtchn_upcall_mask = 1;
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262 preempt_enable_no_resched();
263}
264
265static void xen_irq_enable(void)
266{
267 struct vcpu_info *vcpu;
268
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269 /* We don't need to worry about being preempted here, since
270 either a) interrupts are disabled, so no preemption, or b)
271 the caller is confused and is trying to re-enable interrupts
272 on an indeterminate processor. */
273
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274 vcpu = x86_read_percpu(xen_vcpu);
275 vcpu->evtchn_upcall_mask = 0;
276
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277 /* Doesn't matter if we get preempted here, because any
278 pending event will get dealt with anyway. */
5ead97c8 279
f120f13e 280 barrier(); /* unmask then check (avoid races) */
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281 if (unlikely(vcpu->evtchn_upcall_pending))
282 force_evtchn_callback();
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283}
284
285static void xen_safe_halt(void)
286{
287 /* Blocking includes an implicit local_irq_enable(). */
349c709f 288 if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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289 BUG();
290}
291
292static void xen_halt(void)
293{
294 if (irqs_disabled())
295 HYPERVISOR_vcpu_op(VCPUOP_down, smp_processor_id(), NULL);
296 else
297 xen_safe_halt();
298}
299
8965c1c0 300static void xen_leave_lazy(void)
5ead97c8 301{
8965c1c0 302 paravirt_leave_lazy(paravirt_get_lazy_mode());
5ead97c8 303 xen_mc_flush();
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304}
305
306static unsigned long xen_store_tr(void)
307{
308 return 0;
309}
310
311static void xen_set_ldt(const void *addr, unsigned entries)
312{
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313 struct mmuext_op *op;
314 struct multicall_space mcs = xen_mc_entry(sizeof(*op));
315
316 op = mcs.args;
317 op->cmd = MMUEXT_SET_LDT;
4dbf7af6 318 op->arg1.linear_addr = (unsigned long)addr;
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319 op->arg2.nr_ents = entries;
320
321 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
322
323 xen_mc_issue(PARAVIRT_LAZY_CPU);
324}
325
6b68f01b 326static void xen_load_gdt(const struct desc_ptr *dtr)
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327{
328 unsigned long *frames;
329 unsigned long va = dtr->address;
330 unsigned int size = dtr->size + 1;
331 unsigned pages = (size + PAGE_SIZE - 1) / PAGE_SIZE;
332 int f;
333 struct multicall_space mcs;
334
335 /* A GDT can be up to 64k in size, which corresponds to 8192
336 8-byte entries, or 16 4k pages.. */
337
338 BUG_ON(size > 65536);
339 BUG_ON(va & ~PAGE_MASK);
340
341 mcs = xen_mc_entry(sizeof(*frames) * pages);
342 frames = mcs.args;
343
344 for (f = 0; va < dtr->address + size; va += PAGE_SIZE, f++) {
345 frames[f] = virt_to_mfn(va);
346 make_lowmem_page_readonly((void *)va);
347 }
348
349 MULTI_set_gdt(mcs.mc, frames, size / sizeof(struct desc_struct));
350
351 xen_mc_issue(PARAVIRT_LAZY_CPU);
352}
353
354static void load_TLS_descriptor(struct thread_struct *t,
355 unsigned int cpu, unsigned int i)
356{
357 struct desc_struct *gdt = get_cpu_gdt_table(cpu);
358 xmaddr_t maddr = virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
359 struct multicall_space mc = __xen_mc_entry(0);
360
361 MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
362}
363
364static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
365{
366 xen_mc_batch();
367
368 load_TLS_descriptor(t, cpu, 0);
369 load_TLS_descriptor(t, cpu, 1);
370 load_TLS_descriptor(t, cpu, 2);
371
372 xen_mc_issue(PARAVIRT_LAZY_CPU);
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373
374 /*
375 * XXX sleazy hack: If we're being called in a lazy-cpu zone,
376 * it means we're in a context switch, and %gs has just been
377 * saved. This means we can zero it out to prevent faults on
378 * exit from the hypervisor if the next process has no %gs.
379 * Either way, it has been saved, and the new value will get
380 * loaded properly. This will go away as soon as Xen has been
381 * modified to not save/restore %gs for normal hypercalls.
382 */
8965c1c0 383 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
8b84ad94 384 loadsegment(gs, 0);
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385}
386
387static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
75b8bb3e 388 const void *ptr)
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389{
390 unsigned long lp = (unsigned long)&dt[entrynum];
391 xmaddr_t mach_lp = virt_to_machine(lp);
75b8bb3e 392 u64 entry = *(u64 *)ptr;
5ead97c8 393
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394 preempt_disable();
395
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396 xen_mc_flush();
397 if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
398 BUG();
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399
400 preempt_enable();
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401}
402
403static int cvt_gate_to_trap(int vector, u32 low, u32 high,
404 struct trap_info *info)
405{
406 u8 type, dpl;
407
408 type = (high >> 8) & 0x1f;
409 dpl = (high >> 13) & 3;
410
411 if (type != 0xf && type != 0xe)
412 return 0;
413
414 info->vector = vector;
415 info->address = (high & 0xffff0000) | (low & 0x0000ffff);
416 info->cs = low >> 16;
417 info->flags = dpl;
418 /* interrupt gates clear IF */
419 if (type == 0xe)
420 info->flags |= 4;
421
422 return 1;
423}
424
425/* Locations of each CPU's IDT */
6b68f01b 426static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
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427
428/* Set an IDT entry. If the entry is part of the current IDT, then
429 also update Xen. */
8d947344 430static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
5ead97c8 431{
5ead97c8 432 unsigned long p = (unsigned long)&dt[entrynum];
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433 unsigned long start, end;
434
435 preempt_disable();
436
437 start = __get_cpu_var(idt_desc).address;
438 end = start + __get_cpu_var(idt_desc).size + 1;
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439
440 xen_mc_flush();
441
8d947344 442 native_write_idt_entry(dt, entrynum, g);
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443
444 if (p >= start && (p + 8) <= end) {
445 struct trap_info info[2];
8d947344 446 u32 *desc = (u32 *)g;
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447
448 info[1].address = 0;
449
8d947344 450 if (cvt_gate_to_trap(entrynum, desc[0], desc[1], &info[0]))
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451 if (HYPERVISOR_set_trap_table(info))
452 BUG();
453 }
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454
455 preempt_enable();
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456}
457
6b68f01b 458static void xen_convert_trap_info(const struct desc_ptr *desc,
f87e4cac 459 struct trap_info *traps)
5ead97c8 460{
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461 unsigned in, out, count;
462
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463 count = (desc->size+1) / 8;
464 BUG_ON(count > 256);
465
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466 for (in = out = 0; in < count; in++) {
467 const u32 *entry = (u32 *)(desc->address + in * 8);
468
469 if (cvt_gate_to_trap(in, entry[0], entry[1], &traps[out]))
470 out++;
471 }
472 traps[out].address = 0;
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473}
474
475void xen_copy_trap_info(struct trap_info *traps)
476{
6b68f01b 477 const struct desc_ptr *desc = &__get_cpu_var(idt_desc);
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478
479 xen_convert_trap_info(desc, traps);
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480}
481
482/* Load a new IDT into Xen. In principle this can be per-CPU, so we
483 hold a spinlock to protect the static traps[] array (static because
484 it avoids allocation, and saves stack space). */
6b68f01b 485static void xen_load_idt(const struct desc_ptr *desc)
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486{
487 static DEFINE_SPINLOCK(lock);
488 static struct trap_info traps[257];
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489
490 spin_lock(&lock);
491
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492 __get_cpu_var(idt_desc) = *desc;
493
f87e4cac 494 xen_convert_trap_info(desc, traps);
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495
496 xen_mc_flush();
497 if (HYPERVISOR_set_trap_table(traps))
498 BUG();
499
500 spin_unlock(&lock);
501}
502
503/* Write a GDT descriptor entry. Ignore LDT descriptors, since
504 they're handled differently. */
505static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
014b15be 506 const void *desc, int type)
5ead97c8 507{
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508 preempt_disable();
509
014b15be
GOC
510 switch (type) {
511 case DESC_LDT:
512 case DESC_TSS:
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513 /* ignore */
514 break;
515
516 default: {
517 xmaddr_t maddr = virt_to_machine(&dt[entry]);
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518
519 xen_mc_flush();
014b15be 520 if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
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521 BUG();
522 }
523
524 }
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525
526 preempt_enable();
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527}
528
faca6227 529static void xen_load_sp0(struct tss_struct *tss,
f120f13e 530 struct thread_struct *thread)
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531{
532 struct multicall_space mcs = xen_mc_entry(0);
faca6227 533 MULTI_stack_switch(mcs.mc, __KERNEL_DS, thread->sp0);
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534 xen_mc_issue(PARAVIRT_LAZY_CPU);
535}
536
537static void xen_set_iopl_mask(unsigned mask)
538{
539 struct physdev_set_iopl set_iopl;
540
541 /* Force the change at ring 0. */
542 set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
543 HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
544}
545
546static void xen_io_delay(void)
547{
548}
549
550#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 551static u32 xen_apic_read(u32 reg)
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552{
553 return 0;
554}
f87e4cac 555
ad66dd34 556static void xen_apic_write(u32 reg, u32 val)
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557{
558 /* Warn to see if there's any stray references */
559 WARN_ON(1);
560}
ad66dd34
SS
561
562#ifdef CONFIG_X86_64
563static u64 xen_apic_icr_read(void)
564{
565 return 0;
566}
567
568static void xen_apic_icr_write(u32 low, u32 id)
569{
570 /* Warn to see if there's any stray references */
571 WARN_ON(1);
572}
573
574static void xen_apic_wait_icr_idle(void)
575{
576 return;
577}
578
579static struct apic_ops xen_basic_apic_ops = {
580 .read = xen_apic_read,
581 .write = xen_apic_write,
582 .write_atomic = xen_apic_write,
583 .icr_read = xen_apic_icr_read,
584 .icr_write = xen_apic_icr_write,
585 .wait_icr_idle = xen_apic_wait_icr_idle,
586 .safe_wait_icr_idle = xen_apic_wait_icr_idle,
587};
588#endif
589
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590#endif
591
592static void xen_flush_tlb(void)
593{
d66bf8fc 594 struct mmuext_op *op;
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595 struct multicall_space mcs;
596
597 preempt_disable();
598
599 mcs = xen_mc_entry(sizeof(*op));
5ead97c8 600
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601 op = mcs.args;
602 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
603 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
604
605 xen_mc_issue(PARAVIRT_LAZY_MMU);
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606
607 preempt_enable();
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608}
609
610static void xen_flush_tlb_single(unsigned long addr)
611{
d66bf8fc 612 struct mmuext_op *op;
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613 struct multicall_space mcs;
614
615 preempt_disable();
5ead97c8 616
41e332b2 617 mcs = xen_mc_entry(sizeof(*op));
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618 op = mcs.args;
619 op->cmd = MMUEXT_INVLPG_LOCAL;
620 op->arg1.linear_addr = addr & PAGE_MASK;
621 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
622
623 xen_mc_issue(PARAVIRT_LAZY_MMU);
41e332b2
JF
624
625 preempt_enable();
5ead97c8
JF
626}
627
f87e4cac
JF
628static void xen_flush_tlb_others(const cpumask_t *cpus, struct mm_struct *mm,
629 unsigned long va)
630{
d66bf8fc
JF
631 struct {
632 struct mmuext_op op;
633 cpumask_t mask;
634 } *args;
f87e4cac 635 cpumask_t cpumask = *cpus;
d66bf8fc 636 struct multicall_space mcs;
f87e4cac
JF
637
638 /*
639 * A couple of (to be removed) sanity checks:
640 *
641 * - current CPU must not be in mask
642 * - mask must exist :)
643 */
644 BUG_ON(cpus_empty(cpumask));
645 BUG_ON(cpu_isset(smp_processor_id(), cpumask));
646 BUG_ON(!mm);
647
648 /* If a CPU which we ran on has gone down, OK. */
649 cpus_and(cpumask, cpumask, cpu_online_map);
650 if (cpus_empty(cpumask))
651 return;
652
d66bf8fc
JF
653 mcs = xen_mc_entry(sizeof(*args));
654 args = mcs.args;
655 args->mask = cpumask;
656 args->op.arg2.vcpumask = &args->mask;
657
f87e4cac 658 if (va == TLB_FLUSH_ALL) {
d66bf8fc 659 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
f87e4cac 660 } else {
d66bf8fc
JF
661 args->op.cmd = MMUEXT_INVLPG_MULTI;
662 args->op.arg1.linear_addr = va;
f87e4cac
JF
663 }
664
d66bf8fc
JF
665 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
666
667 xen_mc_issue(PARAVIRT_LAZY_MMU);
f87e4cac
JF
668}
669
7b1333aa
JF
670static void xen_clts(void)
671{
672 struct multicall_space mcs;
673
674 mcs = xen_mc_entry(0);
675
676 MULTI_fpu_taskswitch(mcs.mc, 0);
677
678 xen_mc_issue(PARAVIRT_LAZY_CPU);
679}
680
681static void xen_write_cr0(unsigned long cr0)
682{
683 struct multicall_space mcs;
684
685 /* Only pay attention to cr0.TS; everything else is
686 ignored. */
687 mcs = xen_mc_entry(0);
688
689 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
690
691 xen_mc_issue(PARAVIRT_LAZY_CPU);
692}
693
60223a32
JF
694static void xen_write_cr2(unsigned long cr2)
695{
696 x86_read_percpu(xen_vcpu)->arch.cr2 = cr2;
697}
698
5ead97c8
JF
699static unsigned long xen_read_cr2(void)
700{
701 return x86_read_percpu(xen_vcpu)->arch.cr2;
702}
703
60223a32
JF
704static unsigned long xen_read_cr2_direct(void)
705{
706 return x86_read_percpu(xen_vcpu_info.arch.cr2);
707}
708
5ead97c8
JF
709static void xen_write_cr4(unsigned long cr4)
710{
2956a351
JF
711 cr4 &= ~X86_CR4_PGE;
712 cr4 &= ~X86_CR4_PSE;
713
714 native_write_cr4(cr4);
5ead97c8
JF
715}
716
5ead97c8
JF
717static unsigned long xen_read_cr3(void)
718{
719 return x86_read_percpu(xen_cr3);
720}
721
9f79991d
JF
722static void set_current_cr3(void *v)
723{
724 x86_write_percpu(xen_current_cr3, (unsigned long)v);
725}
726
5ead97c8
JF
727static void xen_write_cr3(unsigned long cr3)
728{
9f79991d
JF
729 struct mmuext_op *op;
730 struct multicall_space mcs;
731 unsigned long mfn = pfn_to_mfn(PFN_DOWN(cr3));
732
f120f13e
JF
733 BUG_ON(preemptible());
734
9f79991d 735 mcs = xen_mc_entry(sizeof(*op)); /* disables interrupts */
5ead97c8 736
9f79991d
JF
737 /* Update while interrupts are disabled, so its atomic with
738 respect to ipis */
5ead97c8
JF
739 x86_write_percpu(xen_cr3, cr3);
740
9f79991d
JF
741 op = mcs.args;
742 op->cmd = MMUEXT_NEW_BASEPTR;
743 op->arg1.mfn = mfn;
5ead97c8 744
9f79991d 745 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
5ead97c8 746
9f79991d
JF
747 /* Update xen_update_cr3 once the batch has actually
748 been submitted. */
749 xen_mc_callback(set_current_cr3, (void *)cr3);
5ead97c8 750
9f79991d 751 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
5ead97c8
JF
752}
753
f4f97b3e
JF
754/* Early in boot, while setting up the initial pagetable, assume
755 everything is pinned. */
6944a9c8 756static __init void xen_alloc_pte_init(struct mm_struct *mm, u32 pfn)
5ead97c8 757{
af7ae3b9 758#ifdef CONFIG_FLATMEM
f4f97b3e 759 BUG_ON(mem_map); /* should only be used early */
af7ae3b9 760#endif
5ead97c8
JF
761 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
762}
763
6944a9c8 764/* Early release_pte assumes that all pts are pinned, since there's
1c70e9bd 765 only init_mm and anything attached to that is pinned. */
6944a9c8 766static void xen_release_pte_init(u32 pfn)
1c70e9bd
JF
767{
768 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
769}
770
f6433706 771static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
74260714
JF
772{
773 struct mmuext_op op;
f6433706 774 op.cmd = cmd;
74260714
JF
775 op.arg1.mfn = pfn_to_mfn(pfn);
776 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
777 BUG();
778}
779
f4f97b3e
JF
780/* This needs to make sure the new pte page is pinned iff its being
781 attached to a pinned pagetable. */
1c70e9bd 782static void xen_alloc_ptpage(struct mm_struct *mm, u32 pfn, unsigned level)
5ead97c8 783{
f4f97b3e 784 struct page *page = pfn_to_page(pfn);
5ead97c8 785
f4f97b3e
JF
786 if (PagePinned(virt_to_page(mm->pgd))) {
787 SetPagePinned(page);
788
74260714 789 if (!PageHighMem(page)) {
f4f97b3e 790 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
f6433706
MM
791 if (level == PT_PTE)
792 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
74260714 793 } else
f4f97b3e
JF
794 /* make sure there are no stray mappings of
795 this page */
796 kmap_flush_unused();
797 }
5ead97c8
JF
798}
799
6944a9c8 800static void xen_alloc_pte(struct mm_struct *mm, u32 pfn)
1c70e9bd 801{
f6433706 802 xen_alloc_ptpage(mm, pfn, PT_PTE);
1c70e9bd
JF
803}
804
6944a9c8 805static void xen_alloc_pmd(struct mm_struct *mm, u32 pfn)
1c70e9bd 806{
f6433706 807 xen_alloc_ptpage(mm, pfn, PT_PMD);
1c70e9bd
JF
808}
809
f4f97b3e 810/* This should never happen until we're OK to use struct page */
f6433706 811static void xen_release_ptpage(u32 pfn, unsigned level)
5ead97c8 812{
f4f97b3e
JF
813 struct page *page = pfn_to_page(pfn);
814
815 if (PagePinned(page)) {
74260714 816 if (!PageHighMem(page)) {
a684d69d
MM
817 if (level == PT_PTE)
818 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
f4f97b3e 819 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
74260714 820 }
c946c7de 821 ClearPagePinned(page);
f4f97b3e 822 }
5ead97c8
JF
823}
824
6944a9c8 825static void xen_release_pte(u32 pfn)
f6433706
MM
826{
827 xen_release_ptpage(pfn, PT_PTE);
828}
829
6944a9c8 830static void xen_release_pmd(u32 pfn)
f6433706
MM
831{
832 xen_release_ptpage(pfn, PT_PMD);
833}
834
f4f97b3e
JF
835#ifdef CONFIG_HIGHPTE
836static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
5ead97c8 837{
f4f97b3e
JF
838 pgprot_t prot = PAGE_KERNEL;
839
840 if (PagePinned(page))
841 prot = PAGE_KERNEL_RO;
842
843 if (0 && PageHighMem(page))
844 printk("mapping highpte %lx type %d prot %s\n",
845 page_to_pfn(page), type,
846 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
847
848 return kmap_atomic_prot(page, type, prot);
5ead97c8 849}
f4f97b3e 850#endif
5ead97c8 851
9a4029fd
JF
852static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
853{
854 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
855 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
856 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
857 pte_val_ma(pte));
858
859 return pte;
860}
861
862/* Init-time set_pte while constructing initial pagetables, which
863 doesn't allow RO pagetable pages to be remapped RW */
864static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
865{
866 pte = mask_rw_pte(ptep, pte);
867
868 xen_set_pte(ptep, pte);
869}
870
5ead97c8
JF
871static __init void xen_pagetable_setup_start(pgd_t *base)
872{
873 pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base;
3843fc25 874 int i;
5ead97c8 875
9a4029fd 876 /* special set_pte for pagetable initialization */
93b1eab3 877 pv_mmu_ops.set_pte = xen_set_pte_init;
9a4029fd 878
5ead97c8
JF
879 init_mm.pgd = base;
880 /*
3843fc25
JF
881 * copy top-level of Xen-supplied pagetable into place. This
882 * is a stand-in while we copy the pmd pages.
5ead97c8
JF
883 */
884 memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t));
885
3843fc25
JF
886 /*
887 * For PAE, need to allocate new pmds, rather than
888 * share Xen's, since Xen doesn't like pmd's being
889 * shared between address spaces.
890 */
891 for (i = 0; i < PTRS_PER_PGD; i++) {
892 if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) {
893 pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
5ead97c8 894
3843fc25
JF
895 memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]),
896 PAGE_SIZE);
5ead97c8 897
3843fc25 898 make_lowmem_page_readonly(pmd);
5ead97c8 899
3843fc25
JF
900 set_pgd(&base[i], __pgd(1 + __pa(pmd)));
901 } else
902 pgd_clear(&base[i]);
5ead97c8
JF
903 }
904
905 /* make sure zero_page is mapped RO so we can use it in pagetables */
906 make_lowmem_page_readonly(empty_zero_page);
907 make_lowmem_page_readonly(base);
908 /*
909 * Switch to new pagetable. This is done before
910 * pagetable_init has done anything so that the new pages
911 * added to the table can be prepared properly for Xen.
912 */
913 xen_write_cr3(__pa(base));
2b540781
JF
914
915 /* Unpin initial Xen pagetable */
916 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
917 PFN_DOWN(__pa(xen_start_info->pt_base)));
5ead97c8
JF
918}
919
0e91398f 920void xen_setup_shared_info(void)
5ead97c8
JF
921{
922 if (!xen_feature(XENFEAT_auto_translated_physmap)) {
2e8fe719
JF
923 unsigned long addr = fix_to_virt(FIX_PARAVIRT_BOOTMAP);
924
5ead97c8
JF
925 /*
926 * Create a mapping for the shared info page.
927 * Should be set_fixmap(), but shared_info is a machine
928 * address with no corresponding pseudo-phys address.
929 */
2e8fe719 930 set_pte_mfn(addr,
5ead97c8
JF
931 PFN_DOWN(xen_start_info->shared_info),
932 PAGE_KERNEL);
5ead97c8 933
2e8fe719 934 HYPERVISOR_shared_info = (struct shared_info *)addr;
5ead97c8
JF
935 } else
936 HYPERVISOR_shared_info =
937 (struct shared_info *)__va(xen_start_info->shared_info);
938
2e8fe719
JF
939#ifndef CONFIG_SMP
940 /* In UP this is as good a place as any to set up shared info */
941 xen_setup_vcpu_info_placement();
942#endif
d5edbc1f
JF
943
944 xen_setup_mfn_list_list();
2e8fe719
JF
945}
946
947static __init void xen_pagetable_setup_done(pgd_t *base)
948{
949 /* This will work as long as patching hasn't happened yet
950 (which it hasn't) */
6944a9c8
JF
951 pv_mmu_ops.alloc_pte = xen_alloc_pte;
952 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
953 pv_mmu_ops.release_pte = xen_release_pte;
954 pv_mmu_ops.release_pmd = xen_release_pmd;
2e8fe719
JF
955 pv_mmu_ops.set_pte = xen_set_pte;
956
0e91398f 957 xen_setup_shared_info();
2e8fe719 958
f4f97b3e
JF
959 /* Actually pin the pagetable down, but we can't set PG_pinned
960 yet because the page structures don't exist yet. */
3843fc25 961 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base)));
60223a32 962}
5ead97c8 963
e2426cf8
JF
964static __init void xen_post_allocator_init(void)
965{
966 pv_mmu_ops.set_pmd = xen_set_pmd;
967 pv_mmu_ops.set_pud = xen_set_pud;
968
969 xen_mark_init_mm_pinned();
970}
971
60223a32 972/* This is called once we have the cpu_possible_map */
0e91398f 973void xen_setup_vcpu_info_placement(void)
60223a32
JF
974{
975 int cpu;
976
977 for_each_possible_cpu(cpu)
978 xen_vcpu_setup(cpu);
979
980 /* xen_vcpu_setup managed to place the vcpu_info within the
981 percpu area for all cpus, so make use of it */
982 if (have_vcpu_info_placement) {
983 printk(KERN_INFO "Xen: using vcpu_info placement\n");
984
93b1eab3
JF
985 pv_irq_ops.save_fl = xen_save_fl_direct;
986 pv_irq_ops.restore_fl = xen_restore_fl_direct;
987 pv_irq_ops.irq_disable = xen_irq_disable_direct;
988 pv_irq_ops.irq_enable = xen_irq_enable_direct;
989 pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
60223a32 990 }
5ead97c8
JF
991}
992
ab144f5e
AK
993static unsigned xen_patch(u8 type, u16 clobbers, void *insnbuf,
994 unsigned long addr, unsigned len)
6487673b
JF
995{
996 char *start, *end, *reloc;
997 unsigned ret;
998
999 start = end = reloc = NULL;
1000
93b1eab3
JF
1001#define SITE(op, x) \
1002 case PARAVIRT_PATCH(op.x): \
6487673b
JF
1003 if (have_vcpu_info_placement) { \
1004 start = (char *)xen_##x##_direct; \
1005 end = xen_##x##_direct_end; \
1006 reloc = xen_##x##_direct_reloc; \
1007 } \
1008 goto patch_site
1009
1010 switch (type) {
93b1eab3
JF
1011 SITE(pv_irq_ops, irq_enable);
1012 SITE(pv_irq_ops, irq_disable);
1013 SITE(pv_irq_ops, save_fl);
1014 SITE(pv_irq_ops, restore_fl);
6487673b
JF
1015#undef SITE
1016
1017 patch_site:
1018 if (start == NULL || (end-start) > len)
1019 goto default_patch;
1020
ab144f5e 1021 ret = paravirt_patch_insns(insnbuf, len, start, end);
6487673b
JF
1022
1023 /* Note: because reloc is assigned from something that
1024 appears to be an array, gcc assumes it's non-null,
1025 but doesn't know its relationship with start and
1026 end. */
1027 if (reloc > start && reloc < end) {
1028 int reloc_off = reloc - start;
ab144f5e
AK
1029 long *relocp = (long *)(insnbuf + reloc_off);
1030 long delta = start - (char *)addr;
6487673b
JF
1031
1032 *relocp += delta;
1033 }
1034 break;
1035
1036 default_patch:
1037 default:
ab144f5e
AK
1038 ret = paravirt_patch_default(type, clobbers, insnbuf,
1039 addr, len);
6487673b
JF
1040 break;
1041 }
1042
1043 return ret;
1044}
1045
aeaaa59c
JF
1046static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1047{
1048 pte_t pte;
1049
1050 phys >>= PAGE_SHIFT;
1051
1052 switch (idx) {
1053 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1054#ifdef CONFIG_X86_F00F_BUG
1055 case FIX_F00F_IDT:
1056#endif
1057 case FIX_WP_TEST:
1058 case FIX_VDSO:
1059#ifdef CONFIG_X86_LOCAL_APIC
1060 case FIX_APIC_BASE: /* maps dummy local APIC */
1061#endif
1062 pte = pfn_pte(phys, prot);
1063 break;
1064
1065 default:
1066 pte = mfn_pte(phys, prot);
1067 break;
1068 }
1069
1070 __native_set_fixmap(idx, pte);
1071}
1072
93b1eab3 1073static const struct pv_info xen_info __initdata = {
5ead97c8
JF
1074 .paravirt_enabled = 1,
1075 .shared_kernel_pmd = 0,
1076
1077 .name = "Xen",
93b1eab3 1078};
5ead97c8 1079
93b1eab3 1080static const struct pv_init_ops xen_init_ops __initdata = {
6487673b 1081 .patch = xen_patch,
5ead97c8 1082
93b1eab3 1083 .banner = xen_banner,
5ead97c8
JF
1084 .memory_setup = xen_memory_setup,
1085 .arch_setup = xen_arch_setup,
e2426cf8 1086 .post_allocator_init = xen_post_allocator_init,
93b1eab3 1087};
5ead97c8 1088
93b1eab3 1089static const struct pv_time_ops xen_time_ops __initdata = {
15c84731 1090 .time_init = xen_time_init,
93b1eab3 1091
15c84731
JF
1092 .set_wallclock = xen_set_wallclock,
1093 .get_wallclock = xen_get_wallclock,
e93ef949 1094 .get_tsc_khz = xen_tsc_khz,
ab550288 1095 .sched_clock = xen_sched_clock,
93b1eab3 1096};
15c84731 1097
93b1eab3 1098static const struct pv_cpu_ops xen_cpu_ops __initdata = {
5ead97c8
JF
1099 .cpuid = xen_cpuid,
1100
1101 .set_debugreg = xen_set_debugreg,
1102 .get_debugreg = xen_get_debugreg,
1103
7b1333aa 1104 .clts = xen_clts,
5ead97c8
JF
1105
1106 .read_cr0 = native_read_cr0,
7b1333aa 1107 .write_cr0 = xen_write_cr0,
5ead97c8 1108
5ead97c8
JF
1109 .read_cr4 = native_read_cr4,
1110 .read_cr4_safe = native_read_cr4_safe,
1111 .write_cr4 = xen_write_cr4,
1112
5ead97c8
JF
1113 .wbinvd = native_wbinvd,
1114
1115 .read_msr = native_read_msr_safe,
1116 .write_msr = native_write_msr_safe,
1117 .read_tsc = native_read_tsc,
1118 .read_pmc = native_read_pmc,
1119
81e103f1 1120 .iret = xen_iret,
d75cd22f 1121 .irq_enable_sysexit = xen_sysexit,
5ead97c8
JF
1122
1123 .load_tr_desc = paravirt_nop,
1124 .set_ldt = xen_set_ldt,
1125 .load_gdt = xen_load_gdt,
1126 .load_idt = xen_load_idt,
1127 .load_tls = xen_load_tls,
1128
1129 .store_gdt = native_store_gdt,
1130 .store_idt = native_store_idt,
1131 .store_tr = xen_store_tr,
1132
1133 .write_ldt_entry = xen_write_ldt_entry,
1134 .write_gdt_entry = xen_write_gdt_entry,
1135 .write_idt_entry = xen_write_idt_entry,
faca6227 1136 .load_sp0 = xen_load_sp0,
5ead97c8
JF
1137
1138 .set_iopl_mask = xen_set_iopl_mask,
1139 .io_delay = xen_io_delay,
1140
8965c1c0
JF
1141 .lazy_mode = {
1142 .enter = paravirt_enter_lazy_cpu,
1143 .leave = xen_leave_lazy,
1144 },
93b1eab3
JF
1145};
1146
1147static const struct pv_irq_ops xen_irq_ops __initdata = {
1148 .init_IRQ = xen_init_IRQ,
1149 .save_fl = xen_save_fl,
1150 .restore_fl = xen_restore_fl,
1151 .irq_disable = xen_irq_disable,
1152 .irq_enable = xen_irq_enable,
1153 .safe_halt = xen_safe_halt,
1154 .halt = xen_halt,
fab58420
JF
1155#ifdef CONFIG_X86_64
1156 .adjust_exception_frame = paravirt_nop,
1157#endif
93b1eab3 1158};
5ead97c8 1159
93b1eab3 1160static const struct pv_apic_ops xen_apic_ops __initdata = {
5ead97c8 1161#ifdef CONFIG_X86_LOCAL_APIC
ad66dd34 1162#ifndef CONFIG_X86_64
f87e4cac
JF
1163 .apic_write = xen_apic_write,
1164 .apic_write_atomic = xen_apic_write,
5ead97c8 1165 .apic_read = xen_apic_read,
ad66dd34 1166#endif
5ead97c8
JF
1167 .setup_boot_clock = paravirt_nop,
1168 .setup_secondary_clock = paravirt_nop,
1169 .startup_ipi_hook = paravirt_nop,
1170#endif
93b1eab3
JF
1171};
1172
1173static const struct pv_mmu_ops xen_mmu_ops __initdata = {
1174 .pagetable_setup_start = xen_pagetable_setup_start,
1175 .pagetable_setup_done = xen_pagetable_setup_done,
1176
1177 .read_cr2 = xen_read_cr2,
1178 .write_cr2 = xen_write_cr2,
1179
1180 .read_cr3 = xen_read_cr3,
1181 .write_cr3 = xen_write_cr3,
5ead97c8
JF
1182
1183 .flush_tlb_user = xen_flush_tlb,
1184 .flush_tlb_kernel = xen_flush_tlb,
1185 .flush_tlb_single = xen_flush_tlb_single,
f87e4cac 1186 .flush_tlb_others = xen_flush_tlb_others,
5ead97c8
JF
1187
1188 .pte_update = paravirt_nop,
1189 .pte_update_defer = paravirt_nop,
1190
eba0045f
JF
1191 .pgd_alloc = __paravirt_pgd_alloc,
1192 .pgd_free = paravirt_nop,
1193
6944a9c8
JF
1194 .alloc_pte = xen_alloc_pte_init,
1195 .release_pte = xen_release_pte_init,
1196 .alloc_pmd = xen_alloc_pte_init,
1197 .alloc_pmd_clone = paravirt_nop,
1198 .release_pmd = xen_release_pte_init,
f4f97b3e
JF
1199
1200#ifdef CONFIG_HIGHPTE
1201 .kmap_atomic_pte = xen_kmap_atomic_pte,
1202#endif
5ead97c8 1203
9a4029fd 1204 .set_pte = NULL, /* see xen_pagetable_setup_* */
3b827c1b 1205 .set_pte_at = xen_set_pte_at,
e2426cf8 1206 .set_pmd = xen_set_pmd_hyper,
3b827c1b 1207
08b882c6
JF
1208 .ptep_modify_prot_start = __ptep_modify_prot_start,
1209 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1210
3b827c1b 1211 .pte_val = xen_pte_val,
a15af1c9 1212 .pte_flags = native_pte_val,
3b827c1b
JF
1213 .pgd_val = xen_pgd_val,
1214
1215 .make_pte = xen_make_pte,
1216 .make_pgd = xen_make_pgd,
1217
3b827c1b
JF
1218 .set_pte_atomic = xen_set_pte_atomic,
1219 .set_pte_present = xen_set_pte_at,
e2426cf8 1220 .set_pud = xen_set_pud_hyper,
3b827c1b
JF
1221 .pte_clear = xen_pte_clear,
1222 .pmd_clear = xen_pmd_clear,
1223
1224 .make_pmd = xen_make_pmd,
1225 .pmd_val = xen_pmd_val,
3b827c1b
JF
1226
1227 .activate_mm = xen_activate_mm,
1228 .dup_mmap = xen_dup_mmap,
1229 .exit_mmap = xen_exit_mmap,
1230
8965c1c0
JF
1231 .lazy_mode = {
1232 .enter = paravirt_enter_lazy_mmu,
1233 .leave = xen_leave_lazy,
1234 },
aeaaa59c
JF
1235
1236 .set_fixmap = xen_set_fixmap,
5ead97c8
JF
1237};
1238
f87e4cac
JF
1239#ifdef CONFIG_SMP
1240static const struct smp_ops xen_smp_ops __initdata = {
1241 .smp_prepare_boot_cpu = xen_smp_prepare_boot_cpu,
1242 .smp_prepare_cpus = xen_smp_prepare_cpus,
1243 .cpu_up = xen_cpu_up,
1244 .smp_cpus_done = xen_smp_cpus_done,
1245
1246 .smp_send_stop = xen_smp_send_stop,
1247 .smp_send_reschedule = xen_smp_send_reschedule,
1248 .smp_call_function_mask = xen_smp_call_function_mask,
1249};
1250#endif /* CONFIG_SMP */
1251
fefa629a
JF
1252static void xen_reboot(int reason)
1253{
349c709f
JF
1254 struct sched_shutdown r = { .reason = reason };
1255
fefa629a
JF
1256#ifdef CONFIG_SMP
1257 smp_send_stop();
1258#endif
1259
349c709f 1260 if (HYPERVISOR_sched_op(SCHEDOP_shutdown, &r))
fefa629a
JF
1261 BUG();
1262}
1263
1264static void xen_restart(char *msg)
1265{
1266 xen_reboot(SHUTDOWN_reboot);
1267}
1268
1269static void xen_emergency_restart(void)
1270{
1271 xen_reboot(SHUTDOWN_reboot);
1272}
1273
1274static void xen_machine_halt(void)
1275{
1276 xen_reboot(SHUTDOWN_poweroff);
1277}
1278
1279static void xen_crash_shutdown(struct pt_regs *regs)
1280{
1281 xen_reboot(SHUTDOWN_crash);
1282}
1283
1284static const struct machine_ops __initdata xen_machine_ops = {
1285 .restart = xen_restart,
1286 .halt = xen_machine_halt,
1287 .power_off = xen_machine_halt,
1288 .shutdown = xen_machine_halt,
1289 .crash_shutdown = xen_crash_shutdown,
1290 .emergency_restart = xen_emergency_restart,
1291};
1292
6487673b 1293
fb1d8404
JF
1294static void __init xen_reserve_top(void)
1295{
1296 unsigned long top = HYPERVISOR_VIRT_START;
1297 struct xen_platform_parameters pp;
1298
1299 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1300 top = pp.virt_start;
1301
1302 reserve_top_address(-top + 2 * PAGE_SIZE);
1303}
1304
5ead97c8
JF
1305/* First C function to be called on Xen boot */
1306asmlinkage void __init xen_start_kernel(void)
1307{
1308 pgd_t *pgd;
1309
1310 if (!xen_start_info)
1311 return;
1312
7999f4b4 1313 BUG_ON(memcmp(xen_start_info->magic, "xen-3", 5) != 0);
5ead97c8 1314
e57778a1
JF
1315 xen_setup_features();
1316
5ead97c8 1317 /* Install Xen paravirt ops */
93b1eab3
JF
1318 pv_info = xen_info;
1319 pv_init_ops = xen_init_ops;
1320 pv_time_ops = xen_time_ops;
1321 pv_cpu_ops = xen_cpu_ops;
1322 pv_irq_ops = xen_irq_ops;
1323 pv_apic_ops = xen_apic_ops;
1324 pv_mmu_ops = xen_mmu_ops;
ad66dd34
SS
1325#ifdef CONFIG_X86_64
1326 /*
1327 * for 64bit, set up the basic apic ops aswell.
1328 */
1329 apic_ops = &xen_basic_apic_ops;
1330#endif
93b1eab3 1331
e57778a1
JF
1332 if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1333 pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1334 pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1335 }
1336
fefa629a
JF
1337 machine_ops = xen_machine_ops;
1338
f87e4cac
JF
1339#ifdef CONFIG_SMP
1340 smp_ops = xen_smp_ops;
1341#endif
5ead97c8 1342
5ead97c8
JF
1343 /* Get mfn list */
1344 if (!xen_feature(XENFEAT_auto_translated_physmap))
d451bb7a 1345 xen_build_dynamic_phys_to_machine();
5ead97c8
JF
1346
1347 pgd = (pgd_t *)xen_start_info->pt_base;
1348
f0d43100 1349 init_pg_tables_start = __pa(pgd);
5ead97c8 1350 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
88a6846c 1351 max_pfn_mapped = (init_pg_tables_end + 512*1024) >> PAGE_SHIFT;
5ead97c8
JF
1352
1353 init_mm.pgd = pgd; /* use the Xen pagetables to start */
1354
1355 /* keep using Xen gdt for now; no urgent need to change it */
1356
1357 x86_write_percpu(xen_cr3, __pa(pgd));
9f79991d 1358 x86_write_percpu(xen_current_cr3, __pa(pgd));
60223a32 1359
60223a32 1360 /* Don't do the full vcpu_info placement stuff until we have a
2e8fe719 1361 possible map and a non-dummy shared_info. */
60223a32 1362 per_cpu(xen_vcpu, 0) = &HYPERVISOR_shared_info->vcpu_info[0];
5ead97c8 1363
93b1eab3 1364 pv_info.kernel_rpl = 1;
5ead97c8 1365 if (xen_feature(XENFEAT_supervisor_mode_kernel))
93b1eab3 1366 pv_info.kernel_rpl = 0;
5ead97c8 1367
eb179e44
JF
1368 /* Prevent unwanted bits from being set in PTEs. */
1369 __supported_pte_mask &= ~_PAGE_GLOBAL;
1370 if (!is_initial_xendomain())
1371 __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
1372
5ead97c8 1373 /* set the limit of our address space */
fb1d8404 1374 xen_reserve_top();
5ead97c8
JF
1375
1376 /* set up basic CPUID stuff */
1377 cpu_detect(&new_cpu_data);
1378 new_cpu_data.hard_math = 1;
1379 new_cpu_data.x86_capability[0] = cpuid_edx(1);
1380
1381 /* Poke various useful things into boot_params */
30c82645
PA
1382 boot_params.hdr.type_of_loader = (9 << 4) | 0;
1383 boot_params.hdr.ramdisk_image = xen_start_info->mod_start
1384 ? __pa(xen_start_info->mod_start) : 0;
1385 boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
5ead97c8 1386
9e124fe1 1387 if (!is_initial_xendomain()) {
83abc70a 1388 add_preferred_console("xenboot", 0, NULL);
9e124fe1 1389 add_preferred_console("tty", 0, NULL);
b8c2d3df 1390 add_preferred_console("hvc", 0, NULL);
9e124fe1 1391 }
b8c2d3df 1392
5ead97c8 1393 /* Start the world */
f0d43100 1394 i386_start_kernel();
5ead97c8 1395}
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