x86/paravirt: finish change from lazy cpu to context switch start/end
[deliverable/linux.git] / arch / x86 / xen / mmu.c
CommitLineData
3b827c1b
JF
1/*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
f120f13e 41#include <linux/sched.h>
f4f97b3e 42#include <linux/highmem.h>
994025ca 43#include <linux/debugfs.h>
3b827c1b 44#include <linux/bug.h>
3b827c1b
JF
45
46#include <asm/pgtable.h>
47#include <asm/tlbflush.h>
5deb30d1 48#include <asm/fixmap.h>
3b827c1b 49#include <asm/mmu_context.h>
319f3ba5 50#include <asm/setup.h>
f4f97b3e 51#include <asm/paravirt.h>
cbcd79c2 52#include <asm/linkage.h>
3b827c1b
JF
53
54#include <asm/xen/hypercall.h>
f4f97b3e 55#include <asm/xen/hypervisor.h>
3b827c1b
JF
56
57#include <xen/page.h>
58#include <xen/interface/xen.h>
319f3ba5
JF
59#include <xen/interface/version.h>
60#include <xen/hvc-console.h>
3b827c1b 61
f4f97b3e 62#include "multicalls.h"
3b827c1b 63#include "mmu.h"
994025ca
JF
64#include "debugfs.h"
65
66#define MMU_UPDATE_HISTO 30
67
68#ifdef CONFIG_XEN_DEBUG_FS
69
70static struct {
71 u32 pgd_update;
72 u32 pgd_update_pinned;
73 u32 pgd_update_batched;
74
75 u32 pud_update;
76 u32 pud_update_pinned;
77 u32 pud_update_batched;
78
79 u32 pmd_update;
80 u32 pmd_update_pinned;
81 u32 pmd_update_batched;
82
83 u32 pte_update;
84 u32 pte_update_pinned;
85 u32 pte_update_batched;
86
87 u32 mmu_update;
88 u32 mmu_update_extended;
89 u32 mmu_update_histo[MMU_UPDATE_HISTO];
90
91 u32 prot_commit;
92 u32 prot_commit_batched;
93
94 u32 set_pte_at;
95 u32 set_pte_at_batched;
96 u32 set_pte_at_pinned;
97 u32 set_pte_at_current;
98 u32 set_pte_at_kernel;
99} mmu_stats;
100
101static u8 zero_stats;
102
103static inline void check_zero(void)
104{
105 if (unlikely(zero_stats)) {
106 memset(&mmu_stats, 0, sizeof(mmu_stats));
107 zero_stats = 0;
108 }
109}
110
111#define ADD_STATS(elem, val) \
112 do { check_zero(); mmu_stats.elem += (val); } while(0)
113
114#else /* !CONFIG_XEN_DEBUG_FS */
115
116#define ADD_STATS(elem, val) do { (void)(val); } while(0)
117
118#endif /* CONFIG_XEN_DEBUG_FS */
3b827c1b 119
319f3ba5
JF
120
121/*
122 * Identity map, in addition to plain kernel map. This needs to be
123 * large enough to allocate page table pages to allocate the rest.
124 * Each page can map 2MB.
125 */
126static pte_t level1_ident_pgt[PTRS_PER_PTE * 4] __page_aligned_bss;
127
128#ifdef CONFIG_X86_64
129/* l3 pud for userspace vsyscall mapping */
130static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
131#endif /* CONFIG_X86_64 */
132
133/*
134 * Note about cr3 (pagetable base) values:
135 *
136 * xen_cr3 contains the current logical cr3 value; it contains the
137 * last set cr3. This may not be the current effective cr3, because
138 * its update may be being lazily deferred. However, a vcpu looking
139 * at its own cr3 can use this value knowing that it everything will
140 * be self-consistent.
141 *
142 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
143 * hypercall to set the vcpu cr3 is complete (so it may be a little
144 * out of date, but it will never be set early). If one vcpu is
145 * looking at another vcpu's cr3 value, it should use this variable.
146 */
147DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
148DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
149
150
d6182fbf
JF
151/*
152 * Just beyond the highest usermode address. STACK_TOP_MAX has a
153 * redzone above it, so round it up to a PGD boundary.
154 */
155#define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
156
157
d451bb7a 158#define P2M_ENTRIES_PER_PAGE (PAGE_SIZE / sizeof(unsigned long))
cf0923ea 159#define TOP_ENTRIES (MAX_DOMAIN_PAGES / P2M_ENTRIES_PER_PAGE)
d451bb7a 160
cf0923ea 161/* Placeholder for holes in the address space */
cbcd79c2 162static unsigned long p2m_missing[P2M_ENTRIES_PER_PAGE] __page_aligned_data =
cf0923ea
JF
163 { [ 0 ... P2M_ENTRIES_PER_PAGE-1 ] = ~0UL };
164
165 /* Array of pointers to pages containing p2m entries */
cbcd79c2 166static unsigned long *p2m_top[TOP_ENTRIES] __page_aligned_data =
cf0923ea 167 { [ 0 ... TOP_ENTRIES - 1] = &p2m_missing[0] };
d451bb7a 168
d5edbc1f 169/* Arrays of p2m arrays expressed in mfns used for save/restore */
cbcd79c2 170static unsigned long p2m_top_mfn[TOP_ENTRIES] __page_aligned_bss;
d5edbc1f 171
cbcd79c2
JF
172static unsigned long p2m_top_mfn_list[TOP_ENTRIES / P2M_ENTRIES_PER_PAGE]
173 __page_aligned_bss;
d5edbc1f 174
d451bb7a
JF
175static inline unsigned p2m_top_index(unsigned long pfn)
176{
8006ec3e 177 BUG_ON(pfn >= MAX_DOMAIN_PAGES);
d451bb7a
JF
178 return pfn / P2M_ENTRIES_PER_PAGE;
179}
180
181static inline unsigned p2m_index(unsigned long pfn)
182{
183 return pfn % P2M_ENTRIES_PER_PAGE;
184}
185
d5edbc1f
JF
186/* Build the parallel p2m_top_mfn structures */
187void xen_setup_mfn_list_list(void)
188{
189 unsigned pfn, idx;
190
f63c2f24 191 for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_ENTRIES_PER_PAGE) {
d5edbc1f
JF
192 unsigned topidx = p2m_top_index(pfn);
193
194 p2m_top_mfn[topidx] = virt_to_mfn(p2m_top[topidx]);
195 }
196
f63c2f24 197 for (idx = 0; idx < ARRAY_SIZE(p2m_top_mfn_list); idx++) {
d5edbc1f
JF
198 unsigned topidx = idx * P2M_ENTRIES_PER_PAGE;
199 p2m_top_mfn_list[idx] = virt_to_mfn(&p2m_top_mfn[topidx]);
200 }
201
202 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
203
204 HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
205 virt_to_mfn(p2m_top_mfn_list);
206 HYPERVISOR_shared_info->arch.max_pfn = xen_start_info->nr_pages;
207}
208
209/* Set up p2m_top to point to the domain-builder provided p2m pages */
d451bb7a
JF
210void __init xen_build_dynamic_phys_to_machine(void)
211{
d451bb7a 212 unsigned long *mfn_list = (unsigned long *)xen_start_info->mfn_list;
8006ec3e 213 unsigned long max_pfn = min(MAX_DOMAIN_PAGES, xen_start_info->nr_pages);
d5edbc1f 214 unsigned pfn;
d451bb7a 215
f63c2f24 216 for (pfn = 0; pfn < max_pfn; pfn += P2M_ENTRIES_PER_PAGE) {
d451bb7a
JF
217 unsigned topidx = p2m_top_index(pfn);
218
219 p2m_top[topidx] = &mfn_list[pfn];
220 }
221}
222
223unsigned long get_phys_to_machine(unsigned long pfn)
224{
225 unsigned topidx, idx;
226
8006ec3e
JF
227 if (unlikely(pfn >= MAX_DOMAIN_PAGES))
228 return INVALID_P2M_ENTRY;
229
d451bb7a 230 topidx = p2m_top_index(pfn);
d451bb7a
JF
231 idx = p2m_index(pfn);
232 return p2m_top[topidx][idx];
233}
15ce6005 234EXPORT_SYMBOL_GPL(get_phys_to_machine);
d451bb7a 235
d5edbc1f 236static void alloc_p2m(unsigned long **pp, unsigned long *mfnp)
d451bb7a
JF
237{
238 unsigned long *p;
239 unsigned i;
240
241 p = (void *)__get_free_page(GFP_KERNEL | __GFP_NOFAIL);
242 BUG_ON(p == NULL);
243
f63c2f24 244 for (i = 0; i < P2M_ENTRIES_PER_PAGE; i++)
d451bb7a
JF
245 p[i] = INVALID_P2M_ENTRY;
246
cf0923ea 247 if (cmpxchg(pp, p2m_missing, p) != p2m_missing)
d451bb7a 248 free_page((unsigned long)p);
d5edbc1f
JF
249 else
250 *mfnp = virt_to_mfn(p);
d451bb7a
JF
251}
252
253void set_phys_to_machine(unsigned long pfn, unsigned long mfn)
254{
255 unsigned topidx, idx;
256
257 if (unlikely(xen_feature(XENFEAT_auto_translated_physmap))) {
258 BUG_ON(pfn != mfn && mfn != INVALID_P2M_ENTRY);
8006ec3e
JF
259 return;
260 }
261
262 if (unlikely(pfn >= MAX_DOMAIN_PAGES)) {
263 BUG_ON(mfn != INVALID_P2M_ENTRY);
d451bb7a
JF
264 return;
265 }
266
267 topidx = p2m_top_index(pfn);
cf0923ea 268 if (p2m_top[topidx] == p2m_missing) {
d451bb7a
JF
269 /* no need to allocate a page to store an invalid entry */
270 if (mfn == INVALID_P2M_ENTRY)
271 return;
d5edbc1f 272 alloc_p2m(&p2m_top[topidx], &p2m_top_mfn[topidx]);
d451bb7a
JF
273 }
274
275 idx = p2m_index(pfn);
276 p2m_top[topidx][idx] = mfn;
277}
278
9976b39b
JF
279unsigned long arbitrary_virt_to_mfn(void *vaddr)
280{
281 xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
282
283 return PFN_DOWN(maddr.maddr);
284}
285
ce803e70 286xmaddr_t arbitrary_virt_to_machine(void *vaddr)
3b827c1b 287{
ce803e70 288 unsigned long address = (unsigned long)vaddr;
da7bfc50 289 unsigned int level;
9f32d21c
CL
290 pte_t *pte;
291 unsigned offset;
3b827c1b 292
9f32d21c
CL
293 /*
294 * if the PFN is in the linear mapped vaddr range, we can just use
295 * the (quick) virt_to_machine() p2m lookup
296 */
297 if (virt_addr_valid(vaddr))
298 return virt_to_machine(vaddr);
299
300 /* otherwise we have to do a (slower) full page-table walk */
3b827c1b 301
9f32d21c
CL
302 pte = lookup_address(address, &level);
303 BUG_ON(pte == NULL);
304 offset = address & ~PAGE_MASK;
ebd879e3 305 return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
3b827c1b
JF
306}
307
308void make_lowmem_page_readonly(void *vaddr)
309{
310 pte_t *pte, ptev;
311 unsigned long address = (unsigned long)vaddr;
da7bfc50 312 unsigned int level;
3b827c1b 313
f0646e43 314 pte = lookup_address(address, &level);
3b827c1b
JF
315 BUG_ON(pte == NULL);
316
317 ptev = pte_wrprotect(*pte);
318
319 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
320 BUG();
321}
322
323void make_lowmem_page_readwrite(void *vaddr)
324{
325 pte_t *pte, ptev;
326 unsigned long address = (unsigned long)vaddr;
da7bfc50 327 unsigned int level;
3b827c1b 328
f0646e43 329 pte = lookup_address(address, &level);
3b827c1b
JF
330 BUG_ON(pte == NULL);
331
332 ptev = pte_mkwrite(*pte);
333
334 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
335 BUG();
336}
337
338
7708ad64 339static bool xen_page_pinned(void *ptr)
e2426cf8
JF
340{
341 struct page *page = virt_to_page(ptr);
342
343 return PagePinned(page);
344}
345
7708ad64 346static void xen_extend_mmu_update(const struct mmu_update *update)
3b827c1b 347{
d66bf8fc
JF
348 struct multicall_space mcs;
349 struct mmu_update *u;
3b827c1b 350
400d3494
JF
351 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
352
994025ca
JF
353 if (mcs.mc != NULL) {
354 ADD_STATS(mmu_update_extended, 1);
355 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1);
356
400d3494 357 mcs.mc->args[1]++;
994025ca
JF
358
359 if (mcs.mc->args[1] < MMU_UPDATE_HISTO)
360 ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1);
361 else
362 ADD_STATS(mmu_update_histo[0], 1);
363 } else {
364 ADD_STATS(mmu_update, 1);
400d3494
JF
365 mcs = __xen_mc_entry(sizeof(*u));
366 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
994025ca 367 ADD_STATS(mmu_update_histo[1], 1);
400d3494 368 }
d66bf8fc 369
d66bf8fc 370 u = mcs.args;
400d3494
JF
371 *u = *update;
372}
373
374void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
375{
376 struct mmu_update u;
377
378 preempt_disable();
379
380 xen_mc_batch();
381
ce803e70
JF
382 /* ptr may be ioremapped for 64-bit pagetable setup */
383 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 384 u.val = pmd_val_ma(val);
7708ad64 385 xen_extend_mmu_update(&u);
d66bf8fc 386
994025ca
JF
387 ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
388
d66bf8fc
JF
389 xen_mc_issue(PARAVIRT_LAZY_MMU);
390
391 preempt_enable();
3b827c1b
JF
392}
393
e2426cf8
JF
394void xen_set_pmd(pmd_t *ptr, pmd_t val)
395{
994025ca
JF
396 ADD_STATS(pmd_update, 1);
397
e2426cf8
JF
398 /* If page is not pinned, we can just update the entry
399 directly */
7708ad64 400 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
401 *ptr = val;
402 return;
403 }
404
994025ca
JF
405 ADD_STATS(pmd_update_pinned, 1);
406
e2426cf8
JF
407 xen_set_pmd_hyper(ptr, val);
408}
409
3b827c1b
JF
410/*
411 * Associate a virtual page frame with a given physical page frame
412 * and protection flags for that frame.
413 */
414void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
415{
836fe2f2 416 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
3b827c1b
JF
417}
418
419void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
420 pte_t *ptep, pte_t pteval)
421{
2bd50036
JF
422 /* updates to init_mm may be done without lock */
423 if (mm == &init_mm)
424 preempt_disable();
425
994025ca
JF
426 ADD_STATS(set_pte_at, 1);
427// ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
428 ADD_STATS(set_pte_at_current, mm == current->mm);
429 ADD_STATS(set_pte_at_kernel, mm == &init_mm);
430
d66bf8fc 431 if (mm == current->mm || mm == &init_mm) {
8965c1c0 432 if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
d66bf8fc
JF
433 struct multicall_space mcs;
434 mcs = xen_mc_entry(0);
435
436 MULTI_update_va_mapping(mcs.mc, addr, pteval, 0);
994025ca 437 ADD_STATS(set_pte_at_batched, 1);
d66bf8fc 438 xen_mc_issue(PARAVIRT_LAZY_MMU);
2bd50036 439 goto out;
d66bf8fc
JF
440 } else
441 if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0)
2bd50036 442 goto out;
d66bf8fc
JF
443 }
444 xen_set_pte(ptep, pteval);
2bd50036
JF
445
446out:
447 if (mm == &init_mm)
448 preempt_enable();
3b827c1b
JF
449}
450
f63c2f24
T
451pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
452 unsigned long addr, pte_t *ptep)
947a69c9 453{
e57778a1
JF
454 /* Just return the pte as-is. We preserve the bits on commit */
455 return *ptep;
456}
457
458void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
459 pte_t *ptep, pte_t pte)
460{
400d3494 461 struct mmu_update u;
e57778a1 462
400d3494 463 xen_mc_batch();
947a69c9 464
9f32d21c 465 u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
400d3494 466 u.val = pte_val_ma(pte);
7708ad64 467 xen_extend_mmu_update(&u);
947a69c9 468
994025ca
JF
469 ADD_STATS(prot_commit, 1);
470 ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
471
e57778a1 472 xen_mc_issue(PARAVIRT_LAZY_MMU);
947a69c9
JF
473}
474
ebb9cfe2
JF
475/* Assume pteval_t is equivalent to all the other *val_t types. */
476static pteval_t pte_mfn_to_pfn(pteval_t val)
947a69c9 477{
ebb9cfe2 478 if (val & _PAGE_PRESENT) {
59438c9f 479 unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 480 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 481 val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
ebb9cfe2 482 }
947a69c9 483
ebb9cfe2 484 return val;
947a69c9
JF
485}
486
ebb9cfe2 487static pteval_t pte_pfn_to_mfn(pteval_t val)
947a69c9 488{
ebb9cfe2 489 if (val & _PAGE_PRESENT) {
59438c9f 490 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
77be1fab 491 pteval_t flags = val & PTE_FLAGS_MASK;
d8355aca 492 val = ((pteval_t)pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
947a69c9
JF
493 }
494
ebb9cfe2 495 return val;
947a69c9
JF
496}
497
ebb9cfe2 498pteval_t xen_pte_val(pte_t pte)
947a69c9 499{
ebb9cfe2 500 return pte_mfn_to_pfn(pte.pte);
947a69c9 501}
da5de7c2 502PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
947a69c9 503
947a69c9
JF
504pgdval_t xen_pgd_val(pgd_t pgd)
505{
ebb9cfe2 506 return pte_mfn_to_pfn(pgd.pgd);
947a69c9 507}
da5de7c2 508PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
947a69c9
JF
509
510pte_t xen_make_pte(pteval_t pte)
511{
ebb9cfe2
JF
512 pte = pte_pfn_to_mfn(pte);
513 return native_make_pte(pte);
947a69c9 514}
da5de7c2 515PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
947a69c9
JF
516
517pgd_t xen_make_pgd(pgdval_t pgd)
518{
ebb9cfe2
JF
519 pgd = pte_pfn_to_mfn(pgd);
520 return native_make_pgd(pgd);
947a69c9 521}
da5de7c2 522PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
947a69c9
JF
523
524pmdval_t xen_pmd_val(pmd_t pmd)
525{
ebb9cfe2 526 return pte_mfn_to_pfn(pmd.pmd);
947a69c9 527}
da5de7c2 528PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
28499143 529
e2426cf8 530void xen_set_pud_hyper(pud_t *ptr, pud_t val)
f4f97b3e 531{
400d3494 532 struct mmu_update u;
f4f97b3e 533
d66bf8fc
JF
534 preempt_disable();
535
400d3494
JF
536 xen_mc_batch();
537
ce803e70
JF
538 /* ptr may be ioremapped for 64-bit pagetable setup */
539 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
400d3494 540 u.val = pud_val_ma(val);
7708ad64 541 xen_extend_mmu_update(&u);
d66bf8fc 542
994025ca
JF
543 ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
544
d66bf8fc
JF
545 xen_mc_issue(PARAVIRT_LAZY_MMU);
546
547 preempt_enable();
f4f97b3e
JF
548}
549
e2426cf8
JF
550void xen_set_pud(pud_t *ptr, pud_t val)
551{
994025ca
JF
552 ADD_STATS(pud_update, 1);
553
e2426cf8
JF
554 /* If page is not pinned, we can just update the entry
555 directly */
7708ad64 556 if (!xen_page_pinned(ptr)) {
e2426cf8
JF
557 *ptr = val;
558 return;
559 }
560
994025ca
JF
561 ADD_STATS(pud_update_pinned, 1);
562
e2426cf8
JF
563 xen_set_pud_hyper(ptr, val);
564}
565
f4f97b3e
JF
566void xen_set_pte(pte_t *ptep, pte_t pte)
567{
994025ca
JF
568 ADD_STATS(pte_update, 1);
569// ADD_STATS(pte_update_pinned, xen_page_pinned(ptep));
570 ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
571
f6e58732 572#ifdef CONFIG_X86_PAE
f4f97b3e
JF
573 ptep->pte_high = pte.pte_high;
574 smp_wmb();
575 ptep->pte_low = pte.pte_low;
f6e58732
JF
576#else
577 *ptep = pte;
578#endif
f4f97b3e
JF
579}
580
f6e58732 581#ifdef CONFIG_X86_PAE
3b827c1b
JF
582void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
583{
f6e58732 584 set_64bit((u64 *)ptep, native_pte_val(pte));
3b827c1b
JF
585}
586
587void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
588{
589 ptep->pte_low = 0;
590 smp_wmb(); /* make sure low gets written first */
591 ptep->pte_high = 0;
592}
593
594void xen_pmd_clear(pmd_t *pmdp)
595{
e2426cf8 596 set_pmd(pmdp, __pmd(0));
3b827c1b 597}
f6e58732 598#endif /* CONFIG_X86_PAE */
3b827c1b 599
abf33038 600pmd_t xen_make_pmd(pmdval_t pmd)
3b827c1b 601{
ebb9cfe2 602 pmd = pte_pfn_to_mfn(pmd);
947a69c9 603 return native_make_pmd(pmd);
3b827c1b 604}
da5de7c2 605PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
3b827c1b 606
f6e58732
JF
607#if PAGETABLE_LEVELS == 4
608pudval_t xen_pud_val(pud_t pud)
609{
610 return pte_mfn_to_pfn(pud.pud);
611}
da5de7c2 612PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
f6e58732
JF
613
614pud_t xen_make_pud(pudval_t pud)
615{
616 pud = pte_pfn_to_mfn(pud);
617
618 return native_make_pud(pud);
619}
da5de7c2 620PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
f6e58732 621
d6182fbf 622pgd_t *xen_get_user_pgd(pgd_t *pgd)
f6e58732 623{
d6182fbf
JF
624 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
625 unsigned offset = pgd - pgd_page;
626 pgd_t *user_ptr = NULL;
f6e58732 627
d6182fbf
JF
628 if (offset < pgd_index(USER_LIMIT)) {
629 struct page *page = virt_to_page(pgd_page);
630 user_ptr = (pgd_t *)page->private;
631 if (user_ptr)
632 user_ptr += offset;
633 }
f6e58732 634
d6182fbf
JF
635 return user_ptr;
636}
637
638static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
639{
640 struct mmu_update u;
f6e58732
JF
641
642 u.ptr = virt_to_machine(ptr).maddr;
643 u.val = pgd_val_ma(val);
7708ad64 644 xen_extend_mmu_update(&u);
d6182fbf
JF
645}
646
647/*
648 * Raw hypercall-based set_pgd, intended for in early boot before
649 * there's a page structure. This implies:
650 * 1. The only existing pagetable is the kernel's
651 * 2. It is always pinned
652 * 3. It has no user pagetable attached to it
653 */
654void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
655{
656 preempt_disable();
657
658 xen_mc_batch();
659
660 __xen_set_pgd_hyper(ptr, val);
f6e58732
JF
661
662 xen_mc_issue(PARAVIRT_LAZY_MMU);
663
664 preempt_enable();
665}
666
667void xen_set_pgd(pgd_t *ptr, pgd_t val)
668{
d6182fbf
JF
669 pgd_t *user_ptr = xen_get_user_pgd(ptr);
670
994025ca
JF
671 ADD_STATS(pgd_update, 1);
672
f6e58732
JF
673 /* If page is not pinned, we can just update the entry
674 directly */
7708ad64 675 if (!xen_page_pinned(ptr)) {
f6e58732 676 *ptr = val;
d6182fbf 677 if (user_ptr) {
7708ad64 678 WARN_ON(xen_page_pinned(user_ptr));
d6182fbf
JF
679 *user_ptr = val;
680 }
f6e58732
JF
681 return;
682 }
683
994025ca
JF
684 ADD_STATS(pgd_update_pinned, 1);
685 ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU);
686
d6182fbf
JF
687 /* If it's pinned, then we can at least batch the kernel and
688 user updates together. */
689 xen_mc_batch();
690
691 __xen_set_pgd_hyper(ptr, val);
692 if (user_ptr)
693 __xen_set_pgd_hyper(user_ptr, val);
694
695 xen_mc_issue(PARAVIRT_LAZY_MMU);
f6e58732
JF
696}
697#endif /* PAGETABLE_LEVELS == 4 */
698
f4f97b3e 699/*
5deb30d1
JF
700 * (Yet another) pagetable walker. This one is intended for pinning a
701 * pagetable. This means that it walks a pagetable and calls the
702 * callback function on each page it finds making up the page table,
703 * at every level. It walks the entire pagetable, but it only bothers
704 * pinning pte pages which are below limit. In the normal case this
705 * will be STACK_TOP_MAX, but at boot we need to pin up to
706 * FIXADDR_TOP.
707 *
708 * For 32-bit the important bit is that we don't pin beyond there,
709 * because then we start getting into Xen's ptes.
710 *
711 * For 64-bit, we must skip the Xen hole in the middle of the address
712 * space, just after the big x86-64 virtual hole.
713 */
86bbc2c2
IC
714static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
715 int (*func)(struct mm_struct *mm, struct page *,
716 enum pt_level),
717 unsigned long limit)
3b827c1b 718{
f4f97b3e 719 int flush = 0;
5deb30d1
JF
720 unsigned hole_low, hole_high;
721 unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
722 unsigned pgdidx, pudidx, pmdidx;
f4f97b3e 723
5deb30d1
JF
724 /* The limit is the last byte to be touched */
725 limit--;
726 BUG_ON(limit >= FIXADDR_TOP);
3b827c1b
JF
727
728 if (xen_feature(XENFEAT_auto_translated_physmap))
f4f97b3e
JF
729 return 0;
730
5deb30d1
JF
731 /*
732 * 64-bit has a great big hole in the middle of the address
733 * space, which contains the Xen mappings. On 32-bit these
734 * will end up making a zero-sized hole and so is a no-op.
735 */
d6182fbf 736 hole_low = pgd_index(USER_LIMIT);
5deb30d1
JF
737 hole_high = pgd_index(PAGE_OFFSET);
738
739 pgdidx_limit = pgd_index(limit);
740#if PTRS_PER_PUD > 1
741 pudidx_limit = pud_index(limit);
742#else
743 pudidx_limit = 0;
744#endif
745#if PTRS_PER_PMD > 1
746 pmdidx_limit = pmd_index(limit);
747#else
748 pmdidx_limit = 0;
749#endif
750
5deb30d1 751 for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
f4f97b3e 752 pud_t *pud;
3b827c1b 753
5deb30d1
JF
754 if (pgdidx >= hole_low && pgdidx < hole_high)
755 continue;
f4f97b3e 756
5deb30d1 757 if (!pgd_val(pgd[pgdidx]))
3b827c1b 758 continue;
f4f97b3e 759
5deb30d1 760 pud = pud_offset(&pgd[pgdidx], 0);
3b827c1b
JF
761
762 if (PTRS_PER_PUD > 1) /* not folded */
eefb47f6 763 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
f4f97b3e 764
5deb30d1 765 for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
f4f97b3e 766 pmd_t *pmd;
f4f97b3e 767
5deb30d1
JF
768 if (pgdidx == pgdidx_limit &&
769 pudidx > pudidx_limit)
770 goto out;
3b827c1b 771
5deb30d1 772 if (pud_none(pud[pudidx]))
3b827c1b 773 continue;
f4f97b3e 774
5deb30d1 775 pmd = pmd_offset(&pud[pudidx], 0);
3b827c1b
JF
776
777 if (PTRS_PER_PMD > 1) /* not folded */
eefb47f6 778 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
f4f97b3e 779
5deb30d1
JF
780 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
781 struct page *pte;
782
783 if (pgdidx == pgdidx_limit &&
784 pudidx == pudidx_limit &&
785 pmdidx > pmdidx_limit)
786 goto out;
3b827c1b 787
5deb30d1 788 if (pmd_none(pmd[pmdidx]))
3b827c1b
JF
789 continue;
790
5deb30d1 791 pte = pmd_page(pmd[pmdidx]);
eefb47f6 792 flush |= (*func)(mm, pte, PT_PTE);
3b827c1b
JF
793 }
794 }
795 }
11ad93e5 796
5deb30d1 797out:
11ad93e5
JF
798 /* Do the top level last, so that the callbacks can use it as
799 a cue to do final things like tlb flushes. */
eefb47f6 800 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
f4f97b3e
JF
801
802 return flush;
3b827c1b
JF
803}
804
86bbc2c2
IC
805static int xen_pgd_walk(struct mm_struct *mm,
806 int (*func)(struct mm_struct *mm, struct page *,
807 enum pt_level),
808 unsigned long limit)
809{
810 return __xen_pgd_walk(mm, mm->pgd, func, limit);
811}
812
7708ad64
JF
813/* If we're using split pte locks, then take the page's lock and
814 return a pointer to it. Otherwise return NULL. */
eefb47f6 815static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
74260714
JF
816{
817 spinlock_t *ptl = NULL;
818
f7d0b926 819#if USE_SPLIT_PTLOCKS
74260714 820 ptl = __pte_lockptr(page);
eefb47f6 821 spin_lock_nest_lock(ptl, &mm->page_table_lock);
74260714
JF
822#endif
823
824 return ptl;
825}
826
7708ad64 827static void xen_pte_unlock(void *v)
74260714
JF
828{
829 spinlock_t *ptl = v;
830 spin_unlock(ptl);
831}
832
833static void xen_do_pin(unsigned level, unsigned long pfn)
834{
835 struct mmuext_op *op;
836 struct multicall_space mcs;
837
838 mcs = __xen_mc_entry(sizeof(*op));
839 op = mcs.args;
840 op->cmd = level;
841 op->arg1.mfn = pfn_to_mfn(pfn);
842 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
843}
844
eefb47f6
JF
845static int xen_pin_page(struct mm_struct *mm, struct page *page,
846 enum pt_level level)
f4f97b3e 847{
d60cd46b 848 unsigned pgfl = TestSetPagePinned(page);
f4f97b3e
JF
849 int flush;
850
851 if (pgfl)
852 flush = 0; /* already pinned */
853 else if (PageHighMem(page))
854 /* kmaps need flushing if we found an unpinned
855 highpage */
856 flush = 1;
857 else {
858 void *pt = lowmem_page_address(page);
859 unsigned long pfn = page_to_pfn(page);
860 struct multicall_space mcs = __xen_mc_entry(0);
74260714 861 spinlock_t *ptl;
f4f97b3e
JF
862
863 flush = 0;
864
11ad93e5
JF
865 /*
866 * We need to hold the pagetable lock between the time
867 * we make the pagetable RO and when we actually pin
868 * it. If we don't, then other users may come in and
869 * attempt to update the pagetable by writing it,
870 * which will fail because the memory is RO but not
871 * pinned, so Xen won't do the trap'n'emulate.
872 *
873 * If we're using split pte locks, we can't hold the
874 * entire pagetable's worth of locks during the
875 * traverse, because we may wrap the preempt count (8
876 * bits). The solution is to mark RO and pin each PTE
877 * page while holding the lock. This means the number
878 * of locks we end up holding is never more than a
879 * batch size (~32 entries, at present).
880 *
881 * If we're not using split pte locks, we needn't pin
882 * the PTE pages independently, because we're
883 * protected by the overall pagetable lock.
884 */
74260714
JF
885 ptl = NULL;
886 if (level == PT_PTE)
eefb47f6 887 ptl = xen_pte_lock(page, mm);
74260714 888
f4f97b3e
JF
889 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
890 pfn_pte(pfn, PAGE_KERNEL_RO),
74260714
JF
891 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
892
11ad93e5 893 if (ptl) {
74260714
JF
894 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
895
74260714
JF
896 /* Queue a deferred unlock for when this batch
897 is completed. */
7708ad64 898 xen_mc_callback(xen_pte_unlock, ptl);
74260714 899 }
f4f97b3e
JF
900 }
901
902 return flush;
903}
3b827c1b 904
f4f97b3e
JF
905/* This is called just after a mm has been created, but it has not
906 been used yet. We need to make sure that its pagetable is all
907 read-only, and can be pinned. */
eefb47f6 908static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
3b827c1b 909{
d05fdf31
JF
910 vm_unmap_aliases();
911
f4f97b3e 912 xen_mc_batch();
3b827c1b 913
86bbc2c2 914 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
d05fdf31 915 /* re-enable interrupts for flushing */
f87e4cac 916 xen_mc_issue(0);
d05fdf31 917
f4f97b3e 918 kmap_flush_unused();
d05fdf31 919
f87e4cac
JF
920 xen_mc_batch();
921 }
f4f97b3e 922
d6182fbf
JF
923#ifdef CONFIG_X86_64
924 {
925 pgd_t *user_pgd = xen_get_user_pgd(pgd);
926
927 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
928
929 if (user_pgd) {
eefb47f6 930 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
f63c2f24
T
931 xen_do_pin(MMUEXT_PIN_L4_TABLE,
932 PFN_DOWN(__pa(user_pgd)));
d6182fbf
JF
933 }
934 }
935#else /* CONFIG_X86_32 */
5deb30d1
JF
936#ifdef CONFIG_X86_PAE
937 /* Need to make sure unshared kernel PMD is pinnable */
47cb2ed9 938 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 939 PT_PMD);
5deb30d1 940#endif
28499143 941 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
d6182fbf 942#endif /* CONFIG_X86_64 */
f4f97b3e 943 xen_mc_issue(0);
3b827c1b
JF
944}
945
eefb47f6
JF
946static void xen_pgd_pin(struct mm_struct *mm)
947{
948 __xen_pgd_pin(mm, mm->pgd);
949}
950
0e91398f
JF
951/*
952 * On save, we need to pin all pagetables to make sure they get their
953 * mfns turned into pfns. Search the list for any unpinned pgds and pin
954 * them (unpinned pgds are not currently in use, probably because the
955 * process is under construction or destruction).
eefb47f6
JF
956 *
957 * Expected to be called in stop_machine() ("equivalent to taking
958 * every spinlock in the system"), so the locking doesn't really
959 * matter all that much.
0e91398f
JF
960 */
961void xen_mm_pin_all(void)
962{
963 unsigned long flags;
964 struct page *page;
74260714 965
0e91398f 966 spin_lock_irqsave(&pgd_lock, flags);
f4f97b3e 967
0e91398f
JF
968 list_for_each_entry(page, &pgd_list, lru) {
969 if (!PagePinned(page)) {
eefb47f6 970 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
971 SetPageSavePinned(page);
972 }
973 }
974
975 spin_unlock_irqrestore(&pgd_lock, flags);
3b827c1b
JF
976}
977
c1f2f09e
EH
978/*
979 * The init_mm pagetable is really pinned as soon as its created, but
980 * that's before we have page structures to store the bits. So do all
981 * the book-keeping now.
982 */
eefb47f6
JF
983static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page,
984 enum pt_level level)
3b827c1b 985{
f4f97b3e
JF
986 SetPagePinned(page);
987 return 0;
988}
3b827c1b 989
f4f97b3e
JF
990void __init xen_mark_init_mm_pinned(void)
991{
eefb47f6 992 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
f4f97b3e 993}
3b827c1b 994
eefb47f6
JF
995static int xen_unpin_page(struct mm_struct *mm, struct page *page,
996 enum pt_level level)
f4f97b3e 997{
d60cd46b 998 unsigned pgfl = TestClearPagePinned(page);
3b827c1b 999
f4f97b3e
JF
1000 if (pgfl && !PageHighMem(page)) {
1001 void *pt = lowmem_page_address(page);
1002 unsigned long pfn = page_to_pfn(page);
74260714
JF
1003 spinlock_t *ptl = NULL;
1004 struct multicall_space mcs;
1005
11ad93e5
JF
1006 /*
1007 * Do the converse to pin_page. If we're using split
1008 * pte locks, we must be holding the lock for while
1009 * the pte page is unpinned but still RO to prevent
1010 * concurrent updates from seeing it in this
1011 * partially-pinned state.
1012 */
74260714 1013 if (level == PT_PTE) {
eefb47f6 1014 ptl = xen_pte_lock(page, mm);
74260714 1015
11ad93e5
JF
1016 if (ptl)
1017 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
74260714
JF
1018 }
1019
1020 mcs = __xen_mc_entry(0);
f4f97b3e
JF
1021
1022 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
1023 pfn_pte(pfn, PAGE_KERNEL),
74260714
JF
1024 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
1025
1026 if (ptl) {
1027 /* unlock when batch completed */
7708ad64 1028 xen_mc_callback(xen_pte_unlock, ptl);
74260714 1029 }
f4f97b3e
JF
1030 }
1031
1032 return 0; /* never need to flush on unpin */
3b827c1b
JF
1033}
1034
f4f97b3e 1035/* Release a pagetables pages back as normal RW */
eefb47f6 1036static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
f4f97b3e 1037{
f4f97b3e
JF
1038 xen_mc_batch();
1039
74260714 1040 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
f4f97b3e 1041
d6182fbf
JF
1042#ifdef CONFIG_X86_64
1043 {
1044 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1045
1046 if (user_pgd) {
f63c2f24
T
1047 xen_do_pin(MMUEXT_UNPIN_TABLE,
1048 PFN_DOWN(__pa(user_pgd)));
eefb47f6 1049 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
d6182fbf
JF
1050 }
1051 }
1052#endif
1053
5deb30d1
JF
1054#ifdef CONFIG_X86_PAE
1055 /* Need to make sure unshared kernel PMD is unpinned */
47cb2ed9 1056 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
eefb47f6 1057 PT_PMD);
5deb30d1 1058#endif
d6182fbf 1059
86bbc2c2 1060 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
f4f97b3e
JF
1061
1062 xen_mc_issue(0);
1063}
3b827c1b 1064
eefb47f6
JF
1065static void xen_pgd_unpin(struct mm_struct *mm)
1066{
1067 __xen_pgd_unpin(mm, mm->pgd);
1068}
1069
0e91398f
JF
1070/*
1071 * On resume, undo any pinning done at save, so that the rest of the
1072 * kernel doesn't see any unexpected pinned pagetables.
1073 */
1074void xen_mm_unpin_all(void)
1075{
1076 unsigned long flags;
1077 struct page *page;
1078
1079 spin_lock_irqsave(&pgd_lock, flags);
1080
1081 list_for_each_entry(page, &pgd_list, lru) {
1082 if (PageSavePinned(page)) {
1083 BUG_ON(!PagePinned(page));
eefb47f6 1084 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
0e91398f
JF
1085 ClearPageSavePinned(page);
1086 }
1087 }
1088
1089 spin_unlock_irqrestore(&pgd_lock, flags);
1090}
1091
3b827c1b
JF
1092void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
1093{
f4f97b3e 1094 spin_lock(&next->page_table_lock);
eefb47f6 1095 xen_pgd_pin(next);
f4f97b3e 1096 spin_unlock(&next->page_table_lock);
3b827c1b
JF
1097}
1098
1099void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
1100{
f4f97b3e 1101 spin_lock(&mm->page_table_lock);
eefb47f6 1102 xen_pgd_pin(mm);
f4f97b3e 1103 spin_unlock(&mm->page_table_lock);
3b827c1b
JF
1104}
1105
3b827c1b 1106
f87e4cac
JF
1107#ifdef CONFIG_SMP
1108/* Another cpu may still have their %cr3 pointing at the pagetable, so
1109 we need to repoint it somewhere else before we can unpin it. */
1110static void drop_other_mm_ref(void *info)
1111{
1112 struct mm_struct *mm = info;
ce87b3d3 1113 struct mm_struct *active_mm;
3b827c1b 1114
9eb912d1 1115 active_mm = percpu_read(cpu_tlbstate.active_mm);
ce87b3d3
JF
1116
1117 if (active_mm == mm)
f87e4cac 1118 leave_mm(smp_processor_id());
9f79991d
JF
1119
1120 /* If this cpu still has a stale cr3 reference, then make sure
1121 it has been flushed. */
7fd7d83d 1122 if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
9f79991d 1123 load_cr3(swapper_pg_dir);
f87e4cac 1124}
3b827c1b 1125
7708ad64 1126static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac 1127{
e4d98207 1128 cpumask_var_t mask;
9f79991d
JF
1129 unsigned cpu;
1130
f87e4cac
JF
1131 if (current->active_mm == mm) {
1132 if (current->mm == mm)
1133 load_cr3(swapper_pg_dir);
1134 else
1135 leave_mm(smp_processor_id());
9f79991d
JF
1136 }
1137
1138 /* Get the "official" set of cpus referring to our pagetable. */
e4d98207
MT
1139 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1140 for_each_online_cpu(cpu) {
1141 if (!cpumask_test_cpu(cpu, &mm->cpu_vm_mask)
1142 && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1143 continue;
1144 smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
1145 }
1146 return;
1147 }
1148 cpumask_copy(mask, &mm->cpu_vm_mask);
9f79991d
JF
1149
1150 /* It's possible that a vcpu may have a stale reference to our
1151 cr3, because its in lazy mode, and it hasn't yet flushed
1152 its set of pending hypercalls yet. In this case, we can
1153 look at its actual current cr3 value, and force it to flush
1154 if needed. */
1155 for_each_online_cpu(cpu) {
1156 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
e4d98207 1157 cpumask_set_cpu(cpu, mask);
3b827c1b
JF
1158 }
1159
e4d98207
MT
1160 if (!cpumask_empty(mask))
1161 smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
1162 free_cpumask_var(mask);
f87e4cac
JF
1163}
1164#else
7708ad64 1165static void xen_drop_mm_ref(struct mm_struct *mm)
f87e4cac
JF
1166{
1167 if (current->active_mm == mm)
1168 load_cr3(swapper_pg_dir);
1169}
1170#endif
1171
1172/*
1173 * While a process runs, Xen pins its pagetables, which means that the
1174 * hypervisor forces it to be read-only, and it controls all updates
1175 * to it. This means that all pagetable updates have to go via the
1176 * hypervisor, which is moderately expensive.
1177 *
1178 * Since we're pulling the pagetable down, we switch to use init_mm,
1179 * unpin old process pagetable and mark it all read-write, which
1180 * allows further operations on it to be simple memory accesses.
1181 *
1182 * The only subtle point is that another CPU may be still using the
1183 * pagetable because of lazy tlb flushing. This means we need need to
1184 * switch all CPUs off this pagetable before we can unpin it.
1185 */
1186void xen_exit_mmap(struct mm_struct *mm)
1187{
1188 get_cpu(); /* make sure we don't move around */
7708ad64 1189 xen_drop_mm_ref(mm);
f87e4cac 1190 put_cpu();
3b827c1b 1191
f120f13e 1192 spin_lock(&mm->page_table_lock);
df912ea4
JF
1193
1194 /* pgd may not be pinned in the error exit path of execve */
7708ad64 1195 if (xen_page_pinned(mm->pgd))
eefb47f6 1196 xen_pgd_unpin(mm);
74260714 1197
f120f13e 1198 spin_unlock(&mm->page_table_lock);
3b827c1b 1199}
994025ca 1200
319f3ba5
JF
1201static __init void xen_pagetable_setup_start(pgd_t *base)
1202{
1203}
1204
1205static __init void xen_pagetable_setup_done(pgd_t *base)
1206{
1207 xen_setup_shared_info();
1208}
1209
1210static void xen_write_cr2(unsigned long cr2)
1211{
1212 percpu_read(xen_vcpu)->arch.cr2 = cr2;
1213}
1214
1215static unsigned long xen_read_cr2(void)
1216{
1217 return percpu_read(xen_vcpu)->arch.cr2;
1218}
1219
1220unsigned long xen_read_cr2_direct(void)
1221{
1222 return percpu_read(xen_vcpu_info.arch.cr2);
1223}
1224
1225static void xen_flush_tlb(void)
1226{
1227 struct mmuext_op *op;
1228 struct multicall_space mcs;
1229
1230 preempt_disable();
1231
1232 mcs = xen_mc_entry(sizeof(*op));
1233
1234 op = mcs.args;
1235 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1236 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1237
1238 xen_mc_issue(PARAVIRT_LAZY_MMU);
1239
1240 preempt_enable();
1241}
1242
1243static void xen_flush_tlb_single(unsigned long addr)
1244{
1245 struct mmuext_op *op;
1246 struct multicall_space mcs;
1247
1248 preempt_disable();
1249
1250 mcs = xen_mc_entry(sizeof(*op));
1251 op = mcs.args;
1252 op->cmd = MMUEXT_INVLPG_LOCAL;
1253 op->arg1.linear_addr = addr & PAGE_MASK;
1254 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1255
1256 xen_mc_issue(PARAVIRT_LAZY_MMU);
1257
1258 preempt_enable();
1259}
1260
1261static void xen_flush_tlb_others(const struct cpumask *cpus,
1262 struct mm_struct *mm, unsigned long va)
1263{
1264 struct {
1265 struct mmuext_op op;
1266 DECLARE_BITMAP(mask, NR_CPUS);
1267 } *args;
1268 struct multicall_space mcs;
1269
1270 BUG_ON(cpumask_empty(cpus));
1271 BUG_ON(!mm);
1272
1273 mcs = xen_mc_entry(sizeof(*args));
1274 args = mcs.args;
1275 args->op.arg2.vcpumask = to_cpumask(args->mask);
1276
1277 /* Remove us, and any offline CPUS. */
1278 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1279 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
319f3ba5
JF
1280
1281 if (va == TLB_FLUSH_ALL) {
1282 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1283 } else {
1284 args->op.cmd = MMUEXT_INVLPG_MULTI;
1285 args->op.arg1.linear_addr = va;
1286 }
1287
1288 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1289
319f3ba5
JF
1290 xen_mc_issue(PARAVIRT_LAZY_MMU);
1291}
1292
1293static unsigned long xen_read_cr3(void)
1294{
1295 return percpu_read(xen_cr3);
1296}
1297
1298static void set_current_cr3(void *v)
1299{
1300 percpu_write(xen_current_cr3, (unsigned long)v);
1301}
1302
1303static void __xen_write_cr3(bool kernel, unsigned long cr3)
1304{
1305 struct mmuext_op *op;
1306 struct multicall_space mcs;
1307 unsigned long mfn;
1308
1309 if (cr3)
1310 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1311 else
1312 mfn = 0;
1313
1314 WARN_ON(mfn == 0 && kernel);
1315
1316 mcs = __xen_mc_entry(sizeof(*op));
1317
1318 op = mcs.args;
1319 op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1320 op->arg1.mfn = mfn;
1321
1322 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1323
1324 if (kernel) {
1325 percpu_write(xen_cr3, cr3);
1326
1327 /* Update xen_current_cr3 once the batch has actually
1328 been submitted. */
1329 xen_mc_callback(set_current_cr3, (void *)cr3);
1330 }
1331}
1332
1333static void xen_write_cr3(unsigned long cr3)
1334{
1335 BUG_ON(preemptible());
1336
1337 xen_mc_batch(); /* disables interrupts */
1338
1339 /* Update while interrupts are disabled, so its atomic with
1340 respect to ipis */
1341 percpu_write(xen_cr3, cr3);
1342
1343 __xen_write_cr3(true, cr3);
1344
1345#ifdef CONFIG_X86_64
1346 {
1347 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1348 if (user_pgd)
1349 __xen_write_cr3(false, __pa(user_pgd));
1350 else
1351 __xen_write_cr3(false, 0);
1352 }
1353#endif
1354
1355 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1356}
1357
1358static int xen_pgd_alloc(struct mm_struct *mm)
1359{
1360 pgd_t *pgd = mm->pgd;
1361 int ret = 0;
1362
1363 BUG_ON(PagePinned(virt_to_page(pgd)));
1364
1365#ifdef CONFIG_X86_64
1366 {
1367 struct page *page = virt_to_page(pgd);
1368 pgd_t *user_pgd;
1369
1370 BUG_ON(page->private != 0);
1371
1372 ret = -ENOMEM;
1373
1374 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1375 page->private = (unsigned long)user_pgd;
1376
1377 if (user_pgd != NULL) {
1378 user_pgd[pgd_index(VSYSCALL_START)] =
1379 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1380 ret = 0;
1381 }
1382
1383 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1384 }
1385#endif
1386
1387 return ret;
1388}
1389
1390static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1391{
1392#ifdef CONFIG_X86_64
1393 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1394
1395 if (user_pgd)
1396 free_page((unsigned long)user_pgd);
1397#endif
1398}
1399
1f4f9315
JF
1400#ifdef CONFIG_HIGHPTE
1401static void *xen_kmap_atomic_pte(struct page *page, enum km_type type)
1402{
1403 pgprot_t prot = PAGE_KERNEL;
1404
1405 if (PagePinned(page))
1406 prot = PAGE_KERNEL_RO;
1407
1408 if (0 && PageHighMem(page))
1409 printk("mapping highpte %lx type %d prot %s\n",
1410 page_to_pfn(page), type,
1411 (unsigned long)pgprot_val(prot) & _PAGE_RW ? "WRITE" : "READ");
1412
1413 return kmap_atomic_prot(page, type, prot);
1414}
1415#endif
1416
1417#ifdef CONFIG_X86_32
1418static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte)
1419{
1420 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1421 if (pte_val_ma(*ptep) & _PAGE_PRESENT)
1422 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1423 pte_val_ma(pte));
1424
1425 return pte;
1426}
1427
1428/* Init-time set_pte while constructing initial pagetables, which
1429 doesn't allow RO pagetable pages to be remapped RW */
1430static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
1431{
1432 pte = mask_rw_pte(ptep, pte);
1433
1434 xen_set_pte(ptep, pte);
1435}
1436#endif
319f3ba5
JF
1437
1438/* Early in boot, while setting up the initial pagetable, assume
1439 everything is pinned. */
1440static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1441{
1442#ifdef CONFIG_FLATMEM
1443 BUG_ON(mem_map); /* should only be used early */
1444#endif
1445 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1446}
1447
1448/* Early release_pte assumes that all pts are pinned, since there's
1449 only init_mm and anything attached to that is pinned. */
1450static void xen_release_pte_init(unsigned long pfn)
1451{
1452 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1453}
1454
1455static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1456{
1457 struct mmuext_op op;
1458 op.cmd = cmd;
1459 op.arg1.mfn = pfn_to_mfn(pfn);
1460 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1461 BUG();
1462}
1463
1464/* This needs to make sure the new pte page is pinned iff its being
1465 attached to a pinned pagetable. */
1466static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
1467{
1468 struct page *page = pfn_to_page(pfn);
1469
1470 if (PagePinned(virt_to_page(mm->pgd))) {
1471 SetPagePinned(page);
1472
1473 vm_unmap_aliases();
1474 if (!PageHighMem(page)) {
1475 make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
1476 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1477 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1478 } else {
1479 /* make sure there are no stray mappings of
1480 this page */
1481 kmap_flush_unused();
1482 }
1483 }
1484}
1485
1486static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1487{
1488 xen_alloc_ptpage(mm, pfn, PT_PTE);
1489}
1490
1491static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1492{
1493 xen_alloc_ptpage(mm, pfn, PT_PMD);
1494}
1495
1496/* This should never happen until we're OK to use struct page */
1497static void xen_release_ptpage(unsigned long pfn, unsigned level)
1498{
1499 struct page *page = pfn_to_page(pfn);
1500
1501 if (PagePinned(page)) {
1502 if (!PageHighMem(page)) {
1503 if (level == PT_PTE && USE_SPLIT_PTLOCKS)
1504 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1505 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1506 }
1507 ClearPagePinned(page);
1508 }
1509}
1510
1511static void xen_release_pte(unsigned long pfn)
1512{
1513 xen_release_ptpage(pfn, PT_PTE);
1514}
1515
1516static void xen_release_pmd(unsigned long pfn)
1517{
1518 xen_release_ptpage(pfn, PT_PMD);
1519}
1520
1521#if PAGETABLE_LEVELS == 4
1522static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1523{
1524 xen_alloc_ptpage(mm, pfn, PT_PUD);
1525}
1526
1527static void xen_release_pud(unsigned long pfn)
1528{
1529 xen_release_ptpage(pfn, PT_PUD);
1530}
1531#endif
1532
1533void __init xen_reserve_top(void)
1534{
1535#ifdef CONFIG_X86_32
1536 unsigned long top = HYPERVISOR_VIRT_START;
1537 struct xen_platform_parameters pp;
1538
1539 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1540 top = pp.virt_start;
1541
1542 reserve_top_address(-top);
1543#endif /* CONFIG_X86_32 */
1544}
1545
1546/*
1547 * Like __va(), but returns address in the kernel mapping (which is
1548 * all we have until the physical memory mapping has been set up.
1549 */
1550static void *__ka(phys_addr_t paddr)
1551{
1552#ifdef CONFIG_X86_64
1553 return (void *)(paddr + __START_KERNEL_map);
1554#else
1555 return __va(paddr);
1556#endif
1557}
1558
1559/* Convert a machine address to physical address */
1560static unsigned long m2p(phys_addr_t maddr)
1561{
1562 phys_addr_t paddr;
1563
1564 maddr &= PTE_PFN_MASK;
1565 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1566
1567 return paddr;
1568}
1569
1570/* Convert a machine address to kernel virtual */
1571static void *m2v(phys_addr_t maddr)
1572{
1573 return __ka(m2p(maddr));
1574}
1575
1576static void set_page_prot(void *addr, pgprot_t prot)
1577{
1578 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1579 pte_t pte = pfn_pte(pfn, prot);
1580
1581 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
1582 BUG();
1583}
1584
1585static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1586{
1587 unsigned pmdidx, pteidx;
1588 unsigned ident_pte;
1589 unsigned long pfn;
1590
1591 ident_pte = 0;
1592 pfn = 0;
1593 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1594 pte_t *pte_page;
1595
1596 /* Reuse or allocate a page of ptes */
1597 if (pmd_present(pmd[pmdidx]))
1598 pte_page = m2v(pmd[pmdidx].pmd);
1599 else {
1600 /* Check for free pte pages */
1601 if (ident_pte == ARRAY_SIZE(level1_ident_pgt))
1602 break;
1603
1604 pte_page = &level1_ident_pgt[ident_pte];
1605 ident_pte += PTRS_PER_PTE;
1606
1607 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1608 }
1609
1610 /* Install mappings */
1611 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1612 pte_t pte;
1613
1614 if (pfn > max_pfn_mapped)
1615 max_pfn_mapped = pfn;
1616
1617 if (!pte_none(pte_page[pteidx]))
1618 continue;
1619
1620 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1621 pte_page[pteidx] = pte;
1622 }
1623 }
1624
1625 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1626 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1627
1628 set_page_prot(pmd, PAGE_KERNEL_RO);
1629}
1630
1631#ifdef CONFIG_X86_64
1632static void convert_pfn_mfn(void *v)
1633{
1634 pte_t *pte = v;
1635 int i;
1636
1637 /* All levels are converted the same way, so just treat them
1638 as ptes. */
1639 for (i = 0; i < PTRS_PER_PTE; i++)
1640 pte[i] = xen_make_pte(pte[i].pte);
1641}
1642
1643/*
1644 * Set up the inital kernel pagetable.
1645 *
1646 * We can construct this by grafting the Xen provided pagetable into
1647 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1648 * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
1649 * means that only the kernel has a physical mapping to start with -
1650 * but that's enough to get __va working. We need to fill in the rest
1651 * of the physical mapping once some sort of allocator has been set
1652 * up.
1653 */
1654__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1655 unsigned long max_pfn)
1656{
1657 pud_t *l3;
1658 pmd_t *l2;
1659
1660 /* Zap identity mapping */
1661 init_level4_pgt[0] = __pgd(0);
1662
1663 /* Pre-constructed entries are in pfn, so convert to mfn */
1664 convert_pfn_mfn(init_level4_pgt);
1665 convert_pfn_mfn(level3_ident_pgt);
1666 convert_pfn_mfn(level3_kernel_pgt);
1667
1668 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1669 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1670
1671 memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1672 memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1673
1674 l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
1675 l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
1676 memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
1677
1678 /* Set up identity map */
1679 xen_map_identity_early(level2_ident_pgt, max_pfn);
1680
1681 /* Make pagetable pieces RO */
1682 set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
1683 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1684 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1685 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1686 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1687 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1688
1689 /* Pin down new L4 */
1690 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1691 PFN_DOWN(__pa_symbol(init_level4_pgt)));
1692
1693 /* Unpin Xen-provided one */
1694 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1695
1696 /* Switch over */
1697 pgd = init_level4_pgt;
1698
1699 /*
1700 * At this stage there can be no user pgd, and no page
1701 * structure to attach it to, so make sure we just set kernel
1702 * pgd.
1703 */
1704 xen_mc_batch();
1705 __xen_write_cr3(true, __pa(pgd));
1706 xen_mc_issue(PARAVIRT_LAZY_CPU);
1707
1708 reserve_early(__pa(xen_start_info->pt_base),
1709 __pa(xen_start_info->pt_base +
1710 xen_start_info->nr_pt_frames * PAGE_SIZE),
1711 "XEN PAGETABLES");
1712
1713 return pgd;
1714}
1715#else /* !CONFIG_X86_64 */
1716static pmd_t level2_kernel_pgt[PTRS_PER_PMD] __page_aligned_bss;
1717
1718__init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd,
1719 unsigned long max_pfn)
1720{
1721 pmd_t *kernel_pmd;
1722
1723 init_pg_tables_start = __pa(pgd);
1724 init_pg_tables_end = __pa(pgd) + xen_start_info->nr_pt_frames*PAGE_SIZE;
1725 max_pfn_mapped = PFN_DOWN(init_pg_tables_end + 512*1024);
1726
1727 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
1728 memcpy(level2_kernel_pgt, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
1729
1730 xen_map_identity_early(level2_kernel_pgt, max_pfn);
1731
1732 memcpy(swapper_pg_dir, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
1733 set_pgd(&swapper_pg_dir[KERNEL_PGD_BOUNDARY],
1734 __pgd(__pa(level2_kernel_pgt) | _PAGE_PRESENT));
1735
1736 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1737 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
1738 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
1739
1740 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1741
1742 xen_write_cr3(__pa(swapper_pg_dir));
1743
1744 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(swapper_pg_dir)));
1745
1746 return swapper_pg_dir;
1747}
1748#endif /* CONFIG_X86_64 */
1749
1750static void xen_set_fixmap(unsigned idx, unsigned long phys, pgprot_t prot)
1751{
1752 pte_t pte;
1753
1754 phys >>= PAGE_SHIFT;
1755
1756 switch (idx) {
1757 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
1758#ifdef CONFIG_X86_F00F_BUG
1759 case FIX_F00F_IDT:
1760#endif
1761#ifdef CONFIG_X86_32
1762 case FIX_WP_TEST:
1763 case FIX_VDSO:
1764# ifdef CONFIG_HIGHMEM
1765 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
1766# endif
1767#else
1768 case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
1769#endif
1770#ifdef CONFIG_X86_LOCAL_APIC
1771 case FIX_APIC_BASE: /* maps dummy local APIC */
1772#endif
1773 pte = pfn_pte(phys, prot);
1774 break;
1775
1776 default:
1777 pte = mfn_pte(phys, prot);
1778 break;
1779 }
1780
1781 __native_set_fixmap(idx, pte);
1782
1783#ifdef CONFIG_X86_64
1784 /* Replicate changes to map the vsyscall page into the user
1785 pagetable vsyscall mapping. */
1786 if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
1787 unsigned long vaddr = __fix_to_virt(idx);
1788 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
1789 }
1790#endif
1791}
1792
1793__init void xen_post_allocator_init(void)
1794{
1795 pv_mmu_ops.set_pte = xen_set_pte;
1796 pv_mmu_ops.set_pmd = xen_set_pmd;
1797 pv_mmu_ops.set_pud = xen_set_pud;
1798#if PAGETABLE_LEVELS == 4
1799 pv_mmu_ops.set_pgd = xen_set_pgd;
1800#endif
1801
1802 /* This will work as long as patching hasn't happened yet
1803 (which it hasn't) */
1804 pv_mmu_ops.alloc_pte = xen_alloc_pte;
1805 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
1806 pv_mmu_ops.release_pte = xen_release_pte;
1807 pv_mmu_ops.release_pmd = xen_release_pmd;
1808#if PAGETABLE_LEVELS == 4
1809 pv_mmu_ops.alloc_pud = xen_alloc_pud;
1810 pv_mmu_ops.release_pud = xen_release_pud;
1811#endif
1812
1813#ifdef CONFIG_X86_64
1814 SetPagePinned(virt_to_page(level3_user_vsyscall));
1815#endif
1816 xen_mark_init_mm_pinned();
1817}
1818
b407fc57
JF
1819static void xen_leave_lazy_mmu(void)
1820{
1821 xen_mc_flush();
1822 paravirt_leave_lazy_mmu();
1823}
319f3ba5
JF
1824
1825const struct pv_mmu_ops xen_mmu_ops __initdata = {
1826 .pagetable_setup_start = xen_pagetable_setup_start,
1827 .pagetable_setup_done = xen_pagetable_setup_done,
1828
1829 .read_cr2 = xen_read_cr2,
1830 .write_cr2 = xen_write_cr2,
1831
1832 .read_cr3 = xen_read_cr3,
1833 .write_cr3 = xen_write_cr3,
1834
1835 .flush_tlb_user = xen_flush_tlb,
1836 .flush_tlb_kernel = xen_flush_tlb,
1837 .flush_tlb_single = xen_flush_tlb_single,
1838 .flush_tlb_others = xen_flush_tlb_others,
1839
1840 .pte_update = paravirt_nop,
1841 .pte_update_defer = paravirt_nop,
1842
1843 .pgd_alloc = xen_pgd_alloc,
1844 .pgd_free = xen_pgd_free,
1845
1846 .alloc_pte = xen_alloc_pte_init,
1847 .release_pte = xen_release_pte_init,
1848 .alloc_pmd = xen_alloc_pte_init,
1849 .alloc_pmd_clone = paravirt_nop,
1850 .release_pmd = xen_release_pte_init,
1851
1852#ifdef CONFIG_HIGHPTE
1853 .kmap_atomic_pte = xen_kmap_atomic_pte,
1854#endif
1855
1856#ifdef CONFIG_X86_64
1857 .set_pte = xen_set_pte,
1858#else
1859 .set_pte = xen_set_pte_init,
1860#endif
1861 .set_pte_at = xen_set_pte_at,
1862 .set_pmd = xen_set_pmd_hyper,
1863
1864 .ptep_modify_prot_start = __ptep_modify_prot_start,
1865 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
1866
da5de7c2
JF
1867 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
1868 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
319f3ba5 1869
da5de7c2
JF
1870 .make_pte = PV_CALLEE_SAVE(xen_make_pte),
1871 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
319f3ba5
JF
1872
1873#ifdef CONFIG_X86_PAE
1874 .set_pte_atomic = xen_set_pte_atomic,
1875 .set_pte_present = xen_set_pte_at,
1876 .pte_clear = xen_pte_clear,
1877 .pmd_clear = xen_pmd_clear,
1878#endif /* CONFIG_X86_PAE */
1879 .set_pud = xen_set_pud_hyper,
1880
da5de7c2
JF
1881 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
1882 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
319f3ba5
JF
1883
1884#if PAGETABLE_LEVELS == 4
da5de7c2
JF
1885 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
1886 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
319f3ba5
JF
1887 .set_pgd = xen_set_pgd_hyper,
1888
1889 .alloc_pud = xen_alloc_pte_init,
1890 .release_pud = xen_release_pte_init,
1891#endif /* PAGETABLE_LEVELS == 4 */
1892
1893 .activate_mm = xen_activate_mm,
1894 .dup_mmap = xen_dup_mmap,
1895 .exit_mmap = xen_exit_mmap,
1896
1897 .lazy_mode = {
1898 .enter = paravirt_enter_lazy_mmu,
b407fc57 1899 .leave = xen_leave_lazy_mmu,
319f3ba5
JF
1900 },
1901
1902 .set_fixmap = xen_set_fixmap,
1903};
1904
1905
994025ca
JF
1906#ifdef CONFIG_XEN_DEBUG_FS
1907
1908static struct dentry *d_mmu_debug;
1909
1910static int __init xen_mmu_debugfs(void)
1911{
1912 struct dentry *d_xen = xen_init_debugfs();
1913
1914 if (d_xen == NULL)
1915 return -ENOMEM;
1916
1917 d_mmu_debug = debugfs_create_dir("mmu", d_xen);
1918
1919 debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats);
1920
1921 debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update);
1922 debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug,
1923 &mmu_stats.pgd_update_pinned);
1924 debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug,
1925 &mmu_stats.pgd_update_pinned);
1926
1927 debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update);
1928 debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug,
1929 &mmu_stats.pud_update_pinned);
1930 debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug,
1931 &mmu_stats.pud_update_pinned);
1932
1933 debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update);
1934 debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug,
1935 &mmu_stats.pmd_update_pinned);
1936 debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug,
1937 &mmu_stats.pmd_update_pinned);
1938
1939 debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update);
1940// debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug,
1941// &mmu_stats.pte_update_pinned);
1942 debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug,
1943 &mmu_stats.pte_update_pinned);
1944
1945 debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update);
1946 debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug,
1947 &mmu_stats.mmu_update_extended);
1948 xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug,
1949 mmu_stats.mmu_update_histo, 20);
1950
1951 debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at);
1952 debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug,
1953 &mmu_stats.set_pte_at_batched);
1954 debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug,
1955 &mmu_stats.set_pte_at_current);
1956 debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug,
1957 &mmu_stats.set_pte_at_kernel);
1958
1959 debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit);
1960 debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug,
1961 &mmu_stats.prot_commit_batched);
1962
1963 return 0;
1964}
1965fs_initcall(xen_mmu_debugfs);
1966
1967#endif /* CONFIG_XEN_DEBUG_FS */
This page took 0.301339 seconds and 5 git commands to generate.