Commit | Line | Data |
---|---|---|
3b827c1b JF |
1 | /* |
2 | * Xen mmu operations | |
3 | * | |
4 | * This file contains the various mmu fetch and update operations. | |
5 | * The most important job they must perform is the mapping between the | |
6 | * domain's pfn and the overall machine mfns. | |
7 | * | |
8 | * Xen allows guests to directly update the pagetable, in a controlled | |
9 | * fashion. In other words, the guest modifies the same pagetable | |
10 | * that the CPU actually uses, which eliminates the overhead of having | |
11 | * a separate shadow pagetable. | |
12 | * | |
13 | * In order to allow this, it falls on the guest domain to map its | |
14 | * notion of a "physical" pfn - which is just a domain-local linear | |
15 | * address - into a real "machine address" which the CPU's MMU can | |
16 | * use. | |
17 | * | |
18 | * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be | |
19 | * inserted directly into the pagetable. When creating a new | |
20 | * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely, | |
21 | * when reading the content back with __(pgd|pmd|pte)_val, it converts | |
22 | * the mfn back into a pfn. | |
23 | * | |
24 | * The other constraint is that all pages which make up a pagetable | |
25 | * must be mapped read-only in the guest. This prevents uncontrolled | |
26 | * guest updates to the pagetable. Xen strictly enforces this, and | |
27 | * will disallow any pagetable update which will end up mapping a | |
28 | * pagetable page RW, and will disallow using any writable page as a | |
29 | * pagetable. | |
30 | * | |
31 | * Naively, when loading %cr3 with the base of a new pagetable, Xen | |
32 | * would need to validate the whole pagetable before going on. | |
33 | * Naturally, this is quite slow. The solution is to "pin" a | |
34 | * pagetable, which enforces all the constraints on the pagetable even | |
35 | * when it is not actively in use. This menas that Xen can be assured | |
36 | * that it is still valid when you do load it into %cr3, and doesn't | |
37 | * need to revalidate it. | |
38 | * | |
39 | * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007 | |
40 | */ | |
f120f13e | 41 | #include <linux/sched.h> |
f4f97b3e | 42 | #include <linux/highmem.h> |
994025ca | 43 | #include <linux/debugfs.h> |
3b827c1b | 44 | #include <linux/bug.h> |
d2cb2145 | 45 | #include <linux/vmalloc.h> |
44408ad7 | 46 | #include <linux/module.h> |
5a0e3ad6 | 47 | #include <linux/gfp.h> |
a9ce6bc1 | 48 | #include <linux/memblock.h> |
3b827c1b JF |
49 | |
50 | #include <asm/pgtable.h> | |
51 | #include <asm/tlbflush.h> | |
5deb30d1 | 52 | #include <asm/fixmap.h> |
3b827c1b | 53 | #include <asm/mmu_context.h> |
319f3ba5 | 54 | #include <asm/setup.h> |
f4f97b3e | 55 | #include <asm/paravirt.h> |
7347b408 | 56 | #include <asm/e820.h> |
cbcd79c2 | 57 | #include <asm/linkage.h> |
08bbc9da | 58 | #include <asm/page.h> |
fef5ba79 | 59 | #include <asm/init.h> |
41f2e477 | 60 | #include <asm/pat.h> |
3b827c1b JF |
61 | |
62 | #include <asm/xen/hypercall.h> | |
f4f97b3e | 63 | #include <asm/xen/hypervisor.h> |
3b827c1b | 64 | |
c0011dbf | 65 | #include <xen/xen.h> |
3b827c1b JF |
66 | #include <xen/page.h> |
67 | #include <xen/interface/xen.h> | |
59151001 | 68 | #include <xen/interface/hvm/hvm_op.h> |
319f3ba5 | 69 | #include <xen/interface/version.h> |
c0011dbf | 70 | #include <xen/interface/memory.h> |
319f3ba5 | 71 | #include <xen/hvc-console.h> |
3b827c1b | 72 | |
f4f97b3e | 73 | #include "multicalls.h" |
3b827c1b | 74 | #include "mmu.h" |
994025ca JF |
75 | #include "debugfs.h" |
76 | ||
77 | #define MMU_UPDATE_HISTO 30 | |
78 | ||
19001c8c AN |
79 | /* |
80 | * Protects atomic reservation decrease/increase against concurrent increases. | |
81 | * Also protects non-atomic updates of current_pages and driver_pages, and | |
82 | * balloon lists. | |
83 | */ | |
84 | DEFINE_SPINLOCK(xen_reservation_lock); | |
85 | ||
994025ca JF |
86 | #ifdef CONFIG_XEN_DEBUG_FS |
87 | ||
88 | static struct { | |
89 | u32 pgd_update; | |
90 | u32 pgd_update_pinned; | |
91 | u32 pgd_update_batched; | |
92 | ||
93 | u32 pud_update; | |
94 | u32 pud_update_pinned; | |
95 | u32 pud_update_batched; | |
96 | ||
97 | u32 pmd_update; | |
98 | u32 pmd_update_pinned; | |
99 | u32 pmd_update_batched; | |
100 | ||
101 | u32 pte_update; | |
102 | u32 pte_update_pinned; | |
103 | u32 pte_update_batched; | |
104 | ||
105 | u32 mmu_update; | |
106 | u32 mmu_update_extended; | |
107 | u32 mmu_update_histo[MMU_UPDATE_HISTO]; | |
108 | ||
109 | u32 prot_commit; | |
110 | u32 prot_commit_batched; | |
111 | ||
112 | u32 set_pte_at; | |
113 | u32 set_pte_at_batched; | |
114 | u32 set_pte_at_pinned; | |
115 | u32 set_pte_at_current; | |
116 | u32 set_pte_at_kernel; | |
117 | } mmu_stats; | |
118 | ||
119 | static u8 zero_stats; | |
120 | ||
121 | static inline void check_zero(void) | |
122 | { | |
123 | if (unlikely(zero_stats)) { | |
124 | memset(&mmu_stats, 0, sizeof(mmu_stats)); | |
125 | zero_stats = 0; | |
126 | } | |
127 | } | |
128 | ||
129 | #define ADD_STATS(elem, val) \ | |
130 | do { check_zero(); mmu_stats.elem += (val); } while(0) | |
131 | ||
132 | #else /* !CONFIG_XEN_DEBUG_FS */ | |
133 | ||
134 | #define ADD_STATS(elem, val) do { (void)(val); } while(0) | |
135 | ||
136 | #endif /* CONFIG_XEN_DEBUG_FS */ | |
3b827c1b | 137 | |
319f3ba5 JF |
138 | |
139 | /* | |
140 | * Identity map, in addition to plain kernel map. This needs to be | |
141 | * large enough to allocate page table pages to allocate the rest. | |
142 | * Each page can map 2MB. | |
143 | */ | |
764f0138 JF |
144 | #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4) |
145 | static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES); | |
319f3ba5 JF |
146 | |
147 | #ifdef CONFIG_X86_64 | |
148 | /* l3 pud for userspace vsyscall mapping */ | |
149 | static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss; | |
150 | #endif /* CONFIG_X86_64 */ | |
151 | ||
152 | /* | |
153 | * Note about cr3 (pagetable base) values: | |
154 | * | |
155 | * xen_cr3 contains the current logical cr3 value; it contains the | |
156 | * last set cr3. This may not be the current effective cr3, because | |
157 | * its update may be being lazily deferred. However, a vcpu looking | |
158 | * at its own cr3 can use this value knowing that it everything will | |
159 | * be self-consistent. | |
160 | * | |
161 | * xen_current_cr3 contains the actual vcpu cr3; it is set once the | |
162 | * hypercall to set the vcpu cr3 is complete (so it may be a little | |
163 | * out of date, but it will never be set early). If one vcpu is | |
164 | * looking at another vcpu's cr3 value, it should use this variable. | |
165 | */ | |
166 | DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */ | |
167 | DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */ | |
168 | ||
169 | ||
d6182fbf JF |
170 | /* |
171 | * Just beyond the highest usermode address. STACK_TOP_MAX has a | |
172 | * redzone above it, so round it up to a PGD boundary. | |
173 | */ | |
174 | #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK) | |
175 | ||
9976b39b JF |
176 | unsigned long arbitrary_virt_to_mfn(void *vaddr) |
177 | { | |
178 | xmaddr_t maddr = arbitrary_virt_to_machine(vaddr); | |
179 | ||
180 | return PFN_DOWN(maddr.maddr); | |
181 | } | |
182 | ||
ce803e70 | 183 | xmaddr_t arbitrary_virt_to_machine(void *vaddr) |
3b827c1b | 184 | { |
ce803e70 | 185 | unsigned long address = (unsigned long)vaddr; |
da7bfc50 | 186 | unsigned int level; |
9f32d21c CL |
187 | pte_t *pte; |
188 | unsigned offset; | |
3b827c1b | 189 | |
9f32d21c CL |
190 | /* |
191 | * if the PFN is in the linear mapped vaddr range, we can just use | |
192 | * the (quick) virt_to_machine() p2m lookup | |
193 | */ | |
194 | if (virt_addr_valid(vaddr)) | |
195 | return virt_to_machine(vaddr); | |
196 | ||
197 | /* otherwise we have to do a (slower) full page-table walk */ | |
3b827c1b | 198 | |
9f32d21c CL |
199 | pte = lookup_address(address, &level); |
200 | BUG_ON(pte == NULL); | |
201 | offset = address & ~PAGE_MASK; | |
ebd879e3 | 202 | return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset); |
3b827c1b JF |
203 | } |
204 | ||
205 | void make_lowmem_page_readonly(void *vaddr) | |
206 | { | |
207 | pte_t *pte, ptev; | |
208 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 209 | unsigned int level; |
3b827c1b | 210 | |
f0646e43 | 211 | pte = lookup_address(address, &level); |
fef5ba79 JF |
212 | if (pte == NULL) |
213 | return; /* vaddr missing */ | |
3b827c1b JF |
214 | |
215 | ptev = pte_wrprotect(*pte); | |
216 | ||
217 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
218 | BUG(); | |
219 | } | |
220 | ||
221 | void make_lowmem_page_readwrite(void *vaddr) | |
222 | { | |
223 | pte_t *pte, ptev; | |
224 | unsigned long address = (unsigned long)vaddr; | |
da7bfc50 | 225 | unsigned int level; |
3b827c1b | 226 | |
f0646e43 | 227 | pte = lookup_address(address, &level); |
fef5ba79 JF |
228 | if (pte == NULL) |
229 | return; /* vaddr missing */ | |
3b827c1b JF |
230 | |
231 | ptev = pte_mkwrite(*pte); | |
232 | ||
233 | if (HYPERVISOR_update_va_mapping(address, ptev, 0)) | |
234 | BUG(); | |
235 | } | |
236 | ||
237 | ||
7708ad64 | 238 | static bool xen_page_pinned(void *ptr) |
e2426cf8 JF |
239 | { |
240 | struct page *page = virt_to_page(ptr); | |
241 | ||
242 | return PagePinned(page); | |
243 | } | |
244 | ||
c0011dbf JF |
245 | static bool xen_iomap_pte(pte_t pte) |
246 | { | |
7347b408 | 247 | return pte_flags(pte) & _PAGE_IOMAP; |
c0011dbf JF |
248 | } |
249 | ||
eba3ff8b | 250 | void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid) |
c0011dbf JF |
251 | { |
252 | struct multicall_space mcs; | |
253 | struct mmu_update *u; | |
254 | ||
255 | mcs = xen_mc_entry(sizeof(*u)); | |
256 | u = mcs.args; | |
257 | ||
258 | /* ptep might be kmapped when using 32-bit HIGHPTE */ | |
259 | u->ptr = arbitrary_virt_to_machine(ptep).maddr; | |
260 | u->val = pte_val_ma(pteval); | |
261 | ||
eba3ff8b | 262 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid); |
c0011dbf JF |
263 | |
264 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
265 | } | |
eba3ff8b JF |
266 | EXPORT_SYMBOL_GPL(xen_set_domain_pte); |
267 | ||
268 | static void xen_set_iomap_pte(pte_t *ptep, pte_t pteval) | |
269 | { | |
270 | xen_set_domain_pte(ptep, pteval, DOMID_IO); | |
271 | } | |
c0011dbf | 272 | |
7708ad64 | 273 | static void xen_extend_mmu_update(const struct mmu_update *update) |
3b827c1b | 274 | { |
d66bf8fc JF |
275 | struct multicall_space mcs; |
276 | struct mmu_update *u; | |
3b827c1b | 277 | |
400d3494 JF |
278 | mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u)); |
279 | ||
994025ca JF |
280 | if (mcs.mc != NULL) { |
281 | ADD_STATS(mmu_update_extended, 1); | |
282 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], -1); | |
283 | ||
400d3494 | 284 | mcs.mc->args[1]++; |
994025ca JF |
285 | |
286 | if (mcs.mc->args[1] < MMU_UPDATE_HISTO) | |
287 | ADD_STATS(mmu_update_histo[mcs.mc->args[1]], 1); | |
288 | else | |
289 | ADD_STATS(mmu_update_histo[0], 1); | |
290 | } else { | |
291 | ADD_STATS(mmu_update, 1); | |
400d3494 JF |
292 | mcs = __xen_mc_entry(sizeof(*u)); |
293 | MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF); | |
994025ca | 294 | ADD_STATS(mmu_update_histo[1], 1); |
400d3494 | 295 | } |
d66bf8fc | 296 | |
d66bf8fc | 297 | u = mcs.args; |
400d3494 JF |
298 | *u = *update; |
299 | } | |
300 | ||
301 | void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) | |
302 | { | |
303 | struct mmu_update u; | |
304 | ||
305 | preempt_disable(); | |
306 | ||
307 | xen_mc_batch(); | |
308 | ||
ce803e70 JF |
309 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
310 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 311 | u.val = pmd_val_ma(val); |
7708ad64 | 312 | xen_extend_mmu_update(&u); |
d66bf8fc | 313 | |
994025ca JF |
314 | ADD_STATS(pmd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); |
315 | ||
d66bf8fc JF |
316 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
317 | ||
318 | preempt_enable(); | |
3b827c1b JF |
319 | } |
320 | ||
e2426cf8 JF |
321 | void xen_set_pmd(pmd_t *ptr, pmd_t val) |
322 | { | |
994025ca JF |
323 | ADD_STATS(pmd_update, 1); |
324 | ||
e2426cf8 JF |
325 | /* If page is not pinned, we can just update the entry |
326 | directly */ | |
7708ad64 | 327 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
328 | *ptr = val; |
329 | return; | |
330 | } | |
331 | ||
994025ca JF |
332 | ADD_STATS(pmd_update_pinned, 1); |
333 | ||
e2426cf8 JF |
334 | xen_set_pmd_hyper(ptr, val); |
335 | } | |
336 | ||
3b827c1b JF |
337 | /* |
338 | * Associate a virtual page frame with a given physical page frame | |
339 | * and protection flags for that frame. | |
340 | */ | |
341 | void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags) | |
342 | { | |
836fe2f2 | 343 | set_pte_vaddr(vaddr, mfn_pte(mfn, flags)); |
3b827c1b JF |
344 | } |
345 | ||
346 | void xen_set_pte_at(struct mm_struct *mm, unsigned long addr, | |
347 | pte_t *ptep, pte_t pteval) | |
348 | { | |
c0011dbf JF |
349 | if (xen_iomap_pte(pteval)) { |
350 | xen_set_iomap_pte(ptep, pteval); | |
351 | goto out; | |
352 | } | |
353 | ||
994025ca JF |
354 | ADD_STATS(set_pte_at, 1); |
355 | // ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep)); | |
356 | ADD_STATS(set_pte_at_current, mm == current->mm); | |
357 | ADD_STATS(set_pte_at_kernel, mm == &init_mm); | |
358 | ||
d66bf8fc | 359 | if (mm == current->mm || mm == &init_mm) { |
8965c1c0 | 360 | if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) { |
d66bf8fc JF |
361 | struct multicall_space mcs; |
362 | mcs = xen_mc_entry(0); | |
363 | ||
364 | MULTI_update_va_mapping(mcs.mc, addr, pteval, 0); | |
994025ca | 365 | ADD_STATS(set_pte_at_batched, 1); |
d66bf8fc | 366 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
2bd50036 | 367 | goto out; |
d66bf8fc JF |
368 | } else |
369 | if (HYPERVISOR_update_va_mapping(addr, pteval, 0) == 0) | |
2bd50036 | 370 | goto out; |
d66bf8fc JF |
371 | } |
372 | xen_set_pte(ptep, pteval); | |
2bd50036 | 373 | |
2829b449 | 374 | out: return; |
3b827c1b JF |
375 | } |
376 | ||
f63c2f24 T |
377 | pte_t xen_ptep_modify_prot_start(struct mm_struct *mm, |
378 | unsigned long addr, pte_t *ptep) | |
947a69c9 | 379 | { |
e57778a1 JF |
380 | /* Just return the pte as-is. We preserve the bits on commit */ |
381 | return *ptep; | |
382 | } | |
383 | ||
384 | void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr, | |
385 | pte_t *ptep, pte_t pte) | |
386 | { | |
400d3494 | 387 | struct mmu_update u; |
e57778a1 | 388 | |
400d3494 | 389 | xen_mc_batch(); |
947a69c9 | 390 | |
9f32d21c | 391 | u.ptr = arbitrary_virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD; |
400d3494 | 392 | u.val = pte_val_ma(pte); |
7708ad64 | 393 | xen_extend_mmu_update(&u); |
947a69c9 | 394 | |
994025ca JF |
395 | ADD_STATS(prot_commit, 1); |
396 | ADD_STATS(prot_commit_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
397 | ||
e57778a1 | 398 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
947a69c9 JF |
399 | } |
400 | ||
ebb9cfe2 JF |
401 | /* Assume pteval_t is equivalent to all the other *val_t types. */ |
402 | static pteval_t pte_mfn_to_pfn(pteval_t val) | |
947a69c9 | 403 | { |
ebb9cfe2 | 404 | if (val & _PAGE_PRESENT) { |
59438c9f | 405 | unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 406 | pteval_t flags = val & PTE_FLAGS_MASK; |
d8355aca | 407 | val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags; |
ebb9cfe2 | 408 | } |
947a69c9 | 409 | |
ebb9cfe2 | 410 | return val; |
947a69c9 JF |
411 | } |
412 | ||
ebb9cfe2 | 413 | static pteval_t pte_pfn_to_mfn(pteval_t val) |
947a69c9 | 414 | { |
ebb9cfe2 | 415 | if (val & _PAGE_PRESENT) { |
59438c9f | 416 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; |
77be1fab | 417 | pteval_t flags = val & PTE_FLAGS_MASK; |
cfd8951e JF |
418 | unsigned long mfn = pfn_to_mfn(pfn); |
419 | ||
420 | /* | |
421 | * If there's no mfn for the pfn, then just create an | |
422 | * empty non-present pte. Unfortunately this loses | |
423 | * information about the original pfn, so | |
424 | * pte_mfn_to_pfn is asymmetric. | |
425 | */ | |
426 | if (unlikely(mfn == INVALID_P2M_ENTRY)) { | |
427 | mfn = 0; | |
428 | flags = 0; | |
429 | } | |
430 | ||
431 | val = ((pteval_t)mfn << PAGE_SHIFT) | flags; | |
947a69c9 JF |
432 | } |
433 | ||
ebb9cfe2 | 434 | return val; |
947a69c9 JF |
435 | } |
436 | ||
c0011dbf JF |
437 | static pteval_t iomap_pte(pteval_t val) |
438 | { | |
439 | if (val & _PAGE_PRESENT) { | |
440 | unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT; | |
441 | pteval_t flags = val & PTE_FLAGS_MASK; | |
442 | ||
443 | /* We assume the pte frame number is a MFN, so | |
444 | just use it as-is. */ | |
445 | val = ((pteval_t)pfn << PAGE_SHIFT) | flags; | |
446 | } | |
447 | ||
448 | return val; | |
449 | } | |
450 | ||
ebb9cfe2 | 451 | pteval_t xen_pte_val(pte_t pte) |
947a69c9 | 452 | { |
41f2e477 | 453 | pteval_t pteval = pte.pte; |
c0011dbf | 454 | |
41f2e477 JF |
455 | /* If this is a WC pte, convert back from Xen WC to Linux WC */ |
456 | if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) { | |
457 | WARN_ON(!pat_enabled); | |
458 | pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT; | |
459 | } | |
c0011dbf | 460 | |
41f2e477 JF |
461 | if (xen_initial_domain() && (pteval & _PAGE_IOMAP)) |
462 | return pteval; | |
463 | ||
464 | return pte_mfn_to_pfn(pteval); | |
947a69c9 | 465 | } |
da5de7c2 | 466 | PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val); |
947a69c9 | 467 | |
947a69c9 JF |
468 | pgdval_t xen_pgd_val(pgd_t pgd) |
469 | { | |
ebb9cfe2 | 470 | return pte_mfn_to_pfn(pgd.pgd); |
947a69c9 | 471 | } |
da5de7c2 | 472 | PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val); |
947a69c9 | 473 | |
41f2e477 JF |
474 | /* |
475 | * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7 | |
476 | * are reserved for now, to correspond to the Intel-reserved PAT | |
477 | * types. | |
478 | * | |
479 | * We expect Linux's PAT set as follows: | |
480 | * | |
481 | * Idx PTE flags Linux Xen Default | |
482 | * 0 WB WB WB | |
483 | * 1 PWT WC WT WT | |
484 | * 2 PCD UC- UC- UC- | |
485 | * 3 PCD PWT UC UC UC | |
486 | * 4 PAT WB WC WB | |
487 | * 5 PAT PWT WC WP WT | |
488 | * 6 PAT PCD UC- UC UC- | |
489 | * 7 PAT PCD PWT UC UC UC | |
490 | */ | |
491 | ||
492 | void xen_set_pat(u64 pat) | |
493 | { | |
494 | /* We expect Linux to use a PAT setting of | |
495 | * UC UC- WC WB (ignoring the PAT flag) */ | |
496 | WARN_ON(pat != 0x0007010600070106ull); | |
497 | } | |
498 | ||
947a69c9 JF |
499 | pte_t xen_make_pte(pteval_t pte) |
500 | { | |
7347b408 AN |
501 | phys_addr_t addr = (pte & PTE_PFN_MASK); |
502 | ||
41f2e477 JF |
503 | /* If Linux is trying to set a WC pte, then map to the Xen WC. |
504 | * If _PAGE_PAT is set, then it probably means it is really | |
505 | * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope | |
506 | * things work out OK... | |
507 | * | |
508 | * (We should never see kernel mappings with _PAGE_PSE set, | |
509 | * but we could see hugetlbfs mappings, I think.). | |
510 | */ | |
511 | if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) { | |
512 | if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT) | |
513 | pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT; | |
514 | } | |
515 | ||
7347b408 AN |
516 | /* |
517 | * Unprivileged domains are allowed to do IOMAPpings for | |
518 | * PCI passthrough, but not map ISA space. The ISA | |
519 | * mappings are just dummy local mappings to keep other | |
520 | * parts of the kernel happy. | |
521 | */ | |
522 | if (unlikely(pte & _PAGE_IOMAP) && | |
523 | (xen_initial_domain() || addr >= ISA_END_ADDRESS)) { | |
c0011dbf | 524 | pte = iomap_pte(pte); |
7347b408 AN |
525 | } else { |
526 | pte &= ~_PAGE_IOMAP; | |
c0011dbf | 527 | pte = pte_pfn_to_mfn(pte); |
7347b408 | 528 | } |
c0011dbf | 529 | |
ebb9cfe2 | 530 | return native_make_pte(pte); |
947a69c9 | 531 | } |
da5de7c2 | 532 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte); |
947a69c9 JF |
533 | |
534 | pgd_t xen_make_pgd(pgdval_t pgd) | |
535 | { | |
ebb9cfe2 JF |
536 | pgd = pte_pfn_to_mfn(pgd); |
537 | return native_make_pgd(pgd); | |
947a69c9 | 538 | } |
da5de7c2 | 539 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd); |
947a69c9 JF |
540 | |
541 | pmdval_t xen_pmd_val(pmd_t pmd) | |
542 | { | |
ebb9cfe2 | 543 | return pte_mfn_to_pfn(pmd.pmd); |
947a69c9 | 544 | } |
da5de7c2 | 545 | PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val); |
28499143 | 546 | |
e2426cf8 | 547 | void xen_set_pud_hyper(pud_t *ptr, pud_t val) |
f4f97b3e | 548 | { |
400d3494 | 549 | struct mmu_update u; |
f4f97b3e | 550 | |
d66bf8fc JF |
551 | preempt_disable(); |
552 | ||
400d3494 JF |
553 | xen_mc_batch(); |
554 | ||
ce803e70 JF |
555 | /* ptr may be ioremapped for 64-bit pagetable setup */ |
556 | u.ptr = arbitrary_virt_to_machine(ptr).maddr; | |
400d3494 | 557 | u.val = pud_val_ma(val); |
7708ad64 | 558 | xen_extend_mmu_update(&u); |
d66bf8fc | 559 | |
994025ca JF |
560 | ADD_STATS(pud_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); |
561 | ||
d66bf8fc JF |
562 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
563 | ||
564 | preempt_enable(); | |
f4f97b3e JF |
565 | } |
566 | ||
e2426cf8 JF |
567 | void xen_set_pud(pud_t *ptr, pud_t val) |
568 | { | |
994025ca JF |
569 | ADD_STATS(pud_update, 1); |
570 | ||
e2426cf8 JF |
571 | /* If page is not pinned, we can just update the entry |
572 | directly */ | |
7708ad64 | 573 | if (!xen_page_pinned(ptr)) { |
e2426cf8 JF |
574 | *ptr = val; |
575 | return; | |
576 | } | |
577 | ||
994025ca JF |
578 | ADD_STATS(pud_update_pinned, 1); |
579 | ||
e2426cf8 JF |
580 | xen_set_pud_hyper(ptr, val); |
581 | } | |
582 | ||
f4f97b3e JF |
583 | void xen_set_pte(pte_t *ptep, pte_t pte) |
584 | { | |
c0011dbf JF |
585 | if (xen_iomap_pte(pte)) { |
586 | xen_set_iomap_pte(ptep, pte); | |
587 | return; | |
588 | } | |
589 | ||
994025ca JF |
590 | ADD_STATS(pte_update, 1); |
591 | // ADD_STATS(pte_update_pinned, xen_page_pinned(ptep)); | |
592 | ADD_STATS(pte_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
593 | ||
f6e58732 | 594 | #ifdef CONFIG_X86_PAE |
f4f97b3e JF |
595 | ptep->pte_high = pte.pte_high; |
596 | smp_wmb(); | |
597 | ptep->pte_low = pte.pte_low; | |
f6e58732 JF |
598 | #else |
599 | *ptep = pte; | |
600 | #endif | |
f4f97b3e JF |
601 | } |
602 | ||
f6e58732 | 603 | #ifdef CONFIG_X86_PAE |
3b827c1b JF |
604 | void xen_set_pte_atomic(pte_t *ptep, pte_t pte) |
605 | { | |
c0011dbf JF |
606 | if (xen_iomap_pte(pte)) { |
607 | xen_set_iomap_pte(ptep, pte); | |
608 | return; | |
609 | } | |
610 | ||
f6e58732 | 611 | set_64bit((u64 *)ptep, native_pte_val(pte)); |
3b827c1b JF |
612 | } |
613 | ||
614 | void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
615 | { | |
616 | ptep->pte_low = 0; | |
617 | smp_wmb(); /* make sure low gets written first */ | |
618 | ptep->pte_high = 0; | |
619 | } | |
620 | ||
621 | void xen_pmd_clear(pmd_t *pmdp) | |
622 | { | |
e2426cf8 | 623 | set_pmd(pmdp, __pmd(0)); |
3b827c1b | 624 | } |
f6e58732 | 625 | #endif /* CONFIG_X86_PAE */ |
3b827c1b | 626 | |
abf33038 | 627 | pmd_t xen_make_pmd(pmdval_t pmd) |
3b827c1b | 628 | { |
ebb9cfe2 | 629 | pmd = pte_pfn_to_mfn(pmd); |
947a69c9 | 630 | return native_make_pmd(pmd); |
3b827c1b | 631 | } |
da5de7c2 | 632 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd); |
3b827c1b | 633 | |
f6e58732 JF |
634 | #if PAGETABLE_LEVELS == 4 |
635 | pudval_t xen_pud_val(pud_t pud) | |
636 | { | |
637 | return pte_mfn_to_pfn(pud.pud); | |
638 | } | |
da5de7c2 | 639 | PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val); |
f6e58732 JF |
640 | |
641 | pud_t xen_make_pud(pudval_t pud) | |
642 | { | |
643 | pud = pte_pfn_to_mfn(pud); | |
644 | ||
645 | return native_make_pud(pud); | |
646 | } | |
da5de7c2 | 647 | PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud); |
f6e58732 | 648 | |
d6182fbf | 649 | pgd_t *xen_get_user_pgd(pgd_t *pgd) |
f6e58732 | 650 | { |
d6182fbf JF |
651 | pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK); |
652 | unsigned offset = pgd - pgd_page; | |
653 | pgd_t *user_ptr = NULL; | |
f6e58732 | 654 | |
d6182fbf JF |
655 | if (offset < pgd_index(USER_LIMIT)) { |
656 | struct page *page = virt_to_page(pgd_page); | |
657 | user_ptr = (pgd_t *)page->private; | |
658 | if (user_ptr) | |
659 | user_ptr += offset; | |
660 | } | |
f6e58732 | 661 | |
d6182fbf JF |
662 | return user_ptr; |
663 | } | |
664 | ||
665 | static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |
666 | { | |
667 | struct mmu_update u; | |
f6e58732 JF |
668 | |
669 | u.ptr = virt_to_machine(ptr).maddr; | |
670 | u.val = pgd_val_ma(val); | |
7708ad64 | 671 | xen_extend_mmu_update(&u); |
d6182fbf JF |
672 | } |
673 | ||
674 | /* | |
675 | * Raw hypercall-based set_pgd, intended for in early boot before | |
676 | * there's a page structure. This implies: | |
677 | * 1. The only existing pagetable is the kernel's | |
678 | * 2. It is always pinned | |
679 | * 3. It has no user pagetable attached to it | |
680 | */ | |
681 | void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val) | |
682 | { | |
683 | preempt_disable(); | |
684 | ||
685 | xen_mc_batch(); | |
686 | ||
687 | __xen_set_pgd_hyper(ptr, val); | |
f6e58732 JF |
688 | |
689 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
690 | ||
691 | preempt_enable(); | |
692 | } | |
693 | ||
694 | void xen_set_pgd(pgd_t *ptr, pgd_t val) | |
695 | { | |
d6182fbf JF |
696 | pgd_t *user_ptr = xen_get_user_pgd(ptr); |
697 | ||
994025ca JF |
698 | ADD_STATS(pgd_update, 1); |
699 | ||
f6e58732 JF |
700 | /* If page is not pinned, we can just update the entry |
701 | directly */ | |
7708ad64 | 702 | if (!xen_page_pinned(ptr)) { |
f6e58732 | 703 | *ptr = val; |
d6182fbf | 704 | if (user_ptr) { |
7708ad64 | 705 | WARN_ON(xen_page_pinned(user_ptr)); |
d6182fbf JF |
706 | *user_ptr = val; |
707 | } | |
f6e58732 JF |
708 | return; |
709 | } | |
710 | ||
994025ca JF |
711 | ADD_STATS(pgd_update_pinned, 1); |
712 | ADD_STATS(pgd_update_batched, paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU); | |
713 | ||
d6182fbf JF |
714 | /* If it's pinned, then we can at least batch the kernel and |
715 | user updates together. */ | |
716 | xen_mc_batch(); | |
717 | ||
718 | __xen_set_pgd_hyper(ptr, val); | |
719 | if (user_ptr) | |
720 | __xen_set_pgd_hyper(user_ptr, val); | |
721 | ||
722 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
f6e58732 JF |
723 | } |
724 | #endif /* PAGETABLE_LEVELS == 4 */ | |
725 | ||
f4f97b3e | 726 | /* |
5deb30d1 JF |
727 | * (Yet another) pagetable walker. This one is intended for pinning a |
728 | * pagetable. This means that it walks a pagetable and calls the | |
729 | * callback function on each page it finds making up the page table, | |
730 | * at every level. It walks the entire pagetable, but it only bothers | |
731 | * pinning pte pages which are below limit. In the normal case this | |
732 | * will be STACK_TOP_MAX, but at boot we need to pin up to | |
733 | * FIXADDR_TOP. | |
734 | * | |
735 | * For 32-bit the important bit is that we don't pin beyond there, | |
736 | * because then we start getting into Xen's ptes. | |
737 | * | |
738 | * For 64-bit, we must skip the Xen hole in the middle of the address | |
739 | * space, just after the big x86-64 virtual hole. | |
740 | */ | |
86bbc2c2 IC |
741 | static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd, |
742 | int (*func)(struct mm_struct *mm, struct page *, | |
743 | enum pt_level), | |
744 | unsigned long limit) | |
3b827c1b | 745 | { |
f4f97b3e | 746 | int flush = 0; |
5deb30d1 JF |
747 | unsigned hole_low, hole_high; |
748 | unsigned pgdidx_limit, pudidx_limit, pmdidx_limit; | |
749 | unsigned pgdidx, pudidx, pmdidx; | |
f4f97b3e | 750 | |
5deb30d1 JF |
751 | /* The limit is the last byte to be touched */ |
752 | limit--; | |
753 | BUG_ON(limit >= FIXADDR_TOP); | |
3b827c1b JF |
754 | |
755 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
f4f97b3e JF |
756 | return 0; |
757 | ||
5deb30d1 JF |
758 | /* |
759 | * 64-bit has a great big hole in the middle of the address | |
760 | * space, which contains the Xen mappings. On 32-bit these | |
761 | * will end up making a zero-sized hole and so is a no-op. | |
762 | */ | |
d6182fbf | 763 | hole_low = pgd_index(USER_LIMIT); |
5deb30d1 JF |
764 | hole_high = pgd_index(PAGE_OFFSET); |
765 | ||
766 | pgdidx_limit = pgd_index(limit); | |
767 | #if PTRS_PER_PUD > 1 | |
768 | pudidx_limit = pud_index(limit); | |
769 | #else | |
770 | pudidx_limit = 0; | |
771 | #endif | |
772 | #if PTRS_PER_PMD > 1 | |
773 | pmdidx_limit = pmd_index(limit); | |
774 | #else | |
775 | pmdidx_limit = 0; | |
776 | #endif | |
777 | ||
5deb30d1 | 778 | for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) { |
f4f97b3e | 779 | pud_t *pud; |
3b827c1b | 780 | |
5deb30d1 JF |
781 | if (pgdidx >= hole_low && pgdidx < hole_high) |
782 | continue; | |
f4f97b3e | 783 | |
5deb30d1 | 784 | if (!pgd_val(pgd[pgdidx])) |
3b827c1b | 785 | continue; |
f4f97b3e | 786 | |
5deb30d1 | 787 | pud = pud_offset(&pgd[pgdidx], 0); |
3b827c1b JF |
788 | |
789 | if (PTRS_PER_PUD > 1) /* not folded */ | |
eefb47f6 | 790 | flush |= (*func)(mm, virt_to_page(pud), PT_PUD); |
f4f97b3e | 791 | |
5deb30d1 | 792 | for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) { |
f4f97b3e | 793 | pmd_t *pmd; |
f4f97b3e | 794 | |
5deb30d1 JF |
795 | if (pgdidx == pgdidx_limit && |
796 | pudidx > pudidx_limit) | |
797 | goto out; | |
3b827c1b | 798 | |
5deb30d1 | 799 | if (pud_none(pud[pudidx])) |
3b827c1b | 800 | continue; |
f4f97b3e | 801 | |
5deb30d1 | 802 | pmd = pmd_offset(&pud[pudidx], 0); |
3b827c1b JF |
803 | |
804 | if (PTRS_PER_PMD > 1) /* not folded */ | |
eefb47f6 | 805 | flush |= (*func)(mm, virt_to_page(pmd), PT_PMD); |
f4f97b3e | 806 | |
5deb30d1 JF |
807 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) { |
808 | struct page *pte; | |
809 | ||
810 | if (pgdidx == pgdidx_limit && | |
811 | pudidx == pudidx_limit && | |
812 | pmdidx > pmdidx_limit) | |
813 | goto out; | |
3b827c1b | 814 | |
5deb30d1 | 815 | if (pmd_none(pmd[pmdidx])) |
3b827c1b JF |
816 | continue; |
817 | ||
5deb30d1 | 818 | pte = pmd_page(pmd[pmdidx]); |
eefb47f6 | 819 | flush |= (*func)(mm, pte, PT_PTE); |
3b827c1b JF |
820 | } |
821 | } | |
822 | } | |
11ad93e5 | 823 | |
5deb30d1 | 824 | out: |
11ad93e5 JF |
825 | /* Do the top level last, so that the callbacks can use it as |
826 | a cue to do final things like tlb flushes. */ | |
eefb47f6 | 827 | flush |= (*func)(mm, virt_to_page(pgd), PT_PGD); |
f4f97b3e JF |
828 | |
829 | return flush; | |
3b827c1b JF |
830 | } |
831 | ||
86bbc2c2 IC |
832 | static int xen_pgd_walk(struct mm_struct *mm, |
833 | int (*func)(struct mm_struct *mm, struct page *, | |
834 | enum pt_level), | |
835 | unsigned long limit) | |
836 | { | |
837 | return __xen_pgd_walk(mm, mm->pgd, func, limit); | |
838 | } | |
839 | ||
7708ad64 JF |
840 | /* If we're using split pte locks, then take the page's lock and |
841 | return a pointer to it. Otherwise return NULL. */ | |
eefb47f6 | 842 | static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm) |
74260714 JF |
843 | { |
844 | spinlock_t *ptl = NULL; | |
845 | ||
f7d0b926 | 846 | #if USE_SPLIT_PTLOCKS |
74260714 | 847 | ptl = __pte_lockptr(page); |
eefb47f6 | 848 | spin_lock_nest_lock(ptl, &mm->page_table_lock); |
74260714 JF |
849 | #endif |
850 | ||
851 | return ptl; | |
852 | } | |
853 | ||
7708ad64 | 854 | static void xen_pte_unlock(void *v) |
74260714 JF |
855 | { |
856 | spinlock_t *ptl = v; | |
857 | spin_unlock(ptl); | |
858 | } | |
859 | ||
860 | static void xen_do_pin(unsigned level, unsigned long pfn) | |
861 | { | |
862 | struct mmuext_op *op; | |
863 | struct multicall_space mcs; | |
864 | ||
865 | mcs = __xen_mc_entry(sizeof(*op)); | |
866 | op = mcs.args; | |
867 | op->cmd = level; | |
868 | op->arg1.mfn = pfn_to_mfn(pfn); | |
869 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
870 | } | |
871 | ||
eefb47f6 JF |
872 | static int xen_pin_page(struct mm_struct *mm, struct page *page, |
873 | enum pt_level level) | |
f4f97b3e | 874 | { |
d60cd46b | 875 | unsigned pgfl = TestSetPagePinned(page); |
f4f97b3e JF |
876 | int flush; |
877 | ||
878 | if (pgfl) | |
879 | flush = 0; /* already pinned */ | |
880 | else if (PageHighMem(page)) | |
881 | /* kmaps need flushing if we found an unpinned | |
882 | highpage */ | |
883 | flush = 1; | |
884 | else { | |
885 | void *pt = lowmem_page_address(page); | |
886 | unsigned long pfn = page_to_pfn(page); | |
887 | struct multicall_space mcs = __xen_mc_entry(0); | |
74260714 | 888 | spinlock_t *ptl; |
f4f97b3e JF |
889 | |
890 | flush = 0; | |
891 | ||
11ad93e5 JF |
892 | /* |
893 | * We need to hold the pagetable lock between the time | |
894 | * we make the pagetable RO and when we actually pin | |
895 | * it. If we don't, then other users may come in and | |
896 | * attempt to update the pagetable by writing it, | |
897 | * which will fail because the memory is RO but not | |
898 | * pinned, so Xen won't do the trap'n'emulate. | |
899 | * | |
900 | * If we're using split pte locks, we can't hold the | |
901 | * entire pagetable's worth of locks during the | |
902 | * traverse, because we may wrap the preempt count (8 | |
903 | * bits). The solution is to mark RO and pin each PTE | |
904 | * page while holding the lock. This means the number | |
905 | * of locks we end up holding is never more than a | |
906 | * batch size (~32 entries, at present). | |
907 | * | |
908 | * If we're not using split pte locks, we needn't pin | |
909 | * the PTE pages independently, because we're | |
910 | * protected by the overall pagetable lock. | |
911 | */ | |
74260714 JF |
912 | ptl = NULL; |
913 | if (level == PT_PTE) | |
eefb47f6 | 914 | ptl = xen_pte_lock(page, mm); |
74260714 | 915 | |
f4f97b3e JF |
916 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, |
917 | pfn_pte(pfn, PAGE_KERNEL_RO), | |
74260714 JF |
918 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
919 | ||
11ad93e5 | 920 | if (ptl) { |
74260714 JF |
921 | xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn); |
922 | ||
74260714 JF |
923 | /* Queue a deferred unlock for when this batch |
924 | is completed. */ | |
7708ad64 | 925 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 926 | } |
f4f97b3e JF |
927 | } |
928 | ||
929 | return flush; | |
930 | } | |
3b827c1b | 931 | |
f4f97b3e JF |
932 | /* This is called just after a mm has been created, but it has not |
933 | been used yet. We need to make sure that its pagetable is all | |
934 | read-only, and can be pinned. */ | |
eefb47f6 | 935 | static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) |
3b827c1b | 936 | { |
f4f97b3e | 937 | xen_mc_batch(); |
3b827c1b | 938 | |
86bbc2c2 | 939 | if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) { |
d05fdf31 | 940 | /* re-enable interrupts for flushing */ |
f87e4cac | 941 | xen_mc_issue(0); |
d05fdf31 | 942 | |
f4f97b3e | 943 | kmap_flush_unused(); |
d05fdf31 | 944 | |
f87e4cac JF |
945 | xen_mc_batch(); |
946 | } | |
f4f97b3e | 947 | |
d6182fbf JF |
948 | #ifdef CONFIG_X86_64 |
949 | { | |
950 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
951 | ||
952 | xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd))); | |
953 | ||
954 | if (user_pgd) { | |
eefb47f6 | 955 | xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD); |
f63c2f24 T |
956 | xen_do_pin(MMUEXT_PIN_L4_TABLE, |
957 | PFN_DOWN(__pa(user_pgd))); | |
d6182fbf JF |
958 | } |
959 | } | |
960 | #else /* CONFIG_X86_32 */ | |
5deb30d1 JF |
961 | #ifdef CONFIG_X86_PAE |
962 | /* Need to make sure unshared kernel PMD is pinnable */ | |
47cb2ed9 | 963 | xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), |
eefb47f6 | 964 | PT_PMD); |
5deb30d1 | 965 | #endif |
28499143 | 966 | xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd))); |
d6182fbf | 967 | #endif /* CONFIG_X86_64 */ |
f4f97b3e | 968 | xen_mc_issue(0); |
3b827c1b JF |
969 | } |
970 | ||
eefb47f6 JF |
971 | static void xen_pgd_pin(struct mm_struct *mm) |
972 | { | |
973 | __xen_pgd_pin(mm, mm->pgd); | |
974 | } | |
975 | ||
0e91398f JF |
976 | /* |
977 | * On save, we need to pin all pagetables to make sure they get their | |
978 | * mfns turned into pfns. Search the list for any unpinned pgds and pin | |
979 | * them (unpinned pgds are not currently in use, probably because the | |
980 | * process is under construction or destruction). | |
eefb47f6 JF |
981 | * |
982 | * Expected to be called in stop_machine() ("equivalent to taking | |
983 | * every spinlock in the system"), so the locking doesn't really | |
984 | * matter all that much. | |
0e91398f JF |
985 | */ |
986 | void xen_mm_pin_all(void) | |
987 | { | |
988 | unsigned long flags; | |
989 | struct page *page; | |
74260714 | 990 | |
0e91398f | 991 | spin_lock_irqsave(&pgd_lock, flags); |
f4f97b3e | 992 | |
0e91398f JF |
993 | list_for_each_entry(page, &pgd_list, lru) { |
994 | if (!PagePinned(page)) { | |
eefb47f6 | 995 | __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
996 | SetPageSavePinned(page); |
997 | } | |
998 | } | |
999 | ||
1000 | spin_unlock_irqrestore(&pgd_lock, flags); | |
3b827c1b JF |
1001 | } |
1002 | ||
c1f2f09e EH |
1003 | /* |
1004 | * The init_mm pagetable is really pinned as soon as its created, but | |
1005 | * that's before we have page structures to store the bits. So do all | |
1006 | * the book-keeping now. | |
1007 | */ | |
eefb47f6 JF |
1008 | static __init int xen_mark_pinned(struct mm_struct *mm, struct page *page, |
1009 | enum pt_level level) | |
3b827c1b | 1010 | { |
f4f97b3e JF |
1011 | SetPagePinned(page); |
1012 | return 0; | |
1013 | } | |
3b827c1b | 1014 | |
b96229b5 | 1015 | static void __init xen_mark_init_mm_pinned(void) |
f4f97b3e | 1016 | { |
eefb47f6 | 1017 | xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP); |
f4f97b3e | 1018 | } |
3b827c1b | 1019 | |
eefb47f6 JF |
1020 | static int xen_unpin_page(struct mm_struct *mm, struct page *page, |
1021 | enum pt_level level) | |
f4f97b3e | 1022 | { |
d60cd46b | 1023 | unsigned pgfl = TestClearPagePinned(page); |
3b827c1b | 1024 | |
f4f97b3e JF |
1025 | if (pgfl && !PageHighMem(page)) { |
1026 | void *pt = lowmem_page_address(page); | |
1027 | unsigned long pfn = page_to_pfn(page); | |
74260714 JF |
1028 | spinlock_t *ptl = NULL; |
1029 | struct multicall_space mcs; | |
1030 | ||
11ad93e5 JF |
1031 | /* |
1032 | * Do the converse to pin_page. If we're using split | |
1033 | * pte locks, we must be holding the lock for while | |
1034 | * the pte page is unpinned but still RO to prevent | |
1035 | * concurrent updates from seeing it in this | |
1036 | * partially-pinned state. | |
1037 | */ | |
74260714 | 1038 | if (level == PT_PTE) { |
eefb47f6 | 1039 | ptl = xen_pte_lock(page, mm); |
74260714 | 1040 | |
11ad93e5 JF |
1041 | if (ptl) |
1042 | xen_do_pin(MMUEXT_UNPIN_TABLE, pfn); | |
74260714 JF |
1043 | } |
1044 | ||
1045 | mcs = __xen_mc_entry(0); | |
f4f97b3e JF |
1046 | |
1047 | MULTI_update_va_mapping(mcs.mc, (unsigned long)pt, | |
1048 | pfn_pte(pfn, PAGE_KERNEL), | |
74260714 JF |
1049 | level == PT_PGD ? UVMF_TLB_FLUSH : 0); |
1050 | ||
1051 | if (ptl) { | |
1052 | /* unlock when batch completed */ | |
7708ad64 | 1053 | xen_mc_callback(xen_pte_unlock, ptl); |
74260714 | 1054 | } |
f4f97b3e JF |
1055 | } |
1056 | ||
1057 | return 0; /* never need to flush on unpin */ | |
3b827c1b JF |
1058 | } |
1059 | ||
f4f97b3e | 1060 | /* Release a pagetables pages back as normal RW */ |
eefb47f6 | 1061 | static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) |
f4f97b3e | 1062 | { |
f4f97b3e JF |
1063 | xen_mc_batch(); |
1064 | ||
74260714 | 1065 | xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); |
f4f97b3e | 1066 | |
d6182fbf JF |
1067 | #ifdef CONFIG_X86_64 |
1068 | { | |
1069 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
1070 | ||
1071 | if (user_pgd) { | |
f63c2f24 T |
1072 | xen_do_pin(MMUEXT_UNPIN_TABLE, |
1073 | PFN_DOWN(__pa(user_pgd))); | |
eefb47f6 | 1074 | xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD); |
d6182fbf JF |
1075 | } |
1076 | } | |
1077 | #endif | |
1078 | ||
5deb30d1 JF |
1079 | #ifdef CONFIG_X86_PAE |
1080 | /* Need to make sure unshared kernel PMD is unpinned */ | |
47cb2ed9 | 1081 | xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]), |
eefb47f6 | 1082 | PT_PMD); |
5deb30d1 | 1083 | #endif |
d6182fbf | 1084 | |
86bbc2c2 | 1085 | __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); |
f4f97b3e JF |
1086 | |
1087 | xen_mc_issue(0); | |
1088 | } | |
3b827c1b | 1089 | |
eefb47f6 JF |
1090 | static void xen_pgd_unpin(struct mm_struct *mm) |
1091 | { | |
1092 | __xen_pgd_unpin(mm, mm->pgd); | |
1093 | } | |
1094 | ||
0e91398f JF |
1095 | /* |
1096 | * On resume, undo any pinning done at save, so that the rest of the | |
1097 | * kernel doesn't see any unexpected pinned pagetables. | |
1098 | */ | |
1099 | void xen_mm_unpin_all(void) | |
1100 | { | |
1101 | unsigned long flags; | |
1102 | struct page *page; | |
1103 | ||
1104 | spin_lock_irqsave(&pgd_lock, flags); | |
1105 | ||
1106 | list_for_each_entry(page, &pgd_list, lru) { | |
1107 | if (PageSavePinned(page)) { | |
1108 | BUG_ON(!PagePinned(page)); | |
eefb47f6 | 1109 | __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); |
0e91398f JF |
1110 | ClearPageSavePinned(page); |
1111 | } | |
1112 | } | |
1113 | ||
1114 | spin_unlock_irqrestore(&pgd_lock, flags); | |
1115 | } | |
1116 | ||
3b827c1b JF |
1117 | void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next) |
1118 | { | |
f4f97b3e | 1119 | spin_lock(&next->page_table_lock); |
eefb47f6 | 1120 | xen_pgd_pin(next); |
f4f97b3e | 1121 | spin_unlock(&next->page_table_lock); |
3b827c1b JF |
1122 | } |
1123 | ||
1124 | void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) | |
1125 | { | |
f4f97b3e | 1126 | spin_lock(&mm->page_table_lock); |
eefb47f6 | 1127 | xen_pgd_pin(mm); |
f4f97b3e | 1128 | spin_unlock(&mm->page_table_lock); |
3b827c1b JF |
1129 | } |
1130 | ||
3b827c1b | 1131 | |
f87e4cac JF |
1132 | #ifdef CONFIG_SMP |
1133 | /* Another cpu may still have their %cr3 pointing at the pagetable, so | |
1134 | we need to repoint it somewhere else before we can unpin it. */ | |
1135 | static void drop_other_mm_ref(void *info) | |
1136 | { | |
1137 | struct mm_struct *mm = info; | |
ce87b3d3 | 1138 | struct mm_struct *active_mm; |
3b827c1b | 1139 | |
9eb912d1 | 1140 | active_mm = percpu_read(cpu_tlbstate.active_mm); |
ce87b3d3 JF |
1141 | |
1142 | if (active_mm == mm) | |
f87e4cac | 1143 | leave_mm(smp_processor_id()); |
9f79991d JF |
1144 | |
1145 | /* If this cpu still has a stale cr3 reference, then make sure | |
1146 | it has been flushed. */ | |
7fd7d83d | 1147 | if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) |
9f79991d | 1148 | load_cr3(swapper_pg_dir); |
f87e4cac | 1149 | } |
3b827c1b | 1150 | |
7708ad64 | 1151 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac | 1152 | { |
e4d98207 | 1153 | cpumask_var_t mask; |
9f79991d JF |
1154 | unsigned cpu; |
1155 | ||
f87e4cac JF |
1156 | if (current->active_mm == mm) { |
1157 | if (current->mm == mm) | |
1158 | load_cr3(swapper_pg_dir); | |
1159 | else | |
1160 | leave_mm(smp_processor_id()); | |
9f79991d JF |
1161 | } |
1162 | ||
1163 | /* Get the "official" set of cpus referring to our pagetable. */ | |
e4d98207 MT |
1164 | if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) { |
1165 | for_each_online_cpu(cpu) { | |
78f1c4d6 | 1166 | if (!cpumask_test_cpu(cpu, mm_cpumask(mm)) |
e4d98207 MT |
1167 | && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd)) |
1168 | continue; | |
1169 | smp_call_function_single(cpu, drop_other_mm_ref, mm, 1); | |
1170 | } | |
1171 | return; | |
1172 | } | |
78f1c4d6 | 1173 | cpumask_copy(mask, mm_cpumask(mm)); |
9f79991d JF |
1174 | |
1175 | /* It's possible that a vcpu may have a stale reference to our | |
1176 | cr3, because its in lazy mode, and it hasn't yet flushed | |
1177 | its set of pending hypercalls yet. In this case, we can | |
1178 | look at its actual current cr3 value, and force it to flush | |
1179 | if needed. */ | |
1180 | for_each_online_cpu(cpu) { | |
1181 | if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd)) | |
e4d98207 | 1182 | cpumask_set_cpu(cpu, mask); |
3b827c1b JF |
1183 | } |
1184 | ||
e4d98207 MT |
1185 | if (!cpumask_empty(mask)) |
1186 | smp_call_function_many(mask, drop_other_mm_ref, mm, 1); | |
1187 | free_cpumask_var(mask); | |
f87e4cac JF |
1188 | } |
1189 | #else | |
7708ad64 | 1190 | static void xen_drop_mm_ref(struct mm_struct *mm) |
f87e4cac JF |
1191 | { |
1192 | if (current->active_mm == mm) | |
1193 | load_cr3(swapper_pg_dir); | |
1194 | } | |
1195 | #endif | |
1196 | ||
1197 | /* | |
1198 | * While a process runs, Xen pins its pagetables, which means that the | |
1199 | * hypervisor forces it to be read-only, and it controls all updates | |
1200 | * to it. This means that all pagetable updates have to go via the | |
1201 | * hypervisor, which is moderately expensive. | |
1202 | * | |
1203 | * Since we're pulling the pagetable down, we switch to use init_mm, | |
1204 | * unpin old process pagetable and mark it all read-write, which | |
1205 | * allows further operations on it to be simple memory accesses. | |
1206 | * | |
1207 | * The only subtle point is that another CPU may be still using the | |
1208 | * pagetable because of lazy tlb flushing. This means we need need to | |
1209 | * switch all CPUs off this pagetable before we can unpin it. | |
1210 | */ | |
1211 | void xen_exit_mmap(struct mm_struct *mm) | |
1212 | { | |
1213 | get_cpu(); /* make sure we don't move around */ | |
7708ad64 | 1214 | xen_drop_mm_ref(mm); |
f87e4cac | 1215 | put_cpu(); |
3b827c1b | 1216 | |
f120f13e | 1217 | spin_lock(&mm->page_table_lock); |
df912ea4 JF |
1218 | |
1219 | /* pgd may not be pinned in the error exit path of execve */ | |
7708ad64 | 1220 | if (xen_page_pinned(mm->pgd)) |
eefb47f6 | 1221 | xen_pgd_unpin(mm); |
74260714 | 1222 | |
f120f13e | 1223 | spin_unlock(&mm->page_table_lock); |
3b827c1b | 1224 | } |
994025ca | 1225 | |
319f3ba5 JF |
1226 | static __init void xen_pagetable_setup_start(pgd_t *base) |
1227 | { | |
1228 | } | |
1229 | ||
f1d7062a TG |
1230 | static void xen_post_allocator_init(void); |
1231 | ||
319f3ba5 JF |
1232 | static __init void xen_pagetable_setup_done(pgd_t *base) |
1233 | { | |
1234 | xen_setup_shared_info(); | |
f1d7062a | 1235 | xen_post_allocator_init(); |
319f3ba5 JF |
1236 | } |
1237 | ||
1238 | static void xen_write_cr2(unsigned long cr2) | |
1239 | { | |
1240 | percpu_read(xen_vcpu)->arch.cr2 = cr2; | |
1241 | } | |
1242 | ||
1243 | static unsigned long xen_read_cr2(void) | |
1244 | { | |
1245 | return percpu_read(xen_vcpu)->arch.cr2; | |
1246 | } | |
1247 | ||
1248 | unsigned long xen_read_cr2_direct(void) | |
1249 | { | |
1250 | return percpu_read(xen_vcpu_info.arch.cr2); | |
1251 | } | |
1252 | ||
1253 | static void xen_flush_tlb(void) | |
1254 | { | |
1255 | struct mmuext_op *op; | |
1256 | struct multicall_space mcs; | |
1257 | ||
1258 | preempt_disable(); | |
1259 | ||
1260 | mcs = xen_mc_entry(sizeof(*op)); | |
1261 | ||
1262 | op = mcs.args; | |
1263 | op->cmd = MMUEXT_TLB_FLUSH_LOCAL; | |
1264 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1265 | ||
1266 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
1267 | ||
1268 | preempt_enable(); | |
1269 | } | |
1270 | ||
1271 | static void xen_flush_tlb_single(unsigned long addr) | |
1272 | { | |
1273 | struct mmuext_op *op; | |
1274 | struct multicall_space mcs; | |
1275 | ||
1276 | preempt_disable(); | |
1277 | ||
1278 | mcs = xen_mc_entry(sizeof(*op)); | |
1279 | op = mcs.args; | |
1280 | op->cmd = MMUEXT_INVLPG_LOCAL; | |
1281 | op->arg1.linear_addr = addr & PAGE_MASK; | |
1282 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1283 | ||
1284 | xen_mc_issue(PARAVIRT_LAZY_MMU); | |
1285 | ||
1286 | preempt_enable(); | |
1287 | } | |
1288 | ||
1289 | static void xen_flush_tlb_others(const struct cpumask *cpus, | |
1290 | struct mm_struct *mm, unsigned long va) | |
1291 | { | |
1292 | struct { | |
1293 | struct mmuext_op op; | |
1294 | DECLARE_BITMAP(mask, NR_CPUS); | |
1295 | } *args; | |
1296 | struct multicall_space mcs; | |
1297 | ||
e3f8a74e JF |
1298 | if (cpumask_empty(cpus)) |
1299 | return; /* nothing to do */ | |
319f3ba5 JF |
1300 | |
1301 | mcs = xen_mc_entry(sizeof(*args)); | |
1302 | args = mcs.args; | |
1303 | args->op.arg2.vcpumask = to_cpumask(args->mask); | |
1304 | ||
1305 | /* Remove us, and any offline CPUS. */ | |
1306 | cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask); | |
1307 | cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask)); | |
319f3ba5 JF |
1308 | |
1309 | if (va == TLB_FLUSH_ALL) { | |
1310 | args->op.cmd = MMUEXT_TLB_FLUSH_MULTI; | |
1311 | } else { | |
1312 | args->op.cmd = MMUEXT_INVLPG_MULTI; | |
1313 | args->op.arg1.linear_addr = va; | |
1314 | } | |
1315 | ||
1316 | MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); | |
1317 | ||
319f3ba5 JF |
1318 | xen_mc_issue(PARAVIRT_LAZY_MMU); |
1319 | } | |
1320 | ||
1321 | static unsigned long xen_read_cr3(void) | |
1322 | { | |
1323 | return percpu_read(xen_cr3); | |
1324 | } | |
1325 | ||
1326 | static void set_current_cr3(void *v) | |
1327 | { | |
1328 | percpu_write(xen_current_cr3, (unsigned long)v); | |
1329 | } | |
1330 | ||
1331 | static void __xen_write_cr3(bool kernel, unsigned long cr3) | |
1332 | { | |
1333 | struct mmuext_op *op; | |
1334 | struct multicall_space mcs; | |
1335 | unsigned long mfn; | |
1336 | ||
1337 | if (cr3) | |
1338 | mfn = pfn_to_mfn(PFN_DOWN(cr3)); | |
1339 | else | |
1340 | mfn = 0; | |
1341 | ||
1342 | WARN_ON(mfn == 0 && kernel); | |
1343 | ||
1344 | mcs = __xen_mc_entry(sizeof(*op)); | |
1345 | ||
1346 | op = mcs.args; | |
1347 | op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR; | |
1348 | op->arg1.mfn = mfn; | |
1349 | ||
1350 | MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); | |
1351 | ||
1352 | if (kernel) { | |
1353 | percpu_write(xen_cr3, cr3); | |
1354 | ||
1355 | /* Update xen_current_cr3 once the batch has actually | |
1356 | been submitted. */ | |
1357 | xen_mc_callback(set_current_cr3, (void *)cr3); | |
1358 | } | |
1359 | } | |
1360 | ||
1361 | static void xen_write_cr3(unsigned long cr3) | |
1362 | { | |
1363 | BUG_ON(preemptible()); | |
1364 | ||
1365 | xen_mc_batch(); /* disables interrupts */ | |
1366 | ||
1367 | /* Update while interrupts are disabled, so its atomic with | |
1368 | respect to ipis */ | |
1369 | percpu_write(xen_cr3, cr3); | |
1370 | ||
1371 | __xen_write_cr3(true, cr3); | |
1372 | ||
1373 | #ifdef CONFIG_X86_64 | |
1374 | { | |
1375 | pgd_t *user_pgd = xen_get_user_pgd(__va(cr3)); | |
1376 | if (user_pgd) | |
1377 | __xen_write_cr3(false, __pa(user_pgd)); | |
1378 | else | |
1379 | __xen_write_cr3(false, 0); | |
1380 | } | |
1381 | #endif | |
1382 | ||
1383 | xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */ | |
1384 | } | |
1385 | ||
1386 | static int xen_pgd_alloc(struct mm_struct *mm) | |
1387 | { | |
1388 | pgd_t *pgd = mm->pgd; | |
1389 | int ret = 0; | |
1390 | ||
1391 | BUG_ON(PagePinned(virt_to_page(pgd))); | |
1392 | ||
1393 | #ifdef CONFIG_X86_64 | |
1394 | { | |
1395 | struct page *page = virt_to_page(pgd); | |
1396 | pgd_t *user_pgd; | |
1397 | ||
1398 | BUG_ON(page->private != 0); | |
1399 | ||
1400 | ret = -ENOMEM; | |
1401 | ||
1402 | user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO); | |
1403 | page->private = (unsigned long)user_pgd; | |
1404 | ||
1405 | if (user_pgd != NULL) { | |
1406 | user_pgd[pgd_index(VSYSCALL_START)] = | |
1407 | __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE); | |
1408 | ret = 0; | |
1409 | } | |
1410 | ||
1411 | BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd)))); | |
1412 | } | |
1413 | #endif | |
1414 | ||
1415 | return ret; | |
1416 | } | |
1417 | ||
1418 | static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd) | |
1419 | { | |
1420 | #ifdef CONFIG_X86_64 | |
1421 | pgd_t *user_pgd = xen_get_user_pgd(pgd); | |
1422 | ||
1423 | if (user_pgd) | |
1424 | free_page((unsigned long)user_pgd); | |
1425 | #endif | |
1426 | } | |
1427 | ||
1f4f9315 JF |
1428 | static __init pte_t mask_rw_pte(pte_t *ptep, pte_t pte) |
1429 | { | |
fef5ba79 JF |
1430 | unsigned long pfn = pte_pfn(pte); |
1431 | ||
1432 | #ifdef CONFIG_X86_32 | |
1f4f9315 JF |
1433 | /* If there's an existing pte, then don't allow _PAGE_RW to be set */ |
1434 | if (pte_val_ma(*ptep) & _PAGE_PRESENT) | |
1435 | pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) & | |
1436 | pte_val_ma(pte)); | |
fef5ba79 JF |
1437 | #endif |
1438 | ||
1439 | /* | |
1440 | * If the new pfn is within the range of the newly allocated | |
1441 | * kernel pagetable, and it isn't being mapped into an | |
1442 | * early_ioremap fixmap slot, make sure it is RO. | |
1443 | */ | |
1444 | if (!is_early_ioremap_ptep(ptep) && | |
1445 | pfn >= e820_table_start && pfn < e820_table_end) | |
1446 | pte = pte_wrprotect(pte); | |
1f4f9315 JF |
1447 | |
1448 | return pte; | |
1449 | } | |
1450 | ||
1451 | /* Init-time set_pte while constructing initial pagetables, which | |
1452 | doesn't allow RO pagetable pages to be remapped RW */ | |
1453 | static __init void xen_set_pte_init(pte_t *ptep, pte_t pte) | |
1454 | { | |
1455 | pte = mask_rw_pte(ptep, pte); | |
1456 | ||
1457 | xen_set_pte(ptep, pte); | |
1458 | } | |
319f3ba5 | 1459 | |
b96229b5 JF |
1460 | static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn) |
1461 | { | |
1462 | struct mmuext_op op; | |
1463 | op.cmd = cmd; | |
1464 | op.arg1.mfn = pfn_to_mfn(pfn); | |
1465 | if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF)) | |
1466 | BUG(); | |
1467 | } | |
1468 | ||
319f3ba5 JF |
1469 | /* Early in boot, while setting up the initial pagetable, assume |
1470 | everything is pinned. */ | |
1471 | static __init void xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn) | |
1472 | { | |
b96229b5 JF |
1473 | #ifdef CONFIG_FLATMEM |
1474 | BUG_ON(mem_map); /* should only be used early */ | |
1475 | #endif | |
1476 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | |
1477 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
1478 | } | |
1479 | ||
1480 | /* Used for pmd and pud */ | |
1481 | static __init void xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn) | |
1482 | { | |
319f3ba5 JF |
1483 | #ifdef CONFIG_FLATMEM |
1484 | BUG_ON(mem_map); /* should only be used early */ | |
1485 | #endif | |
1486 | make_lowmem_page_readonly(__va(PFN_PHYS(pfn))); | |
1487 | } | |
1488 | ||
1489 | /* Early release_pte assumes that all pts are pinned, since there's | |
1490 | only init_mm and anything attached to that is pinned. */ | |
b96229b5 | 1491 | static __init void xen_release_pte_init(unsigned long pfn) |
319f3ba5 | 1492 | { |
b96229b5 | 1493 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); |
319f3ba5 JF |
1494 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
1495 | } | |
1496 | ||
b96229b5 | 1497 | static __init void xen_release_pmd_init(unsigned long pfn) |
319f3ba5 | 1498 | { |
b96229b5 | 1499 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); |
319f3ba5 JF |
1500 | } |
1501 | ||
1502 | /* This needs to make sure the new pte page is pinned iff its being | |
1503 | attached to a pinned pagetable. */ | |
1504 | static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level) | |
1505 | { | |
1506 | struct page *page = pfn_to_page(pfn); | |
1507 | ||
1508 | if (PagePinned(virt_to_page(mm->pgd))) { | |
1509 | SetPagePinned(page); | |
1510 | ||
319f3ba5 JF |
1511 | if (!PageHighMem(page)) { |
1512 | make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn))); | |
1513 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | |
1514 | pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); | |
1515 | } else { | |
1516 | /* make sure there are no stray mappings of | |
1517 | this page */ | |
1518 | kmap_flush_unused(); | |
1519 | } | |
1520 | } | |
1521 | } | |
1522 | ||
1523 | static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn) | |
1524 | { | |
1525 | xen_alloc_ptpage(mm, pfn, PT_PTE); | |
1526 | } | |
1527 | ||
1528 | static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn) | |
1529 | { | |
1530 | xen_alloc_ptpage(mm, pfn, PT_PMD); | |
1531 | } | |
1532 | ||
1533 | /* This should never happen until we're OK to use struct page */ | |
1534 | static void xen_release_ptpage(unsigned long pfn, unsigned level) | |
1535 | { | |
1536 | struct page *page = pfn_to_page(pfn); | |
1537 | ||
1538 | if (PagePinned(page)) { | |
1539 | if (!PageHighMem(page)) { | |
1540 | if (level == PT_PTE && USE_SPLIT_PTLOCKS) | |
1541 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn); | |
1542 | make_lowmem_page_readwrite(__va(PFN_PHYS(pfn))); | |
1543 | } | |
1544 | ClearPagePinned(page); | |
1545 | } | |
1546 | } | |
1547 | ||
1548 | static void xen_release_pte(unsigned long pfn) | |
1549 | { | |
1550 | xen_release_ptpage(pfn, PT_PTE); | |
1551 | } | |
1552 | ||
1553 | static void xen_release_pmd(unsigned long pfn) | |
1554 | { | |
1555 | xen_release_ptpage(pfn, PT_PMD); | |
1556 | } | |
1557 | ||
1558 | #if PAGETABLE_LEVELS == 4 | |
1559 | static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn) | |
1560 | { | |
1561 | xen_alloc_ptpage(mm, pfn, PT_PUD); | |
1562 | } | |
1563 | ||
1564 | static void xen_release_pud(unsigned long pfn) | |
1565 | { | |
1566 | xen_release_ptpage(pfn, PT_PUD); | |
1567 | } | |
1568 | #endif | |
1569 | ||
1570 | void __init xen_reserve_top(void) | |
1571 | { | |
1572 | #ifdef CONFIG_X86_32 | |
1573 | unsigned long top = HYPERVISOR_VIRT_START; | |
1574 | struct xen_platform_parameters pp; | |
1575 | ||
1576 | if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0) | |
1577 | top = pp.virt_start; | |
1578 | ||
1579 | reserve_top_address(-top); | |
1580 | #endif /* CONFIG_X86_32 */ | |
1581 | } | |
1582 | ||
1583 | /* | |
1584 | * Like __va(), but returns address in the kernel mapping (which is | |
1585 | * all we have until the physical memory mapping has been set up. | |
1586 | */ | |
1587 | static void *__ka(phys_addr_t paddr) | |
1588 | { | |
1589 | #ifdef CONFIG_X86_64 | |
1590 | return (void *)(paddr + __START_KERNEL_map); | |
1591 | #else | |
1592 | return __va(paddr); | |
1593 | #endif | |
1594 | } | |
1595 | ||
1596 | /* Convert a machine address to physical address */ | |
1597 | static unsigned long m2p(phys_addr_t maddr) | |
1598 | { | |
1599 | phys_addr_t paddr; | |
1600 | ||
1601 | maddr &= PTE_PFN_MASK; | |
1602 | paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT; | |
1603 | ||
1604 | return paddr; | |
1605 | } | |
1606 | ||
1607 | /* Convert a machine address to kernel virtual */ | |
1608 | static void *m2v(phys_addr_t maddr) | |
1609 | { | |
1610 | return __ka(m2p(maddr)); | |
1611 | } | |
1612 | ||
4ec5387c | 1613 | /* Set the page permissions on an identity-mapped pages */ |
319f3ba5 JF |
1614 | static void set_page_prot(void *addr, pgprot_t prot) |
1615 | { | |
1616 | unsigned long pfn = __pa(addr) >> PAGE_SHIFT; | |
1617 | pte_t pte = pfn_pte(pfn, prot); | |
1618 | ||
1619 | if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0)) | |
1620 | BUG(); | |
1621 | } | |
1622 | ||
1623 | static __init void xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn) | |
1624 | { | |
1625 | unsigned pmdidx, pteidx; | |
1626 | unsigned ident_pte; | |
1627 | unsigned long pfn; | |
1628 | ||
764f0138 JF |
1629 | level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES, |
1630 | PAGE_SIZE); | |
1631 | ||
319f3ba5 JF |
1632 | ident_pte = 0; |
1633 | pfn = 0; | |
1634 | for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) { | |
1635 | pte_t *pte_page; | |
1636 | ||
1637 | /* Reuse or allocate a page of ptes */ | |
1638 | if (pmd_present(pmd[pmdidx])) | |
1639 | pte_page = m2v(pmd[pmdidx].pmd); | |
1640 | else { | |
1641 | /* Check for free pte pages */ | |
764f0138 | 1642 | if (ident_pte == LEVEL1_IDENT_ENTRIES) |
319f3ba5 JF |
1643 | break; |
1644 | ||
1645 | pte_page = &level1_ident_pgt[ident_pte]; | |
1646 | ident_pte += PTRS_PER_PTE; | |
1647 | ||
1648 | pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE); | |
1649 | } | |
1650 | ||
1651 | /* Install mappings */ | |
1652 | for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) { | |
1653 | pte_t pte; | |
1654 | ||
1655 | if (pfn > max_pfn_mapped) | |
1656 | max_pfn_mapped = pfn; | |
1657 | ||
1658 | if (!pte_none(pte_page[pteidx])) | |
1659 | continue; | |
1660 | ||
1661 | pte = pfn_pte(pfn, PAGE_KERNEL_EXEC); | |
1662 | pte_page[pteidx] = pte; | |
1663 | } | |
1664 | } | |
1665 | ||
1666 | for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE) | |
1667 | set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO); | |
1668 | ||
1669 | set_page_prot(pmd, PAGE_KERNEL_RO); | |
1670 | } | |
1671 | ||
7e77506a IC |
1672 | void __init xen_setup_machphys_mapping(void) |
1673 | { | |
1674 | struct xen_machphys_mapping mapping; | |
1675 | unsigned long machine_to_phys_nr_ents; | |
1676 | ||
1677 | if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) { | |
1678 | machine_to_phys_mapping = (unsigned long *)mapping.v_start; | |
1679 | machine_to_phys_nr_ents = mapping.max_mfn + 1; | |
1680 | } else { | |
1681 | machine_to_phys_nr_ents = MACH2PHYS_NR_ENTRIES; | |
1682 | } | |
1683 | machine_to_phys_order = fls(machine_to_phys_nr_ents - 1); | |
1684 | } | |
1685 | ||
319f3ba5 JF |
1686 | #ifdef CONFIG_X86_64 |
1687 | static void convert_pfn_mfn(void *v) | |
1688 | { | |
1689 | pte_t *pte = v; | |
1690 | int i; | |
1691 | ||
1692 | /* All levels are converted the same way, so just treat them | |
1693 | as ptes. */ | |
1694 | for (i = 0; i < PTRS_PER_PTE; i++) | |
1695 | pte[i] = xen_make_pte(pte[i].pte); | |
1696 | } | |
1697 | ||
1698 | /* | |
1699 | * Set up the inital kernel pagetable. | |
1700 | * | |
1701 | * We can construct this by grafting the Xen provided pagetable into | |
1702 | * head_64.S's preconstructed pagetables. We copy the Xen L2's into | |
1703 | * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This | |
1704 | * means that only the kernel has a physical mapping to start with - | |
1705 | * but that's enough to get __va working. We need to fill in the rest | |
1706 | * of the physical mapping once some sort of allocator has been set | |
1707 | * up. | |
1708 | */ | |
1709 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | |
1710 | unsigned long max_pfn) | |
1711 | { | |
1712 | pud_t *l3; | |
1713 | pmd_t *l2; | |
1714 | ||
1715 | /* Zap identity mapping */ | |
1716 | init_level4_pgt[0] = __pgd(0); | |
1717 | ||
1718 | /* Pre-constructed entries are in pfn, so convert to mfn */ | |
1719 | convert_pfn_mfn(init_level4_pgt); | |
1720 | convert_pfn_mfn(level3_ident_pgt); | |
1721 | convert_pfn_mfn(level3_kernel_pgt); | |
1722 | ||
1723 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd); | |
1724 | l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud); | |
1725 | ||
1726 | memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1727 | memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1728 | ||
1729 | l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd); | |
1730 | l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud); | |
1731 | memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD); | |
1732 | ||
1733 | /* Set up identity map */ | |
1734 | xen_map_identity_early(level2_ident_pgt, max_pfn); | |
1735 | ||
1736 | /* Make pagetable pieces RO */ | |
1737 | set_page_prot(init_level4_pgt, PAGE_KERNEL_RO); | |
1738 | set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO); | |
1739 | set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO); | |
1740 | set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO); | |
1741 | set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO); | |
1742 | set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO); | |
1743 | ||
1744 | /* Pin down new L4 */ | |
1745 | pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, | |
1746 | PFN_DOWN(__pa_symbol(init_level4_pgt))); | |
1747 | ||
1748 | /* Unpin Xen-provided one */ | |
1749 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1750 | ||
1751 | /* Switch over */ | |
1752 | pgd = init_level4_pgt; | |
1753 | ||
1754 | /* | |
1755 | * At this stage there can be no user pgd, and no page | |
1756 | * structure to attach it to, so make sure we just set kernel | |
1757 | * pgd. | |
1758 | */ | |
1759 | xen_mc_batch(); | |
1760 | __xen_write_cr3(true, __pa(pgd)); | |
1761 | xen_mc_issue(PARAVIRT_LAZY_CPU); | |
1762 | ||
a9ce6bc1 | 1763 | memblock_x86_reserve_range(__pa(xen_start_info->pt_base), |
319f3ba5 JF |
1764 | __pa(xen_start_info->pt_base + |
1765 | xen_start_info->nr_pt_frames * PAGE_SIZE), | |
1766 | "XEN PAGETABLES"); | |
1767 | ||
1768 | return pgd; | |
1769 | } | |
1770 | #else /* !CONFIG_X86_64 */ | |
5b5c1af1 IC |
1771 | static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD); |
1772 | static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD); | |
1773 | ||
1774 | static __init void xen_write_cr3_init(unsigned long cr3) | |
1775 | { | |
1776 | unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir)); | |
1777 | ||
1778 | BUG_ON(read_cr3() != __pa(initial_page_table)); | |
1779 | BUG_ON(cr3 != __pa(swapper_pg_dir)); | |
1780 | ||
1781 | /* | |
1782 | * We are switching to swapper_pg_dir for the first time (from | |
1783 | * initial_page_table) and therefore need to mark that page | |
1784 | * read-only and then pin it. | |
1785 | * | |
1786 | * Xen disallows sharing of kernel PMDs for PAE | |
1787 | * guests. Therefore we must copy the kernel PMD from | |
1788 | * initial_page_table into a new kernel PMD to be used in | |
1789 | * swapper_pg_dir. | |
1790 | */ | |
1791 | swapper_kernel_pmd = | |
1792 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | |
1793 | memcpy(swapper_kernel_pmd, initial_kernel_pmd, | |
1794 | sizeof(pmd_t) * PTRS_PER_PMD); | |
1795 | swapper_pg_dir[KERNEL_PGD_BOUNDARY] = | |
1796 | __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT); | |
1797 | set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO); | |
1798 | ||
1799 | set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO); | |
1800 | xen_write_cr3(cr3); | |
1801 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn); | |
1802 | ||
1803 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, | |
1804 | PFN_DOWN(__pa(initial_page_table))); | |
1805 | set_page_prot(initial_page_table, PAGE_KERNEL); | |
1806 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL); | |
1807 | ||
1808 | pv_mmu_ops.write_cr3 = &xen_write_cr3; | |
1809 | } | |
319f3ba5 JF |
1810 | |
1811 | __init pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, | |
1812 | unsigned long max_pfn) | |
1813 | { | |
1814 | pmd_t *kernel_pmd; | |
1815 | ||
5b5c1af1 IC |
1816 | initial_kernel_pmd = |
1817 | extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE); | |
f0991802 | 1818 | |
93dbda7c JF |
1819 | max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) + |
1820 | xen_start_info->nr_pt_frames * PAGE_SIZE + | |
1821 | 512*1024); | |
319f3ba5 JF |
1822 | |
1823 | kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd); | |
5b5c1af1 | 1824 | memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD); |
319f3ba5 | 1825 | |
5b5c1af1 | 1826 | xen_map_identity_early(initial_kernel_pmd, max_pfn); |
319f3ba5 | 1827 | |
5b5c1af1 IC |
1828 | memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD); |
1829 | initial_page_table[KERNEL_PGD_BOUNDARY] = | |
1830 | __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT); | |
319f3ba5 | 1831 | |
5b5c1af1 IC |
1832 | set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO); |
1833 | set_page_prot(initial_page_table, PAGE_KERNEL_RO); | |
319f3ba5 JF |
1834 | set_page_prot(empty_zero_page, PAGE_KERNEL_RO); |
1835 | ||
1836 | pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd))); | |
1837 | ||
5b5c1af1 IC |
1838 | pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, |
1839 | PFN_DOWN(__pa(initial_page_table))); | |
1840 | xen_write_cr3(__pa(initial_page_table)); | |
319f3ba5 | 1841 | |
a9ce6bc1 | 1842 | memblock_x86_reserve_range(__pa(xen_start_info->pt_base), |
33df4db0 JF |
1843 | __pa(xen_start_info->pt_base + |
1844 | xen_start_info->nr_pt_frames * PAGE_SIZE), | |
1845 | "XEN PAGETABLES"); | |
1846 | ||
5b5c1af1 | 1847 | return initial_page_table; |
319f3ba5 JF |
1848 | } |
1849 | #endif /* CONFIG_X86_64 */ | |
1850 | ||
98511f35 JF |
1851 | static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss; |
1852 | ||
3b3809ac | 1853 | static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) |
319f3ba5 JF |
1854 | { |
1855 | pte_t pte; | |
1856 | ||
1857 | phys >>= PAGE_SHIFT; | |
1858 | ||
1859 | switch (idx) { | |
1860 | case FIX_BTMAP_END ... FIX_BTMAP_BEGIN: | |
1861 | #ifdef CONFIG_X86_F00F_BUG | |
1862 | case FIX_F00F_IDT: | |
1863 | #endif | |
1864 | #ifdef CONFIG_X86_32 | |
1865 | case FIX_WP_TEST: | |
1866 | case FIX_VDSO: | |
1867 | # ifdef CONFIG_HIGHMEM | |
1868 | case FIX_KMAP_BEGIN ... FIX_KMAP_END: | |
1869 | # endif | |
1870 | #else | |
1871 | case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE: | |
319f3ba5 | 1872 | #endif |
3ecb1b7d JF |
1873 | case FIX_TEXT_POKE0: |
1874 | case FIX_TEXT_POKE1: | |
1875 | /* All local page mappings */ | |
319f3ba5 JF |
1876 | pte = pfn_pte(phys, prot); |
1877 | break; | |
1878 | ||
98511f35 JF |
1879 | #ifdef CONFIG_X86_LOCAL_APIC |
1880 | case FIX_APIC_BASE: /* maps dummy local APIC */ | |
1881 | pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); | |
1882 | break; | |
1883 | #endif | |
1884 | ||
1885 | #ifdef CONFIG_X86_IO_APIC | |
1886 | case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END: | |
1887 | /* | |
1888 | * We just don't map the IO APIC - all access is via | |
1889 | * hypercalls. Keep the address in the pte for reference. | |
1890 | */ | |
1891 | pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL); | |
1892 | break; | |
1893 | #endif | |
1894 | ||
c0011dbf JF |
1895 | case FIX_PARAVIRT_BOOTMAP: |
1896 | /* This is an MFN, but it isn't an IO mapping from the | |
1897 | IO domain */ | |
319f3ba5 JF |
1898 | pte = mfn_pte(phys, prot); |
1899 | break; | |
c0011dbf JF |
1900 | |
1901 | default: | |
1902 | /* By default, set_fixmap is used for hardware mappings */ | |
1903 | pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP)); | |
1904 | break; | |
319f3ba5 JF |
1905 | } |
1906 | ||
1907 | __native_set_fixmap(idx, pte); | |
1908 | ||
1909 | #ifdef CONFIG_X86_64 | |
1910 | /* Replicate changes to map the vsyscall page into the user | |
1911 | pagetable vsyscall mapping. */ | |
1912 | if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) { | |
1913 | unsigned long vaddr = __fix_to_virt(idx); | |
1914 | set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte); | |
1915 | } | |
1916 | #endif | |
1917 | } | |
1918 | ||
4ec5387c JQ |
1919 | __init void xen_ident_map_ISA(void) |
1920 | { | |
1921 | unsigned long pa; | |
1922 | ||
1923 | /* | |
1924 | * If we're dom0, then linear map the ISA machine addresses into | |
1925 | * the kernel's address space. | |
1926 | */ | |
1927 | if (!xen_initial_domain()) | |
1928 | return; | |
1929 | ||
1930 | xen_raw_printk("Xen: setup ISA identity maps\n"); | |
1931 | ||
1932 | for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) { | |
1933 | pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO); | |
1934 | ||
1935 | if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0)) | |
1936 | BUG(); | |
1937 | } | |
1938 | ||
1939 | xen_flush_tlb(); | |
1940 | } | |
1941 | ||
f1d7062a | 1942 | static __init void xen_post_allocator_init(void) |
319f3ba5 JF |
1943 | { |
1944 | pv_mmu_ops.set_pte = xen_set_pte; | |
1945 | pv_mmu_ops.set_pmd = xen_set_pmd; | |
1946 | pv_mmu_ops.set_pud = xen_set_pud; | |
1947 | #if PAGETABLE_LEVELS == 4 | |
1948 | pv_mmu_ops.set_pgd = xen_set_pgd; | |
1949 | #endif | |
1950 | ||
1951 | /* This will work as long as patching hasn't happened yet | |
1952 | (which it hasn't) */ | |
1953 | pv_mmu_ops.alloc_pte = xen_alloc_pte; | |
1954 | pv_mmu_ops.alloc_pmd = xen_alloc_pmd; | |
1955 | pv_mmu_ops.release_pte = xen_release_pte; | |
1956 | pv_mmu_ops.release_pmd = xen_release_pmd; | |
1957 | #if PAGETABLE_LEVELS == 4 | |
1958 | pv_mmu_ops.alloc_pud = xen_alloc_pud; | |
1959 | pv_mmu_ops.release_pud = xen_release_pud; | |
1960 | #endif | |
1961 | ||
1962 | #ifdef CONFIG_X86_64 | |
1963 | SetPagePinned(virt_to_page(level3_user_vsyscall)); | |
1964 | #endif | |
1965 | xen_mark_init_mm_pinned(); | |
1966 | } | |
1967 | ||
b407fc57 JF |
1968 | static void xen_leave_lazy_mmu(void) |
1969 | { | |
5caecb94 | 1970 | preempt_disable(); |
b407fc57 JF |
1971 | xen_mc_flush(); |
1972 | paravirt_leave_lazy_mmu(); | |
5caecb94 | 1973 | preempt_enable(); |
b407fc57 | 1974 | } |
319f3ba5 | 1975 | |
030cb6c0 | 1976 | static const struct pv_mmu_ops xen_mmu_ops __initdata = { |
319f3ba5 JF |
1977 | .read_cr2 = xen_read_cr2, |
1978 | .write_cr2 = xen_write_cr2, | |
1979 | ||
1980 | .read_cr3 = xen_read_cr3, | |
5b5c1af1 IC |
1981 | #ifdef CONFIG_X86_32 |
1982 | .write_cr3 = xen_write_cr3_init, | |
1983 | #else | |
319f3ba5 | 1984 | .write_cr3 = xen_write_cr3, |
5b5c1af1 | 1985 | #endif |
319f3ba5 JF |
1986 | |
1987 | .flush_tlb_user = xen_flush_tlb, | |
1988 | .flush_tlb_kernel = xen_flush_tlb, | |
1989 | .flush_tlb_single = xen_flush_tlb_single, | |
1990 | .flush_tlb_others = xen_flush_tlb_others, | |
1991 | ||
1992 | .pte_update = paravirt_nop, | |
1993 | .pte_update_defer = paravirt_nop, | |
1994 | ||
1995 | .pgd_alloc = xen_pgd_alloc, | |
1996 | .pgd_free = xen_pgd_free, | |
1997 | ||
1998 | .alloc_pte = xen_alloc_pte_init, | |
1999 | .release_pte = xen_release_pte_init, | |
b96229b5 | 2000 | .alloc_pmd = xen_alloc_pmd_init, |
b96229b5 | 2001 | .release_pmd = xen_release_pmd_init, |
319f3ba5 | 2002 | |
319f3ba5 | 2003 | .set_pte = xen_set_pte_init, |
319f3ba5 JF |
2004 | .set_pte_at = xen_set_pte_at, |
2005 | .set_pmd = xen_set_pmd_hyper, | |
2006 | ||
2007 | .ptep_modify_prot_start = __ptep_modify_prot_start, | |
2008 | .ptep_modify_prot_commit = __ptep_modify_prot_commit, | |
2009 | ||
da5de7c2 JF |
2010 | .pte_val = PV_CALLEE_SAVE(xen_pte_val), |
2011 | .pgd_val = PV_CALLEE_SAVE(xen_pgd_val), | |
319f3ba5 | 2012 | |
da5de7c2 JF |
2013 | .make_pte = PV_CALLEE_SAVE(xen_make_pte), |
2014 | .make_pgd = PV_CALLEE_SAVE(xen_make_pgd), | |
319f3ba5 JF |
2015 | |
2016 | #ifdef CONFIG_X86_PAE | |
2017 | .set_pte_atomic = xen_set_pte_atomic, | |
319f3ba5 JF |
2018 | .pte_clear = xen_pte_clear, |
2019 | .pmd_clear = xen_pmd_clear, | |
2020 | #endif /* CONFIG_X86_PAE */ | |
2021 | .set_pud = xen_set_pud_hyper, | |
2022 | ||
da5de7c2 JF |
2023 | .make_pmd = PV_CALLEE_SAVE(xen_make_pmd), |
2024 | .pmd_val = PV_CALLEE_SAVE(xen_pmd_val), | |
319f3ba5 JF |
2025 | |
2026 | #if PAGETABLE_LEVELS == 4 | |
da5de7c2 JF |
2027 | .pud_val = PV_CALLEE_SAVE(xen_pud_val), |
2028 | .make_pud = PV_CALLEE_SAVE(xen_make_pud), | |
319f3ba5 JF |
2029 | .set_pgd = xen_set_pgd_hyper, |
2030 | ||
b96229b5 JF |
2031 | .alloc_pud = xen_alloc_pmd_init, |
2032 | .release_pud = xen_release_pmd_init, | |
319f3ba5 JF |
2033 | #endif /* PAGETABLE_LEVELS == 4 */ |
2034 | ||
2035 | .activate_mm = xen_activate_mm, | |
2036 | .dup_mmap = xen_dup_mmap, | |
2037 | .exit_mmap = xen_exit_mmap, | |
2038 | ||
2039 | .lazy_mode = { | |
2040 | .enter = paravirt_enter_lazy_mmu, | |
b407fc57 | 2041 | .leave = xen_leave_lazy_mmu, |
319f3ba5 JF |
2042 | }, |
2043 | ||
2044 | .set_fixmap = xen_set_fixmap, | |
2045 | }; | |
2046 | ||
030cb6c0 TG |
2047 | void __init xen_init_mmu_ops(void) |
2048 | { | |
2049 | x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start; | |
2050 | x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done; | |
2051 | pv_mmu_ops = xen_mmu_ops; | |
d2cb2145 | 2052 | |
98511f35 | 2053 | memset(dummy_mapping, 0xff, PAGE_SIZE); |
030cb6c0 | 2054 | } |
319f3ba5 | 2055 | |
08bbc9da AN |
2056 | /* Protected by xen_reservation_lock. */ |
2057 | #define MAX_CONTIG_ORDER 9 /* 2MB */ | |
2058 | static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER]; | |
2059 | ||
2060 | #define VOID_PTE (mfn_pte(0, __pgprot(0))) | |
2061 | static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, | |
2062 | unsigned long *in_frames, | |
2063 | unsigned long *out_frames) | |
2064 | { | |
2065 | int i; | |
2066 | struct multicall_space mcs; | |
2067 | ||
2068 | xen_mc_batch(); | |
2069 | for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) { | |
2070 | mcs = __xen_mc_entry(0); | |
2071 | ||
2072 | if (in_frames) | |
2073 | in_frames[i] = virt_to_mfn(vaddr); | |
2074 | ||
2075 | MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0); | |
2076 | set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY); | |
2077 | ||
2078 | if (out_frames) | |
2079 | out_frames[i] = virt_to_pfn(vaddr); | |
2080 | } | |
2081 | xen_mc_issue(0); | |
2082 | } | |
2083 | ||
2084 | /* | |
2085 | * Update the pfn-to-mfn mappings for a virtual address range, either to | |
2086 | * point to an array of mfns, or contiguously from a single starting | |
2087 | * mfn. | |
2088 | */ | |
2089 | static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, | |
2090 | unsigned long *mfns, | |
2091 | unsigned long first_mfn) | |
2092 | { | |
2093 | unsigned i, limit; | |
2094 | unsigned long mfn; | |
2095 | ||
2096 | xen_mc_batch(); | |
2097 | ||
2098 | limit = 1u << order; | |
2099 | for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) { | |
2100 | struct multicall_space mcs; | |
2101 | unsigned flags; | |
2102 | ||
2103 | mcs = __xen_mc_entry(0); | |
2104 | if (mfns) | |
2105 | mfn = mfns[i]; | |
2106 | else | |
2107 | mfn = first_mfn + i; | |
2108 | ||
2109 | if (i < (limit - 1)) | |
2110 | flags = 0; | |
2111 | else { | |
2112 | if (order == 0) | |
2113 | flags = UVMF_INVLPG | UVMF_ALL; | |
2114 | else | |
2115 | flags = UVMF_TLB_FLUSH | UVMF_ALL; | |
2116 | } | |
2117 | ||
2118 | MULTI_update_va_mapping(mcs.mc, vaddr, | |
2119 | mfn_pte(mfn, PAGE_KERNEL), flags); | |
2120 | ||
2121 | set_phys_to_machine(virt_to_pfn(vaddr), mfn); | |
2122 | } | |
2123 | ||
2124 | xen_mc_issue(0); | |
2125 | } | |
2126 | ||
2127 | /* | |
2128 | * Perform the hypercall to exchange a region of our pfns to point to | |
2129 | * memory with the required contiguous alignment. Takes the pfns as | |
2130 | * input, and populates mfns as output. | |
2131 | * | |
2132 | * Returns a success code indicating whether the hypervisor was able to | |
2133 | * satisfy the request or not. | |
2134 | */ | |
2135 | static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in, | |
2136 | unsigned long *pfns_in, | |
2137 | unsigned long extents_out, | |
2138 | unsigned int order_out, | |
2139 | unsigned long *mfns_out, | |
2140 | unsigned int address_bits) | |
2141 | { | |
2142 | long rc; | |
2143 | int success; | |
2144 | ||
2145 | struct xen_memory_exchange exchange = { | |
2146 | .in = { | |
2147 | .nr_extents = extents_in, | |
2148 | .extent_order = order_in, | |
2149 | .extent_start = pfns_in, | |
2150 | .domid = DOMID_SELF | |
2151 | }, | |
2152 | .out = { | |
2153 | .nr_extents = extents_out, | |
2154 | .extent_order = order_out, | |
2155 | .extent_start = mfns_out, | |
2156 | .address_bits = address_bits, | |
2157 | .domid = DOMID_SELF | |
2158 | } | |
2159 | }; | |
2160 | ||
2161 | BUG_ON(extents_in << order_in != extents_out << order_out); | |
2162 | ||
2163 | rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange); | |
2164 | success = (exchange.nr_exchanged == extents_in); | |
2165 | ||
2166 | BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0))); | |
2167 | BUG_ON(success && (rc != 0)); | |
2168 | ||
2169 | return success; | |
2170 | } | |
2171 | ||
2172 | int xen_create_contiguous_region(unsigned long vstart, unsigned int order, | |
2173 | unsigned int address_bits) | |
2174 | { | |
2175 | unsigned long *in_frames = discontig_frames, out_frame; | |
2176 | unsigned long flags; | |
2177 | int success; | |
2178 | ||
2179 | /* | |
2180 | * Currently an auto-translated guest will not perform I/O, nor will | |
2181 | * it require PAE page directories below 4GB. Therefore any calls to | |
2182 | * this function are redundant and can be ignored. | |
2183 | */ | |
2184 | ||
2185 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
2186 | return 0; | |
2187 | ||
2188 | if (unlikely(order > MAX_CONTIG_ORDER)) | |
2189 | return -ENOMEM; | |
2190 | ||
2191 | memset((void *) vstart, 0, PAGE_SIZE << order); | |
2192 | ||
08bbc9da AN |
2193 | spin_lock_irqsave(&xen_reservation_lock, flags); |
2194 | ||
2195 | /* 1. Zap current PTEs, remembering MFNs. */ | |
2196 | xen_zap_pfn_range(vstart, order, in_frames, NULL); | |
2197 | ||
2198 | /* 2. Get a new contiguous memory extent. */ | |
2199 | out_frame = virt_to_pfn(vstart); | |
2200 | success = xen_exchange_memory(1UL << order, 0, in_frames, | |
2201 | 1, order, &out_frame, | |
2202 | address_bits); | |
2203 | ||
2204 | /* 3. Map the new extent in place of old pages. */ | |
2205 | if (success) | |
2206 | xen_remap_exchanged_ptes(vstart, order, NULL, out_frame); | |
2207 | else | |
2208 | xen_remap_exchanged_ptes(vstart, order, in_frames, 0); | |
2209 | ||
2210 | spin_unlock_irqrestore(&xen_reservation_lock, flags); | |
2211 | ||
2212 | return success ? 0 : -ENOMEM; | |
2213 | } | |
2214 | EXPORT_SYMBOL_GPL(xen_create_contiguous_region); | |
2215 | ||
2216 | void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order) | |
2217 | { | |
2218 | unsigned long *out_frames = discontig_frames, in_frame; | |
2219 | unsigned long flags; | |
2220 | int success; | |
2221 | ||
2222 | if (xen_feature(XENFEAT_auto_translated_physmap)) | |
2223 | return; | |
2224 | ||
2225 | if (unlikely(order > MAX_CONTIG_ORDER)) | |
2226 | return; | |
2227 | ||
2228 | memset((void *) vstart, 0, PAGE_SIZE << order); | |
2229 | ||
08bbc9da AN |
2230 | spin_lock_irqsave(&xen_reservation_lock, flags); |
2231 | ||
2232 | /* 1. Find start MFN of contiguous extent. */ | |
2233 | in_frame = virt_to_mfn(vstart); | |
2234 | ||
2235 | /* 2. Zap current PTEs. */ | |
2236 | xen_zap_pfn_range(vstart, order, NULL, out_frames); | |
2237 | ||
2238 | /* 3. Do the exchange for non-contiguous MFNs. */ | |
2239 | success = xen_exchange_memory(1, order, &in_frame, 1UL << order, | |
2240 | 0, out_frames, 0); | |
2241 | ||
2242 | /* 4. Map new pages in place of old pages. */ | |
2243 | if (success) | |
2244 | xen_remap_exchanged_ptes(vstart, order, out_frames, 0); | |
2245 | else | |
2246 | xen_remap_exchanged_ptes(vstart, order, NULL, in_frame); | |
2247 | ||
2248 | spin_unlock_irqrestore(&xen_reservation_lock, flags); | |
030cb6c0 | 2249 | } |
08bbc9da | 2250 | EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region); |
319f3ba5 | 2251 | |
ca65f9fc | 2252 | #ifdef CONFIG_XEN_PVHVM |
59151001 SS |
2253 | static void xen_hvm_exit_mmap(struct mm_struct *mm) |
2254 | { | |
2255 | struct xen_hvm_pagetable_dying a; | |
2256 | int rc; | |
2257 | ||
2258 | a.domid = DOMID_SELF; | |
2259 | a.gpa = __pa(mm->pgd); | |
2260 | rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a); | |
2261 | WARN_ON_ONCE(rc < 0); | |
2262 | } | |
2263 | ||
2264 | static int is_pagetable_dying_supported(void) | |
2265 | { | |
2266 | struct xen_hvm_pagetable_dying a; | |
2267 | int rc = 0; | |
2268 | ||
2269 | a.domid = DOMID_SELF; | |
2270 | a.gpa = 0x00; | |
2271 | rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a); | |
2272 | if (rc < 0) { | |
2273 | printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n"); | |
2274 | return 0; | |
2275 | } | |
2276 | return 1; | |
2277 | } | |
2278 | ||
2279 | void __init xen_hvm_init_mmu_ops(void) | |
2280 | { | |
2281 | if (is_pagetable_dying_supported()) | |
2282 | pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap; | |
2283 | } | |
ca65f9fc | 2284 | #endif |
59151001 | 2285 | |
de1ef206 IC |
2286 | #define REMAP_BATCH_SIZE 16 |
2287 | ||
2288 | struct remap_data { | |
2289 | unsigned long mfn; | |
2290 | pgprot_t prot; | |
2291 | struct mmu_update *mmu_update; | |
2292 | }; | |
2293 | ||
2294 | static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token, | |
2295 | unsigned long addr, void *data) | |
2296 | { | |
2297 | struct remap_data *rmd = data; | |
2298 | pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot)); | |
2299 | ||
2300 | rmd->mmu_update->ptr = arbitrary_virt_to_machine(ptep).maddr; | |
2301 | rmd->mmu_update->val = pte_val_ma(pte); | |
2302 | rmd->mmu_update++; | |
2303 | ||
2304 | return 0; | |
2305 | } | |
2306 | ||
2307 | int xen_remap_domain_mfn_range(struct vm_area_struct *vma, | |
2308 | unsigned long addr, | |
2309 | unsigned long mfn, int nr, | |
2310 | pgprot_t prot, unsigned domid) | |
2311 | { | |
2312 | struct remap_data rmd; | |
2313 | struct mmu_update mmu_update[REMAP_BATCH_SIZE]; | |
2314 | int batch; | |
2315 | unsigned long range; | |
2316 | int err = 0; | |
2317 | ||
2318 | prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP); | |
2319 | ||
e060e7af SS |
2320 | BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) == |
2321 | (VM_PFNMAP | VM_RESERVED | VM_IO))); | |
de1ef206 IC |
2322 | |
2323 | rmd.mfn = mfn; | |
2324 | rmd.prot = prot; | |
2325 | ||
2326 | while (nr) { | |
2327 | batch = min(REMAP_BATCH_SIZE, nr); | |
2328 | range = (unsigned long)batch << PAGE_SHIFT; | |
2329 | ||
2330 | rmd.mmu_update = mmu_update; | |
2331 | err = apply_to_page_range(vma->vm_mm, addr, range, | |
2332 | remap_area_mfn_pte_fn, &rmd); | |
2333 | if (err) | |
2334 | goto out; | |
2335 | ||
2336 | err = -EFAULT; | |
2337 | if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0) | |
2338 | goto out; | |
2339 | ||
2340 | nr -= batch; | |
2341 | addr += range; | |
2342 | } | |
2343 | ||
2344 | err = 0; | |
2345 | out: | |
2346 | ||
2347 | flush_tlb_all(); | |
2348 | ||
2349 | return err; | |
2350 | } | |
2351 | EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range); | |
2352 | ||
994025ca JF |
2353 | #ifdef CONFIG_XEN_DEBUG_FS |
2354 | ||
2355 | static struct dentry *d_mmu_debug; | |
2356 | ||
2357 | static int __init xen_mmu_debugfs(void) | |
2358 | { | |
2359 | struct dentry *d_xen = xen_init_debugfs(); | |
2360 | ||
2361 | if (d_xen == NULL) | |
2362 | return -ENOMEM; | |
2363 | ||
2364 | d_mmu_debug = debugfs_create_dir("mmu", d_xen); | |
2365 | ||
2366 | debugfs_create_u8("zero_stats", 0644, d_mmu_debug, &zero_stats); | |
2367 | ||
2368 | debugfs_create_u32("pgd_update", 0444, d_mmu_debug, &mmu_stats.pgd_update); | |
2369 | debugfs_create_u32("pgd_update_pinned", 0444, d_mmu_debug, | |
2370 | &mmu_stats.pgd_update_pinned); | |
2371 | debugfs_create_u32("pgd_update_batched", 0444, d_mmu_debug, | |
2372 | &mmu_stats.pgd_update_pinned); | |
2373 | ||
2374 | debugfs_create_u32("pud_update", 0444, d_mmu_debug, &mmu_stats.pud_update); | |
2375 | debugfs_create_u32("pud_update_pinned", 0444, d_mmu_debug, | |
2376 | &mmu_stats.pud_update_pinned); | |
2377 | debugfs_create_u32("pud_update_batched", 0444, d_mmu_debug, | |
2378 | &mmu_stats.pud_update_pinned); | |
2379 | ||
2380 | debugfs_create_u32("pmd_update", 0444, d_mmu_debug, &mmu_stats.pmd_update); | |
2381 | debugfs_create_u32("pmd_update_pinned", 0444, d_mmu_debug, | |
2382 | &mmu_stats.pmd_update_pinned); | |
2383 | debugfs_create_u32("pmd_update_batched", 0444, d_mmu_debug, | |
2384 | &mmu_stats.pmd_update_pinned); | |
2385 | ||
2386 | debugfs_create_u32("pte_update", 0444, d_mmu_debug, &mmu_stats.pte_update); | |
2387 | // debugfs_create_u32("pte_update_pinned", 0444, d_mmu_debug, | |
2388 | // &mmu_stats.pte_update_pinned); | |
2389 | debugfs_create_u32("pte_update_batched", 0444, d_mmu_debug, | |
2390 | &mmu_stats.pte_update_pinned); | |
2391 | ||
2392 | debugfs_create_u32("mmu_update", 0444, d_mmu_debug, &mmu_stats.mmu_update); | |
2393 | debugfs_create_u32("mmu_update_extended", 0444, d_mmu_debug, | |
2394 | &mmu_stats.mmu_update_extended); | |
2395 | xen_debugfs_create_u32_array("mmu_update_histo", 0444, d_mmu_debug, | |
2396 | mmu_stats.mmu_update_histo, 20); | |
2397 | ||
2398 | debugfs_create_u32("set_pte_at", 0444, d_mmu_debug, &mmu_stats.set_pte_at); | |
2399 | debugfs_create_u32("set_pte_at_batched", 0444, d_mmu_debug, | |
2400 | &mmu_stats.set_pte_at_batched); | |
2401 | debugfs_create_u32("set_pte_at_current", 0444, d_mmu_debug, | |
2402 | &mmu_stats.set_pte_at_current); | |
2403 | debugfs_create_u32("set_pte_at_kernel", 0444, d_mmu_debug, | |
2404 | &mmu_stats.set_pte_at_kernel); | |
2405 | ||
2406 | debugfs_create_u32("prot_commit", 0444, d_mmu_debug, &mmu_stats.prot_commit); | |
2407 | debugfs_create_u32("prot_commit_batched", 0444, d_mmu_debug, | |
2408 | &mmu_stats.prot_commit_batched); | |
2409 | ||
2410 | return 0; | |
2411 | } | |
2412 | fs_initcall(xen_mmu_debugfs); | |
2413 | ||
2414 | #endif /* CONFIG_XEN_DEBUG_FS */ |