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312df5f1 AK |
1 | /* Ported over from i386 by AK, original copyright was: |
2 | * | |
3 | * (C) Dominik Brodowski <linux@brodo.de> 2003 | |
4 | * | |
5 | * Driver to use the Power Management Timer (PMTMR) available in some | |
6 | * southbridges as primary timing source for the Linux kernel. | |
7 | * | |
8 | * Based on parts of linux/drivers/acpi/hardware/hwtimer.c, timer_pit.c, | |
9 | * timer_hpet.c, and on Arjan van de Ven's implementation for 2.4. | |
10 | * | |
11 | * This file is licensed under the GPL v2. | |
12 | * | |
13 | * Dropped all the hardware bug workarounds for now. Hopefully they | |
14 | * are not needed on 64bit chipsets. | |
15 | */ | |
16 | ||
17 | #include <linux/jiffies.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/time.h> | |
20 | #include <linux/init.h> | |
21 | #include <linux/cpumask.h> | |
22 | #include <asm/io.h> | |
23 | #include <asm/proto.h> | |
24 | #include <asm/msr.h> | |
25 | #include <asm/vsyscall.h> | |
26 | ||
27 | /* The I/O port the PMTMR resides at. | |
28 | * The location is detected during setup_arch(), | |
29 | * in arch/i386/kernel/acpi/boot.c */ | |
30 | u32 pmtmr_ioport; | |
31 | ||
32 | /* value of the Power timer at last timer interrupt */ | |
33 | static u32 offset_delay; | |
34 | static u32 last_pmtmr_tick; | |
35 | ||
36 | #define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */ | |
37 | ||
38 | static inline u32 cyc2us(u32 cycles) | |
39 | { | |
40 | /* The Power Management Timer ticks at 3.579545 ticks per microsecond. | |
41 | * 1 / PM_TIMER_FREQUENCY == 0.27936511 =~ 286/1024 [error: 0.024%] | |
42 | * | |
43 | * Even with HZ = 100, delta is at maximum 35796 ticks, so it can | |
44 | * easily be multiplied with 286 (=0x11E) without having to fear | |
45 | * u32 overflows. | |
46 | */ | |
47 | cycles *= 286; | |
48 | return (cycles >> 10); | |
49 | } | |
50 | ||
51 | int pmtimer_mark_offset(void) | |
52 | { | |
53 | static int first_run = 1; | |
54 | unsigned long tsc; | |
55 | u32 lost; | |
56 | ||
57 | u32 tick = inl(pmtmr_ioport); | |
58 | u32 delta; | |
59 | ||
60 | delta = cyc2us((tick - last_pmtmr_tick) & ACPI_PM_MASK); | |
61 | ||
62 | last_pmtmr_tick = tick; | |
63 | monotonic_base += delta * NSEC_PER_USEC; | |
64 | ||
65 | delta += offset_delay; | |
66 | ||
67 | lost = delta / (USEC_PER_SEC / HZ); | |
68 | offset_delay = delta % (USEC_PER_SEC / HZ); | |
69 | ||
70 | rdtscll(tsc); | |
71 | vxtime.last_tsc = tsc - offset_delay * cpu_khz; | |
72 | ||
73 | /* don't calculate delay for first run, | |
74 | or if we've got less then a tick */ | |
75 | if (first_run || (lost < 1)) { | |
76 | first_run = 0; | |
77 | offset_delay = 0; | |
78 | } | |
79 | ||
80 | return lost - 1; | |
81 | } | |
82 | ||
0c3749c4 AK |
83 | static unsigned pmtimer_wait_tick(void) |
84 | { | |
85 | u32 a, b; | |
86 | for (a = b = inl(pmtmr_ioport) & ACPI_PM_MASK; | |
87 | a == b; | |
88 | b = inl(pmtmr_ioport) & ACPI_PM_MASK) | |
c36cd16f | 89 | cpu_relax(); |
0c3749c4 AK |
90 | return b; |
91 | } | |
92 | ||
93 | /* note: wait time is rounded up to one tick */ | |
94 | void pmtimer_wait(unsigned us) | |
95 | { | |
96 | u32 a, b; | |
97 | a = pmtimer_wait_tick(); | |
98 | do { | |
99 | b = inl(pmtmr_ioport); | |
c36cd16f | 100 | cpu_relax(); |
0c3749c4 AK |
101 | } while (cyc2us(b - a) < us); |
102 | } | |
103 | ||
0dd2ea9a SL |
104 | void pmtimer_resume(void) |
105 | { | |
106 | last_pmtmr_tick = inl(pmtmr_ioport); | |
107 | } | |
108 | ||
312df5f1 AK |
109 | unsigned int do_gettimeoffset_pm(void) |
110 | { | |
111 | u32 now, offset, delta = 0; | |
112 | ||
113 | offset = last_pmtmr_tick; | |
114 | now = inl(pmtmr_ioport); | |
115 | delta = (now - offset) & ACPI_PM_MASK; | |
116 | ||
117 | return offset_delay + cyc2us(delta); | |
118 | } | |
119 | ||
120 | ||
121 | static int __init nopmtimer_setup(char *s) | |
122 | { | |
123 | pmtmr_ioport = 0; | |
124 | return 0; | |
125 | } | |
126 | ||
127 | __setup("nopmtimer", nopmtimer_setup); |