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[PATCH] i386/x86-64/ia64: Move polling flag into thread_info_status
[deliverable/linux.git] / arch / x86_64 / kernel / setup.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/arch/x86-64/kernel/setup.c
3 *
4 * Copyright (C) 1995 Linus Torvalds
5 *
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
1da177e4
LT		 8 */
9
10/*
11 * This file handles the architecture-dependent parts of initialization
12 */
13
14#include <linux/errno.h>
15#include <linux/sched.h>
16#include <linux/kernel.h>
17#include <linux/mm.h>
18#include <linux/stddef.h>
19#include <linux/unistd.h>
20#include <linux/ptrace.h>
21#include <linux/slab.h>
22#include <linux/user.h>
23#include <linux/a.out.h>
24#include <linux/tty.h>
25#include <linux/ioport.h>
26#include <linux/delay.h>
27#include <linux/config.h>
28#include <linux/init.h>
29#include <linux/initrd.h>
30#include <linux/highmem.h>
31#include <linux/bootmem.h>
32#include <linux/module.h>
33#include <asm/processor.h>
34#include <linux/console.h>
35#include <linux/seq_file.h>
aac04b32 36#include <linux/crash_dump.h>
1da177e4
LT		 37#include <linux/root_dev.h>
38#include <linux/pci.h>
39#include <linux/acpi.h>
40#include <linux/kallsyms.h>
41#include <linux/edd.h>
bbfceef4 42#include <linux/mmzone.h>
5f5609df 43#include <linux/kexec.h>
95235ca2 44#include <linux/cpufreq.h>
e9928674 45#include <linux/dmi.h>
17a941d8 46#include <linux/dma-mapping.h>
681558fd 47#include <linux/ctype.h>
bbfceef4 48
1da177e4
LT		 49#include <asm/mtrr.h>
50#include <asm/uaccess.h>
51#include <asm/system.h>
52#include <asm/io.h>
53#include <asm/smp.h>
54#include <asm/msr.h>
55#include <asm/desc.h>
56#include <video/edid.h>
57#include <asm/e820.h>
58#include <asm/dma.h>
59#include <asm/mpspec.h>
60#include <asm/mmu_context.h>
61#include <asm/bootsetup.h>
62#include <asm/proto.h>
63#include <asm/setup.h>
64#include <asm/mach_apic.h>
65#include <asm/numa.h>
2bc0414e 66#include <asm/sections.h>
f2d3efed 67#include <asm/dmi.h>
1da177e4
LT		 68
69/*
70 * Machine setup..
71 */
72
6c231b7b 73struct cpuinfo_x86 boot_cpu_data __read_mostly;
1da177e4
LT		 74
75unsigned long mmu_cr4_features;
76
77int acpi_disabled;
78EXPORT_SYMBOL(acpi_disabled);
888ba6c6 79#ifdef CONFIG_ACPI
1da177e4
LT		 80extern int __initdata acpi_ht;
81extern acpi_interrupt_flags acpi_sci_flags;
82int __initdata acpi_force = 0;
83#endif
84
85int acpi_numa __initdata;
86
1da177e4
LT		 87/* Boot loader ID as an integer, for the benefit of proc_dointvec */
88int bootloader_type;
89
90unsigned long saved_video_mode;
91
f2d3efed
AK		 92/*
93 * Early DMI memory
94 */
95int dmi_alloc_index;
96char dmi_alloc_data[DMI_MAX_DATA];
97
1da177e4
LT		 98/*
99 * Setup options
100 */
1da177e4
LT		 101struct screen_info screen_info;
102struct sys_desc_table_struct {
103 unsigned short length;
104 unsigned char table[0];
105};
106
107struct edid_info edid_info;
108struct e820map e820;
109
110extern int root_mountflags;
1da177e4
LT		 111
112char command_line[COMMAND_LINE_SIZE];
113
114struct resource standard_io_resources[] = {
115 { .name = "dma1", .start = 0x00, .end = 0x1f,
116 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
117 { .name = "pic1", .start = 0x20, .end = 0x21,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "timer0", .start = 0x40, .end = 0x43,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "timer1", .start = 0x50, .end = 0x53,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "keyboard", .start = 0x60, .end = 0x6f,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "pic2", .start = 0xa0, .end = 0xa1,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
129 { .name = "dma2", .start = 0xc0, .end = 0xdf,
130 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
131 { .name = "fpu", .start = 0xf0, .end = 0xff,
132 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
133};
134
135#define STANDARD_IO_RESOURCES \
136 (sizeof standard_io_resources / sizeof standard_io_resources[0])
137
138#define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
139
140struct resource data_resource = {
141 .name = "Kernel data",
142 .start = 0,
143 .end = 0,
144 .flags = IORESOURCE_RAM,
145};
146struct resource code_resource = {
147 .name = "Kernel code",
148 .start = 0,
149 .end = 0,
150 .flags = IORESOURCE_RAM,
151};
152
153#define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
154
155static struct resource system_rom_resource = {
156 .name = "System ROM",
157 .start = 0xf0000,
158 .end = 0xfffff,
159 .flags = IORESOURCE_ROM,
160};
161
162static struct resource extension_rom_resource = {
163 .name = "Extension ROM",
164 .start = 0xe0000,
165 .end = 0xeffff,
166 .flags = IORESOURCE_ROM,
167};
168
169static struct resource adapter_rom_resources[] = {
170 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
171 .flags = IORESOURCE_ROM },
172 { .name = "Adapter ROM", .start = 0, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM },
178 { .name = "Adapter ROM", .start = 0, .end = 0,
179 .flags = IORESOURCE_ROM },
180 { .name = "Adapter ROM", .start = 0, .end = 0,
181 .flags = IORESOURCE_ROM }
182};
183
184#define ADAPTER_ROM_RESOURCES \
185 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
186
187static struct resource video_rom_resource = {
188 .name = "Video ROM",
189 .start = 0xc0000,
190 .end = 0xc7fff,
191 .flags = IORESOURCE_ROM,
192};
193
194static struct resource video_ram_resource = {
195 .name = "Video RAM area",
196 .start = 0xa0000,
197 .end = 0xbffff,
198 .flags = IORESOURCE_RAM,
199};
200
201#define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
202
203static int __init romchecksum(unsigned char *rom, unsigned long length)
204{
205 unsigned char *p, sum = 0;
206
207 for (p = rom; p < rom + length; p++)
208 sum += *p;
209 return sum == 0;
210}
211
212static void __init probe_roms(void)
213{
214 unsigned long start, length, upper;
215 unsigned char *rom;
216 int i;
217
218 /* video rom */
219 upper = adapter_rom_resources[0].start;
220 for (start = video_rom_resource.start; start < upper; start += 2048) {
221 rom = isa_bus_to_virt(start);
222 if (!romsignature(rom))
223 continue;
224
225 video_rom_resource.start = start;
226
227 /* 0 < length <= 0x7f * 512, historically */
228 length = rom[2] * 512;
229
230 /* if checksum okay, trust length byte */
231 if (length && romchecksum(rom, length))
232 video_rom_resource.end = start + length - 1;
233
234 request_resource(&iomem_resource, &video_rom_resource);
235 break;
236 }
237
238 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
239 if (start < upper)
240 start = upper;
241
242 /* system rom */
243 request_resource(&iomem_resource, &system_rom_resource);
244 upper = system_rom_resource.start;
245
246 /* check for extension rom (ignore length byte!) */
247 rom = isa_bus_to_virt(extension_rom_resource.start);
248 if (romsignature(rom)) {
249 length = extension_rom_resource.end - extension_rom_resource.start + 1;
250 if (romchecksum(rom, length)) {
251 request_resource(&iomem_resource, &extension_rom_resource);
252 upper = extension_rom_resource.start;
253 }
254 }
255
256 /* check for adapter roms on 2k boundaries */
257 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
258 rom = isa_bus_to_virt(start);
259 if (!romsignature(rom))
260 continue;
261
262 /* 0 < length <= 0x7f * 512, historically */
263 length = rom[2] * 512;
264
265 /* but accept any length that fits if checksum okay */
266 if (!length || start + length > upper || !romchecksum(rom, length))
267 continue;
268
269 adapter_rom_resources[i].start = start;
270 adapter_rom_resources[i].end = start + length - 1;
271 request_resource(&iomem_resource, &adapter_rom_resources[i]);
272
273 start = adapter_rom_resources[i++].end & ~2047UL;
274 }
275}
276
681558fd
AK		 277/* Check for full argument with no trailing characters */
278static int fullarg(char *p, char *arg)
279{
280 int l = strlen(arg);
281 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
282}
283
1da177e4
LT		 284static __init void parse_cmdline_early (char ** cmdline_p)
285{
286 char c = ' ', *to = command_line, *from = COMMAND_LINE;
287 int len = 0;
69cda7b1 288 int userdef = 0;
1da177e4 289
1da177e4
LT		 290 for (;;) {
291 if (c != ' ')
292 goto next_char;
293
294#ifdef CONFIG_SMP
295 /*
296 * If the BIOS enumerates physical processors before logical,
297 * maxcpus=N at enumeration-time can be used to disable HT.
298 */
299 else if (!memcmp(from, "maxcpus=", 8)) {
300 extern unsigned int maxcpus;
301
302 maxcpus = simple_strtoul(from + 8, NULL, 0);
303 }
304#endif
888ba6c6 305#ifdef CONFIG_ACPI
1da177e4 306 /* "acpi=off" disables both ACPI table parsing and interpreter init */
681558fd 307 if (fullarg(from,"acpi=off"))
1da177e4
LT		 308 disable_acpi();
309
681558fd 310 if (fullarg(from, "acpi=force")) {
1da177e4
LT		 311 /* add later when we do DMI horrors: */
312 acpi_force = 1;
313 acpi_disabled = 0;
314 }
315
316 /* acpi=ht just means: do ACPI MADT parsing
317 at bootup, but don't enable the full ACPI interpreter */
681558fd 318 if (fullarg(from, "acpi=ht")) {
1da177e4
LT		 319 if (!acpi_force)
320 disable_acpi();
321 acpi_ht = 1;
322 }
681558fd 323 else if (fullarg(from, "pci=noacpi"))
1da177e4 324 acpi_disable_pci();
681558fd 325 else if (fullarg(from, "acpi=noirq"))
1da177e4
LT		 326 acpi_noirq_set();
327
681558fd 328 else if (fullarg(from, "acpi_sci=edge"))
1da177e4 329 acpi_sci_flags.trigger = 1;
681558fd 330 else if (fullarg(from, "acpi_sci=level"))
1da177e4 331 acpi_sci_flags.trigger = 3;
681558fd 332 else if (fullarg(from, "acpi_sci=high"))
1da177e4 333 acpi_sci_flags.polarity = 1;
681558fd 334 else if (fullarg(from, "acpi_sci=low"))
1da177e4
LT		 335 acpi_sci_flags.polarity = 3;
336
337 /* acpi=strict disables out-of-spec workarounds */
681558fd 338 else if (fullarg(from, "acpi=strict")) {
1da177e4
LT		 339 acpi_strict = 1;
340 }
22999244 341#ifdef CONFIG_X86_IO_APIC
681558fd 342 else if (fullarg(from, "acpi_skip_timer_override"))
22999244
AK		 343 acpi_skip_timer_override = 1;
344#endif
1da177e4
LT		 345#endif
346
681558fd 347 if (fullarg(from, "disable_timer_pin_1"))
66759a01 348 disable_timer_pin_1 = 1;
681558fd 349 if (fullarg(from, "enable_timer_pin_1"))
66759a01
CE		 350 disable_timer_pin_1 = -1;
351
d1530d82
AK		 352 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
353 clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
1da177e4 354 disable_apic = 1;
d1530d82 355 }
1da177e4 356
681558fd 357 if (fullarg(from, "noapic"))
1da177e4
LT		 358 skip_ioapic_setup = 1;
359
681558fd 360 if (fullarg(from,"apic")) {
1da177e4
LT		 361 skip_ioapic_setup = 0;
362 ioapic_force = 1;
363 }
364
365 if (!memcmp(from, "mem=", 4))
366 parse_memopt(from+4, &from);
367
69cda7b1 368 if (!memcmp(from, "memmap=", 7)) {
369 /* exactmap option is for used defined memory */
370 if (!memcmp(from+7, "exactmap", 8)) {
371#ifdef CONFIG_CRASH_DUMP
372 /* If we are doing a crash dump, we
373 * still need to know the real mem
374 * size before original memory map is
375 * reset.
376 */
377 saved_max_pfn = e820_end_of_ram();
378#endif
379 from += 8+7;
380 end_pfn_map = 0;
381 e820.nr_map = 0;
382 userdef = 1;
383 }
384 else {
385 parse_memmapopt(from+7, &from);
386 userdef = 1;
387 }
388 }
389
2b97690f 390#ifdef CONFIG_NUMA
1da177e4
LT		 391 if (!memcmp(from, "numa=", 5))
392 numa_setup(from+5);
393#endif
394
1da177e4
LT		 395 if (!memcmp(from,"iommu=",6)) {
396 iommu_setup(from+6);
397 }
1da177e4 398
681558fd 399 if (fullarg(from,"oops=panic"))
1da177e4
LT		 400 panic_on_oops = 1;
401
402 if (!memcmp(from, "noexec=", 7))
403 nonx_setup(from + 7);
404
5f5609df
EB		 405#ifdef CONFIG_KEXEC
406 /* crashkernel=size@addr specifies the location to reserve for
407 * a crash kernel. By reserving this memory we guarantee
408 * that linux never set's it up as a DMA target.
409 * Useful for holding code to do something appropriate
410 * after a kernel panic.
411 */
412 else if (!memcmp(from, "crashkernel=", 12)) {
413 unsigned long size, base;
414 size = memparse(from+12, &from);
415 if (*from == '@') {
416 base = memparse(from+1, &from);
417 /* FIXME: Do I want a sanity check
418 * to validate the memory range?
419 */
420 crashk_res.start = base;
421 crashk_res.end = base + size - 1;
422 }
423 }
424#endif
425
aac04b32
VG		 426#ifdef CONFIG_PROC_VMCORE
427 /* elfcorehdr= specifies the location of elf core header
428 * stored by the crashed kernel. This option will be passed
429 * by kexec loader to the capture kernel.
430 */
431 else if(!memcmp(from, "elfcorehdr=", 11))
432 elfcorehdr_addr = memparse(from+11, &from);
433#endif
e2c03888 434
d5176123 435#ifdef CONFIG_HOTPLUG_CPU
e2c03888
AK		 436 else if (!memcmp(from, "additional_cpus=", 16))
437 setup_additional_cpus(from+16);
438#endif
439
1da177e4
LT		 440 next_char:
441 c = *(from++);
442 if (!c)
443 break;
444 if (COMMAND_LINE_SIZE <= ++len)
445 break;
446 *(to++) = c;
447 }
69cda7b1 448 if (userdef) {
449 printk(KERN_INFO "user-defined physical RAM map:\n");
450 e820_print_map("user");
451 }
1da177e4
LT		 452 *to = '\0';
453 *cmdline_p = command_line;
454}
455
2b97690f 456#ifndef CONFIG_NUMA
bbfceef4
MT		 457static void __init
458contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
1da177e4 459{
bbfceef4
MT		 460 unsigned long bootmap_size, bootmap;
461
bbfceef4
MT		 462 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
463 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
464 if (bootmap == -1L)
465 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
466 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
467 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
468 reserve_bootmem(bootmap, bootmap_size);
1da177e4
LT		 469}
470#endif
471
1da177e4
LT		 472#if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
473struct edd edd;
474#ifdef CONFIG_EDD_MODULE
475EXPORT_SYMBOL(edd);
476#endif
477/**
478 * copy_edd() - Copy the BIOS EDD information
479 * from boot_params into a safe place.
480 *
481 */
482static inline void copy_edd(void)
483{
484 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
485 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
486 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
487 edd.edd_info_nr = EDD_NR;
488}
489#else
490static inline void copy_edd(void)
491{
492}
493#endif
494
495#define EBDA_ADDR_POINTER 0x40E
ac71d12c
AK		 496
497unsigned __initdata ebda_addr;
498unsigned __initdata ebda_size;
499
500static void discover_ebda(void)
1da177e4 501{
ac71d12c 502 /*
1da177e4
LT		 503 * there is a real-mode segmented pointer pointing to the
504 * 4K EBDA area at 0x40E
505 */
ac71d12c
AK		 506 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
507 ebda_addr <<= 4;
508
509 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
510
511 /* Round EBDA up to pages */
512 if (ebda_size == 0)
513 ebda_size = 1;
514 ebda_size <<= 10;
515 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
516 if (ebda_size > 64*1024)
517 ebda_size = 64*1024;
1da177e4
LT		 518}
519
520void __init setup_arch(char **cmdline_p)
521{
1da177e4
LT		 522 unsigned long kernel_end;
523
524 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
1da177e4
LT		 525 screen_info = SCREEN_INFO;
526 edid_info = EDID_INFO;
527 saved_video_mode = SAVED_VIDEO_MODE;
528 bootloader_type = LOADER_TYPE;
529
530#ifdef CONFIG_BLK_DEV_RAM
531 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
532 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
533 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
534#endif
535 setup_memory_region();
536 copy_edd();
537
538 if (!MOUNT_ROOT_RDONLY)
539 root_mountflags &= ~MS_RDONLY;
540 init_mm.start_code = (unsigned long) &_text;
541 init_mm.end_code = (unsigned long) &_etext;
542 init_mm.end_data = (unsigned long) &_edata;
543 init_mm.brk = (unsigned long) &_end;
544
545 code_resource.start = virt_to_phys(&_text);
546 code_resource.end = virt_to_phys(&_etext)-1;
547 data_resource.start = virt_to_phys(&_etext);
548 data_resource.end = virt_to_phys(&_edata)-1;
549
550 parse_cmdline_early(cmdline_p);
551
552 early_identify_cpu(&boot_cpu_data);
553
554 /*
555 * partially used pages are not usable - thus
556 * we are rounding upwards:
557 */
558 end_pfn = e820_end_of_ram();
1f50249e 559 num_physpages = end_pfn; /* for pfn_valid */
1da177e4
LT		 560
561 check_efer();
562
ac71d12c
AK		 563 discover_ebda();
564
1da177e4
LT		 565 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
566
f2d3efed
AK		 567 dmi_scan_machine();
568
f6c2e333
SS		 569 zap_low_mappings(0);
570
888ba6c6 571#ifdef CONFIG_ACPI
1da177e4
LT		 572 /*
573 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
574 * Call this early for SRAT node setup.
575 */
576 acpi_boot_table_init();
577#endif
578
579#ifdef CONFIG_ACPI_NUMA
580 /*
581 * Parse SRAT to discover nodes.
582 */
583 acpi_numa_init();
584#endif
585
2b97690f 586#ifdef CONFIG_NUMA
1da177e4
LT		 587 numa_initmem_init(0, end_pfn);
588#else
bbfceef4 589 contig_initmem_init(0, end_pfn);
1da177e4
LT		 590#endif
591
592 /* Reserve direct mapping */
593 reserve_bootmem_generic(table_start << PAGE_SHIFT,
594 (table_end - table_start) << PAGE_SHIFT);
595
596 /* reserve kernel */
597 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
598 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
599
600 /*
601 * reserve physical page 0 - it's a special BIOS page on many boxes,
602 * enabling clean reboots, SMP operation, laptop functions.
603 */
604 reserve_bootmem_generic(0, PAGE_SIZE);
605
606 /* reserve ebda region */
ac71d12c
AK		 607 if (ebda_addr)
608 reserve_bootmem_generic(ebda_addr, ebda_size);
1da177e4
LT		 609
610#ifdef CONFIG_SMP
611 /*
612 * But first pinch a few for the stack/trampoline stuff
613 * FIXME: Don't need the extra page at 4K, but need to fix
614 * trampoline before removing it. (see the GDT stuff)
615 */
616 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
617
618 /* Reserve SMP trampoline */
619 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
620#endif
621
622#ifdef CONFIG_ACPI_SLEEP
623 /*
624 * Reserve low memory region for sleep support.
625 */
626 acpi_reserve_bootmem();
627#endif
628#ifdef CONFIG_X86_LOCAL_APIC
629 /*
630 * Find and reserve possible boot-time SMP configuration:
631 */
632 find_smp_config();
633#endif
634#ifdef CONFIG_BLK_DEV_INITRD
635 if (LOADER_TYPE && INITRD_START) {
636 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
637 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
638 initrd_start =
639 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
640 initrd_end = initrd_start+INITRD_SIZE;
641 }
642 else {
643 printk(KERN_ERR "initrd extends beyond end of memory "
644 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
645 (unsigned long)(INITRD_START + INITRD_SIZE),
646 (unsigned long)(end_pfn << PAGE_SHIFT));
647 initrd_start = 0;
648 }
649 }
650#endif
5f5609df
EB		 651#ifdef CONFIG_KEXEC
652 if (crashk_res.start != crashk_res.end) {
00212fef 653 reserve_bootmem_generic(crashk_res.start,
5f5609df
EB		 654 crashk_res.end - crashk_res.start + 1);
655 }
656#endif
0d317fb7 657
1da177e4
LT		 658 paging_init();
659
660 check_ioapic();
661
51f62e18
AR		 662 /*
663 * set this early, so we dont allocate cpu0
664 * if MADT list doesnt list BSP first
665 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
666 */
667 cpu_set(0, cpu_present_map);
888ba6c6 668#ifdef CONFIG_ACPI
1da177e4
LT		 669 /*
670 * Read APIC and some other early information from ACPI tables.
671 */
672 acpi_boot_init();
673#endif
674
05b3cbd8
RT		 675 init_cpu_to_node();
676
1da177e4
LT		 677#ifdef CONFIG_X86_LOCAL_APIC
678 /*
679 * get boot-time SMP configuration:
680 */
681 if (smp_found_config)
682 get_smp_config();
683 init_apic_mappings();
684#endif
685
686 /*
687 * Request address space for all standard RAM and ROM resources
688 * and also for regions reported as reserved by the e820.
689 */
690 probe_roms();
691 e820_reserve_resources();
692
693 request_resource(&iomem_resource, &video_ram_resource);
694
695 {
696 unsigned i;
697 /* request I/O space for devices used on all i[345]86 PCs */
698 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
699 request_resource(&ioport_resource, &standard_io_resources[i]);
700 }
701
a1e97782 702 e820_setup_gap();
1da177e4 703
1da177e4
LT		 704#ifdef CONFIG_VT
705#if defined(CONFIG_VGA_CONSOLE)
706 conswitchp = &vga_con;
707#elif defined(CONFIG_DUMMY_CONSOLE)
708 conswitchp = &dummy_con;
709#endif
710#endif
711}
712
e6982c67 713static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
1da177e4
LT		 714{
715 unsigned int *v;
716
ebfcaa96 717 if (c->extended_cpuid_level < 0x80000004)
1da177e4
LT		 718 return 0;
719
720 v = (unsigned int *) c->x86_model_id;
721 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
722 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
723 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
724 c->x86_model_id[48] = 0;
725 return 1;
726}
727
728
e6982c67 729static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
1da177e4
LT		 730{
731 unsigned int n, dummy, eax, ebx, ecx, edx;
732
ebfcaa96 733 n = c->extended_cpuid_level;
1da177e4
LT		 734
735 if (n >= 0x80000005) {
736 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
737 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
738 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
739 c->x86_cache_size=(ecx>>24)+(edx>>24);
740 /* On K8 L1 TLB is inclusive, so don't count it */
741 c->x86_tlbsize = 0;
742 }
743
744 if (n >= 0x80000006) {
745 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
746 ecx = cpuid_ecx(0x80000006);
747 c->x86_cache_size = ecx >> 16;
748 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
749
750 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
751 c->x86_cache_size, ecx & 0xFF);
752 }
753
754 if (n >= 0x80000007)
755 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
756 if (n >= 0x80000008) {
757 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
758 c->x86_virt_bits = (eax >> 8) & 0xff;
759 c->x86_phys_bits = eax & 0xff;
760 }
761}
762
3f098c26
AK		 763#ifdef CONFIG_NUMA
764static int nearby_node(int apicid)
765{
766 int i;
767 for (i = apicid - 1; i >= 0; i--) {
768 int node = apicid_to_node[i];
769 if (node != NUMA_NO_NODE && node_online(node))
770 return node;
771 }
772 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
773 int node = apicid_to_node[i];
774 if (node != NUMA_NO_NODE && node_online(node))
775 return node;
776 }
777 return first_node(node_online_map); /* Shouldn't happen */
778}
779#endif
780
63518644
AK		 781/*
782 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
783 * Assumes number of cores is a power of two.
784 */
785static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
786{
787#ifdef CONFIG_SMP
b41e2939 788 unsigned bits;
3f098c26 789#ifdef CONFIG_NUMA
f3fa8ebc 790 int cpu = smp_processor_id();
3f098c26 791 int node = 0;
60c1bc82 792 unsigned apicid = hard_smp_processor_id();
3f098c26 793#endif
faee9a5d 794 unsigned ecx = cpuid_ecx(0x80000008);
b41e2939 795
faee9a5d
AK		 796 c->x86_max_cores = (ecx & 0xff) + 1;
797
798 /* CPU telling us the core id bits shift? */
799 bits = (ecx >> 12) & 0xF;
800
801 /* Otherwise recompute */
802 if (bits == 0) {
803 while ((1 << bits) < c->x86_max_cores)
804 bits++;
805 }
b41e2939
AK		 806
807 /* Low order bits define the core id (index of core in socket) */
f3fa8ebc 808 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
b41e2939 809 /* Convert the APIC ID into the socket ID */
f3fa8ebc 810 c->phys_proc_id = phys_pkg_id(bits);
63518644
AK		 811
812#ifdef CONFIG_NUMA
f3fa8ebc 813 node = c->phys_proc_id;
3f098c26
AK		 814 if (apicid_to_node[apicid] != NUMA_NO_NODE)
815 node = apicid_to_node[apicid];
816 if (!node_online(node)) {
817 /* Two possibilities here:
818 - The CPU is missing memory and no node was created.
819 In that case try picking one from a nearby CPU
820 - The APIC IDs differ from the HyperTransport node IDs
821 which the K8 northbridge parsing fills in.
822 Assume they are all increased by a constant offset,
823 but in the same order as the HT nodeids.
824 If that doesn't result in a usable node fall back to the
825 path for the previous case. */
f3fa8ebc 826 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
3f098c26
AK		 827 if (ht_nodeid >= 0 &&
828 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
829 node = apicid_to_node[ht_nodeid];
830 /* Pick a nearby node */
831 if (!node_online(node))
832 node = nearby_node(apicid);
833 }
69d81fcd 834 numa_set_node(cpu, node);
3f098c26 835
77d910f5 836 printk(KERN_INFO "CPU %d/%x(%d) -> Node %d -> Core %d\n",
f3fa8ebc 837 cpu, apicid, c->x86_max_cores, node, c->cpu_core_id);
63518644 838#endif
63518644
AK		 839#endif
840}
1da177e4
LT		 841
842static int __init init_amd(struct cpuinfo_x86 *c)
843{
844 int r;
7bcd3f34 845 unsigned level;
1da177e4 846
bc5e8fdf
LT		 847#ifdef CONFIG_SMP
848 unsigned long value;
849
7d318d77
AK		 850 /*
851 * Disable TLB flush filter by setting HWCR.FFDIS on K8
852 * bit 6 of msr C001_0015
853 *
854 * Errata 63 for SH-B3 steppings
855 * Errata 122 for all steppings (F+ have it disabled by default)
856 */
857 if (c->x86 == 15) {
858 rdmsrl(MSR_K8_HWCR, value);
859 value |= 1 << 6;
860 wrmsrl(MSR_K8_HWCR, value);
861 }
bc5e8fdf
LT		 862#endif
863
1da177e4
LT		 864 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
865 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
866 clear_bit(0*32+31, &c->x86_capability);
867
7bcd3f34
AK		 868 /* On C+ stepping K8 rep microcode works well for copy/memset */
869 level = cpuid_eax(1);
870 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
871 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
872
18bd057b
AK		 873 /* Enable workaround for FXSAVE leak */
874 if (c->x86 >= 6)
875 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
876
1da177e4
LT		 877 r = get_model_name(c);
878 if (!r) {
879 switch (c->x86) {
880 case 15:
881 /* Should distinguish Models here, but this is only
882 a fallback anyways. */
883 strcpy(c->x86_model_id, "Hammer");
884 break;
885 }
886 }
887 display_cacheinfo(c);
888
130951cc
AK		 889 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
890 if (c->x86_power & (1<<8))
891 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
892
faee9a5d
AK		 893 /* Multi core CPU? */
894 if (c->extended_cpuid_level >= 0x80000008)
63518644 895 amd_detect_cmp(c);
1da177e4 896
240cd6a8
AK		 897 /* Fix cpuid4 emulation for more */
898 num_cache_leaves = 3;
899
1da177e4
LT		 900 return r;
901}
902
e6982c67 903static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
1da177e4
LT		 904{
905#ifdef CONFIG_SMP
906 u32 eax, ebx, ecx, edx;
94605eff 907 int index_msb, core_bits;
94605eff
SS		 908
909 cpuid(1, &eax, &ebx, &ecx, &edx);
910
94605eff 911
63518644 912 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
1da177e4
LT		 913 return;
914
1da177e4 915 smp_num_siblings = (ebx & 0xff0000) >> 16;
94605eff 916
1da177e4
LT		 917 if (smp_num_siblings == 1) {
918 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
94605eff
SS		 919 } else if (smp_num_siblings > 1 ) {
920
1da177e4
LT		 921 if (smp_num_siblings > NR_CPUS) {
922 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
923 smp_num_siblings = 1;
924 return;
925 }
94605eff
SS		 926
927 index_msb = get_count_order(smp_num_siblings);
f3fa8ebc 928 c->phys_proc_id = phys_pkg_id(index_msb);
94605eff 929
1da177e4 930 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
f3fa8ebc 931 c->phys_proc_id);
3dd9d514 932
94605eff 933 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
3dd9d514 934
94605eff
SS		 935 index_msb = get_count_order(smp_num_siblings) ;
936
937 core_bits = get_count_order(c->x86_max_cores);
3dd9d514 938
f3fa8ebc 939 c->cpu_core_id = phys_pkg_id(index_msb) &
94605eff 940 ((1 << core_bits) - 1);
3dd9d514 941
94605eff 942 if (c->x86_max_cores > 1)
3dd9d514 943 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
f3fa8ebc 944 c->cpu_core_id);
1da177e4
LT		 945 }
946#endif
947}
948
3dd9d514
AK		 949/*
950 * find out the number of processor cores on the die
951 */
e6982c67 952static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
3dd9d514 953{
2bbc419f 954 unsigned int eax, t;
3dd9d514
AK		 955
956 if (c->cpuid_level < 4)
957 return 1;
958
2bbc419f 959 cpuid_count(4, 0, &eax, &t, &t, &t);
3dd9d514
AK		 960
961 if (eax & 0x1f)
962 return ((eax >> 26) + 1);
963 else
964 return 1;
965}
966
df0cc26b
AK		 967static void srat_detect_node(void)
968{
969#ifdef CONFIG_NUMA
ddea7be0 970 unsigned node;
df0cc26b
AK		 971 int cpu = smp_processor_id();
972
973 /* Don't do the funky fallback heuristics the AMD version employs
974 for now. */
ddea7be0 975 node = apicid_to_node[hard_smp_processor_id()];
df0cc26b 976 if (node == NUMA_NO_NODE)
0d015324 977 node = first_node(node_online_map);
69d81fcd 978 numa_set_node(cpu, node);
df0cc26b
AK		 979
980 if (acpi_numa > 0)
981 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
982#endif
983}
984
e6982c67 985static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1da177e4
LT		 986{
987 /* Cache sizes */
988 unsigned n;
989
990 init_intel_cacheinfo(c);
ebfcaa96 991 n = c->extended_cpuid_level;
1da177e4
LT		 992 if (n >= 0x80000008) {
993 unsigned eax = cpuid_eax(0x80000008);
994 c->x86_virt_bits = (eax >> 8) & 0xff;
995 c->x86_phys_bits = eax & 0xff;
af9c142d
SL		 996 /* CPUID workaround for Intel 0F34 CPU */
997 if (c->x86_vendor == X86_VENDOR_INTEL &&
998 c->x86 == 0xF && c->x86_model == 0x3 &&
999 c->x86_mask == 0x4)
1000 c->x86_phys_bits = 36;
1da177e4
LT		 1001 }
1002
1003 if (c->x86 == 15)
1004 c->x86_cache_alignment = c->x86_clflush_size * 2;
39b3a791
AK		 1005 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1006 (c->x86 == 0x6 && c->x86_model >= 0x0e))
c29601e9 1007 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
c818a181 1008 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
94605eff 1009 c->x86_max_cores = intel_num_cpu_cores(c);
df0cc26b
AK		 1010
1011 srat_detect_node();
1da177e4
LT		 1012}
1013
672289e9 1014static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1da177e4
LT		 1015{
1016 char *v = c->x86_vendor_id;
1017
1018 if (!strcmp(v, "AuthenticAMD"))
1019 c->x86_vendor = X86_VENDOR_AMD;
1020 else if (!strcmp(v, "GenuineIntel"))
1021 c->x86_vendor = X86_VENDOR_INTEL;
1022 else
1023 c->x86_vendor = X86_VENDOR_UNKNOWN;
1024}
1025
1026struct cpu_model_info {
1027 int vendor;
1028 int family;
1029 char *model_names[16];
1030};
1031
1032/* Do some early cpuid on the boot CPU to get some parameter that are
1033 needed before check_bugs. Everything advanced is in identify_cpu
1034 below. */
e6982c67 1035void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1036{
1037 u32 tfms;
1038
1039 c->loops_per_jiffy = loops_per_jiffy;
1040 c->x86_cache_size = -1;
1041 c->x86_vendor = X86_VENDOR_UNKNOWN;
1042 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1043 c->x86_vendor_id[0] = '\0'; /* Unset */
1044 c->x86_model_id[0] = '\0'; /* Unset */
1045 c->x86_clflush_size = 64;
1046 c->x86_cache_alignment = c->x86_clflush_size;
94605eff 1047 c->x86_max_cores = 1;
ebfcaa96 1048 c->extended_cpuid_level = 0;
1da177e4
LT		 1049 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1050
1051 /* Get vendor name */
1052 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1053 (unsigned int *)&c->x86_vendor_id[0],
1054 (unsigned int *)&c->x86_vendor_id[8],
1055 (unsigned int *)&c->x86_vendor_id[4]);
1056
1057 get_cpu_vendor(c);
1058
1059 /* Initialize the standard set of capabilities */
1060 /* Note that the vendor-specific code below might override */
1061
1062 /* Intel-defined flags: level 0x00000001 */
1063 if (c->cpuid_level >= 0x00000001) {
1064 __u32 misc;
1065 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1066 &c->x86_capability[0]);
1067 c->x86 = (tfms >> 8) & 0xf;
1068 c->x86_model = (tfms >> 4) & 0xf;
1069 c->x86_mask = tfms & 0xf;
f5f786d0 1070 if (c->x86 == 0xf)
1da177e4 1071 c->x86 += (tfms >> 20) & 0xff;
f5f786d0 1072 if (c->x86 >= 0x6)
1da177e4 1073 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1da177e4
LT		 1074 if (c->x86_capability[0] & (1<<19))
1075 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1da177e4
LT		 1076 } else {
1077 /* Have CPUID level 0 only - unheard of */
1078 c->x86 = 4;
1079 }
a158608b
AK		 1080
1081#ifdef CONFIG_SMP
f3fa8ebc 1082 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
a158608b 1083#endif
1da177e4
LT		 1084}
1085
1086/*
1087 * This does the hard work of actually picking apart the CPU stuff...
1088 */
e6982c67 1089void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1da177e4
LT		 1090{
1091 int i;
1092 u32 xlvl;
1093
1094 early_identify_cpu(c);
1095
1096 /* AMD-defined flags: level 0x80000001 */
1097 xlvl = cpuid_eax(0x80000000);
ebfcaa96 1098 c->extended_cpuid_level = xlvl;
1da177e4
LT		 1099 if ((xlvl & 0xffff0000) == 0x80000000) {
1100 if (xlvl >= 0x80000001) {
1101 c->x86_capability[1] = cpuid_edx(0x80000001);
5b7abc6f 1102 c->x86_capability[6] = cpuid_ecx(0x80000001);
1da177e4
LT		 1103 }
1104 if (xlvl >= 0x80000004)
1105 get_model_name(c); /* Default name */
1106 }
1107
1108 /* Transmeta-defined flags: level 0x80860001 */
1109 xlvl = cpuid_eax(0x80860000);
1110 if ((xlvl & 0xffff0000) == 0x80860000) {
1111 /* Don't set x86_cpuid_level here for now to not confuse. */
1112 if (xlvl >= 0x80860001)
1113 c->x86_capability[2] = cpuid_edx(0x80860001);
1114 }
1115
1e9f28fa
SS		 1116 c->apicid = phys_pkg_id(0);
1117
1da177e4
LT		 1118 /*
1119 * Vendor-specific initialization. In this section we
1120 * canonicalize the feature flags, meaning if there are
1121 * features a certain CPU supports which CPUID doesn't
1122 * tell us, CPUID claiming incorrect flags, or other bugs,
1123 * we handle them here.
1124 *
1125 * At the end of this section, c->x86_capability better
1126 * indicate the features this CPU genuinely supports!
1127 */
1128 switch (c->x86_vendor) {
1129 case X86_VENDOR_AMD:
1130 init_amd(c);
1131 break;
1132
1133 case X86_VENDOR_INTEL:
1134 init_intel(c);
1135 break;
1136
1137 case X86_VENDOR_UNKNOWN:
1138 default:
1139 display_cacheinfo(c);
1140 break;
1141 }
1142
1143 select_idle_routine(c);
1144 detect_ht(c);
1da177e4
LT		 1145
1146 /*
1147 * On SMP, boot_cpu_data holds the common feature set between
1148 * all CPUs; so make sure that we indicate which features are
1149 * common between the CPUs. The first time this routine gets
1150 * executed, c == &boot_cpu_data.
1151 */
1152 if (c != &boot_cpu_data) {
1153 /* AND the already accumulated flags with these */
1154 for (i = 0 ; i < NCAPINTS ; i++)
1155 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1156 }
1157
1158#ifdef CONFIG_X86_MCE
1159 mcheck_init(c);
1160#endif
3b520b23
SL		 1161 if (c == &boot_cpu_data)
1162 mtrr_bp_init();
1163 else
1164 mtrr_ap_init();
1da177e4 1165#ifdef CONFIG_NUMA
3019e8eb 1166 numa_add_cpu(smp_processor_id());
1da177e4
LT		 1167#endif
1168}
1169
1170
e6982c67 1171void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1da177e4
LT		 1172{
1173 if (c->x86_model_id[0])
1174 printk("%s", c->x86_model_id);
1175
1176 if (c->x86_mask || c->cpuid_level >= 0)
1177 printk(" stepping %02x\n", c->x86_mask);
1178 else
1179 printk("\n");
1180}
1181
1182/*
1183 * Get CPU information for use by the procfs.
1184 */
1185
1186static int show_cpuinfo(struct seq_file *m, void *v)
1187{
1188 struct cpuinfo_x86 *c = v;
1189
1190 /*
1191 * These flag bits must match the definitions in <asm/cpufeature.h>.
1192 * NULL means this bit is undefined or reserved; either way it doesn't
1193 * have meaning as far as Linux is concerned. Note that it's important
1194 * to realize there is a difference between this table and CPUID -- if
1195 * applications want to get the raw CPUID data, they should access
1196 * /dev/cpu/<cpu_nr>/cpuid instead.
1197 */
1198 static char *x86_cap_flags[] = {
1199 /* Intel-defined */
1200 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1201 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1202 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1203 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1204
1205 /* AMD-defined */
3c3b73b6 1206 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1207 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1208 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
7b0e8501 1209 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1da177e4
LT		 1210
1211 /* Transmeta-defined */
1212 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1213 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1214 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1215 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1216
1217 /* Other (Linux-defined) */
622dcaf9 1218 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
c29601e9 1219 "constant_tsc", NULL, NULL,
d167a518 1220 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1221 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1223
1224 /* Intel-defined (#2) */
9d95dd84 1225 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1da177e4
LT		 1226 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1227 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1228 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1229
5b7abc6f
PA		 1230 /* VIA/Cyrix/Centaur-defined */
1231 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1232 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1233 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1234 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1235
1da177e4 1236 /* AMD-defined (#2) */
3f98bc49 1237 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1da177e4
LT		 1238 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1239 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
5b7abc6f 1240 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1da177e4
LT		 1241 };
1242 static char *x86_power_flags[] = {
1243 "ts", /* temperature sensor */
1244 "fid", /* frequency id control */
1245 "vid", /* voltage id control */
1246 "ttp", /* thermal trip */
1247 "tm",
3f98bc49
AK		 1248 "stc",
1249 NULL,
39b3a791 1250 /* nothing */ /* constant_tsc - moved to flags */
1da177e4
LT		 1251 };
1252
1253
1254#ifdef CONFIG_SMP
1255 if (!cpu_online(c-cpu_data))
1256 return 0;
1257#endif
1258
1259 seq_printf(m,"processor\t: %u\n"
1260 "vendor_id\t: %s\n"
1261 "cpu family\t: %d\n"
1262 "model\t\t: %d\n"
1263 "model name\t: %s\n",
1264 (unsigned)(c-cpu_data),
1265 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1266 c->x86,
1267 (int)c->x86_model,
1268 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1269
1270 if (c->x86_mask || c->cpuid_level >= 0)
1271 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1272 else
1273 seq_printf(m, "stepping\t: unknown\n");
1274
1275 if (cpu_has(c,X86_FEATURE_TSC)) {
95235ca2
VP		 1276 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1277 if (!freq)
1278 freq = cpu_khz;
1da177e4 1279 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
95235ca2 1280 freq / 1000, (freq % 1000));
1da177e4
LT		 1281 }
1282
1283 /* Cache size */
1284 if (c->x86_cache_size >= 0)
1285 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1286
1287#ifdef CONFIG_SMP
94605eff 1288 if (smp_num_siblings * c->x86_max_cores > 1) {
db468681 1289 int cpu = c - cpu_data;
f3fa8ebc 1290 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
94605eff 1291 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
f3fa8ebc 1292 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
94605eff 1293 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
db468681 1294 }
1da177e4
LT		 1295#endif
1296
1297 seq_printf(m,
1298 "fpu\t\t: yes\n"
1299 "fpu_exception\t: yes\n"
1300 "cpuid level\t: %d\n"
1301 "wp\t\t: yes\n"
1302 "flags\t\t:",
1303 c->cpuid_level);
1304
1305 {
1306 int i;
1307 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
3d1712c9 1308 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1da177e4
LT		 1309 seq_printf(m, " %s", x86_cap_flags[i]);
1310 }
1311
1312 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1313 c->loops_per_jiffy/(500000/HZ),
1314 (c->loops_per_jiffy/(5000/HZ)) % 100);
1315
1316 if (c->x86_tlbsize > 0)
1317 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1318 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1319 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1320
1321 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1322 c->x86_phys_bits, c->x86_virt_bits);
1323
1324 seq_printf(m, "power management:");
1325 {
1326 unsigned i;
1327 for (i = 0; i < 32; i++)
1328 if (c->x86_power & (1 << i)) {
3f98bc49
AK		 1329 if (i < ARRAY_SIZE(x86_power_flags) &&
1330 x86_power_flags[i])
1331 seq_printf(m, "%s%s",
1332 x86_power_flags[i][0]?" ":"",
1333 x86_power_flags[i]);
1da177e4
LT		 1334 else
1335 seq_printf(m, " [%d]", i);
1336 }
1337 }
1da177e4 1338
d31ddaa1 1339 seq_printf(m, "\n\n");
1da177e4
LT		 1340
1341 return 0;
1342}
1343
1344static void *c_start(struct seq_file *m, loff_t *pos)
1345{
1346 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1347}
1348
1349static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1350{
1351 ++*pos;
1352 return c_start(m, pos);
1353}
1354
1355static void c_stop(struct seq_file *m, void *v)
1356{
1357}
1358
1359struct seq_operations cpuinfo_op = {
1360 .start =c_start,
1361 .next = c_next,
1362 .stop = c_stop,
1363 .show = show_cpuinfo,
1364};
e9928674 1365
160bd18e
MP		 1366#ifdef CONFIG_INPUT_PCSPKR
1367#include <linux/platform_device.h>
1368static __init int add_pcspkr(void)
1369{
1370 struct platform_device *pd;
1371 int ret;
1372
1373 pd = platform_device_alloc("pcspkr", -1);
1374 if (!pd)
1375 return -ENOMEM;
1376
1377 ret = platform_device_add(pd);
1378 if (ret)
1379 platform_device_put(pd);
1380
1381 return ret;
1382}
1383device_initcall(add_pcspkr);
1384#endif
Linux kernel - Deliverables
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