Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/x86-64/kernel/time.c | |
3 | * | |
4 | * "High Precision Event Timer" based timekeeping. | |
5 | * | |
6 | * Copyright (c) 1991,1992,1995 Linus Torvalds | |
7 | * Copyright (c) 1994 Alan Modra | |
8 | * Copyright (c) 1995 Markus Kuhn | |
9 | * Copyright (c) 1996 Ingo Molnar | |
10 | * Copyright (c) 1998 Andrea Arcangeli | |
11 | * Copyright (c) 2002 Vojtech Pavlik | |
12 | * Copyright (c) 2003 Andi Kleen | |
13 | * RTC support code taken from arch/i386/kernel/timers/time_hpet.c | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/mc146818rtc.h> | |
1da177e4 LT |
21 | #include <linux/time.h> |
22 | #include <linux/ioport.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/sysdev.h> | |
26 | #include <linux/bcd.h> | |
27 | #include <linux/kallsyms.h> | |
312df5f1 | 28 | #include <linux/acpi.h> |
8d916406 | 29 | #ifdef CONFIG_ACPI |
312df5f1 | 30 | #include <acpi/achware.h> /* for PM timer frequency */ |
8d916406 | 31 | #endif |
1da177e4 LT |
32 | #include <asm/8253pit.h> |
33 | #include <asm/pgtable.h> | |
34 | #include <asm/vsyscall.h> | |
35 | #include <asm/timex.h> | |
36 | #include <asm/proto.h> | |
37 | #include <asm/hpet.h> | |
38 | #include <asm/sections.h> | |
39 | #include <linux/cpufreq.h> | |
40 | #include <linux/hpet.h> | |
41 | #ifdef CONFIG_X86_LOCAL_APIC | |
42 | #include <asm/apic.h> | |
43 | #endif | |
44 | ||
1da177e4 LT |
45 | #ifdef CONFIG_CPU_FREQ |
46 | static void cpufreq_delayed_get(void); | |
47 | #endif | |
48 | extern void i8254_timer_resume(void); | |
49 | extern int using_apic_timer; | |
50 | ||
e8b91777 AK |
51 | static char *time_init_gtod(void); |
52 | ||
1da177e4 LT |
53 | DEFINE_SPINLOCK(rtc_lock); |
54 | DEFINE_SPINLOCK(i8253_lock); | |
55 | ||
73dea47f | 56 | int nohpet __initdata = 0; |
1da177e4 LT |
57 | static int notsc __initdata = 0; |
58 | ||
42211338 VP |
59 | #define USEC_PER_TICK (USEC_PER_SEC / HZ) |
60 | #define NSEC_PER_TICK (NSEC_PER_SEC / HZ) | |
61 | #define FSEC_PER_TICK (FSEC_PER_SEC / HZ) | |
62 | ||
63 | #define NS_SCALE 10 /* 2^10, carefully chosen */ | |
64 | #define US_SCALE 32 /* 2^32, arbitralrily chosen */ | |
65 | ||
1da177e4 LT |
66 | unsigned int cpu_khz; /* TSC clocks / usec, not used here */ |
67 | static unsigned long hpet_period; /* fsecs / HPET clock */ | |
68 | unsigned long hpet_tick; /* HPET clocks / interrupt */ | |
33042a9f | 69 | int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */ |
1da177e4 LT |
70 | unsigned long vxtime_hz = PIT_TICK_RATE; |
71 | int report_lost_ticks; /* command line option */ | |
72 | unsigned long long monotonic_base; | |
73 | ||
74 | struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */ | |
75 | ||
76 | volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES; | |
77 | unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES; | |
78 | struct timespec __xtime __section_xtime; | |
79 | struct timezone __sys_tz __section_sys_tz; | |
80 | ||
1da177e4 LT |
81 | /* |
82 | * do_gettimeoffset() returns microseconds since last timer interrupt was | |
83 | * triggered by hardware. A memory read of HPET is slower than a register read | |
84 | * of TSC, but much more reliable. It's also synchronized to the timer | |
85 | * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a | |
86 | * timer interrupt has happened already, but vxtime.trigger wasn't updated yet. | |
87 | * This is not a problem, because jiffies hasn't updated either. They are bound | |
88 | * together by xtime_lock. | |
89 | */ | |
90 | ||
91 | static inline unsigned int do_gettimeoffset_tsc(void) | |
92 | { | |
93 | unsigned long t; | |
94 | unsigned long x; | |
c818a181 | 95 | t = get_cycles_sync(); |
7351c0bf AK |
96 | if (t < vxtime.last_tsc) |
97 | t = vxtime.last_tsc; /* hack */ | |
42211338 | 98 | x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> US_SCALE; |
1da177e4 LT |
99 | return x; |
100 | } | |
101 | ||
102 | static inline unsigned int do_gettimeoffset_hpet(void) | |
103 | { | |
a3a00751 | 104 | /* cap counter read to one tick to avoid inconsistencies */ |
105 | unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last; | |
42211338 | 106 | return (min(counter,hpet_tick) * vxtime.quot) >> US_SCALE; |
1da177e4 LT |
107 | } |
108 | ||
109 | unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc; | |
110 | ||
111 | /* | |
112 | * This version of gettimeofday() has microsecond resolution and better than | |
113 | * microsecond precision, as we're using at least a 10 MHz (usually 14.31818 | |
114 | * MHz) HPET timer. | |
115 | */ | |
116 | ||
117 | void do_gettimeofday(struct timeval *tv) | |
118 | { | |
119 | unsigned long seq, t; | |
120 | unsigned int sec, usec; | |
121 | ||
122 | do { | |
123 | seq = read_seqbegin(&xtime_lock); | |
124 | ||
125 | sec = xtime.tv_sec; | |
42211338 | 126 | usec = xtime.tv_nsec / NSEC_PER_USEC; |
1da177e4 LT |
127 | |
128 | /* i386 does some correction here to keep the clock | |
129 | monotonous even when ntpd is fixing drift. | |
130 | But they didn't work for me, there is a non monotonic | |
131 | clock anyways with ntp. | |
132 | I dropped all corrections now until a real solution can | |
133 | be found. Note when you fix it here you need to do the same | |
134 | in arch/x86_64/kernel/vsyscall.c and export all needed | |
135 | variables in vmlinux.lds. -AK */ | |
136 | ||
42211338 | 137 | t = (jiffies - wall_jiffies) * USEC_PER_TICK + |
1da177e4 LT |
138 | do_gettimeoffset(); |
139 | usec += t; | |
140 | ||
141 | } while (read_seqretry(&xtime_lock, seq)); | |
142 | ||
42211338 VP |
143 | tv->tv_sec = sec + usec / USEC_PER_SEC; |
144 | tv->tv_usec = usec % USEC_PER_SEC; | |
1da177e4 LT |
145 | } |
146 | ||
147 | EXPORT_SYMBOL(do_gettimeofday); | |
148 | ||
149 | /* | |
150 | * settimeofday() first undoes the correction that gettimeofday would do | |
151 | * on the time, and then saves it. This is ugly, but has been like this for | |
152 | * ages already. | |
153 | */ | |
154 | ||
155 | int do_settimeofday(struct timespec *tv) | |
156 | { | |
157 | time_t wtm_sec, sec = tv->tv_sec; | |
158 | long wtm_nsec, nsec = tv->tv_nsec; | |
159 | ||
160 | if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC) | |
161 | return -EINVAL; | |
162 | ||
163 | write_seqlock_irq(&xtime_lock); | |
164 | ||
42211338 VP |
165 | nsec -= do_gettimeoffset() * NSEC_PER_USEC + |
166 | (jiffies - wall_jiffies) * NSEC_PER_TICK; | |
1da177e4 LT |
167 | |
168 | wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec); | |
169 | wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec); | |
170 | ||
171 | set_normalized_timespec(&xtime, sec, nsec); | |
172 | set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); | |
173 | ||
b149ee22 | 174 | ntp_clear(); |
1da177e4 LT |
175 | |
176 | write_sequnlock_irq(&xtime_lock); | |
177 | clock_was_set(); | |
178 | return 0; | |
179 | } | |
180 | ||
181 | EXPORT_SYMBOL(do_settimeofday); | |
182 | ||
183 | unsigned long profile_pc(struct pt_regs *regs) | |
184 | { | |
185 | unsigned long pc = instruction_pointer(regs); | |
186 | ||
7351c0bf AK |
187 | /* Assume the lock function has either no stack frame or only a single |
188 | word. This checks if the address on the stack looks like a kernel | |
189 | text address. | |
1da177e4 LT |
190 | There is a small window for false hits, but in that case the tick |
191 | is just accounted to the spinlock function. | |
192 | Better would be to write these functions in assembler again | |
193 | and check exactly. */ | |
194 | if (in_lock_functions(pc)) { | |
195 | char *v = *(char **)regs->rsp; | |
196 | if ((v >= _stext && v <= _etext) || | |
197 | (v >= _sinittext && v <= _einittext) || | |
198 | (v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END)) | |
199 | return (unsigned long)v; | |
200 | return ((unsigned long *)regs->rsp)[1]; | |
201 | } | |
202 | return pc; | |
203 | } | |
204 | EXPORT_SYMBOL(profile_pc); | |
205 | ||
206 | /* | |
207 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500 | |
208 | * ms after the second nowtime has started, because when nowtime is written | |
209 | * into the registers of the CMOS clock, it will jump to the next second | |
210 | * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data | |
211 | * sheet for details. | |
212 | */ | |
213 | ||
214 | static void set_rtc_mmss(unsigned long nowtime) | |
215 | { | |
216 | int real_seconds, real_minutes, cmos_minutes; | |
217 | unsigned char control, freq_select; | |
218 | ||
219 | /* | |
220 | * IRQs are disabled when we're called from the timer interrupt, | |
221 | * no need for spin_lock_irqsave() | |
222 | */ | |
223 | ||
224 | spin_lock(&rtc_lock); | |
225 | ||
226 | /* | |
227 | * Tell the clock it's being set and stop it. | |
228 | */ | |
229 | ||
230 | control = CMOS_READ(RTC_CONTROL); | |
231 | CMOS_WRITE(control | RTC_SET, RTC_CONTROL); | |
232 | ||
233 | freq_select = CMOS_READ(RTC_FREQ_SELECT); | |
234 | CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT); | |
235 | ||
236 | cmos_minutes = CMOS_READ(RTC_MINUTES); | |
237 | BCD_TO_BIN(cmos_minutes); | |
238 | ||
239 | /* | |
240 | * since we're only adjusting minutes and seconds, don't interfere with hour | |
241 | * overflow. This avoids messing with unknown time zones but requires your RTC | |
242 | * not to be off by more than 15 minutes. Since we're calling it only when | |
243 | * our clock is externally synchronized using NTP, this shouldn't be a problem. | |
244 | */ | |
245 | ||
246 | real_seconds = nowtime % 60; | |
247 | real_minutes = nowtime / 60; | |
248 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) | |
249 | real_minutes += 30; /* correct for half hour time zone */ | |
250 | real_minutes %= 60; | |
251 | ||
1da177e4 LT |
252 | if (abs(real_minutes - cmos_minutes) >= 30) { |
253 | printk(KERN_WARNING "time.c: can't update CMOS clock " | |
254 | "from %d to %d\n", cmos_minutes, real_minutes); | |
28456ede | 255 | } else { |
0b91317e AK |
256 | BIN_TO_BCD(real_seconds); |
257 | BIN_TO_BCD(real_minutes); | |
1da177e4 LT |
258 | CMOS_WRITE(real_seconds, RTC_SECONDS); |
259 | CMOS_WRITE(real_minutes, RTC_MINUTES); | |
260 | } | |
261 | ||
262 | /* | |
263 | * The following flags have to be released exactly in this order, otherwise the | |
264 | * DS12887 (popular MC146818A clone with integrated battery and quartz) will | |
265 | * not reset the oscillator and will not update precisely 500 ms later. You | |
266 | * won't find this mentioned in the Dallas Semiconductor data sheets, but who | |
267 | * believes data sheets anyway ... -- Markus Kuhn | |
268 | */ | |
269 | ||
270 | CMOS_WRITE(control, RTC_CONTROL); | |
271 | CMOS_WRITE(freq_select, RTC_FREQ_SELECT); | |
272 | ||
273 | spin_unlock(&rtc_lock); | |
274 | } | |
275 | ||
276 | ||
277 | /* monotonic_clock(): returns # of nanoseconds passed since time_init() | |
278 | * Note: This function is required to return accurate | |
279 | * time even in the absence of multiple timer ticks. | |
280 | */ | |
281 | unsigned long long monotonic_clock(void) | |
282 | { | |
283 | unsigned long seq; | |
284 | u32 last_offset, this_offset, offset; | |
285 | unsigned long long base; | |
286 | ||
287 | if (vxtime.mode == VXTIME_HPET) { | |
288 | do { | |
289 | seq = read_seqbegin(&xtime_lock); | |
290 | ||
291 | last_offset = vxtime.last; | |
292 | base = monotonic_base; | |
a3a00751 | 293 | this_offset = hpet_readl(HPET_COUNTER); |
1da177e4 LT |
294 | } while (read_seqretry(&xtime_lock, seq)); |
295 | offset = (this_offset - last_offset); | |
42211338 | 296 | offset *= NSEC_PER_TICK / hpet_tick; |
0b91317e | 297 | } else { |
1da177e4 LT |
298 | do { |
299 | seq = read_seqbegin(&xtime_lock); | |
300 | ||
301 | last_offset = vxtime.last_tsc; | |
302 | base = monotonic_base; | |
303 | } while (read_seqretry(&xtime_lock, seq)); | |
c818a181 | 304 | this_offset = get_cycles_sync(); |
42211338 VP |
305 | /* FIXME: 1000 or 1000000? */ |
306 | offset = (this_offset - last_offset)*1000 / cpu_khz; | |
1da177e4 | 307 | } |
7351c0bf | 308 | return base + offset; |
1da177e4 LT |
309 | } |
310 | EXPORT_SYMBOL(monotonic_clock); | |
311 | ||
312 | static noinline void handle_lost_ticks(int lost, struct pt_regs *regs) | |
313 | { | |
7351c0bf AK |
314 | static long lost_count; |
315 | static int warned; | |
316 | if (report_lost_ticks) { | |
317 | printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost); | |
318 | print_symbol("rip %s)\n", regs->rip); | |
319 | } | |
320 | ||
321 | if (lost_count == 1000 && !warned) { | |
322 | printk(KERN_WARNING "warning: many lost ticks.\n" | |
323 | KERN_WARNING "Your time source seems to be instable or " | |
1da177e4 | 324 | "some driver is hogging interupts\n"); |
7351c0bf AK |
325 | print_symbol("rip %s\n", regs->rip); |
326 | if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) { | |
327 | printk(KERN_WARNING "Falling back to HPET\n"); | |
328 | if (hpet_use_timer) | |
329 | vxtime.last = hpet_readl(HPET_T0_CMP) - | |
330 | hpet_tick; | |
331 | else | |
332 | vxtime.last = hpet_readl(HPET_COUNTER); | |
333 | vxtime.mode = VXTIME_HPET; | |
334 | do_gettimeoffset = do_gettimeoffset_hpet; | |
335 | } | |
336 | /* else should fall back to PIT, but code missing. */ | |
337 | warned = 1; | |
338 | } else | |
339 | lost_count++; | |
1da177e4 LT |
340 | |
341 | #ifdef CONFIG_CPU_FREQ | |
7351c0bf AK |
342 | /* In some cases the CPU can change frequency without us noticing |
343 | Give cpufreq a change to catch up. */ | |
344 | if ((lost_count+1) % 25 == 0) | |
345 | cpufreq_delayed_get(); | |
1da177e4 LT |
346 | #endif |
347 | } | |
348 | ||
73dea47f | 349 | void main_timer_handler(struct pt_regs *regs) |
1da177e4 LT |
350 | { |
351 | static unsigned long rtc_update = 0; | |
352 | unsigned long tsc; | |
9ede6b09 | 353 | int delay = 0, offset = 0, lost = 0; |
1da177e4 LT |
354 | |
355 | /* | |
356 | * Here we are in the timer irq handler. We have irqs locally disabled (so we | |
357 | * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running | |
358 | * on the other CPU, so we need a lock. We also need to lock the vsyscall | |
359 | * variables, because both do_timer() and us change them -arca+vojtech | |
360 | */ | |
361 | ||
362 | write_seqlock(&xtime_lock); | |
363 | ||
a3a00751 | 364 | if (vxtime.hpet_address) |
365 | offset = hpet_readl(HPET_COUNTER); | |
366 | ||
367 | if (hpet_use_timer) { | |
368 | /* if we're using the hpet timer functionality, | |
369 | * we can more accurately know the counter value | |
370 | * when the timer interrupt occured. | |
371 | */ | |
1da177e4 LT |
372 | offset = hpet_readl(HPET_T0_CMP) - hpet_tick; |
373 | delay = hpet_readl(HPET_COUNTER) - offset; | |
9ede6b09 | 374 | } else if (!pmtmr_ioport) { |
1da177e4 LT |
375 | spin_lock(&i8253_lock); |
376 | outb_p(0x00, 0x43); | |
377 | delay = inb_p(0x40); | |
378 | delay |= inb(0x40) << 8; | |
379 | spin_unlock(&i8253_lock); | |
380 | delay = LATCH - 1 - delay; | |
381 | } | |
382 | ||
c818a181 | 383 | tsc = get_cycles_sync(); |
1da177e4 LT |
384 | |
385 | if (vxtime.mode == VXTIME_HPET) { | |
386 | if (offset - vxtime.last > hpet_tick) { | |
387 | lost = (offset - vxtime.last) / hpet_tick - 1; | |
388 | } | |
389 | ||
390 | monotonic_base += | |
42211338 | 391 | (offset - vxtime.last) * NSEC_PER_TICK / hpet_tick; |
1da177e4 LT |
392 | |
393 | vxtime.last = offset; | |
312df5f1 AK |
394 | #ifdef CONFIG_X86_PM_TIMER |
395 | } else if (vxtime.mode == VXTIME_PMTMR) { | |
396 | lost = pmtimer_mark_offset(); | |
397 | #endif | |
1da177e4 LT |
398 | } else { |
399 | offset = (((tsc - vxtime.last_tsc) * | |
42211338 | 400 | vxtime.tsc_quot) >> US_SCALE) - USEC_PER_TICK; |
1da177e4 LT |
401 | |
402 | if (offset < 0) | |
403 | offset = 0; | |
404 | ||
42211338 VP |
405 | if (offset > USEC_PER_TICK) { |
406 | lost = offset / USEC_PER_TICK; | |
407 | offset %= USEC_PER_TICK; | |
1da177e4 LT |
408 | } |
409 | ||
42211338 VP |
410 | /* FIXME: 1000 or 1000000? */ |
411 | monotonic_base += (tsc - vxtime.last_tsc) * 1000000 / cpu_khz; | |
1da177e4 LT |
412 | |
413 | vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot; | |
414 | ||
415 | if ((((tsc - vxtime.last_tsc) * | |
42211338 | 416 | vxtime.tsc_quot) >> US_SCALE) < offset) |
1da177e4 | 417 | vxtime.last_tsc = tsc - |
42211338 | 418 | (((long) offset << US_SCALE) / vxtime.tsc_quot) - 1; |
1da177e4 LT |
419 | } |
420 | ||
421 | if (lost > 0) { | |
422 | handle_lost_ticks(lost, regs); | |
423 | jiffies += lost; | |
424 | } | |
425 | ||
426 | /* | |
427 | * Do the timer stuff. | |
428 | */ | |
429 | ||
430 | do_timer(regs); | |
431 | #ifndef CONFIG_SMP | |
432 | update_process_times(user_mode(regs)); | |
433 | #endif | |
434 | ||
435 | /* | |
436 | * In the SMP case we use the local APIC timer interrupt to do the profiling, | |
437 | * except when we simulate SMP mode on a uniprocessor system, in that case we | |
438 | * have to call the local interrupt handler. | |
439 | */ | |
440 | ||
441 | #ifndef CONFIG_X86_LOCAL_APIC | |
442 | profile_tick(CPU_PROFILING, regs); | |
443 | #else | |
444 | if (!using_apic_timer) | |
445 | smp_local_timer_interrupt(regs); | |
446 | #endif | |
447 | ||
448 | /* | |
449 | * If we have an externally synchronized Linux clock, then update CMOS clock | |
450 | * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy | |
451 | * closest to exactly 500 ms before the next second. If the update fails, we | |
452 | * don't care, as it'll be updated on the next turn, and the problem (time way | |
453 | * off) isn't likely to go away much sooner anyway. | |
454 | */ | |
455 | ||
b149ee22 | 456 | if (ntp_synced() && xtime.tv_sec > rtc_update && |
1da177e4 LT |
457 | abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) { |
458 | set_rtc_mmss(xtime.tv_sec); | |
459 | rtc_update = xtime.tv_sec + 660; | |
460 | } | |
461 | ||
462 | write_sequnlock(&xtime_lock); | |
73dea47f | 463 | } |
1da177e4 | 464 | |
73dea47f AK |
465 | static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
466 | { | |
467 | if (apic_runs_main_timer > 1) | |
468 | return IRQ_HANDLED; | |
469 | main_timer_handler(regs); | |
d25bf7e5 VP |
470 | #ifdef CONFIG_X86_LOCAL_APIC |
471 | if (using_apic_timer) | |
472 | smp_send_timer_broadcast_ipi(); | |
473 | #endif | |
1da177e4 LT |
474 | return IRQ_HANDLED; |
475 | } | |
476 | ||
68ed0040 | 477 | static unsigned int cyc2ns_scale __read_mostly; |
1da177e4 | 478 | |
dacb16b1 | 479 | static inline void set_cyc2ns_scale(unsigned long cpu_khz) |
1da177e4 | 480 | { |
42211338 | 481 | cyc2ns_scale = (NSEC_PER_MSEC << NS_SCALE) / cpu_khz; |
1da177e4 LT |
482 | } |
483 | ||
484 | static inline unsigned long long cycles_2_ns(unsigned long long cyc) | |
485 | { | |
42211338 | 486 | return (cyc * cyc2ns_scale) >> NS_SCALE; |
1da177e4 LT |
487 | } |
488 | ||
489 | unsigned long long sched_clock(void) | |
490 | { | |
491 | unsigned long a = 0; | |
492 | ||
493 | #if 0 | |
494 | /* Don't do a HPET read here. Using TSC always is much faster | |
495 | and HPET may not be mapped yet when the scheduler first runs. | |
496 | Disadvantage is a small drift between CPUs in some configurations, | |
497 | but that should be tolerable. */ | |
498 | if (__vxtime.mode == VXTIME_HPET) | |
42211338 | 499 | return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> US_SCALE; |
1da177e4 LT |
500 | #endif |
501 | ||
502 | /* Could do CPU core sync here. Opteron can execute rdtsc speculatively, | |
503 | which means it is not completely exact and may not be monotonous between | |
504 | CPUs. But the errors should be too small to matter for scheduling | |
505 | purposes. */ | |
506 | ||
507 | rdtscll(a); | |
508 | return cycles_2_ns(a); | |
509 | } | |
510 | ||
bdf2b1c9 | 511 | static unsigned long get_cmos_time(void) |
1da177e4 | 512 | { |
641f71f5 | 513 | unsigned int year, mon, day, hour, min, sec; |
1da177e4 | 514 | unsigned long flags; |
6954bee8 | 515 | unsigned extyear = 0; |
1da177e4 | 516 | |
1da177e4 LT |
517 | spin_lock_irqsave(&rtc_lock, flags); |
518 | ||
641f71f5 MM |
519 | do { |
520 | sec = CMOS_READ(RTC_SECONDS); | |
521 | min = CMOS_READ(RTC_MINUTES); | |
522 | hour = CMOS_READ(RTC_HOURS); | |
523 | day = CMOS_READ(RTC_DAY_OF_MONTH); | |
524 | mon = CMOS_READ(RTC_MONTH); | |
525 | year = CMOS_READ(RTC_YEAR); | |
6954bee8 | 526 | #ifdef CONFIG_ACPI |
641f71f5 MM |
527 | if (acpi_fadt.revision >= FADT2_REVISION_ID && |
528 | acpi_fadt.century) | |
529 | extyear = CMOS_READ(acpi_fadt.century); | |
6954bee8 | 530 | #endif |
641f71f5 | 531 | } while (sec != CMOS_READ(RTC_SECONDS)); |
6954bee8 | 532 | |
1da177e4 LT |
533 | spin_unlock_irqrestore(&rtc_lock, flags); |
534 | ||
0b91317e AK |
535 | /* |
536 | * We know that x86-64 always uses BCD format, no need to check the | |
537 | * config register. | |
7351c0bf | 538 | */ |
1da177e4 | 539 | |
0b91317e AK |
540 | BCD_TO_BIN(sec); |
541 | BCD_TO_BIN(min); | |
542 | BCD_TO_BIN(hour); | |
543 | BCD_TO_BIN(day); | |
544 | BCD_TO_BIN(mon); | |
545 | BCD_TO_BIN(year); | |
1da177e4 | 546 | |
6954bee8 AK |
547 | if (extyear) { |
548 | BCD_TO_BIN(extyear); | |
549 | year += extyear; | |
550 | printk(KERN_INFO "Extended CMOS year: %d\n", extyear); | |
551 | } else { | |
552 | /* | |
553 | * x86-64 systems only exists since 2002. | |
554 | * This will work up to Dec 31, 2100 | |
555 | */ | |
556 | year += 2000; | |
557 | } | |
1da177e4 LT |
558 | |
559 | return mktime(year, mon, day, hour, min, sec); | |
560 | } | |
561 | ||
562 | #ifdef CONFIG_CPU_FREQ | |
563 | ||
564 | /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency | |
565 | changes. | |
566 | ||
567 | RED-PEN: On SMP we assume all CPUs run with the same frequency. It's | |
568 | not that important because current Opteron setups do not support | |
569 | scaling on SMP anyroads. | |
570 | ||
571 | Should fix up last_tsc too. Currently gettimeofday in the | |
572 | first tick after the change will be slightly wrong. */ | |
573 | ||
574 | #include <linux/workqueue.h> | |
575 | ||
576 | static unsigned int cpufreq_delayed_issched = 0; | |
577 | static unsigned int cpufreq_init = 0; | |
578 | static struct work_struct cpufreq_delayed_get_work; | |
579 | ||
580 | static void handle_cpufreq_delayed_get(void *v) | |
581 | { | |
582 | unsigned int cpu; | |
583 | for_each_online_cpu(cpu) { | |
584 | cpufreq_get(cpu); | |
585 | } | |
586 | cpufreq_delayed_issched = 0; | |
587 | } | |
588 | ||
589 | /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries | |
590 | * to verify the CPU frequency the timing core thinks the CPU is running | |
591 | * at is still correct. | |
592 | */ | |
593 | static void cpufreq_delayed_get(void) | |
594 | { | |
595 | static int warned; | |
596 | if (cpufreq_init && !cpufreq_delayed_issched) { | |
597 | cpufreq_delayed_issched = 1; | |
598 | if (!warned) { | |
599 | warned = 1; | |
7351c0bf AK |
600 | printk(KERN_DEBUG |
601 | "Losing some ticks... checking if CPU frequency changed.\n"); | |
1da177e4 LT |
602 | } |
603 | schedule_work(&cpufreq_delayed_get_work); | |
604 | } | |
605 | } | |
606 | ||
607 | static unsigned int ref_freq = 0; | |
608 | static unsigned long loops_per_jiffy_ref = 0; | |
609 | ||
610 | static unsigned long cpu_khz_ref = 0; | |
611 | ||
612 | static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, | |
613 | void *data) | |
614 | { | |
615 | struct cpufreq_freqs *freq = data; | |
616 | unsigned long *lpj, dummy; | |
617 | ||
c29601e9 AK |
618 | if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC)) |
619 | return 0; | |
620 | ||
1da177e4 LT |
621 | lpj = &dummy; |
622 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) | |
623 | #ifdef CONFIG_SMP | |
7351c0bf | 624 | lpj = &cpu_data[freq->cpu].loops_per_jiffy; |
1da177e4 | 625 | #else |
7351c0bf | 626 | lpj = &boot_cpu_data.loops_per_jiffy; |
1da177e4 LT |
627 | #endif |
628 | ||
1da177e4 LT |
629 | if (!ref_freq) { |
630 | ref_freq = freq->old; | |
631 | loops_per_jiffy_ref = *lpj; | |
632 | cpu_khz_ref = cpu_khz; | |
633 | } | |
634 | if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || | |
635 | (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) || | |
636 | (val == CPUFREQ_RESUMECHANGE)) { | |
637 | *lpj = | |
638 | cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new); | |
639 | ||
640 | cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new); | |
641 | if (!(freq->flags & CPUFREQ_CONST_LOOPS)) | |
42211338 | 642 | vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz; |
1da177e4 LT |
643 | } |
644 | ||
dacb16b1 | 645 | set_cyc2ns_scale(cpu_khz_ref); |
1da177e4 LT |
646 | |
647 | return 0; | |
648 | } | |
649 | ||
650 | static struct notifier_block time_cpufreq_notifier_block = { | |
651 | .notifier_call = time_cpufreq_notifier | |
652 | }; | |
653 | ||
654 | static int __init cpufreq_tsc(void) | |
655 | { | |
656 | INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL); | |
657 | if (!cpufreq_register_notifier(&time_cpufreq_notifier_block, | |
658 | CPUFREQ_TRANSITION_NOTIFIER)) | |
659 | cpufreq_init = 1; | |
660 | return 0; | |
661 | } | |
662 | ||
663 | core_initcall(cpufreq_tsc); | |
664 | ||
665 | #endif | |
666 | ||
667 | /* | |
668 | * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing | |
669 | * it to the HPET timer of known frequency. | |
670 | */ | |
671 | ||
672 | #define TICK_COUNT 100000000 | |
673 | ||
674 | static unsigned int __init hpet_calibrate_tsc(void) | |
675 | { | |
676 | int tsc_start, hpet_start; | |
677 | int tsc_now, hpet_now; | |
678 | unsigned long flags; | |
679 | ||
680 | local_irq_save(flags); | |
681 | local_irq_disable(); | |
682 | ||
683 | hpet_start = hpet_readl(HPET_COUNTER); | |
684 | rdtscl(tsc_start); | |
685 | ||
686 | do { | |
687 | local_irq_disable(); | |
688 | hpet_now = hpet_readl(HPET_COUNTER); | |
c818a181 | 689 | tsc_now = get_cycles_sync(); |
1da177e4 LT |
690 | local_irq_restore(flags); |
691 | } while ((tsc_now - tsc_start) < TICK_COUNT && | |
692 | (hpet_now - hpet_start) < TICK_COUNT); | |
693 | ||
694 | return (tsc_now - tsc_start) * 1000000000L | |
695 | / ((hpet_now - hpet_start) * hpet_period / 1000); | |
696 | } | |
697 | ||
698 | ||
699 | /* | |
700 | * pit_calibrate_tsc() uses the speaker output (channel 2) of | |
701 | * the PIT. This is better than using the timer interrupt output, | |
702 | * because we can read the value of the speaker with just one inb(), | |
703 | * where we need three i/o operations for the interrupt channel. | |
704 | * We count how many ticks the TSC does in 50 ms. | |
705 | */ | |
706 | ||
707 | static unsigned int __init pit_calibrate_tsc(void) | |
708 | { | |
709 | unsigned long start, end; | |
710 | unsigned long flags; | |
711 | ||
712 | spin_lock_irqsave(&i8253_lock, flags); | |
713 | ||
714 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); | |
715 | ||
716 | outb(0xb0, 0x43); | |
717 | outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42); | |
718 | outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42); | |
c818a181 | 719 | start = get_cycles_sync(); |
1da177e4 | 720 | while ((inb(0x61) & 0x20) == 0); |
c818a181 | 721 | end = get_cycles_sync(); |
1da177e4 LT |
722 | |
723 | spin_unlock_irqrestore(&i8253_lock, flags); | |
724 | ||
725 | return (end - start) / 50; | |
726 | } | |
727 | ||
728 | #ifdef CONFIG_HPET | |
729 | static __init int late_hpet_init(void) | |
730 | { | |
731 | struct hpet_data hd; | |
732 | unsigned int ntimer; | |
733 | ||
734 | if (!vxtime.hpet_address) | |
3d34ee68 | 735 | return 0; |
1da177e4 LT |
736 | |
737 | memset(&hd, 0, sizeof (hd)); | |
738 | ||
739 | ntimer = hpet_readl(HPET_ID); | |
740 | ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT; | |
741 | ntimer++; | |
742 | ||
743 | /* | |
744 | * Register with driver. | |
745 | * Timer0 and Timer1 is used by platform. | |
746 | */ | |
747 | hd.hd_phys_address = vxtime.hpet_address; | |
dd42b151 | 748 | hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE); |
1da177e4 LT |
749 | hd.hd_nirqs = ntimer; |
750 | hd.hd_flags = HPET_DATA_PLATFORM; | |
751 | hpet_reserve_timer(&hd, 0); | |
752 | #ifdef CONFIG_HPET_EMULATE_RTC | |
753 | hpet_reserve_timer(&hd, 1); | |
754 | #endif | |
755 | hd.hd_irq[0] = HPET_LEGACY_8254; | |
756 | hd.hd_irq[1] = HPET_LEGACY_RTC; | |
757 | if (ntimer > 2) { | |
758 | struct hpet *hpet; | |
759 | struct hpet_timer *timer; | |
760 | int i; | |
761 | ||
762 | hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE); | |
7351c0bf AK |
763 | timer = &hpet->hpet_timers[2]; |
764 | for (i = 2; i < ntimer; timer++, i++) | |
1da177e4 LT |
765 | hd.hd_irq[i] = (timer->hpet_config & |
766 | Tn_INT_ROUTE_CNF_MASK) >> | |
767 | Tn_INT_ROUTE_CNF_SHIFT; | |
768 | ||
769 | } | |
770 | ||
771 | hpet_alloc(&hd); | |
772 | return 0; | |
773 | } | |
774 | fs_initcall(late_hpet_init); | |
775 | #endif | |
776 | ||
777 | static int hpet_timer_stop_set_go(unsigned long tick) | |
778 | { | |
779 | unsigned int cfg; | |
780 | ||
781 | /* | |
782 | * Stop the timers and reset the main counter. | |
783 | */ | |
784 | ||
785 | cfg = hpet_readl(HPET_CFG); | |
786 | cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY); | |
787 | hpet_writel(cfg, HPET_CFG); | |
788 | hpet_writel(0, HPET_COUNTER); | |
789 | hpet_writel(0, HPET_COUNTER + 4); | |
790 | ||
791 | /* | |
792 | * Set up timer 0, as periodic with first interrupt to happen at hpet_tick, | |
793 | * and period also hpet_tick. | |
794 | */ | |
a3a00751 | 795 | if (hpet_use_timer) { |
796 | hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL | | |
1da177e4 | 797 | HPET_TN_32BIT, HPET_T0_CFG); |
b2df3ddb VP |
798 | hpet_writel(hpet_tick, HPET_T0_CMP); /* next interrupt */ |
799 | hpet_writel(hpet_tick, HPET_T0_CMP); /* period */ | |
a3a00751 | 800 | cfg |= HPET_CFG_LEGACY; |
801 | } | |
1da177e4 LT |
802 | /* |
803 | * Go! | |
804 | */ | |
805 | ||
a3a00751 | 806 | cfg |= HPET_CFG_ENABLE; |
1da177e4 LT |
807 | hpet_writel(cfg, HPET_CFG); |
808 | ||
809 | return 0; | |
810 | } | |
811 | ||
812 | static int hpet_init(void) | |
813 | { | |
814 | unsigned int id; | |
815 | ||
816 | if (!vxtime.hpet_address) | |
817 | return -1; | |
818 | set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address); | |
819 | __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE); | |
820 | ||
821 | /* | |
822 | * Read the period, compute tick and quotient. | |
823 | */ | |
824 | ||
825 | id = hpet_readl(HPET_ID); | |
826 | ||
a3a00751 | 827 | if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER)) |
1da177e4 LT |
828 | return -1; |
829 | ||
830 | hpet_period = hpet_readl(HPET_PERIOD); | |
831 | if (hpet_period < 100000 || hpet_period > 100000000) | |
832 | return -1; | |
833 | ||
42211338 | 834 | hpet_tick = (FSEC_PER_TICK + hpet_period / 2) / hpet_period; |
1da177e4 | 835 | |
a3a00751 | 836 | hpet_use_timer = (id & HPET_ID_LEGSUP); |
837 | ||
1da177e4 LT |
838 | return hpet_timer_stop_set_go(hpet_tick); |
839 | } | |
840 | ||
841 | static int hpet_reenable(void) | |
842 | { | |
843 | return hpet_timer_stop_set_go(hpet_tick); | |
844 | } | |
845 | ||
73dea47f AK |
846 | #define PIT_MODE 0x43 |
847 | #define PIT_CH0 0x40 | |
848 | ||
849 | static void __init __pit_init(int val, u8 mode) | |
1da177e4 LT |
850 | { |
851 | unsigned long flags; | |
852 | ||
853 | spin_lock_irqsave(&i8253_lock, flags); | |
73dea47f AK |
854 | outb_p(mode, PIT_MODE); |
855 | outb_p(val & 0xff, PIT_CH0); /* LSB */ | |
856 | outb_p(val >> 8, PIT_CH0); /* MSB */ | |
1da177e4 LT |
857 | spin_unlock_irqrestore(&i8253_lock, flags); |
858 | } | |
859 | ||
73dea47f AK |
860 | void __init pit_init(void) |
861 | { | |
862 | __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */ | |
863 | } | |
864 | ||
865 | void __init pit_stop_interrupt(void) | |
866 | { | |
867 | __pit_init(0, 0x30); /* mode 0 */ | |
868 | } | |
869 | ||
870 | void __init stop_timer_interrupt(void) | |
871 | { | |
872 | char *name; | |
873 | if (vxtime.hpet_address) { | |
874 | name = "HPET"; | |
875 | hpet_timer_stop_set_go(0); | |
876 | } else { | |
877 | name = "PIT"; | |
878 | pit_stop_interrupt(); | |
879 | } | |
880 | printk(KERN_INFO "timer: %s interrupt stopped.\n", name); | |
881 | } | |
882 | ||
1da177e4 LT |
883 | int __init time_setup(char *str) |
884 | { | |
885 | report_lost_ticks = 1; | |
886 | return 1; | |
887 | } | |
888 | ||
889 | static struct irqaction irq0 = { | |
890 | timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL | |
891 | }; | |
892 | ||
1da177e4 LT |
893 | void __init time_init(void) |
894 | { | |
895 | char *timename; | |
e8b91777 | 896 | char *gtod; |
1da177e4 | 897 | |
1da177e4 LT |
898 | if (nohpet) |
899 | vxtime.hpet_address = 0; | |
900 | ||
901 | xtime.tv_sec = get_cmos_time(); | |
902 | xtime.tv_nsec = 0; | |
903 | ||
904 | set_normalized_timespec(&wall_to_monotonic, | |
905 | -xtime.tv_sec, -xtime.tv_nsec); | |
906 | ||
a3a00751 | 907 | if (!hpet_init()) |
42211338 | 908 | vxtime_hz = (FSEC_PER_SEC + hpet_period / 2) / hpet_period; |
68e18891 AK |
909 | else |
910 | vxtime.hpet_address = 0; | |
a3a00751 | 911 | |
912 | if (hpet_use_timer) { | |
b20367a6 JH |
913 | /* set tick_nsec to use the proper rate for HPET */ |
914 | tick_nsec = TICK_NSEC_HPET; | |
1da177e4 LT |
915 | cpu_khz = hpet_calibrate_tsc(); |
916 | timename = "HPET"; | |
312df5f1 | 917 | #ifdef CONFIG_X86_PM_TIMER |
fd495471 | 918 | } else if (pmtmr_ioport && !vxtime.hpet_address) { |
312df5f1 AK |
919 | vxtime_hz = PM_TIMER_FREQUENCY; |
920 | timename = "PM"; | |
921 | pit_init(); | |
922 | cpu_khz = pit_calibrate_tsc(); | |
923 | #endif | |
1da177e4 LT |
924 | } else { |
925 | pit_init(); | |
926 | cpu_khz = pit_calibrate_tsc(); | |
927 | timename = "PIT"; | |
928 | } | |
929 | ||
e8b91777 AK |
930 | vxtime.mode = VXTIME_TSC; |
931 | gtod = time_init_gtod(); | |
932 | ||
933 | printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n", | |
934 | vxtime_hz / 1000000, vxtime_hz % 1000000, timename, gtod); | |
1da177e4 LT |
935 | printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n", |
936 | cpu_khz / 1000, cpu_khz % 1000); | |
42211338 VP |
937 | vxtime.quot = (USEC_PER_SEC << US_SCALE) / vxtime_hz; |
938 | vxtime.tsc_quot = (USEC_PER_MSEC << US_SCALE) / cpu_khz; | |
c818a181 | 939 | vxtime.last_tsc = get_cycles_sync(); |
1da177e4 LT |
940 | setup_irq(0, &irq0); |
941 | ||
dacb16b1 | 942 | set_cyc2ns_scale(cpu_khz); |
1da177e4 LT |
943 | } |
944 | ||
312df5f1 AK |
945 | /* |
946 | * Make an educated guess if the TSC is trustworthy and synchronized | |
947 | * over all CPUs. | |
948 | */ | |
396bd50f | 949 | __cpuinit int unsynchronized_tsc(void) |
312df5f1 AK |
950 | { |
951 | #ifdef CONFIG_SMP | |
f8bf3c65 | 952 | if (apic_is_clustered_box()) |
312df5f1 AK |
953 | return 1; |
954 | /* Intel systems are normally all synchronized. Exceptions | |
f8bf3c65 | 955 | are handled in the check above. */ |
312df5f1 AK |
956 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) |
957 | return 0; | |
312df5f1 AK |
958 | #endif |
959 | /* Assume multi socket systems are not synchronized */ | |
737c5c3b | 960 | return num_present_cpus() > 1; |
312df5f1 AK |
961 | } |
962 | ||
a8ab26fe | 963 | /* |
e8b91777 | 964 | * Decide what mode gettimeofday should use. |
a8ab26fe | 965 | */ |
e8b91777 | 966 | __init static char *time_init_gtod(void) |
1da177e4 LT |
967 | { |
968 | char *timetype; | |
969 | ||
312df5f1 | 970 | if (unsynchronized_tsc()) |
1da177e4 LT |
971 | notsc = 1; |
972 | if (vxtime.hpet_address && notsc) { | |
a3a00751 | 973 | timetype = hpet_use_timer ? "HPET" : "PIT/HPET"; |
33042a9f CM |
974 | if (hpet_use_timer) |
975 | vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick; | |
976 | else | |
977 | vxtime.last = hpet_readl(HPET_COUNTER); | |
1da177e4 LT |
978 | vxtime.mode = VXTIME_HPET; |
979 | do_gettimeoffset = do_gettimeoffset_hpet; | |
312df5f1 AK |
980 | #ifdef CONFIG_X86_PM_TIMER |
981 | /* Using PM for gettimeofday is quite slow, but we have no other | |
982 | choice because the TSC is too unreliable on some systems. */ | |
983 | } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) { | |
984 | timetype = "PM"; | |
985 | do_gettimeoffset = do_gettimeoffset_pm; | |
986 | vxtime.mode = VXTIME_PMTMR; | |
987 | sysctl_vsyscall = 0; | |
988 | printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n"); | |
989 | #endif | |
1da177e4 | 990 | } else { |
a3a00751 | 991 | timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC"; |
1da177e4 LT |
992 | vxtime.mode = VXTIME_TSC; |
993 | } | |
e8b91777 | 994 | return timetype; |
1da177e4 LT |
995 | } |
996 | ||
997 | __setup("report_lost_ticks", time_setup); | |
998 | ||
999 | static long clock_cmos_diff; | |
1000 | static unsigned long sleep_start; | |
1001 | ||
0b91317e AK |
1002 | /* |
1003 | * sysfs support for the timer. | |
1004 | */ | |
1005 | ||
0b9c33a7 | 1006 | static int timer_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 LT |
1007 | { |
1008 | /* | |
1009 | * Estimate time zone so that set_time can update the clock | |
1010 | */ | |
1011 | long cmos_time = get_cmos_time(); | |
1012 | ||
1013 | clock_cmos_diff = -cmos_time; | |
1014 | clock_cmos_diff += get_seconds(); | |
1015 | sleep_start = cmos_time; | |
1016 | return 0; | |
1017 | } | |
1018 | ||
1019 | static int timer_resume(struct sys_device *dev) | |
1020 | { | |
1021 | unsigned long flags; | |
1022 | unsigned long sec; | |
1023 | unsigned long ctime = get_cmos_time(); | |
1024 | unsigned long sleep_length = (ctime - sleep_start) * HZ; | |
1025 | ||
1026 | if (vxtime.hpet_address) | |
1027 | hpet_reenable(); | |
1028 | else | |
1029 | i8254_timer_resume(); | |
1030 | ||
1031 | sec = ctime + clock_cmos_diff; | |
1032 | write_seqlock_irqsave(&xtime_lock,flags); | |
1033 | xtime.tv_sec = sec; | |
1034 | xtime.tv_nsec = 0; | |
0dd2ea9a SL |
1035 | if (vxtime.mode == VXTIME_HPET) { |
1036 | if (hpet_use_timer) | |
1037 | vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick; | |
1038 | else | |
1039 | vxtime.last = hpet_readl(HPET_COUNTER); | |
1040 | #ifdef CONFIG_X86_PM_TIMER | |
1041 | } else if (vxtime.mode == VXTIME_PMTMR) { | |
1042 | pmtimer_resume(); | |
1043 | #endif | |
1044 | } else | |
1045 | vxtime.last_tsc = get_cycles_sync(); | |
1da177e4 LT |
1046 | write_sequnlock_irqrestore(&xtime_lock,flags); |
1047 | jiffies += sleep_length; | |
1048 | wall_jiffies += sleep_length; | |
0dd2ea9a | 1049 | monotonic_base += sleep_length * (NSEC_PER_SEC/HZ); |
8446f1d3 | 1050 | touch_softlockup_watchdog(); |
1da177e4 LT |
1051 | return 0; |
1052 | } | |
1053 | ||
1054 | static struct sysdev_class timer_sysclass = { | |
1055 | .resume = timer_resume, | |
1056 | .suspend = timer_suspend, | |
1057 | set_kset_name("timer"), | |
1058 | }; | |
1059 | ||
1da177e4 LT |
1060 | /* XXX this driverfs stuff should probably go elsewhere later -john */ |
1061 | static struct sys_device device_timer = { | |
1062 | .id = 0, | |
1063 | .cls = &timer_sysclass, | |
1064 | }; | |
1065 | ||
1066 | static int time_init_device(void) | |
1067 | { | |
1068 | int error = sysdev_class_register(&timer_sysclass); | |
1069 | if (!error) | |
1070 | error = sysdev_register(&device_timer); | |
1071 | return error; | |
1072 | } | |
1073 | ||
1074 | device_initcall(time_init_device); | |
1075 | ||
1076 | #ifdef CONFIG_HPET_EMULATE_RTC | |
1077 | /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET | |
1078 | * is enabled, we support RTC interrupt functionality in software. | |
1079 | * RTC has 3 kinds of interrupts: | |
1080 | * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock | |
1081 | * is updated | |
1082 | * 2) Alarm Interrupt - generate an interrupt at a specific time of day | |
1083 | * 3) Periodic Interrupt - generate periodic interrupt, with frequencies | |
1084 | * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2) | |
1085 | * (1) and (2) above are implemented using polling at a frequency of | |
1086 | * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt | |
1087 | * overhead. (DEFAULT_RTC_INT_FREQ) | |
1088 | * For (3), we use interrupts at 64Hz or user specified periodic | |
1089 | * frequency, whichever is higher. | |
1090 | */ | |
1091 | #include <linux/rtc.h> | |
1092 | ||
1da177e4 LT |
1093 | #define DEFAULT_RTC_INT_FREQ 64 |
1094 | #define RTC_NUM_INTS 1 | |
1095 | ||
1096 | static unsigned long UIE_on; | |
1097 | static unsigned long prev_update_sec; | |
1098 | ||
1099 | static unsigned long AIE_on; | |
1100 | static struct rtc_time alarm_time; | |
1101 | ||
1102 | static unsigned long PIE_on; | |
1103 | static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ; | |
1104 | static unsigned long PIE_count; | |
1105 | ||
1106 | static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */ | |
7811fb8f | 1107 | static unsigned int hpet_t1_cmp; /* cached comparator register */ |
1da177e4 LT |
1108 | |
1109 | int is_hpet_enabled(void) | |
1110 | { | |
1111 | return vxtime.hpet_address != 0; | |
1112 | } | |
1113 | ||
1114 | /* | |
1115 | * Timer 1 for RTC, we do not use periodic interrupt feature, | |
1116 | * even if HPET supports periodic interrupts on Timer 1. | |
1117 | * The reason being, to set up a periodic interrupt in HPET, we need to | |
1118 | * stop the main counter. And if we do that everytime someone diables/enables | |
1119 | * RTC, we will have adverse effect on main kernel timer running on Timer 0. | |
1120 | * So, for the time being, simulate the periodic interrupt in software. | |
1121 | * | |
1122 | * hpet_rtc_timer_init() is called for the first time and during subsequent | |
1123 | * interuppts reinit happens through hpet_rtc_timer_reinit(). | |
1124 | */ | |
1125 | int hpet_rtc_timer_init(void) | |
1126 | { | |
1127 | unsigned int cfg, cnt; | |
1128 | unsigned long flags; | |
1129 | ||
1130 | if (!is_hpet_enabled()) | |
1131 | return 0; | |
1132 | /* | |
1133 | * Set the counter 1 and enable the interrupts. | |
1134 | */ | |
1135 | if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) | |
1136 | hpet_rtc_int_freq = PIE_freq; | |
1137 | else | |
1138 | hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; | |
1139 | ||
1140 | local_irq_save(flags); | |
1141 | cnt = hpet_readl(HPET_COUNTER); | |
1142 | cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq); | |
1143 | hpet_writel(cnt, HPET_T1_CMP); | |
7811fb8f | 1144 | hpet_t1_cmp = cnt; |
1da177e4 LT |
1145 | local_irq_restore(flags); |
1146 | ||
1147 | cfg = hpet_readl(HPET_T1_CFG); | |
5f819949 CL |
1148 | cfg &= ~HPET_TN_PERIODIC; |
1149 | cfg |= HPET_TN_ENABLE | HPET_TN_32BIT; | |
1da177e4 LT |
1150 | hpet_writel(cfg, HPET_T1_CFG); |
1151 | ||
1152 | return 1; | |
1153 | } | |
1154 | ||
1155 | static void hpet_rtc_timer_reinit(void) | |
1156 | { | |
1157 | unsigned int cfg, cnt; | |
1158 | ||
f00c96f3 CL |
1159 | if (unlikely(!(PIE_on | AIE_on | UIE_on))) { |
1160 | cfg = hpet_readl(HPET_T1_CFG); | |
1161 | cfg &= ~HPET_TN_ENABLE; | |
1162 | hpet_writel(cfg, HPET_T1_CFG); | |
1da177e4 | 1163 | return; |
f00c96f3 | 1164 | } |
1da177e4 LT |
1165 | |
1166 | if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ)) | |
1167 | hpet_rtc_int_freq = PIE_freq; | |
1168 | else | |
1169 | hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ; | |
1170 | ||
1171 | /* It is more accurate to use the comparator value than current count.*/ | |
7811fb8f | 1172 | cnt = hpet_t1_cmp; |
1da177e4 LT |
1173 | cnt += hpet_tick*HZ/hpet_rtc_int_freq; |
1174 | hpet_writel(cnt, HPET_T1_CMP); | |
7811fb8f | 1175 | hpet_t1_cmp = cnt; |
1da177e4 LT |
1176 | } |
1177 | ||
1178 | /* | |
1179 | * The functions below are called from rtc driver. | |
1180 | * Return 0 if HPET is not being used. | |
1181 | * Otherwise do the necessary changes and return 1. | |
1182 | */ | |
1183 | int hpet_mask_rtc_irq_bit(unsigned long bit_mask) | |
1184 | { | |
1185 | if (!is_hpet_enabled()) | |
1186 | return 0; | |
1187 | ||
1188 | if (bit_mask & RTC_UIE) | |
1189 | UIE_on = 0; | |
1190 | if (bit_mask & RTC_PIE) | |
1191 | PIE_on = 0; | |
1192 | if (bit_mask & RTC_AIE) | |
1193 | AIE_on = 0; | |
1194 | ||
1195 | return 1; | |
1196 | } | |
1197 | ||
1198 | int hpet_set_rtc_irq_bit(unsigned long bit_mask) | |
1199 | { | |
1200 | int timer_init_reqd = 0; | |
1201 | ||
1202 | if (!is_hpet_enabled()) | |
1203 | return 0; | |
1204 | ||
1205 | if (!(PIE_on | AIE_on | UIE_on)) | |
1206 | timer_init_reqd = 1; | |
1207 | ||
1208 | if (bit_mask & RTC_UIE) { | |
1209 | UIE_on = 1; | |
1210 | } | |
1211 | if (bit_mask & RTC_PIE) { | |
1212 | PIE_on = 1; | |
1213 | PIE_count = 0; | |
1214 | } | |
1215 | if (bit_mask & RTC_AIE) { | |
1216 | AIE_on = 1; | |
1217 | } | |
1218 | ||
1219 | if (timer_init_reqd) | |
1220 | hpet_rtc_timer_init(); | |
1221 | ||
1222 | return 1; | |
1223 | } | |
1224 | ||
1225 | int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) | |
1226 | { | |
1227 | if (!is_hpet_enabled()) | |
1228 | return 0; | |
1229 | ||
1230 | alarm_time.tm_hour = hrs; | |
1231 | alarm_time.tm_min = min; | |
1232 | alarm_time.tm_sec = sec; | |
1233 | ||
1234 | return 1; | |
1235 | } | |
1236 | ||
1237 | int hpet_set_periodic_freq(unsigned long freq) | |
1238 | { | |
1239 | if (!is_hpet_enabled()) | |
1240 | return 0; | |
1241 | ||
1242 | PIE_freq = freq; | |
1243 | PIE_count = 0; | |
1244 | ||
1245 | return 1; | |
1246 | } | |
1247 | ||
1248 | int hpet_rtc_dropped_irq(void) | |
1249 | { | |
1250 | if (!is_hpet_enabled()) | |
1251 | return 0; | |
1252 | ||
1253 | return 1; | |
1254 | } | |
1255 | ||
1256 | irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1257 | { | |
1258 | struct rtc_time curr_time; | |
1259 | unsigned long rtc_int_flag = 0; | |
1260 | int call_rtc_interrupt = 0; | |
1261 | ||
1262 | hpet_rtc_timer_reinit(); | |
1263 | ||
1264 | if (UIE_on | AIE_on) { | |
1265 | rtc_get_rtc_time(&curr_time); | |
1266 | } | |
1267 | if (UIE_on) { | |
1268 | if (curr_time.tm_sec != prev_update_sec) { | |
1269 | /* Set update int info, call real rtc int routine */ | |
1270 | call_rtc_interrupt = 1; | |
1271 | rtc_int_flag = RTC_UF; | |
1272 | prev_update_sec = curr_time.tm_sec; | |
1273 | } | |
1274 | } | |
1275 | if (PIE_on) { | |
1276 | PIE_count++; | |
1277 | if (PIE_count >= hpet_rtc_int_freq/PIE_freq) { | |
1278 | /* Set periodic int info, call real rtc int routine */ | |
1279 | call_rtc_interrupt = 1; | |
1280 | rtc_int_flag |= RTC_PF; | |
1281 | PIE_count = 0; | |
1282 | } | |
1283 | } | |
1284 | if (AIE_on) { | |
1285 | if ((curr_time.tm_sec == alarm_time.tm_sec) && | |
1286 | (curr_time.tm_min == alarm_time.tm_min) && | |
1287 | (curr_time.tm_hour == alarm_time.tm_hour)) { | |
1288 | /* Set alarm int info, call real rtc int routine */ | |
1289 | call_rtc_interrupt = 1; | |
1290 | rtc_int_flag |= RTC_AF; | |
1291 | } | |
1292 | } | |
1293 | if (call_rtc_interrupt) { | |
1294 | rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8)); | |
1295 | rtc_interrupt(rtc_int_flag, dev_id, regs); | |
1296 | } | |
1297 | return IRQ_HANDLED; | |
1298 | } | |
1299 | #endif | |
1300 | ||
1da177e4 LT |
1301 | static int __init nohpet_setup(char *s) |
1302 | { | |
1303 | nohpet = 1; | |
9b41046c | 1304 | return 1; |
1da177e4 LT |
1305 | } |
1306 | ||
1307 | __setup("nohpet", nohpet_setup); | |
1308 | ||
7fd67843 | 1309 | int __init notsc_setup(char *s) |
1da177e4 LT |
1310 | { |
1311 | notsc = 1; | |
9b41046c | 1312 | return 1; |
1da177e4 LT |
1313 | } |
1314 | ||
1315 | __setup("notsc", notsc_setup); |