Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * linux/arch/x86-64/kernel/time.c | |
3 | * | |
4 | * "High Precision Event Timer" based timekeeping. | |
5 | * | |
6 | * Copyright (c) 1991,1992,1995 Linus Torvalds | |
7 | * Copyright (c) 1994 Alan Modra | |
8 | * Copyright (c) 1995 Markus Kuhn | |
9 | * Copyright (c) 1996 Ingo Molnar | |
10 | * Copyright (c) 1998 Andrea Arcangeli | |
2f82bde4 | 11 | * Copyright (c) 2002,2006 Vojtech Pavlik |
1da177e4 LT |
12 | * Copyright (c) 2003 Andi Kleen |
13 | * RTC support code taken from arch/i386/kernel/timers/time_hpet.c | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/sched.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/mc146818rtc.h> | |
1da177e4 LT |
21 | #include <linux/time.h> |
22 | #include <linux/ioport.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/device.h> | |
25 | #include <linux/sysdev.h> | |
26 | #include <linux/bcd.h> | |
a670fad0 VP |
27 | #include <linux/notifier.h> |
28 | #include <linux/cpu.h> | |
1da177e4 | 29 | #include <linux/kallsyms.h> |
312df5f1 | 30 | #include <linux/acpi.h> |
8d916406 | 31 | #ifdef CONFIG_ACPI |
312df5f1 | 32 | #include <acpi/achware.h> /* for PM timer frequency */ |
0e5f61b0 | 33 | #include <acpi/acpi_bus.h> |
8d916406 | 34 | #endif |
1da177e4 LT |
35 | #include <asm/8253pit.h> |
36 | #include <asm/pgtable.h> | |
37 | #include <asm/vsyscall.h> | |
38 | #include <asm/timex.h> | |
39 | #include <asm/proto.h> | |
40 | #include <asm/hpet.h> | |
41 | #include <asm/sections.h> | |
1da177e4 | 42 | #include <linux/hpet.h> |
1da177e4 | 43 | #include <asm/apic.h> |
c37e7bb5 | 44 | #include <asm/hpet.h> |
803d80f6 | 45 | #include <asm/mpspec.h> |
1da177e4 | 46 | |
a670fad0 | 47 | static char *timename = NULL; |
e8b91777 | 48 | |
1da177e4 | 49 | DEFINE_SPINLOCK(rtc_lock); |
2ee60e17 | 50 | EXPORT_SYMBOL(rtc_lock); |
1da177e4 LT |
51 | DEFINE_SPINLOCK(i8253_lock); |
52 | ||
1da177e4 | 53 | volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES; |
1da177e4 | 54 | |
1da177e4 LT |
55 | unsigned long profile_pc(struct pt_regs *regs) |
56 | { | |
57 | unsigned long pc = instruction_pointer(regs); | |
58 | ||
31679f38 AK |
59 | /* Assume the lock function has either no stack frame or a copy |
60 | of eflags from PUSHF | |
61 | Eflags always has bits 22 and up cleared unlike kernel addresses. */ | |
d5a26017 | 62 | if (!user_mode(regs) && in_lock_functions(pc)) { |
31679f38 AK |
63 | unsigned long *sp = (unsigned long *)regs->rsp; |
64 | if (sp[0] >> 22) | |
65 | return sp[0]; | |
66 | if (sp[1] >> 22) | |
67 | return sp[1]; | |
1da177e4 LT |
68 | } |
69 | return pc; | |
70 | } | |
71 | EXPORT_SYMBOL(profile_pc); | |
72 | ||
73 | /* | |
74 | * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500 | |
75 | * ms after the second nowtime has started, because when nowtime is written | |
76 | * into the registers of the CMOS clock, it will jump to the next second | |
77 | * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data | |
78 | * sheet for details. | |
79 | */ | |
80 | ||
81 | static void set_rtc_mmss(unsigned long nowtime) | |
82 | { | |
83 | int real_seconds, real_minutes, cmos_minutes; | |
84 | unsigned char control, freq_select; | |
85 | ||
86 | /* | |
87 | * IRQs are disabled when we're called from the timer interrupt, | |
88 | * no need for spin_lock_irqsave() | |
89 | */ | |
90 | ||
91 | spin_lock(&rtc_lock); | |
92 | ||
93 | /* | |
94 | * Tell the clock it's being set and stop it. | |
95 | */ | |
96 | ||
97 | control = CMOS_READ(RTC_CONTROL); | |
98 | CMOS_WRITE(control | RTC_SET, RTC_CONTROL); | |
99 | ||
100 | freq_select = CMOS_READ(RTC_FREQ_SELECT); | |
101 | CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT); | |
102 | ||
103 | cmos_minutes = CMOS_READ(RTC_MINUTES); | |
104 | BCD_TO_BIN(cmos_minutes); | |
105 | ||
106 | /* | |
107 | * since we're only adjusting minutes and seconds, don't interfere with hour | |
108 | * overflow. This avoids messing with unknown time zones but requires your RTC | |
109 | * not to be off by more than 15 minutes. Since we're calling it only when | |
110 | * our clock is externally synchronized using NTP, this shouldn't be a problem. | |
111 | */ | |
112 | ||
113 | real_seconds = nowtime % 60; | |
114 | real_minutes = nowtime / 60; | |
115 | if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1) | |
116 | real_minutes += 30; /* correct for half hour time zone */ | |
117 | real_minutes %= 60; | |
118 | ||
1da177e4 LT |
119 | if (abs(real_minutes - cmos_minutes) >= 30) { |
120 | printk(KERN_WARNING "time.c: can't update CMOS clock " | |
121 | "from %d to %d\n", cmos_minutes, real_minutes); | |
28456ede | 122 | } else { |
0b91317e AK |
123 | BIN_TO_BCD(real_seconds); |
124 | BIN_TO_BCD(real_minutes); | |
1da177e4 LT |
125 | CMOS_WRITE(real_seconds, RTC_SECONDS); |
126 | CMOS_WRITE(real_minutes, RTC_MINUTES); | |
127 | } | |
128 | ||
129 | /* | |
130 | * The following flags have to be released exactly in this order, otherwise the | |
131 | * DS12887 (popular MC146818A clone with integrated battery and quartz) will | |
132 | * not reset the oscillator and will not update precisely 500 ms later. You | |
133 | * won't find this mentioned in the Dallas Semiconductor data sheets, but who | |
134 | * believes data sheets anyway ... -- Markus Kuhn | |
135 | */ | |
136 | ||
137 | CMOS_WRITE(control, RTC_CONTROL); | |
138 | CMOS_WRITE(freq_select, RTC_FREQ_SELECT); | |
139 | ||
140 | spin_unlock(&rtc_lock); | |
141 | } | |
142 | ||
143 | ||
7d12e780 | 144 | void main_timer_handler(void) |
1da177e4 LT |
145 | { |
146 | static unsigned long rtc_update = 0; | |
1da177e4 LT |
147 | /* |
148 | * Here we are in the timer irq handler. We have irqs locally disabled (so we | |
149 | * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running | |
150 | * on the other CPU, so we need a lock. We also need to lock the vsyscall | |
151 | * variables, because both do_timer() and us change them -arca+vojtech | |
152 | */ | |
153 | ||
154 | write_seqlock(&xtime_lock); | |
155 | ||
1da177e4 LT |
156 | /* |
157 | * Do the timer stuff. | |
158 | */ | |
159 | ||
1489939f | 160 | do_timer(1); |
1da177e4 | 161 | #ifndef CONFIG_SMP |
7d12e780 | 162 | update_process_times(user_mode(get_irq_regs())); |
1da177e4 LT |
163 | #endif |
164 | ||
165 | /* | |
166 | * In the SMP case we use the local APIC timer interrupt to do the profiling, | |
167 | * except when we simulate SMP mode on a uniprocessor system, in that case we | |
168 | * have to call the local interrupt handler. | |
169 | */ | |
170 | ||
1da177e4 | 171 | if (!using_apic_timer) |
7d12e780 | 172 | smp_local_timer_interrupt(); |
1da177e4 LT |
173 | |
174 | /* | |
175 | * If we have an externally synchronized Linux clock, then update CMOS clock | |
176 | * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy | |
177 | * closest to exactly 500 ms before the next second. If the update fails, we | |
178 | * don't care, as it'll be updated on the next turn, and the problem (time way | |
179 | * off) isn't likely to go away much sooner anyway. | |
180 | */ | |
181 | ||
b149ee22 | 182 | if (ntp_synced() && xtime.tv_sec > rtc_update && |
1da177e4 LT |
183 | abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) { |
184 | set_rtc_mmss(xtime.tv_sec); | |
185 | rtc_update = xtime.tv_sec + 660; | |
186 | } | |
187 | ||
188 | write_sequnlock(&xtime_lock); | |
73dea47f | 189 | } |
1da177e4 | 190 | |
7d12e780 | 191 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
73dea47f AK |
192 | { |
193 | if (apic_runs_main_timer > 1) | |
194 | return IRQ_HANDLED; | |
7d12e780 | 195 | main_timer_handler(); |
d25bf7e5 VP |
196 | if (using_apic_timer) |
197 | smp_send_timer_broadcast_ipi(); | |
1da177e4 LT |
198 | return IRQ_HANDLED; |
199 | } | |
200 | ||
bdf2b1c9 | 201 | static unsigned long get_cmos_time(void) |
1da177e4 | 202 | { |
641f71f5 | 203 | unsigned int year, mon, day, hour, min, sec; |
1da177e4 | 204 | unsigned long flags; |
ad71860a | 205 | unsigned century = 0; |
1da177e4 | 206 | |
1da177e4 LT |
207 | spin_lock_irqsave(&rtc_lock, flags); |
208 | ||
641f71f5 MM |
209 | do { |
210 | sec = CMOS_READ(RTC_SECONDS); | |
211 | min = CMOS_READ(RTC_MINUTES); | |
212 | hour = CMOS_READ(RTC_HOURS); | |
213 | day = CMOS_READ(RTC_DAY_OF_MONTH); | |
214 | mon = CMOS_READ(RTC_MONTH); | |
215 | year = CMOS_READ(RTC_YEAR); | |
6954bee8 | 216 | #ifdef CONFIG_ACPI |
ad71860a AS |
217 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && |
218 | acpi_gbl_FADT.century) | |
219 | century = CMOS_READ(acpi_gbl_FADT.century); | |
6954bee8 | 220 | #endif |
641f71f5 | 221 | } while (sec != CMOS_READ(RTC_SECONDS)); |
6954bee8 | 222 | |
1da177e4 LT |
223 | spin_unlock_irqrestore(&rtc_lock, flags); |
224 | ||
0b91317e AK |
225 | /* |
226 | * We know that x86-64 always uses BCD format, no need to check the | |
227 | * config register. | |
7351c0bf | 228 | */ |
1da177e4 | 229 | |
0b91317e AK |
230 | BCD_TO_BIN(sec); |
231 | BCD_TO_BIN(min); | |
232 | BCD_TO_BIN(hour); | |
233 | BCD_TO_BIN(day); | |
234 | BCD_TO_BIN(mon); | |
235 | BCD_TO_BIN(year); | |
1da177e4 | 236 | |
ad71860a AS |
237 | if (century) { |
238 | BCD_TO_BIN(century); | |
239 | year += century * 100; | |
240 | printk(KERN_INFO "Extended CMOS year: %d\n", century * 100); | |
6954bee8 AK |
241 | } else { |
242 | /* | |
243 | * x86-64 systems only exists since 2002. | |
244 | * This will work up to Dec 31, 2100 | |
245 | */ | |
246 | year += 2000; | |
247 | } | |
1da177e4 LT |
248 | |
249 | return mktime(year, mon, day, hour, min, sec); | |
250 | } | |
251 | ||
1da177e4 LT |
252 | |
253 | /* | |
254 | * pit_calibrate_tsc() uses the speaker output (channel 2) of | |
255 | * the PIT. This is better than using the timer interrupt output, | |
256 | * because we can read the value of the speaker with just one inb(), | |
257 | * where we need three i/o operations for the interrupt channel. | |
258 | * We count how many ticks the TSC does in 50 ms. | |
259 | */ | |
260 | ||
261 | static unsigned int __init pit_calibrate_tsc(void) | |
262 | { | |
263 | unsigned long start, end; | |
264 | unsigned long flags; | |
265 | ||
266 | spin_lock_irqsave(&i8253_lock, flags); | |
267 | ||
268 | outb((inb(0x61) & ~0x02) | 0x01, 0x61); | |
269 | ||
270 | outb(0xb0, 0x43); | |
271 | outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42); | |
272 | outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42); | |
c818a181 | 273 | start = get_cycles_sync(); |
1da177e4 | 274 | while ((inb(0x61) & 0x20) == 0); |
c818a181 | 275 | end = get_cycles_sync(); |
1da177e4 LT |
276 | |
277 | spin_unlock_irqrestore(&i8253_lock, flags); | |
278 | ||
279 | return (end - start) / 50; | |
280 | } | |
281 | ||
73dea47f AK |
282 | #define PIT_MODE 0x43 |
283 | #define PIT_CH0 0x40 | |
284 | ||
285 | static void __init __pit_init(int val, u8 mode) | |
1da177e4 LT |
286 | { |
287 | unsigned long flags; | |
288 | ||
289 | spin_lock_irqsave(&i8253_lock, flags); | |
73dea47f AK |
290 | outb_p(mode, PIT_MODE); |
291 | outb_p(val & 0xff, PIT_CH0); /* LSB */ | |
292 | outb_p(val >> 8, PIT_CH0); /* MSB */ | |
1da177e4 LT |
293 | spin_unlock_irqrestore(&i8253_lock, flags); |
294 | } | |
295 | ||
73dea47f AK |
296 | void __init pit_init(void) |
297 | { | |
298 | __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */ | |
299 | } | |
300 | ||
301 | void __init pit_stop_interrupt(void) | |
302 | { | |
303 | __pit_init(0, 0x30); /* mode 0 */ | |
304 | } | |
305 | ||
306 | void __init stop_timer_interrupt(void) | |
307 | { | |
308 | char *name; | |
2d0c87c3 | 309 | if (hpet_address) { |
73dea47f AK |
310 | name = "HPET"; |
311 | hpet_timer_stop_set_go(0); | |
312 | } else { | |
313 | name = "PIT"; | |
314 | pit_stop_interrupt(); | |
315 | } | |
316 | printk(KERN_INFO "timer: %s interrupt stopped.\n", name); | |
317 | } | |
318 | ||
1da177e4 | 319 | static struct irqaction irq0 = { |
b1e05aa2 | 320 | timer_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "timer", NULL, NULL |
1da177e4 LT |
321 | }; |
322 | ||
a670fad0 VP |
323 | void __init time_init(void) |
324 | { | |
1da177e4 | 325 | if (nohpet) |
2d0c87c3 | 326 | hpet_address = 0; |
1da177e4 LT |
327 | xtime.tv_sec = get_cmos_time(); |
328 | xtime.tv_nsec = 0; | |
329 | ||
330 | set_normalized_timespec(&wall_to_monotonic, | |
331 | -xtime.tv_sec, -xtime.tv_nsec); | |
332 | ||
1489939f | 333 | if (hpet_arch_init()) |
2d0c87c3 | 334 | hpet_address = 0; |
a3a00751 | 335 | |
336 | if (hpet_use_timer) { | |
b20367a6 JH |
337 | /* set tick_nsec to use the proper rate for HPET */ |
338 | tick_nsec = TICK_NSEC_HPET; | |
1da177e4 LT |
339 | cpu_khz = hpet_calibrate_tsc(); |
340 | timename = "HPET"; | |
341 | } else { | |
342 | pit_init(); | |
343 | cpu_khz = pit_calibrate_tsc(); | |
344 | timename = "PIT"; | |
345 | } | |
346 | ||
312df5f1 | 347 | if (unsynchronized_tsc()) |
1489939f | 348 | mark_tsc_unstable(); |
a670fad0 | 349 | |
2d0c87c3 | 350 | if (cpu_has(&boot_cpu_data, X86_FEATURE_RDTSCP)) |
c08c8205 VP |
351 | vgetcpu_mode = VGETCPU_RDTSCP; |
352 | else | |
353 | vgetcpu_mode = VGETCPU_LSL; | |
354 | ||
1489939f | 355 | set_cyc2ns_scale(cpu_khz); |
a670fad0 VP |
356 | printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n", |
357 | cpu_khz / 1000, cpu_khz % 1000); | |
6bb74df4 | 358 | init_tsc_clocksource(); |
359 | ||
1489939f | 360 | setup_irq(0, &irq0); |
1da177e4 LT |
361 | } |
362 | ||
1da177e4 LT |
363 | |
364 | static long clock_cmos_diff; | |
365 | static unsigned long sleep_start; | |
366 | ||
0b91317e AK |
367 | /* |
368 | * sysfs support for the timer. | |
369 | */ | |
370 | ||
0b9c33a7 | 371 | static int timer_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 LT |
372 | { |
373 | /* | |
374 | * Estimate time zone so that set_time can update the clock | |
375 | */ | |
376 | long cmos_time = get_cmos_time(); | |
377 | ||
378 | clock_cmos_diff = -cmos_time; | |
379 | clock_cmos_diff += get_seconds(); | |
380 | sleep_start = cmos_time; | |
381 | return 0; | |
382 | } | |
383 | ||
384 | static int timer_resume(struct sys_device *dev) | |
385 | { | |
386 | unsigned long flags; | |
387 | unsigned long sec; | |
388 | unsigned long ctime = get_cmos_time(); | |
34464a5b | 389 | long sleep_length = (ctime - sleep_start) * HZ; |
1da177e4 | 390 | |
34464a5b RW |
391 | if (sleep_length < 0) { |
392 | printk(KERN_WARNING "Time skew detected in timer resume!\n"); | |
393 | /* The time after the resume must not be earlier than the time | |
394 | * before the suspend or some nasty things will happen | |
395 | */ | |
396 | sleep_length = 0; | |
397 | ctime = sleep_start; | |
398 | } | |
2d0c87c3 | 399 | if (hpet_address) |
1da177e4 LT |
400 | hpet_reenable(); |
401 | else | |
402 | i8254_timer_resume(); | |
403 | ||
404 | sec = ctime + clock_cmos_diff; | |
405 | write_seqlock_irqsave(&xtime_lock,flags); | |
406 | xtime.tv_sec = sec; | |
407 | xtime.tv_nsec = 0; | |
1da177e4 | 408 | jiffies += sleep_length; |
1489939f | 409 | write_sequnlock_irqrestore(&xtime_lock,flags); |
8446f1d3 | 410 | touch_softlockup_watchdog(); |
1da177e4 LT |
411 | return 0; |
412 | } | |
413 | ||
414 | static struct sysdev_class timer_sysclass = { | |
415 | .resume = timer_resume, | |
416 | .suspend = timer_suspend, | |
417 | set_kset_name("timer"), | |
418 | }; | |
419 | ||
405ae7d3 | 420 | /* XXX this sysfs stuff should probably go elsewhere later -john */ |
1da177e4 LT |
421 | static struct sys_device device_timer = { |
422 | .id = 0, | |
423 | .cls = &timer_sysclass, | |
424 | }; | |
425 | ||
426 | static int time_init_device(void) | |
427 | { | |
428 | int error = sysdev_class_register(&timer_sysclass); | |
429 | if (!error) | |
430 | error = sysdev_register(&device_timer); | |
431 | return error; | |
432 | } | |
433 | ||
434 | device_initcall(time_init_device); |