Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * mmconfig.c - Low-level direct PCI config space access via MMCONFIG | |
3 | * | |
4 | * This is an 64bit optimized version that always keeps the full mmconfig | |
5 | * space mapped. This allows lockless config space operation. | |
6 | */ | |
7 | ||
8 | #include <linux/pci.h> | |
9 | #include <linux/init.h> | |
54549391 | 10 | #include <linux/acpi.h> |
d6ece549 | 11 | #include <linux/bitmap.h> |
946f2ee5 AV |
12 | #include <asm/e820.h> |
13 | ||
1da177e4 LT |
14 | #include "pci.h" |
15 | ||
ead2bfeb CE |
16 | /* aperture is up to 256MB but BIOS may reserve less */ |
17 | #define MMCONFIG_APER_MIN (2 * 1024*1024) | |
18 | #define MMCONFIG_APER_MAX (256 * 1024*1024) | |
19 | ||
8c30b1a7 AK |
20 | /* Verify the first 16 busses. We assume that systems with more busses |
21 | get MCFG right. */ | |
22 | #define MAX_CHECK_BUS 16 | |
1da177e4 | 23 | |
8c30b1a7 | 24 | static DECLARE_BITMAP(fallback_slots, 32*MAX_CHECK_BUS); |
d6ece549 | 25 | |
1da177e4 | 26 | /* Static virtual mapping of the MMCONFIG aperture */ |
1cde8a16 GKH |
27 | struct mmcfg_virt { |
28 | struct acpi_table_mcfg_config *cfg; | |
8b8a4e33 | 29 | char __iomem *virt; |
1cde8a16 GKH |
30 | }; |
31 | static struct mmcfg_virt *pci_mmcfg_virt; | |
1da177e4 | 32 | |
8b8a4e33 | 33 | static char __iomem *get_virt(unsigned int seg, unsigned bus) |
1da177e4 | 34 | { |
1cde8a16 GKH |
35 | int cfg_num = -1; |
36 | struct acpi_table_mcfg_config *cfg; | |
37 | ||
38 | while (1) { | |
39 | ++cfg_num; | |
3103039c AK |
40 | if (cfg_num >= pci_mmcfg_config_num) |
41 | break; | |
1cde8a16 GKH |
42 | cfg = pci_mmcfg_virt[cfg_num].cfg; |
43 | if (cfg->pci_segment_group_number != seg) | |
44 | continue; | |
45 | if ((cfg->start_bus_number <= bus) && | |
46 | (cfg->end_bus_number >= bus)) | |
47 | return pci_mmcfg_virt[cfg_num].virt; | |
48 | } | |
3103039c AK |
49 | |
50 | /* Handle more broken MCFG tables on Asus etc. | |
51 | They only contain a single entry for bus 0-0. Assume | |
52 | this applies to all busses. */ | |
53 | cfg = &pci_mmcfg_config[0]; | |
54 | if (pci_mmcfg_config_num == 1 && | |
55 | cfg->pci_segment_group_number == 0 && | |
56 | (cfg->start_bus_number | cfg->end_bus_number) == 0) | |
1de6bf33 | 57 | return pci_mmcfg_virt[0].virt; |
3103039c AK |
58 | |
59 | /* Fall back to type 0 */ | |
cc59853b | 60 | return NULL; |
1cde8a16 GKH |
61 | } |
62 | ||
8b8a4e33 | 63 | static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) |
1cde8a16 | 64 | { |
8b8a4e33 | 65 | char __iomem *addr; |
8c30b1a7 AK |
66 | if (seg == 0 && bus < MAX_CHECK_BUS && |
67 | test_bit(32*bus + PCI_SLOT(devfn), fallback_slots)) | |
d6ece549 AK |
68 | return NULL; |
69 | addr = get_virt(seg, bus); | |
928cf8c6 AK |
70 | if (!addr) |
71 | return NULL; | |
72 | return addr + ((bus << 20) | (devfn << 12)); | |
1da177e4 LT |
73 | } |
74 | ||
75 | static int pci_mmcfg_read(unsigned int seg, unsigned int bus, | |
76 | unsigned int devfn, int reg, int len, u32 *value) | |
77 | { | |
8b8a4e33 | 78 | char __iomem *addr; |
1da177e4 | 79 | |
928cf8c6 | 80 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
ecc16ba9 | 81 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { |
49c93e84 | 82 | *value = -1; |
1da177e4 | 83 | return -EINVAL; |
49c93e84 | 84 | } |
1da177e4 | 85 | |
928cf8c6 AK |
86 | addr = pci_dev_base(seg, bus, devfn); |
87 | if (!addr) | |
88 | return pci_conf1_read(seg,bus,devfn,reg,len,value); | |
89 | ||
1da177e4 LT |
90 | switch (len) { |
91 | case 1: | |
92 | *value = readb(addr + reg); | |
93 | break; | |
94 | case 2: | |
95 | *value = readw(addr + reg); | |
96 | break; | |
97 | case 4: | |
98 | *value = readl(addr + reg); | |
99 | break; | |
100 | } | |
101 | ||
102 | return 0; | |
103 | } | |
104 | ||
105 | static int pci_mmcfg_write(unsigned int seg, unsigned int bus, | |
106 | unsigned int devfn, int reg, int len, u32 value) | |
107 | { | |
8b8a4e33 | 108 | char __iomem *addr; |
1da177e4 | 109 | |
928cf8c6 | 110 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
1da177e4 LT |
111 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) |
112 | return -EINVAL; | |
113 | ||
928cf8c6 AK |
114 | addr = pci_dev_base(seg, bus, devfn); |
115 | if (!addr) | |
116 | return pci_conf1_write(seg,bus,devfn,reg,len,value); | |
117 | ||
1da177e4 LT |
118 | switch (len) { |
119 | case 1: | |
120 | writeb(value, addr + reg); | |
121 | break; | |
122 | case 2: | |
123 | writew(value, addr + reg); | |
124 | break; | |
125 | case 4: | |
126 | writel(value, addr + reg); | |
127 | break; | |
128 | } | |
129 | ||
130 | return 0; | |
131 | } | |
132 | ||
133 | static struct pci_raw_ops pci_mmcfg = { | |
134 | .read = pci_mmcfg_read, | |
135 | .write = pci_mmcfg_write, | |
136 | }; | |
137 | ||
d6ece549 AK |
138 | /* K8 systems have some devices (typically in the builtin northbridge) |
139 | that are only accessible using type1 | |
140 | Normally this can be expressed in the MCFG by not listing them | |
141 | and assigning suitable _SEGs, but this isn't implemented in some BIOS. | |
142 | Instead try to discover all devices on bus 0 that are unreachable using MM | |
8c30b1a7 | 143 | and fallback for them. */ |
d6ece549 AK |
144 | static __init void unreachable_devices(void) |
145 | { | |
8c30b1a7 AK |
146 | int i, k; |
147 | /* Use the max bus number from ACPI here? */ | |
44b940c2 | 148 | for (k = 0; k < MAX_CHECK_BUS; k++) { |
8c30b1a7 AK |
149 | for (i = 0; i < 32; i++) { |
150 | u32 val1; | |
151 | char __iomem *addr; | |
152 | ||
153 | pci_conf1_read(0, k, PCI_DEVFN(i,0), 0, 4, &val1); | |
154 | if (val1 == 0xffffffff) | |
155 | continue; | |
156 | addr = pci_dev_base(0, k, PCI_DEVFN(i, 0)); | |
157 | if (addr == NULL|| readl(addr) != val1) { | |
158 | set_bit(i + 32*k, fallback_slots); | |
40bee2ee BG |
159 | printk(KERN_NOTICE "PCI: No mmconfig possible" |
160 | " on device %02x:%02x\n", k, i); | |
8c30b1a7 | 161 | } |
d6ece549 AK |
162 | } |
163 | } | |
164 | } | |
165 | ||
5e544d61 | 166 | void __init pci_mmcfg_init(int type) |
1da177e4 | 167 | { |
1cde8a16 GKH |
168 | int i; |
169 | ||
79e453d4 | 170 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) |
3d1712c9 | 171 | return; |
54549391 GKH |
172 | |
173 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); | |
174 | if ((pci_mmcfg_config_num == 0) || | |
175 | (pci_mmcfg_config == NULL) || | |
176 | (pci_mmcfg_config[0].base_address == 0)) | |
3d1712c9 | 177 | return; |
1da177e4 | 178 | |
9abd7928 AK |
179 | /* Only do this check when type 1 works. If it doesn't work |
180 | assume we run on a Mac and always use MCFG */ | |
181 | if (type == 1 && !e820_all_mapped(pci_mmcfg_config[0].base_address, | |
79e453d4 LT |
182 | pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN, |
183 | E820_RESERVED)) { | |
184 | printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n", | |
185 | pci_mmcfg_config[0].base_address); | |
186 | printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); | |
187 | return; | |
188 | } | |
189 | ||
1cde8a16 GKH |
190 | pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL); |
191 | if (pci_mmcfg_virt == NULL) { | |
3095fc0c | 192 | printk(KERN_ERR "PCI: Can not allocate memory for mmconfig structures\n"); |
3d1712c9 | 193 | return; |
1cde8a16 GKH |
194 | } |
195 | for (i = 0; i < pci_mmcfg_config_num; ++i) { | |
196 | pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i]; | |
ead2bfeb CE |
197 | pci_mmcfg_virt[i].virt = ioremap_nocache(pci_mmcfg_config[i].base_address, |
198 | MMCONFIG_APER_MAX); | |
1cde8a16 | 199 | if (!pci_mmcfg_virt[i].virt) { |
3095fc0c DJ |
200 | printk(KERN_ERR "PCI: Cannot map mmconfig aperture for " |
201 | "segment %d\n", | |
1cde8a16 | 202 | pci_mmcfg_config[i].pci_segment_group_number); |
3d1712c9 | 203 | return; |
1cde8a16 GKH |
204 | } |
205 | printk(KERN_INFO "PCI: Using MMCONFIG at %x\n", pci_mmcfg_config[i].base_address); | |
206 | } | |
1da177e4 | 207 | |
d6ece549 AK |
208 | unreachable_devices(); |
209 | ||
1da177e4 LT |
210 | raw_pci_ops = &pci_mmcfg; |
211 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; | |
1da177e4 | 212 | } |