Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * mmconfig.c - Low-level direct PCI config space access via MMCONFIG | |
15a58ed1 | 3 | * |
1da177e4 LT |
4 | * This is an 64bit optimized version that always keeps the full mmconfig |
5 | * space mapped. This allows lockless config space operation. | |
6 | */ | |
7 | ||
8 | #include <linux/pci.h> | |
9 | #include <linux/init.h> | |
54549391 | 10 | #include <linux/acpi.h> |
d6ece549 | 11 | #include <linux/bitmap.h> |
946f2ee5 AV |
12 | #include <asm/e820.h> |
13 | ||
1da177e4 LT |
14 | #include "pci.h" |
15 | ||
1da177e4 | 16 | /* Static virtual mapping of the MMCONFIG aperture */ |
1cde8a16 | 17 | struct mmcfg_virt { |
15a58ed1 | 18 | struct acpi_mcfg_allocation *cfg; |
8b8a4e33 | 19 | char __iomem *virt; |
1cde8a16 GKH |
20 | }; |
21 | static struct mmcfg_virt *pci_mmcfg_virt; | |
1da177e4 | 22 | |
8b8a4e33 | 23 | static char __iomem *get_virt(unsigned int seg, unsigned bus) |
1da177e4 | 24 | { |
15a58ed1 | 25 | struct acpi_mcfg_allocation *cfg; |
429d512e | 26 | int cfg_num; |
1cde8a16 | 27 | |
429d512e | 28 | for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) { |
1cde8a16 | 29 | cfg = pci_mmcfg_virt[cfg_num].cfg; |
429d512e OH |
30 | if (cfg->pci_segment == seg && |
31 | (cfg->start_bus_number <= bus) && | |
1cde8a16 GKH |
32 | (cfg->end_bus_number >= bus)) |
33 | return pci_mmcfg_virt[cfg_num].virt; | |
34 | } | |
3103039c | 35 | |
3103039c | 36 | /* Fall back to type 0 */ |
cc59853b | 37 | return NULL; |
1cde8a16 GKH |
38 | } |
39 | ||
8b8a4e33 | 40 | static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) |
1cde8a16 | 41 | { |
8b8a4e33 | 42 | char __iomem *addr; |
b7867394 OG |
43 | if (seg == 0 && bus < PCI_MMCFG_MAX_CHECK_BUS && |
44 | test_bit(32*bus + PCI_SLOT(devfn), pci_mmcfg_fallback_slots)) | |
d6ece549 AK |
45 | return NULL; |
46 | addr = get_virt(seg, bus); | |
928cf8c6 AK |
47 | if (!addr) |
48 | return NULL; | |
49 | return addr + ((bus << 20) | (devfn << 12)); | |
1da177e4 LT |
50 | } |
51 | ||
52 | static int pci_mmcfg_read(unsigned int seg, unsigned int bus, | |
53 | unsigned int devfn, int reg, int len, u32 *value) | |
54 | { | |
8b8a4e33 | 55 | char __iomem *addr; |
1da177e4 | 56 | |
928cf8c6 | 57 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
ecc16ba9 | 58 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { |
49c93e84 | 59 | *value = -1; |
1da177e4 | 60 | return -EINVAL; |
49c93e84 | 61 | } |
1da177e4 | 62 | |
928cf8c6 AK |
63 | addr = pci_dev_base(seg, bus, devfn); |
64 | if (!addr) | |
65 | return pci_conf1_read(seg,bus,devfn,reg,len,value); | |
66 | ||
1da177e4 LT |
67 | switch (len) { |
68 | case 1: | |
69 | *value = readb(addr + reg); | |
70 | break; | |
71 | case 2: | |
72 | *value = readw(addr + reg); | |
73 | break; | |
74 | case 4: | |
75 | *value = readl(addr + reg); | |
76 | break; | |
77 | } | |
78 | ||
79 | return 0; | |
80 | } | |
81 | ||
82 | static int pci_mmcfg_write(unsigned int seg, unsigned int bus, | |
83 | unsigned int devfn, int reg, int len, u32 value) | |
84 | { | |
8b8a4e33 | 85 | char __iomem *addr; |
1da177e4 | 86 | |
928cf8c6 | 87 | /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ |
1da177e4 LT |
88 | if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) |
89 | return -EINVAL; | |
90 | ||
928cf8c6 AK |
91 | addr = pci_dev_base(seg, bus, devfn); |
92 | if (!addr) | |
93 | return pci_conf1_write(seg,bus,devfn,reg,len,value); | |
94 | ||
1da177e4 LT |
95 | switch (len) { |
96 | case 1: | |
97 | writeb(value, addr + reg); | |
98 | break; | |
99 | case 2: | |
100 | writew(value, addr + reg); | |
101 | break; | |
102 | case 4: | |
103 | writel(value, addr + reg); | |
104 | break; | |
105 | } | |
106 | ||
107 | return 0; | |
108 | } | |
109 | ||
110 | static struct pci_raw_ops pci_mmcfg = { | |
111 | .read = pci_mmcfg_read, | |
112 | .write = pci_mmcfg_write, | |
113 | }; | |
114 | ||
44de0203 OH |
115 | static void __iomem * __init mcfg_ioremap(struct acpi_mcfg_allocation *cfg) |
116 | { | |
117 | void __iomem *addr; | |
118 | u32 size; | |
119 | ||
120 | size = (cfg->end_bus_number + 1) << 20; | |
121 | addr = ioremap_nocache(cfg->address, size); | |
122 | if (addr) { | |
123 | printk(KERN_INFO "PCI: Using MMCONFIG at %Lx - %Lx\n", | |
124 | cfg->address, cfg->address + size - 1); | |
125 | } | |
126 | return addr; | |
127 | } | |
128 | ||
56829d19 OH |
129 | int __init pci_mmcfg_arch_reachable(unsigned int seg, unsigned int bus, |
130 | unsigned int devfn) | |
131 | { | |
132 | return pci_dev_base(seg, bus, devfn) != NULL; | |
133 | } | |
134 | ||
b7867394 | 135 | int __init pci_mmcfg_arch_init(void) |
1da177e4 | 136 | { |
1cde8a16 | 137 | int i; |
b7867394 OG |
138 | pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * |
139 | pci_mmcfg_config_num, GFP_KERNEL); | |
1cde8a16 | 140 | if (pci_mmcfg_virt == NULL) { |
3095fc0c | 141 | printk(KERN_ERR "PCI: Can not allocate memory for mmconfig structures\n"); |
b7867394 | 142 | return 0; |
1cde8a16 | 143 | } |
b7867394 | 144 | |
1cde8a16 GKH |
145 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
146 | pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i]; | |
faed197b | 147 | pci_mmcfg_virt[i].virt = mcfg_ioremap(&pci_mmcfg_config[i]); |
1cde8a16 | 148 | if (!pci_mmcfg_virt[i].virt) { |
3095fc0c DJ |
149 | printk(KERN_ERR "PCI: Cannot map mmconfig aperture for " |
150 | "segment %d\n", | |
15a58ed1 | 151 | pci_mmcfg_config[i].pci_segment); |
b7867394 | 152 | return 0; |
1cde8a16 | 153 | } |
1cde8a16 | 154 | } |
1da177e4 | 155 | raw_pci_ops = &pci_mmcfg; |
b7867394 | 156 | return 1; |
1da177e4 | 157 | } |