[deliverable/linux.git] / arch / xtensa / include / asm / elf.h

/*
 * include/asm-xtensa/elf.h
 *
 * ELF register definitions
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2005 Tensilica Inc.
 */

#ifndef _XTENSA_ELF_H
#define _XTENSA_ELF_H

#include <asm/ptrace.h>
#include <asm/coprocessor.h>

/* Xtensa processor ELF architecture-magic number */

#define EM_XTENSA	94
#define EM_XTENSA_OLD	0xABC7

/* Xtensa relocations defined by the ABIs */

#define R_XTENSA_NONE           0
#define R_XTENSA_32             1
#define R_XTENSA_RTLD           2
#define R_XTENSA_GLOB_DAT       3
#define R_XTENSA_JMP_SLOT       4
#define R_XTENSA_RELATIVE       5
#define R_XTENSA_PLT            6
#define R_XTENSA_OP0            8
#define R_XTENSA_OP1            9
#define R_XTENSA_OP2            10
#define R_XTENSA_ASM_EXPAND	11
#define R_XTENSA_ASM_SIMPLIFY	12
#define R_XTENSA_GNU_VTINHERIT	15
#define R_XTENSA_GNU_VTENTRY	16
#define R_XTENSA_DIFF8		17
#define R_XTENSA_DIFF16		18
#define R_XTENSA_DIFF32		19
#define R_XTENSA_SLOT0_OP	20
#define R_XTENSA_SLOT1_OP	21
#define R_XTENSA_SLOT2_OP	22
#define R_XTENSA_SLOT3_OP	23
#define R_XTENSA_SLOT4_OP	24
#define R_XTENSA_SLOT5_OP	25
#define R_XTENSA_SLOT6_OP	26
#define R_XTENSA_SLOT7_OP	27
#define R_XTENSA_SLOT8_OP	28
#define R_XTENSA_SLOT9_OP	29
#define R_XTENSA_SLOT10_OP	30
#define R_XTENSA_SLOT11_OP	31
#define R_XTENSA_SLOT12_OP	32
#define R_XTENSA_SLOT13_OP	33
#define R_XTENSA_SLOT14_OP	34
#define R_XTENSA_SLOT0_ALT	35
#define R_XTENSA_SLOT1_ALT	36
#define R_XTENSA_SLOT2_ALT	37
#define R_XTENSA_SLOT3_ALT	38
#define R_XTENSA_SLOT4_ALT	39
#define R_XTENSA_SLOT5_ALT	40
#define R_XTENSA_SLOT6_ALT	41
#define R_XTENSA_SLOT7_ALT	42
#define R_XTENSA_SLOT8_ALT	43
#define R_XTENSA_SLOT9_ALT	44
#define R_XTENSA_SLOT10_ALT	45
#define R_XTENSA_SLOT11_ALT	46
#define R_XTENSA_SLOT12_ALT	47
#define R_XTENSA_SLOT13_ALT	48
#define R_XTENSA_SLOT14_ALT	49

/* ELF register definitions. This is needed for core dump support.  */

typedef unsigned long elf_greg_t;

typedef struct {
	elf_greg_t pc;
	elf_greg_t ps;
	elf_greg_t lbeg;
	elf_greg_t lend;
	elf_greg_t lcount;
	elf_greg_t sar;
	elf_greg_t windowstart;
	elf_greg_t windowbase;
	elf_greg_t reserved[8+48];
	elf_greg_t a[64];
} xtensa_gregset_t;

#define ELF_NGREG	(sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))

typedef elf_greg_t elf_gregset_t[ELF_NGREG];

#define ELF_NFPREG	18

typedef unsigned int elf_fpreg_t;
typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];

#define ELF_CORE_COPY_REGS(_eregs, _pregs) 				\
	xtensa_elf_core_copy_regs ((xtensa_gregset_t*)&(_eregs), _pregs);

extern void xtensa_elf_core_copy_regs (xtensa_gregset_t *, struct pt_regs *);

/*
 * This is used to ensure we don't load something for the wrong architecture.
 */

#define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA )  || \
			    ( (x)->e_machine == EM_XTENSA_OLD ) )

/*
 * These are used to set parameters in the core dumps.
 */

#ifdef __XTENSA_EL__
# define ELF_DATA	ELFDATA2LSB
#elif defined(__XTENSA_EB__)
# define ELF_DATA	ELFDATA2MSB
#else
# error processor byte order undefined!
#endif

#define ELF_CLASS	ELFCLASS32
#define ELF_ARCH	EM_XTENSA

#define ELF_EXEC_PAGESIZE	PAGE_SIZE

/*
 * This is the location that an ET_DYN program is loaded if exec'ed.  Typical
 * use of this is to invoke "./ld.so someprog" to test out a new version of
 * the loader.  We need to make sure that it is out of the way of the program
 * that it will "exec", and that there is sufficient room for the brk.
 */

#define ELF_ET_DYN_BASE         (2 * TASK_SIZE / 3)

/*
 * This yields a mask that user programs can use to figure out what
 * instruction set this CPU supports.  This could be done in user space,
 * but it's not easy, and we've already done it here.
 */

#define ELF_HWCAP	(0)

/*
 * This yields a string that ld.so will use to load implementation
 * specific libraries for optimization.  This is more specific in
 * intent than poking at uname or /proc/cpuinfo.
 * For the moment, we have only optimizations for the Intel generations,
 * but that could change...
 */

#define ELF_PLATFORM  (NULL)

/*
 * The Xtensa processor ABI says that when the program starts, a2
 * contains a pointer to a function which might be registered using
 * `atexit'.  This provides a mean for the dynamic linker to call
 * DT_FINI functions for shared libraries that have been loaded before
 * the code runs.
 *
 * A value of 0 tells we have no such handler.
 *
 * We might as well make sure everything else is cleared too (except
 * for the stack pointer in a1), just to make things more
 * deterministic.  Also, clearing a0 terminates debugger backtraces.
 */

#define ELF_PLAT_INIT(_r, load_addr) \
  do { _r->areg[0]=0; /*_r->areg[1]=0;*/ _r->areg[2]=0;  _r->areg[3]=0;  \
       _r->areg[4]=0;  _r->areg[5]=0;    _r->areg[6]=0;  _r->areg[7]=0;  \
       _r->areg[8]=0;  _r->areg[9]=0;    _r->areg[10]=0; _r->areg[11]=0; \
       _r->areg[12]=0; _r->areg[13]=0;   _r->areg[14]=0; _r->areg[15]=0; \
  } while (0)

typedef struct {
	xtregs_opt_t	opt;
	xtregs_user_t	user;
#if XTENSA_HAVE_COPROCESSORS
	xtregs_cp0_t	cp0;
	xtregs_cp1_t	cp1;
	xtregs_cp2_t	cp2;
	xtregs_cp3_t	cp3;
	xtregs_cp4_t	cp4;
	xtregs_cp5_t	cp5;
	xtregs_cp6_t	cp6;
	xtregs_cp7_t	cp7;
#endif
} elf_xtregs_t;

#define SET_PERSONALITY(ex) \
	set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK)))

struct task_struct;

extern void do_copy_regs (xtensa_gregset_t*, struct pt_regs*,
			  struct task_struct*);
extern void do_restore_regs (xtensa_gregset_t*, struct pt_regs*,
			     struct task_struct*);
extern void do_save_fpregs (elf_fpregset_t*, struct pt_regs*,
			    struct task_struct*);
extern int do_restore_fpregs (elf_fpregset_t*, struct pt_regs*,
			      struct task_struct*);

#endif	/* _XTENSA_ELF_H */
Commit	Line	Data
9a8fd558 CZ	1	/*
	2	* include/asm-xtensa/elf.h
	3	*
	4	* ELF register definitions
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*
	10	* Copyright (C) 2001 - 2005 Tensilica Inc.
	11	*/
	12
	13	#ifndef _XTENSA_ELF_H
	14	#define _XTENSA_ELF_H
	15
	16	#include <asm/ptrace.h>
4573e398	17	#include <asm/coprocessor.h>
9a8fd558 CZ	18
	19	/* Xtensa processor ELF architecture-magic number */
	20
	21	#define EM_XTENSA 94
	22	#define EM_XTENSA_OLD 0xABC7
	23
ff6fd469 CZ	24	/* Xtensa relocations defined by the ABIs */
	25
	26	#define R_XTENSA_NONE 0
	27	#define R_XTENSA_32 1
	28	#define R_XTENSA_RTLD 2
	29	#define R_XTENSA_GLOB_DAT 3
	30	#define R_XTENSA_JMP_SLOT 4
	31	#define R_XTENSA_RELATIVE 5
	32	#define R_XTENSA_PLT 6
	33	#define R_XTENSA_OP0 8
	34	#define R_XTENSA_OP1 9
	35	#define R_XTENSA_OP2 10
	36	#define R_XTENSA_ASM_EXPAND 11
	37	#define R_XTENSA_ASM_SIMPLIFY 12
	38	#define R_XTENSA_GNU_VTINHERIT 15
	39	#define R_XTENSA_GNU_VTENTRY 16
	40	#define R_XTENSA_DIFF8 17
	41	#define R_XTENSA_DIFF16 18
	42	#define R_XTENSA_DIFF32 19
	43	#define R_XTENSA_SLOT0_OP 20
	44	#define R_XTENSA_SLOT1_OP 21
	45	#define R_XTENSA_SLOT2_OP 22
	46	#define R_XTENSA_SLOT3_OP 23
	47	#define R_XTENSA_SLOT4_OP 24
	48	#define R_XTENSA_SLOT5_OP 25
	49	#define R_XTENSA_SLOT6_OP 26
	50	#define R_XTENSA_SLOT7_OP 27
	51	#define R_XTENSA_SLOT8_OP 28
	52	#define R_XTENSA_SLOT9_OP 29
	53	#define R_XTENSA_SLOT10_OP 30
	54	#define R_XTENSA_SLOT11_OP 31
	55	#define R_XTENSA_SLOT12_OP 32
	56	#define R_XTENSA_SLOT13_OP 33
	57	#define R_XTENSA_SLOT14_OP 34
	58	#define R_XTENSA_SLOT0_ALT 35
	59	#define R_XTENSA_SLOT1_ALT 36
	60	#define R_XTENSA_SLOT2_ALT 37
	61	#define R_XTENSA_SLOT3_ALT 38
	62	#define R_XTENSA_SLOT4_ALT 39
	63	#define R_XTENSA_SLOT5_ALT 40
	64	#define R_XTENSA_SLOT6_ALT 41
	65	#define R_XTENSA_SLOT7_ALT 42
	66	#define R_XTENSA_SLOT8_ALT 43
	67	#define R_XTENSA_SLOT9_ALT 44
	68	#define R_XTENSA_SLOT10_ALT 45
	69	#define R_XTENSA_SLOT11_ALT 46
	70	#define R_XTENSA_SLOT12_ALT 47
	71	#define R_XTENSA_SLOT13_ALT 48
	72	#define R_XTENSA_SLOT14_ALT 49
	73
9a8fd558 CZ	74	/* ELF register definitions. This is needed for core dump support. */
9a8fd558 CZ	75
9a8fd558 CZ	76	typedef unsigned long elf_greg_t;
	77
	78	typedef struct {
9a8fd558 CZ	79	elf_greg_t pc;
9a8fd558 CZ	80	elf_greg_t ps;
9a8fd558 CZ	81	elf_greg_t lbeg;
	82	elf_greg_t lend;
	83	elf_greg_t lcount;
	84	elf_greg_t sar;
8d7e8240	85	elf_greg_t windowstart;
42086cec CZ	86	elf_greg_t windowbase;
42086cec CZ	87	elf_greg_t reserved[8+48];
8d7e8240	88	elf_greg_t a[64];
9a8fd558 CZ	89	} xtensa_gregset_t;
	90
	91	#define ELF_NGREG (sizeof(xtensa_gregset_t) / sizeof(elf_greg_t))
	92
	93	typedef elf_greg_t elf_gregset_t[ELF_NGREG];
	94
8d7e8240	95	#define ELF_NFPREG 18
9a8fd558 CZ	96
	97	typedef unsigned int elf_fpreg_t;
	98	typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
	99
	100	#define ELF_CORE_COPY_REGS(_eregs, _pregs) \
3e92501a	101	xtensa_elf_core_copy_regs ((xtensa_gregset_t*)&(_eregs), _pregs);
9a8fd558 CZ	102
	103	extern void xtensa_elf_core_copy_regs (xtensa_gregset_t , struct pt_regs );
	104
	105	/*
	106	* This is used to ensure we don't load something for the wrong architecture.
	107	*/
	108
	109	#define elf_check_arch(x) ( ( (x)->e_machine == EM_XTENSA ) \|\| \
	110	( (x)->e_machine == EM_XTENSA_OLD ) )
	111
	112	/*
	113	* These are used to set parameters in the core dumps.
	114	*/
	115
	116	#ifdef __XTENSA_EL__
	117	# define ELF_DATA ELFDATA2LSB
	118	#elif defined(__XTENSA_EB__)
	119	# define ELF_DATA ELFDATA2MSB
	120	#else
	121	# error processor byte order undefined!
	122	#endif
	123
	124	#define ELF_CLASS ELFCLASS32
	125	#define ELF_ARCH EM_XTENSA
	126
9a8fd558 CZ	127	#define ELF_EXEC_PAGESIZE PAGE_SIZE
	128
	129	/*
	130	* This is the location that an ET_DYN program is loaded if exec'ed. Typical
	131	* use of this is to invoke "./ld.so someprog" to test out a new version of
	132	* the loader. We need to make sure that it is out of the way of the program
	133	* that it will "exec", and that there is sufficient room for the brk.
	134	*/
	135
	136	#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
	137
	138	/*
	139	* This yields a mask that user programs can use to figure out what
	140	* instruction set this CPU supports. This could be done in user space,
	141	* but it's not easy, and we've already done it here.
	142	*/
	143
	144	#define ELF_HWCAP (0)
	145
	146	/*
	147	* This yields a string that ld.so will use to load implementation
	148	* specific libraries for optimization. This is more specific in
	149	* intent than poking at uname or /proc/cpuinfo.
	150	* For the moment, we have only optimizations for the Intel generations,
	151	* but that could change...
	152	*/
	153
	154	#define ELF_PLATFORM (NULL)
	155
	156	/*
	157	* The Xtensa processor ABI says that when the program starts, a2
	158	* contains a pointer to a function which might be registered using
	159	* `atexit'. This provides a mean for the dynamic linker to call
	160	* DT_FINI functions for shared libraries that have been loaded before
	161	* the code runs.
	162	*
	163	* A value of 0 tells we have no such handler.
	164	*
	165	* We might as well make sure everything else is cleared too (except
	166	* for the stack pointer in a1), just to make things more
	167	* deterministic. Also, clearing a0 terminates debugger backtraces.
	168	*/
	169
	170	#define ELF_PLAT_INIT(_r, load_addr) \
	171	do { _r->areg[0]=0; /_r->areg[1]=0;/ _r->areg[2]=0; _r->areg[3]=0; \
	172	_r->areg[4]=0; _r->areg[5]=0; _r->areg[6]=0; _r->areg[7]=0; \
	173	_r->areg[8]=0; _r->areg[9]=0; _r->areg[10]=0; _r->areg[11]=0; \
	174	_r->areg[12]=0; _r->areg[13]=0; _r->areg[14]=0; _r->areg[15]=0; \
	175	} while (0)
	176
c658eac6 CZ	177	typedef struct {
	178	xtregs_opt_t opt;
	179	xtregs_user_t user;
	180	#if XTENSA_HAVE_COPROCESSORS
	181	xtregs_cp0_t cp0;
	182	xtregs_cp1_t cp1;
	183	xtregs_cp2_t cp2;
	184	xtregs_cp3_t cp3;
	185	xtregs_cp4_t cp4;
	186	xtregs_cp5_t cp5;
	187	xtregs_cp6_t cp6;
	188	xtregs_cp7_t cp7;
	189	#endif
	190	} elf_xtregs_t;
	191
16f3e95b JK	192	#define SET_PERSONALITY(ex) \
16f3e95b JK	193	set_personality(PER_LINUX_32BIT \| (current->personality & (~PER_MASK)))
9a8fd558	194
8c65b4a6 TS	195	struct task_struct;
8c65b4a6 TS	196
9a8fd558 CZ	197	extern void do_copy_regs (xtensa_gregset_t, struct pt_regs,
	198	struct task_struct*);
	199	extern void do_restore_regs (xtensa_gregset_t, struct pt_regs,
	200	struct task_struct*);
	201	extern void do_save_fpregs (elf_fpregset_t, struct pt_regs,
	202	struct task_struct*);
	203	extern int do_restore_fpregs (elf_fpregset_t, struct pt_regs,
	204	struct task_struct*);
	205
9a8fd558	206	#endif /* _XTENSA_ELF_H */