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9a8fd558 CZ |
1 | /* |
2 | * include/asm-xtensa/ptrace.h | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | |
9 | */ | |
9a8fd558 CZ |
10 | #ifndef _XTENSA_PTRACE_H |
11 | #define _XTENSA_PTRACE_H | |
12 | ||
83596729 | 13 | #include <uapi/asm/ptrace.h> |
9a8fd558 | 14 | |
c658eac6 | 15 | |
f22ab814 AB |
16 | #ifndef __ASSEMBLY__ |
17 | ||
4573e398 CZ |
18 | #include <asm/coprocessor.h> |
19 | ||
9a8fd558 CZ |
20 | /* |
21 | * This struct defines the way the registers are stored on the | |
22 | * kernel stack during a system call or other kernel entry. | |
23 | */ | |
24 | struct pt_regs { | |
25 | unsigned long pc; /* 4 */ | |
26 | unsigned long ps; /* 8 */ | |
27 | unsigned long depc; /* 12 */ | |
28 | unsigned long exccause; /* 16 */ | |
29 | unsigned long excvaddr; /* 20 */ | |
30 | unsigned long debugcause; /* 24 */ | |
31 | unsigned long wmask; /* 28 */ | |
32 | unsigned long lbeg; /* 32 */ | |
33 | unsigned long lend; /* 36 */ | |
34 | unsigned long lcount; /* 40 */ | |
35 | unsigned long sar; /* 44 */ | |
36 | unsigned long windowbase; /* 48 */ | |
37 | unsigned long windowstart; /* 52 */ | |
38 | unsigned long syscall; /* 56 */ | |
29c4dfd9 | 39 | unsigned long icountlevel; /* 60 */ |
733536b8 | 40 | unsigned long scompare1; /* 64 */ |
c50842df | 41 | unsigned long threadptr; /* 68 */ |
9a8fd558 | 42 | |
c658eac6 CZ |
43 | /* Additional configurable registers that are used by the compiler. */ |
44 | xtregs_opt_t xtregs_opt; | |
45 | ||
9a8fd558 CZ |
46 | /* Make sure the areg field is 16 bytes aligned. */ |
47 | int align[0] __attribute__ ((aligned(16))); | |
48 | ||
49 | /* current register frame. | |
50 | * Note: The ESF for kernel exceptions ends after 16 registers! | |
51 | */ | |
c50842df | 52 | unsigned long areg[16]; |
9a8fd558 CZ |
53 | }; |
54 | ||
367b8112 | 55 | #include <variant/core.h> |
de4f6e5b | 56 | |
6d75ca10 | 57 | # define arch_has_single_step() (1) |
04fe6faf | 58 | # define task_pt_regs(tsk) ((struct pt_regs*) \ |
c4c4594b | 59 | (task_stack_page(tsk) + KERNEL_STACK_SIZE - (XCHAL_NUM_AREGS-16)*4) - 1) |
9a8fd558 CZ |
60 | # define user_mode(regs) (((regs)->ps & 0x00000020)!=0) |
61 | # define instruction_pointer(regs) ((regs)->pc) | |
f615136c MF |
62 | # define return_pointer(regs) (MAKE_PC_FROM_RA((regs)->areg[0], \ |
63 | (regs)->areg[1])) | |
9a8fd558 CZ |
64 | |
65 | # ifndef CONFIG_SMP | |
66 | # define profile_pc(regs) instruction_pointer(regs) | |
f615136c MF |
67 | # else |
68 | # define profile_pc(regs) \ | |
69 | ({ \ | |
70 | in_lock_functions(instruction_pointer(regs)) ? \ | |
71 | return_pointer(regs) : instruction_pointer(regs); \ | |
72 | }) | |
9a8fd558 | 73 | # endif |
9a8fd558 | 74 | |
5208ba24 AV |
75 | #define user_stack_pointer(regs) ((regs)->areg[1]) |
76 | ||
9a8fd558 CZ |
77 | #else /* __ASSEMBLY__ */ |
78 | ||
0013a854 | 79 | # include <asm/asm-offsets.h> |
9a8fd558 | 80 | #define PT_REGS_OFFSET (KERNEL_STACK_SIZE - PT_USER_SIZE) |
9a8fd558 CZ |
81 | |
82 | #endif /* !__ASSEMBLY__ */ | |
f22ab814 | 83 | |
9a8fd558 | 84 | #endif /* _XTENSA_PTRACE_H */ |