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5a0015d6 CZ |
1 | /* |
2 | * arch/xtensa/pcibios.c | |
3 | * | |
4 | * PCI bios-type initialisation for PCI machines | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | * | |
11 | * Copyright (C) 2001-2005 Tensilica Inc. | |
12 | * | |
13 | * Based largely on work from Cort (ppc/kernel/pci.c) | |
14 | * IO functions copied from sparc. | |
15 | * | |
16 | * Chris Zankel <chris@zankel.net> | |
17 | * | |
18 | */ | |
19 | ||
20 | #include <linux/config.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/pci.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/string.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/errno.h> | |
28 | #include <linux/bootmem.h> | |
29 | ||
30 | #include <asm/pci-bridge.h> | |
31 | #include <asm/platform.h> | |
32 | ||
33 | #undef DEBUG | |
34 | ||
35 | #ifdef DEBUG | |
36 | #define DBG(x...) printk(x) | |
37 | #else | |
38 | #define DBG(x...) | |
39 | #endif | |
40 | ||
41 | /* PCI Controller */ | |
42 | ||
43 | ||
44 | /* | |
45 | * pcibios_alloc_controller | |
46 | * pcibios_enable_device | |
47 | * pcibios_fixups | |
48 | * pcibios_align_resource | |
49 | * pcibios_fixup_bus | |
50 | * pcibios_setup | |
51 | * pci_bus_add_device | |
52 | * pci_mmap_page_range | |
53 | */ | |
54 | ||
55 | struct pci_controller* pci_ctrl_head; | |
56 | struct pci_controller** pci_ctrl_tail = &pci_ctrl_head; | |
57 | ||
58 | static int pci_bus_count; | |
59 | ||
60 | static void pcibios_fixup_resources(struct pci_dev* dev); | |
61 | ||
62 | #if 0 // FIXME | |
63 | struct pci_fixup pcibios_fixups[] = { | |
64 | { DECLARE_PCI_FIXUP_HEADER, PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources }, | |
65 | { 0 } | |
66 | }; | |
67 | #endif | |
68 | ||
69 | void | |
70 | pcibios_update_resource(struct pci_dev *dev, struct resource *root, | |
71 | struct resource *res, int resource) | |
72 | { | |
73 | u32 new, check, mask; | |
74 | int reg; | |
75 | struct pci_controller* pci_ctrl = dev->sysdata; | |
76 | ||
77 | new = res->start; | |
78 | if (pci_ctrl && res->flags & IORESOURCE_IO) { | |
79 | new -= pci_ctrl->io_space.base; | |
80 | } | |
81 | new |= (res->flags & PCI_REGION_FLAG_MASK); | |
82 | if (resource < 6) { | |
83 | reg = PCI_BASE_ADDRESS_0 + 4*resource; | |
84 | } else if (resource == PCI_ROM_RESOURCE) { | |
85 | res->flags |= PCI_ROM_ADDRESS_ENABLE; | |
86 | reg = dev->rom_base_reg; | |
87 | } else { | |
88 | /* Somebody might have asked allocation of a non-standard resource */ | |
89 | return; | |
90 | } | |
91 | ||
92 | pci_write_config_dword(dev, reg, new); | |
93 | pci_read_config_dword(dev, reg, &check); | |
94 | mask = (new & PCI_BASE_ADDRESS_SPACE_IO) ? | |
95 | PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK; | |
96 | ||
97 | if ((new ^ check) & mask) { | |
98 | printk(KERN_ERR "PCI: Error while updating region " | |
99 | "%s/%d (%08x != %08x)\n", dev->slot_name, resource, | |
100 | new, check); | |
101 | } | |
102 | } | |
103 | ||
104 | /* | |
105 | * We need to avoid collisions with `mirrored' VGA ports | |
106 | * and other strange ISA hardware, so we always want the | |
107 | * addresses to be allocated in the 0x000-0x0ff region | |
108 | * modulo 0x400. | |
109 | * | |
110 | * Why? Because some silly external IO cards only decode | |
111 | * the low 10 bits of the IO address. The 0x00-0xff region | |
112 | * is reserved for motherboard devices that decode all 16 | |
113 | * bits, so it's ok to allocate at, say, 0x2800-0x28ff, | |
114 | * but we want to try to avoid allocating at 0x2900-0x2bff | |
115 | * which might have be mirrored at 0x0100-0x03ff.. | |
116 | */ | |
117 | void | |
118 | pcibios_align_resource(void *data, struct resource *res, unsigned long size, | |
119 | unsigned long align) | |
120 | { | |
121 | struct pci_dev *dev = data; | |
122 | ||
123 | if (res->flags & IORESOURCE_IO) { | |
124 | unsigned long start = res->start; | |
125 | ||
126 | if (size > 0x100) { | |
127 | printk(KERN_ERR "PCI: I/O Region %s/%d too large" | |
128 | " (%ld bytes)\n", dev->slot_name, | |
129 | dev->resource - res, size); | |
130 | } | |
131 | ||
132 | if (start & 0x300) { | |
133 | start = (start + 0x3ff) & ~0x3ff; | |
134 | res->start = start; | |
135 | } | |
136 | } | |
137 | } | |
138 | ||
139 | int | |
140 | pcibios_enable_resources(struct pci_dev *dev, int mask) | |
141 | { | |
142 | u16 cmd, old_cmd; | |
143 | int idx; | |
144 | struct resource *r; | |
145 | ||
146 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | |
147 | old_cmd = cmd; | |
148 | for(idx=0; idx<6; idx++) { | |
149 | r = &dev->resource[idx]; | |
150 | if (!r->start && r->end) { | |
151 | printk (KERN_ERR "PCI: Device %s not available because " | |
152 | "of resource collisions\n", dev->slot_name); | |
153 | return -EINVAL; | |
154 | } | |
155 | if (r->flags & IORESOURCE_IO) | |
156 | cmd |= PCI_COMMAND_IO; | |
157 | if (r->flags & IORESOURCE_MEM) | |
158 | cmd |= PCI_COMMAND_MEMORY; | |
159 | } | |
160 | if (dev->resource[PCI_ROM_RESOURCE].start) | |
161 | cmd |= PCI_COMMAND_MEMORY; | |
162 | if (cmd != old_cmd) { | |
163 | printk("PCI: Enabling device %s (%04x -> %04x)\n", | |
164 | dev->slot_name, old_cmd, cmd); | |
165 | pci_write_config_word(dev, PCI_COMMAND, cmd); | |
166 | } | |
167 | return 0; | |
168 | } | |
169 | ||
170 | struct pci_controller * __init pcibios_alloc_controller(void) | |
171 | { | |
172 | struct pci_controller *pci_ctrl; | |
173 | ||
174 | pci_ctrl = (struct pci_controller *)alloc_bootmem(sizeof(*pci_ctrl)); | |
175 | memset(pci_ctrl, 0, sizeof(struct pci_controller)); | |
176 | ||
177 | *pci_ctrl_tail = pci_ctrl; | |
178 | pci_ctrl_tail = &pci_ctrl->next; | |
179 | ||
180 | return pci_ctrl; | |
181 | } | |
182 | ||
183 | static int __init pcibios_init(void) | |
184 | { | |
185 | struct pci_controller *pci_ctrl; | |
186 | struct pci_bus *bus; | |
187 | int next_busno = 0, i; | |
188 | ||
189 | printk("PCI: Probing PCI hardware\n"); | |
190 | ||
191 | /* Scan all of the recorded PCI controllers. */ | |
192 | for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) { | |
193 | pci_ctrl->last_busno = 0xff; | |
194 | bus = pci_scan_bus(pci_ctrl->first_busno, pci_ctrl->ops, | |
195 | pci_ctrl); | |
196 | if (pci_ctrl->io_resource.flags) { | |
197 | unsigned long offs; | |
198 | ||
199 | offs = (unsigned long)pci_ctrl->io_space.base; | |
200 | pci_ctrl->io_resource.start += offs; | |
201 | pci_ctrl->io_resource.end += offs; | |
202 | bus->resource[0] = &pci_ctrl->io_resource; | |
203 | } | |
204 | for (i = 0; i < 3; ++i) | |
205 | if (pci_ctrl->mem_resources[i].flags) | |
206 | bus->resource[i+1] =&pci_ctrl->mem_resources[i]; | |
207 | pci_ctrl->bus = bus; | |
208 | pci_ctrl->last_busno = bus->subordinate; | |
209 | if (next_busno <= pci_ctrl->last_busno) | |
210 | next_busno = pci_ctrl->last_busno+1; | |
211 | } | |
212 | pci_bus_count = next_busno; | |
213 | ||
214 | return platform_pcibios_fixup(); | |
215 | } | |
216 | ||
217 | subsys_initcall(pcibios_init); | |
218 | ||
219 | void __init pcibios_fixup_bus(struct pci_bus *bus) | |
220 | { | |
221 | struct pci_controller *pci_ctrl = bus->sysdata; | |
222 | struct resource *res; | |
223 | unsigned long io_offset; | |
224 | int i; | |
225 | ||
226 | io_offset = (unsigned long)pci_ctrl->io_space.base; | |
227 | if (bus->parent == NULL) { | |
228 | /* this is a host bridge - fill in its resources */ | |
229 | pci_ctrl->bus = bus; | |
230 | ||
231 | bus->resource[0] = res = &pci_ctrl->io_resource; | |
232 | if (!res->flags) { | |
233 | if (io_offset) | |
234 | printk (KERN_ERR "I/O resource not set for host" | |
235 | " bridge %d\n", pci_ctrl->index); | |
236 | res->start = 0; | |
237 | res->end = IO_SPACE_LIMIT; | |
238 | res->flags = IORESOURCE_IO; | |
239 | } | |
240 | res->start += io_offset; | |
241 | res->end += io_offset; | |
242 | ||
243 | for (i = 0; i < 3; i++) { | |
244 | res = &pci_ctrl->mem_resources[i]; | |
245 | if (!res->flags) { | |
246 | if (i > 0) | |
247 | continue; | |
248 | printk(KERN_ERR "Memory resource not set for " | |
249 | "host bridge %d\n", pci_ctrl->index); | |
250 | res->start = 0; | |
251 | res->end = ~0U; | |
252 | res->flags = IORESOURCE_MEM; | |
253 | } | |
254 | bus->resource[i+1] = res; | |
255 | } | |
256 | } else { | |
257 | /* This is a subordinate bridge */ | |
258 | pci_read_bridge_bases(bus); | |
259 | ||
260 | for (i = 0; i < 4; i++) { | |
261 | if ((res = bus->resource[i]) == NULL || !res->flags) | |
262 | continue; | |
263 | if (io_offset && (res->flags & IORESOURCE_IO)) { | |
264 | res->start += io_offset; | |
265 | res->end += io_offset; | |
266 | } | |
267 | } | |
268 | } | |
269 | } | |
270 | ||
271 | char __init *pcibios_setup(char *str) | |
272 | { | |
273 | return str; | |
274 | } | |
275 | ||
276 | /* the next one is stolen from the alpha port... */ | |
277 | ||
278 | void __init | |
279 | pcibios_update_irq(struct pci_dev *dev, int irq) | |
280 | { | |
281 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); | |
282 | } | |
283 | ||
284 | int pcibios_enable_device(struct pci_dev *dev, int mask) | |
285 | { | |
286 | u16 cmd, old_cmd; | |
287 | int idx; | |
288 | struct resource *r; | |
289 | ||
290 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | |
291 | old_cmd = cmd; | |
292 | for (idx=0; idx<6; idx++) { | |
293 | r = &dev->resource[idx]; | |
294 | if (!r->start && r->end) { | |
295 | printk(KERN_ERR "PCI: Device %s not available because " | |
296 | "of resource collisions\n", dev->slot_name); | |
297 | return -EINVAL; | |
298 | } | |
299 | if (r->flags & IORESOURCE_IO) | |
300 | cmd |= PCI_COMMAND_IO; | |
301 | if (r->flags & IORESOURCE_MEM) | |
302 | cmd |= PCI_COMMAND_MEMORY; | |
303 | } | |
304 | if (cmd != old_cmd) { | |
305 | printk("PCI: Enabling device %s (%04x -> %04x)\n", | |
306 | dev->slot_name, old_cmd, cmd); | |
307 | pci_write_config_word(dev, PCI_COMMAND, cmd); | |
308 | } | |
309 | ||
310 | return 0; | |
311 | } | |
312 | ||
313 | #ifdef CONFIG_PROC_FS | |
314 | ||
315 | /* | |
316 | * Return the index of the PCI controller for device pdev. | |
317 | */ | |
318 | ||
319 | int | |
320 | pci_controller_num(struct pci_dev *dev) | |
321 | { | |
322 | struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata; | |
323 | return pci_ctrl->index; | |
324 | } | |
325 | ||
326 | #endif /* CONFIG_PROC_FS */ | |
327 | ||
328 | ||
329 | static void | |
330 | pcibios_fixup_resources(struct pci_dev *dev) | |
331 | { | |
332 | struct pci_controller* pci_ctrl = (struct pci_controller *)dev->sysdata; | |
333 | int i; | |
334 | unsigned long offset; | |
335 | ||
336 | if (!pci_ctrl) { | |
337 | printk(KERN_ERR "No pci_ctrl for PCI dev %s!\n",dev->slot_name); | |
338 | return; | |
339 | } | |
340 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | |
341 | struct resource *res = dev->resource + i; | |
342 | if (!res->start || !res->flags) | |
343 | continue; | |
344 | if (res->end == 0xffffffff) { | |
345 | DBG("PCI:%s Resource %d [%08lx-%08lx] is unassigned\n", | |
346 | dev->slot_name, i, res->start, res->end); | |
347 | res->end -= res->start; | |
348 | res->start = 0; | |
349 | continue; | |
350 | } | |
351 | offset = 0; | |
352 | if (res->flags & IORESOURCE_IO) | |
353 | offset = (unsigned long) pci_ctrl->io_space.base; | |
354 | else if (res->flags & IORESOURCE_MEM) | |
355 | offset = (unsigned long) pci_ctrl->mem_space.base; | |
356 | ||
357 | if (offset != 0) { | |
358 | res->start += offset; | |
359 | res->end += offset; | |
360 | #ifdef DEBUG | |
361 | printk("Fixup res %d (%lx) of dev %s: %lx -> %lx\n", | |
362 | i, res->flags, dev->slot_name, | |
363 | res->start - offset, res->start); | |
364 | #endif | |
365 | } | |
366 | } | |
367 | } | |
368 | ||
369 | /* | |
370 | * Platform support for /proc/bus/pci/X/Y mmap()s, | |
371 | * modelled on the sparc64 implementation by Dave Miller. | |
372 | * -- paulus. | |
373 | */ | |
374 | ||
375 | /* | |
376 | * Adjust vm_pgoff of VMA such that it is the physical page offset | |
377 | * corresponding to the 32-bit pci bus offset for DEV requested by the user. | |
378 | * | |
379 | * Basically, the user finds the base address for his device which he wishes | |
380 | * to mmap. They read the 32-bit value from the config space base register, | |
381 | * add whatever PAGE_SIZE multiple offset they wish, and feed this into the | |
382 | * offset parameter of mmap on /proc/bus/pci/XXX for that device. | |
383 | * | |
384 | * Returns negative error code on failure, zero on success. | |
385 | */ | |
386 | static __inline__ int | |
387 | __pci_mmap_make_offset(struct pci_dev *dev, struct vm_area_struct *vma, | |
388 | enum pci_mmap_state mmap_state) | |
389 | { | |
390 | struct pci_controller *pci_ctrl = (struct pci_controller*) dev->sysdata; | |
391 | unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; | |
392 | unsigned long io_offset = 0; | |
393 | int i, res_bit; | |
394 | ||
395 | if (pci_ctrl == 0) | |
396 | return -EINVAL; /* should never happen */ | |
397 | ||
398 | /* If memory, add on the PCI bridge address offset */ | |
399 | if (mmap_state == pci_mmap_mem) { | |
400 | res_bit = IORESOURCE_MEM; | |
401 | } else { | |
402 | io_offset = (unsigned long)pci_ctrl->io_space.base; | |
403 | offset += io_offset; | |
404 | res_bit = IORESOURCE_IO; | |
405 | } | |
406 | ||
407 | /* | |
408 | * Check that the offset requested corresponds to one of the | |
409 | * resources of the device. | |
410 | */ | |
411 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | |
412 | struct resource *rp = &dev->resource[i]; | |
413 | int flags = rp->flags; | |
414 | ||
415 | /* treat ROM as memory (should be already) */ | |
416 | if (i == PCI_ROM_RESOURCE) | |
417 | flags |= IORESOURCE_MEM; | |
418 | ||
419 | /* Active and same type? */ | |
420 | if ((flags & res_bit) == 0) | |
421 | continue; | |
422 | ||
423 | /* In the range of this resource? */ | |
424 | if (offset < (rp->start & PAGE_MASK) || offset > rp->end) | |
425 | continue; | |
426 | ||
427 | /* found it! construct the final physical address */ | |
428 | if (mmap_state == pci_mmap_io) | |
429 | offset += pci_ctrl->io_space.start - io_offset; | |
430 | vma->vm_pgoff = offset >> PAGE_SHIFT; | |
431 | return 0; | |
432 | } | |
433 | ||
434 | return -EINVAL; | |
435 | } | |
436 | ||
437 | /* | |
438 | * Set vm_flags of VMA, as appropriate for this architecture, for a pci device | |
439 | * mapping. | |
440 | */ | |
441 | static __inline__ void | |
442 | __pci_mmap_set_flags(struct pci_dev *dev, struct vm_area_struct *vma, | |
443 | enum pci_mmap_state mmap_state) | |
444 | { | |
445 | vma->vm_flags |= VM_SHM | VM_LOCKED | VM_IO; | |
446 | } | |
447 | ||
448 | /* | |
449 | * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci | |
450 | * device mapping. | |
451 | */ | |
452 | static __inline__ void | |
453 | __pci_mmap_set_pgprot(struct pci_dev *dev, struct vm_area_struct *vma, | |
454 | enum pci_mmap_state mmap_state, int write_combine) | |
455 | { | |
456 | int prot = pgprot_val(vma->vm_page_prot); | |
457 | ||
458 | /* Set to write-through */ | |
459 | prot &= ~_PAGE_NO_CACHE; | |
460 | #if 0 | |
461 | if (!write_combine) | |
462 | prot |= _PAGE_WRITETHRU; | |
463 | #endif | |
464 | vma->vm_page_prot = __pgprot(prot); | |
465 | } | |
466 | ||
467 | /* | |
468 | * Perform the actual remap of the pages for a PCI device mapping, as | |
469 | * appropriate for this architecture. The region in the process to map | |
470 | * is described by vm_start and vm_end members of VMA, the base physical | |
471 | * address is found in vm_pgoff. | |
472 | * The pci device structure is provided so that architectures may make mapping | |
473 | * decisions on a per-device or per-bus basis. | |
474 | * | |
475 | * Returns a negative error code on failure, zero on success. | |
476 | */ | |
477 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
478 | enum pci_mmap_state mmap_state, | |
479 | int write_combine) | |
480 | { | |
481 | int ret; | |
482 | ||
483 | ret = __pci_mmap_make_offset(dev, vma, mmap_state); | |
484 | if (ret < 0) | |
485 | return ret; | |
486 | ||
487 | __pci_mmap_set_flags(dev, vma, mmap_state); | |
488 | __pci_mmap_set_pgprot(dev, vma, mmap_state, write_combine); | |
489 | ||
490 | ret = io_remap_page_range(vma, vma->vm_start, vma->vm_pgoff<<PAGE_SHIFT, | |
491 | vma->vm_end - vma->vm_start, vma->vm_page_prot); | |
492 | ||
493 | return ret; | |
494 | } | |
495 | ||
496 | /* | |
497 | * This probably belongs here rather than ioport.c because | |
498 | * we do not want this crud linked into SBus kernels. | |
499 | * Also, think for a moment about likes of floppy.c that | |
500 | * include architecture specific parts. They may want to redefine ins/outs. | |
501 | * | |
502 | * We do not use horroble macroses here because we want to | |
503 | * advance pointer by sizeof(size). | |
504 | */ | |
505 | void outsb(unsigned long addr, const void *src, unsigned long count) { | |
506 | while (count) { | |
507 | count -= 1; | |
508 | writeb(*(const char *)src, addr); | |
509 | src += 1; | |
510 | addr += 1; | |
511 | } | |
512 | } | |
513 | ||
514 | void outsw(unsigned long addr, const void *src, unsigned long count) { | |
515 | while (count) { | |
516 | count -= 2; | |
517 | writew(*(const short *)src, addr); | |
518 | src += 2; | |
519 | addr += 2; | |
520 | } | |
521 | } | |
522 | ||
523 | void outsl(unsigned long addr, const void *src, unsigned long count) { | |
524 | while (count) { | |
525 | count -= 4; | |
526 | writel(*(const long *)src, addr); | |
527 | src += 4; | |
528 | addr += 4; | |
529 | } | |
530 | } | |
531 | ||
532 | void insb(unsigned long addr, void *dst, unsigned long count) { | |
533 | while (count) { | |
534 | count -= 1; | |
535 | *(unsigned char *)dst = readb(addr); | |
536 | dst += 1; | |
537 | addr += 1; | |
538 | } | |
539 | } | |
540 | ||
541 | void insw(unsigned long addr, void *dst, unsigned long count) { | |
542 | while (count) { | |
543 | count -= 2; | |
544 | *(unsigned short *)dst = readw(addr); | |
545 | dst += 2; | |
546 | addr += 2; | |
547 | } | |
548 | } | |
549 | ||
550 | void insl(unsigned long addr, void *dst, unsigned long count) { | |
551 | while (count) { | |
552 | count -= 4; | |
553 | /* | |
554 | * XXX I am sure we are in for an unaligned trap here. | |
555 | */ | |
556 | *(unsigned long *)dst = readl(addr); | |
557 | dst += 4; | |
558 | addr += 4; | |
559 | } | |
560 | } | |
561 | ||
562 | ||
563 |