[deliverable/linux.git] / arch / xtensa / kernel / vmlinux.lds.S

/*
 * arch/xtensa/kernel/vmlinux.lds.S
 *
 * Xtensa linker script
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2008 Tensilica Inc.
 *
 * Chris Zankel <chris@zankel.net>
 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
 */

#include <asm-generic/vmlinux.lds.h>
#include <asm/page.h>
#include <asm/thread_info.h>

#include <asm/vectors.h>
#include <variant/core.h>
#include <platform/hardware.h>
OUTPUT_ARCH(xtensa)
ENTRY(_start)

#ifdef __XTENSA_EB__
jiffies = jiffies_64 + 4;
#else
jiffies = jiffies_64;
#endif

#ifndef KERNELOFFSET
#define KERNELOFFSET 0xd0003000
#endif

/* Note: In the following macros, it would be nice to specify only the
   vector name and section kind and construct "sym" and "section" using
   CPP concatenation, but that does not work reliably.  Concatenating a
   string with "." produces an invalid token.  CPP will not print a
   warning because it thinks this is an assembly file, but it leaves
   them as multiple tokens and there may or may not be whitespace
   between them.  */

/* Macro for a relocation entry */

#define RELOCATE_ENTRY(sym, section)		\
	LONG(sym ## _start);			\
	LONG(sym ## _end);			\
	LONG(LOADADDR(section))

/* Macro to define a section for a vector.
 *
 * Use of the MIN function catches the types of errors illustrated in
 * the following example:
 *
 * Assume the section .DoubleExceptionVector.literal is completely
 * full.  Then a programmer adds code to .DoubleExceptionVector.text
 * that produces another literal.  The final literal position will
 * overlay onto the first word of the adjacent code section
 * .DoubleExceptionVector.text.  (In practice, the literals will
 * overwrite the code, and the first few instructions will be
 * garbage.)
 */

#define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec)       \
  section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size,		    \
		         LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3)   \
  {									    \
    . = ALIGN(4);							    \
    sym ## _start = ABSOLUTE(.);		 			    \
    *(section)								    \
    sym ## _end = ABSOLUTE(.);						    \
  }

/*
 *  Mapping of input sections to output sections when linking.
 */

SECTIONS
{
  . = KERNELOFFSET;
  /* .text section */

  _text = .;
  _stext = .;

  .text :
  {
    /* The HEAD_TEXT section must be the first section! */
    HEAD_TEXT
    TEXT_TEXT
    VMLINUX_SYMBOL(__sched_text_start) = .;
    *(.sched.literal .sched.text)
    VMLINUX_SYMBOL(__sched_text_end) = .;
    VMLINUX_SYMBOL(__lock_text_start) = .;
    *(.spinlock.literal .spinlock.text)
    VMLINUX_SYMBOL(__lock_text_end) = .;

  }
  _etext = .;
  PROVIDE (etext = .);

  . = ALIGN(16);

  RODATA

  /*  Relocation table */

  .fixup   : { *(.fixup) }

  EXCEPTION_TABLE(16)
  /* Data section */

  _sdata = .;
  RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
  _edata = .;

  /* Initialization code and data: */

  . = ALIGN(PAGE_SIZE);
  __init_begin = .;
  INIT_TEXT_SECTION(PAGE_SIZE)

  .init.data :
  {
    INIT_DATA
    . = ALIGN(0x4);
    __tagtable_begin = .;
    *(.taglist)
    __tagtable_end = .;

    . = ALIGN(16);
    __boot_reloc_table_start = ABSOLUTE(.);

    RELOCATE_ENTRY(_WindowVectors_text,
		   .WindowVectors.text);
#if XCHAL_EXCM_LEVEL >= 2
    RELOCATE_ENTRY(_Level2InterruptVector_text,
		   .Level2InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 3
    RELOCATE_ENTRY(_Level3InterruptVector_text,
		   .Level3InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 4
    RELOCATE_ENTRY(_Level4InterruptVector_text,
		   .Level4InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 5
    RELOCATE_ENTRY(_Level5InterruptVector_text,
		   .Level5InterruptVector.text);
#endif
#if XCHAL_EXCM_LEVEL >= 6
    RELOCATE_ENTRY(_Level6InterruptVector_text,
		   .Level6InterruptVector.text);
#endif
    RELOCATE_ENTRY(_KernelExceptionVector_text,
		   .KernelExceptionVector.text);
    RELOCATE_ENTRY(_UserExceptionVector_text,
		   .UserExceptionVector.text);
    RELOCATE_ENTRY(_DoubleExceptionVector_literal,
		   .DoubleExceptionVector.literal);
    RELOCATE_ENTRY(_DoubleExceptionVector_text,
		   .DoubleExceptionVector.text);
    RELOCATE_ENTRY(_DebugInterruptVector_text,
		   .DebugInterruptVector.text);
#if defined(CONFIG_SMP)
    RELOCATE_ENTRY(_SecondaryResetVector_literal,
		   .SecondaryResetVector.literal);
    RELOCATE_ENTRY(_SecondaryResetVector_text,
		   .SecondaryResetVector.text);
#endif

  
    __boot_reloc_table_end = ABSOLUTE(.) ;

    INIT_SETUP(XCHAL_ICACHE_LINESIZE)
    INIT_CALLS
    CON_INITCALL
    SECURITY_INITCALL
    INIT_RAM_FS
  }

  PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)

  /* We need this dummy segment here */

  . = ALIGN(4);
  .dummy : { LONG(0) }

  /* The vectors are relocated to the real position at startup time */

  SECTION_VECTOR (_WindowVectors_text,
		  .WindowVectors.text,
		  WINDOW_VECTORS_VADDR, 4,
		  .dummy)
  SECTION_VECTOR (_DebugInterruptVector_literal,
		  .DebugInterruptVector.literal,
		  DEBUG_VECTOR_VADDR - 4,
		  SIZEOF(.WindowVectors.text),
		  .WindowVectors.text)
  SECTION_VECTOR (_DebugInterruptVector_text,
		  .DebugInterruptVector.text,
		  DEBUG_VECTOR_VADDR,
		  4,
		  .DebugInterruptVector.literal)
#undef LAST
#define LAST	.DebugInterruptVector.text
#if XCHAL_EXCM_LEVEL >= 2
  SECTION_VECTOR (_Level2InterruptVector_text,
		  .Level2InterruptVector.text,
		  INTLEVEL2_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level2InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 3
  SECTION_VECTOR (_Level3InterruptVector_text,
		  .Level3InterruptVector.text,
		  INTLEVEL3_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level3InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 4
  SECTION_VECTOR (_Level4InterruptVector_text,
		  .Level4InterruptVector.text,
		  INTLEVEL4_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level4InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 5
  SECTION_VECTOR (_Level5InterruptVector_text,
		  .Level5InterruptVector.text,
		  INTLEVEL5_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level5InterruptVector.text
#endif
#if XCHAL_EXCM_LEVEL >= 6
  SECTION_VECTOR (_Level6InterruptVector_text,
		  .Level6InterruptVector.text,
		  INTLEVEL6_VECTOR_VADDR,
		  SIZEOF(LAST), LAST)
# undef LAST
# define LAST	.Level6InterruptVector.text
#endif
  SECTION_VECTOR (_KernelExceptionVector_literal,
		  .KernelExceptionVector.literal,
		  KERNEL_VECTOR_VADDR - 4,
		  SIZEOF(LAST), LAST)
#undef LAST
  SECTION_VECTOR (_KernelExceptionVector_text,
		  .KernelExceptionVector.text,
		  KERNEL_VECTOR_VADDR,
		  4,
		  .KernelExceptionVector.literal)
  SECTION_VECTOR (_UserExceptionVector_literal,
		  .UserExceptionVector.literal,
		  USER_VECTOR_VADDR - 4,
		  SIZEOF(.KernelExceptionVector.text),
		  .KernelExceptionVector.text)
  SECTION_VECTOR (_UserExceptionVector_text,
		  .UserExceptionVector.text,
		  USER_VECTOR_VADDR,
		  4,
		  .UserExceptionVector.literal)
  SECTION_VECTOR (_DoubleExceptionVector_literal,
		  .DoubleExceptionVector.literal,
		  DOUBLEEXC_VECTOR_VADDR - 40,
		  SIZEOF(.UserExceptionVector.text),
		  .UserExceptionVector.text)
  SECTION_VECTOR (_DoubleExceptionVector_text,
		  .DoubleExceptionVector.text,
		  DOUBLEEXC_VECTOR_VADDR,
		  40,
		  .DoubleExceptionVector.literal)

  . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;

#if defined(CONFIG_SMP)

  SECTION_VECTOR (_SecondaryResetVector_literal,
		  .SecondaryResetVector.literal,
		  RESET_VECTOR1_VADDR - 4,
		  SIZEOF(.DoubleExceptionVector.text),
		  .DoubleExceptionVector.text)

  SECTION_VECTOR (_SecondaryResetVector_text,
		  .SecondaryResetVector.text,
		  RESET_VECTOR1_VADDR,
		  4,
		  .SecondaryResetVector.literal)

  . = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text);

#endif

  . = ALIGN(PAGE_SIZE);

  __init_end = .;

  BSS_SECTION(0, 8192, 0)

  _end = .;

  /* only used by the boot loader  */

  . = ALIGN(0x10);
  .bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }

  .ResetVector.text RESET_VECTOR_VADDR :
  {
    *(.ResetVector.text)
  }


  /*
   * This is a remapped copy of the Secondary Reset Vector Code.
   * It keeps gdb in sync with the PC after switching
   * to the temporary mapping used while setting up
   * the V2 MMU mappings for Linux.
   *
   * Only debug information about this section is put in the kernel image.
   */
  .SecondaryResetVector.remapped_text 0x46000000 (INFO):
  {
	*(.SecondaryResetVector.remapped_text)
  }


  .xt.lit : { *(.xt.lit) }
  .xt.prop : { *(.xt.prop) }

  .debug  0 :  { *(.debug) }
  .line  0 :  { *(.line) }
  .debug_srcinfo  0 :  { *(.debug_srcinfo) }
  .debug_sfnames  0 :  { *(.debug_sfnames) }
  .debug_aranges  0 :  { *(.debug_aranges) }
  .debug_pubnames  0 :  { *(.debug_pubnames) }
  .debug_info  0 :  { *(.debug_info) }
  .debug_abbrev  0 :  { *(.debug_abbrev) }
  .debug_line  0 :  { *(.debug_line) }
  .debug_frame  0 :  { *(.debug_frame) }
  .debug_str  0 :  { *(.debug_str) }
  .debug_loc  0 :  { *(.debug_loc) }
  .debug_macinfo  0 :  { *(.debug_macinfo) }
  .debug_weaknames  0 :  { *(.debug_weaknames) }
  .debug_funcnames  0 :  { *(.debug_funcnames) }
  .debug_typenames  0 :  { *(.debug_typenames) }
  .debug_varnames  0 :  { *(.debug_varnames) }

  .xt.insn 0 :
  {
    *(.xt.insn)
    *(.gnu.linkonce.x*)
  }

  .xt.lit 0 :
  {
    *(.xt.lit)
    *(.gnu.linkonce.p*)
  }

  /* Sections to be discarded */
  DISCARDS
  /DISCARD/ : { *(.exit.literal) }
}
Commit	Line	Data
5a0015d6 CZ	1	/*
	2	* arch/xtensa/kernel/vmlinux.lds.S
	3	*
	4	* Xtensa linker script
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*
2d1c645c	10	* Copyright (C) 2001 - 2008 Tensilica Inc.
5a0015d6 CZ	11	*
	12	* Chris Zankel <chris@zankel.net>
	13	* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
	14	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	15	*/
	16
	17	#include <asm-generic/vmlinux.lds.h>
cd3db323 TA	18	#include <asm/page.h>
cd3db323 TA	19	#include <asm/thread_info.h>
5a0015d6	20
e85e335f	21	#include <asm/vectors.h>
367b8112	22	#include <variant/core.h>
6770fa02	23	#include <platform/hardware.h>
5a0015d6 CZ	24	OUTPUT_ARCH(xtensa)
	25	ENTRY(_start)
	26
173d6681	27	#ifdef __XTENSA_EB__
5a0015d6 CZ	28	jiffies = jiffies_64 + 4;
	29	#else
	30	jiffies = jiffies_64;
	31	#endif
	32
6770fa02	33	#ifndef KERNELOFFSET
e85e335f	34	#define KERNELOFFSET 0xd0003000
6770fa02	35	#endif
5a0015d6 CZ	36
	37	/* Note: In the following macros, it would be nice to specify only the
	38	vector name and section kind and construct "sym" and "section" using
	39	CPP concatenation, but that does not work reliably. Concatenating a
	40	string with "." produces an invalid token. CPP will not print a
	41	warning because it thinks this is an assembly file, but it leaves
	42	them as multiple tokens and there may or may not be whitespace
	43	between them. */
	44
	45	/* Macro for a relocation entry */
	46
	47	#define RELOCATE_ENTRY(sym, section) \
	48	LONG(sym ## _start); \
	49	LONG(sym ## _end); \
	50	LONG(LOADADDR(section))
	51
	52	/* Macro to define a section for a vector.
	53	*
	54	* Use of the MIN function catches the types of errors illustrated in
	55	* the following example:
	56	*
	57	* Assume the section .DoubleExceptionVector.literal is completely
	58	* full. Then a programmer adds code to .DoubleExceptionVector.text
	59	* that produces another literal. The final literal position will
	60	* overlay onto the first word of the adjacent code section
	61	* .DoubleExceptionVector.text. (In practice, the literals will
	62	* overwrite the code, and the first few instructions will be
	63	* garbage.)
	64	*/
	65
	66	#define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec) \
	67	section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size, \
	68	LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \
	69	{ \
	70	. = ALIGN(4); \
	71	sym ## _start = ABSOLUTE(.); \
	72	*(section) \
	73	sym ## _end = ABSOLUTE(.); \
	74	}
	75
	76	/*
	77	* Mapping of input sections to output sections when linking.
	78	*/
	79
	80	SECTIONS
	81	{
173d6681	82	. = KERNELOFFSET;
5a0015d6 CZ	83	/* .text section */
	84
	85	_text = .;
	86	_stext = .;
5a0015d6 CZ	87
	88	.text :
	89	{
0ebdcb4d TA	90	/* The HEAD_TEXT section must be the first section! */
0ebdcb4d TA	91	HEAD_TEXT
78f3cdfa	92	TEXT_TEXT
5a0015d6	93	VMLINUX_SYMBOL(__sched_text_start) = .;
813e6783	94	*(.sched.literal .sched.text)
5a0015d6 CZ	95	VMLINUX_SYMBOL(__sched_text_end) = .;
5a0015d6 CZ	96	VMLINUX_SYMBOL(__lock_text_start) = .;
813e6783	97	*(.spinlock.literal .spinlock.text)
5a0015d6 CZ	98	VMLINUX_SYMBOL(__lock_text_end) = .;
	99
	100	}
	101	_etext = .;
de4f6e5b	102	PROVIDE (etext = .);
5a0015d6 CZ	103
	104	. = ALIGN(16);
	105
	106	RODATA
	107
	108	/* Relocation table */
	109
5a0015d6 CZ	110	.fixup : { *(.fixup) }
5a0015d6 CZ	111
cd3db323	112	EXCEPTION_TABLE(16)
5a0015d6 CZ	113	/* Data section */
5a0015d6 CZ	114
5e7b6ed8	115	_sdata = .;
cd3db323	116	RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
5a0015d6 CZ	117	_edata = .;
5a0015d6 CZ	118
5a0015d6 CZ	119	/* Initialization code and data: */
5a0015d6 CZ	120
cd3db323	121	. = ALIGN(PAGE_SIZE);
5a0015d6	122	__init_begin = .;
cd3db323	123	INIT_TEXT_SECTION(PAGE_SIZE)
5a0015d6 CZ	124
	125	.init.data :
	126	{
01ba2bdc	127	INIT_DATA
5a0015d6 CZ	128	. = ALIGN(0x4);
	129	__tagtable_begin = .;
	130	*(.taglist)
	131	__tagtable_end = .;
de4f6e5b CZ	132
	133	. = ALIGN(16);
	134	__boot_reloc_table_start = ABSOLUTE(.);
	135
	136	RELOCATE_ENTRY(_WindowVectors_text,
	137	.WindowVectors.text);
2d1c645c MG	138	#if XCHAL_EXCM_LEVEL >= 2
	139	RELOCATE_ENTRY(_Level2InterruptVector_text,
	140	.Level2InterruptVector.text);
	141	#endif
	142	#if XCHAL_EXCM_LEVEL >= 3
	143	RELOCATE_ENTRY(_Level3InterruptVector_text,
	144	.Level3InterruptVector.text);
	145	#endif
	146	#if XCHAL_EXCM_LEVEL >= 4
	147	RELOCATE_ENTRY(_Level4InterruptVector_text,
	148	.Level4InterruptVector.text);
	149	#endif
	150	#if XCHAL_EXCM_LEVEL >= 5
	151	RELOCATE_ENTRY(_Level5InterruptVector_text,
	152	.Level5InterruptVector.text);
	153	#endif
	154	#if XCHAL_EXCM_LEVEL >= 6
	155	RELOCATE_ENTRY(_Level6InterruptVector_text,
	156	.Level6InterruptVector.text);
	157	#endif
de4f6e5b CZ	158	RELOCATE_ENTRY(_KernelExceptionVector_text,
	159	.KernelExceptionVector.text);
	160	RELOCATE_ENTRY(_UserExceptionVector_text,
	161	.UserExceptionVector.text);
	162	RELOCATE_ENTRY(_DoubleExceptionVector_literal,
	163	.DoubleExceptionVector.literal);
	164	RELOCATE_ENTRY(_DoubleExceptionVector_text,
	165	.DoubleExceptionVector.text);
6d15d109 MG	166	RELOCATE_ENTRY(_DebugInterruptVector_text,
6d15d109 MG	167	.DebugInterruptVector.text);
f615136c MF	168	#if defined(CONFIG_SMP)
	169	RELOCATE_ENTRY(_SecondaryResetVector_literal,
	170	.SecondaryResetVector.literal);
	171	RELOCATE_ENTRY(_SecondaryResetVector_text,
	172	.SecondaryResetVector.text);
	173	#endif
	174
de4f6e5b CZ	175
de4f6e5b CZ	176	__boot_reloc_table_end = ABSOLUTE(.) ;
5a0015d6	177
cd3db323 TA	178	INIT_SETUP(XCHAL_ICACHE_LINESIZE)
	179	INIT_CALLS
	180	CON_INITCALL
	181	SECURITY_INITCALL
	182	INIT_RAM_FS
5a0015d6	183	}
de4f6e5b	184
0415b00d	185	PERCPU_SECTION(XCHAL_ICACHE_LINESIZE)
de4f6e5b	186
5a0015d6 CZ	187	/* We need this dummy segment here */
	188
	189	. = ALIGN(4);
	190	.dummy : { LONG(0) }
	191
	192	/* The vectors are relocated to the real position at startup time */
	193
	194	SECTION_VECTOR (_WindowVectors_text,
	195	.WindowVectors.text,
e85e335f	196	WINDOW_VECTORS_VADDR, 4,
5a0015d6 CZ	197	.dummy)
	198	SECTION_VECTOR (_DebugInterruptVector_literal,
	199	.DebugInterruptVector.literal,
e85e335f	200	DEBUG_VECTOR_VADDR - 4,
5a0015d6 CZ	201	SIZEOF(.WindowVectors.text),
	202	.WindowVectors.text)
	203	SECTION_VECTOR (_DebugInterruptVector_text,
	204	.DebugInterruptVector.text,
e85e335f	205	DEBUG_VECTOR_VADDR,
5a0015d6 CZ	206	4,
5a0015d6 CZ	207	.DebugInterruptVector.literal)
2d1c645c MG	208	#undef LAST
	209	#define LAST .DebugInterruptVector.text
	210	#if XCHAL_EXCM_LEVEL >= 2
	211	SECTION_VECTOR (_Level2InterruptVector_text,
	212	.Level2InterruptVector.text,
e85e335f	213	INTLEVEL2_VECTOR_VADDR,
2d1c645c MG	214	SIZEOF(LAST), LAST)
	215	# undef LAST
	216	# define LAST .Level2InterruptVector.text
	217	#endif
	218	#if XCHAL_EXCM_LEVEL >= 3
	219	SECTION_VECTOR (_Level3InterruptVector_text,
	220	.Level3InterruptVector.text,
e85e335f	221	INTLEVEL3_VECTOR_VADDR,
2d1c645c MG	222	SIZEOF(LAST), LAST)
	223	# undef LAST
	224	# define LAST .Level3InterruptVector.text
	225	#endif
	226	#if XCHAL_EXCM_LEVEL >= 4
	227	SECTION_VECTOR (_Level4InterruptVector_text,
	228	.Level4InterruptVector.text,
e85e335f	229	INTLEVEL4_VECTOR_VADDR,
2d1c645c MG	230	SIZEOF(LAST), LAST)
	231	# undef LAST
	232	# define LAST .Level4InterruptVector.text
	233	#endif
	234	#if XCHAL_EXCM_LEVEL >= 5
	235	SECTION_VECTOR (_Level5InterruptVector_text,
	236	.Level5InterruptVector.text,
e85e335f	237	INTLEVEL5_VECTOR_VADDR,
2d1c645c MG	238	SIZEOF(LAST), LAST)
	239	# undef LAST
	240	# define LAST .Level5InterruptVector.text
	241	#endif
	242	#if XCHAL_EXCM_LEVEL >= 6
	243	SECTION_VECTOR (_Level6InterruptVector_text,
	244	.Level6InterruptVector.text,
e85e335f	245	INTLEVEL6_VECTOR_VADDR,
2d1c645c MG	246	SIZEOF(LAST), LAST)
	247	# undef LAST
	248	# define LAST .Level6InterruptVector.text
	249	#endif
5a0015d6 CZ	250	SECTION_VECTOR (_KernelExceptionVector_literal,
5a0015d6 CZ	251	.KernelExceptionVector.literal,
e85e335f	252	KERNEL_VECTOR_VADDR - 4,
2d1c645c MG	253	SIZEOF(LAST), LAST)
2d1c645c MG	254	#undef LAST
5a0015d6 CZ	255	SECTION_VECTOR (_KernelExceptionVector_text,
5a0015d6 CZ	256	.KernelExceptionVector.text,
e85e335f	257	KERNEL_VECTOR_VADDR,
5a0015d6 CZ	258	4,
	259	.KernelExceptionVector.literal)
	260	SECTION_VECTOR (_UserExceptionVector_literal,
	261	.UserExceptionVector.literal,
e85e335f	262	USER_VECTOR_VADDR - 4,
5a0015d6 CZ	263	SIZEOF(.KernelExceptionVector.text),
	264	.KernelExceptionVector.text)
	265	SECTION_VECTOR (_UserExceptionVector_text,
	266	.UserExceptionVector.text,
e85e335f	267	USER_VECTOR_VADDR,
5a0015d6 CZ	268	4,
	269	.UserExceptionVector.literal)
	270	SECTION_VECTOR (_DoubleExceptionVector_literal,
	271	.DoubleExceptionVector.literal,
17290231	272	DOUBLEEXC_VECTOR_VADDR - 40,
5a0015d6 CZ	273	SIZEOF(.UserExceptionVector.text),
	274	.UserExceptionVector.text)
	275	SECTION_VECTOR (_DoubleExceptionVector_text,
	276	.DoubleExceptionVector.text,
e85e335f	277	DOUBLEEXC_VECTOR_VADDR,
17290231	278	40,
5a0015d6 CZ	279	.DoubleExceptionVector.literal)
	280
	281	. = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3;
f615136c MF	282
	283	#if defined(CONFIG_SMP)
	284
	285	SECTION_VECTOR (_SecondaryResetVector_literal,
	286	.SecondaryResetVector.literal,
	287	RESET_VECTOR1_VADDR - 4,
	288	SIZEOF(.DoubleExceptionVector.text),
	289	.DoubleExceptionVector.text)
	290
	291	SECTION_VECTOR (_SecondaryResetVector_text,
	292	.SecondaryResetVector.text,
	293	RESET_VECTOR1_VADDR,
	294	4,
	295	.SecondaryResetVector.literal)
	296
	297	. = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text);
	298
	299	#endif
	300
cd3db323	301	. = ALIGN(PAGE_SIZE);
5a0015d6 CZ	302
	303	__init_end = .;
	304
cd3db323	305	BSS_SECTION(0, 8192, 0)
de4f6e5b	306
5a0015d6 CZ	307	_end = .;
	308
	309	/* only used by the boot loader */
	310
	311	. = ALIGN(0x10);
	312	.bootstrap : { *(.bootstrap.literal .bootstrap.text .bootstrap.data) }
	313
e85e335f	314	.ResetVector.text RESET_VECTOR_VADDR :
5a0015d6 CZ	315	{
	316	*(.ResetVector.text)
	317	}
	318
e85e335f MF	319
	320	/*
	321	* This is a remapped copy of the Secondary Reset Vector Code.
	322	* It keeps gdb in sync with the PC after switching
	323	* to the temporary mapping used while setting up
	324	* the V2 MMU mappings for Linux.
	325	*
	326	* Only debug information about this section is put in the kernel image.
	327	*/
	328	.SecondaryResetVector.remapped_text 0x46000000 (INFO):
	329	{
	330	*(.SecondaryResetVector.remapped_text)
	331	}
	332
	333
de4f6e5b CZ	334	.xt.lit : { *(.xt.lit) }
de4f6e5b CZ	335	.xt.prop : { *(.xt.prop) }
5a0015d6 CZ	336
	337	.debug 0 : { *(.debug) }
	338	.line 0 : { *(.line) }
	339	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	340	.debug_sfnames 0 : { *(.debug_sfnames) }
	341	.debug_aranges 0 : { *(.debug_aranges) }
	342	.debug_pubnames 0 : { *(.debug_pubnames) }
	343	.debug_info 0 : { *(.debug_info) }
	344	.debug_abbrev 0 : { *(.debug_abbrev) }
	345	.debug_line 0 : { *(.debug_line) }
	346	.debug_frame 0 : { *(.debug_frame) }
	347	.debug_str 0 : { *(.debug_str) }
	348	.debug_loc 0 : { *(.debug_loc) }
	349	.debug_macinfo 0 : { *(.debug_macinfo) }
	350	.debug_weaknames 0 : { *(.debug_weaknames) }
	351	.debug_funcnames 0 : { *(.debug_funcnames) }
	352	.debug_typenames 0 : { *(.debug_typenames) }
	353	.debug_varnames 0 : { *(.debug_varnames) }
	354
	355	.xt.insn 0 :
	356	{
	357	*(.xt.insn)
	358	(.gnu.linkonce.x)
	359	}
	360
	361	.xt.lit 0 :
	362	{
	363	*(.xt.lit)
	364	(.gnu.linkonce.p)
	365	}
023bf6f1 TH	366
	367	/* Sections to be discarded */
	368	DISCARDS
	369	/DISCARD/ : { *(.exit.literal) }
5a0015d6	370	}