Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* BFD back-end for ARM COFF files. |
7898deda | 2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
66eb6687 | 3 | 2000, 2001, 2002, 2003, 2004, 2005, 2006 |
252b5132 RH |
4 | Free Software Foundation, Inc. |
5 | Written by Cygnus Support. | |
6 | ||
d21356d8 | 7 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 8 | |
d21356d8 NC |
9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
252b5132 | 13 | |
d21356d8 NC |
14 | This program is distributed in the hope that it will be useful, |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
252b5132 | 18 | |
d21356d8 NC |
19 | You should have received a copy of the GNU General Public License |
20 | along with this program; if not, write to the Free Software | |
3e110533 | 21 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
252b5132 RH |
22 | |
23 | #include "bfd.h" | |
24 | #include "sysdep.h" | |
25 | #include "libbfd.h" | |
252b5132 | 26 | #include "coff/arm.h" |
252b5132 RH |
27 | #include "coff/internal.h" |
28 | ||
29 | #ifdef COFF_WITH_PE | |
30 | #include "coff/pe.h" | |
31 | #endif | |
32 | ||
33 | #include "libcoff.h" | |
34 | ||
35 | /* Macros for manipulation the bits in the flags field of the coff data | |
36 | structure. */ | |
dc810e39 AM |
37 | #define APCS_26_FLAG(abfd) \ |
38 | (coff_data (abfd)->flags & F_APCS_26) | |
39 | ||
40 | #define APCS_FLOAT_FLAG(abfd) \ | |
41 | (coff_data (abfd)->flags & F_APCS_FLOAT) | |
42 | ||
43 | #define PIC_FLAG(abfd) \ | |
44 | (coff_data (abfd)->flags & F_PIC) | |
45 | ||
46 | #define APCS_SET(abfd) \ | |
47 | (coff_data (abfd)->flags & F_APCS_SET) | |
48 | ||
49 | #define SET_APCS_FLAGS(abfd, flgs) \ | |
50 | do \ | |
51 | { \ | |
52 | coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \ | |
53 | coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \ | |
54 | } \ | |
55 | while (0) | |
56 | ||
57 | #define INTERWORK_FLAG(abfd) \ | |
58 | (coff_data (abfd)->flags & F_INTERWORK) | |
59 | ||
60 | #define INTERWORK_SET(abfd) \ | |
61 | (coff_data (abfd)->flags & F_INTERWORK_SET) | |
62 | ||
63 | #define SET_INTERWORK_FLAG(abfd, flg) \ | |
64 | do \ | |
65 | { \ | |
66 | coff_data (abfd)->flags &= ~F_INTERWORK; \ | |
67 | coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \ | |
68 | } \ | |
69 | while (0) | |
af74ae99 NC |
70 | |
71 | #ifndef NUM_ELEM | |
72 | #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0])) | |
73 | #endif | |
d70910e8 | 74 | |
252b5132 | 75 | typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype; |
c8e7bf0d | 76 | /* Some typedefs for holding instructions. */ |
252b5132 RH |
77 | typedef unsigned long int insn32; |
78 | typedef unsigned short int insn16; | |
79 | ||
252b5132 RH |
80 | /* The linker script knows the section names for placement. |
81 | The entry_names are used to do simple name mangling on the stubs. | |
82 | Given a function name, and its type, the stub can be found. The | |
917583ad | 83 | name can be changed. The only requirement is the %s be present. */ |
d70910e8 | 84 | |
252b5132 RH |
85 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
86 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
87 | ||
88 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
89 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
90 | ||
d70910e8 | 91 | /* Used by the assembler. */ |
917583ad | 92 | |
252b5132 | 93 | static bfd_reloc_status_type |
c8e7bf0d NC |
94 | coff_arm_reloc (bfd *abfd, |
95 | arelent *reloc_entry, | |
96 | asymbol *symbol ATTRIBUTE_UNUSED, | |
97 | void * data, | |
98 | asection *input_section ATTRIBUTE_UNUSED, | |
99 | bfd *output_bfd, | |
100 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
101 | { |
102 | symvalue diff; | |
c8e7bf0d NC |
103 | |
104 | if (output_bfd == NULL) | |
252b5132 RH |
105 | return bfd_reloc_continue; |
106 | ||
107 | diff = reloc_entry->addend; | |
108 | ||
dc810e39 AM |
109 | #define DOIT(x) \ |
110 | x = ((x & ~howto->dst_mask) \ | |
111 | | (((x & howto->src_mask) + diff) & howto->dst_mask)) | |
252b5132 RH |
112 | |
113 | if (diff != 0) | |
114 | { | |
115 | reloc_howto_type *howto = reloc_entry->howto; | |
116 | unsigned char *addr = (unsigned char *) data + reloc_entry->address; | |
117 | ||
118 | switch (howto->size) | |
119 | { | |
120 | case 0: | |
121 | { | |
122 | char x = bfd_get_8 (abfd, addr); | |
123 | DOIT (x); | |
124 | bfd_put_8 (abfd, x, addr); | |
125 | } | |
126 | break; | |
127 | ||
128 | case 1: | |
129 | { | |
130 | short x = bfd_get_16 (abfd, addr); | |
131 | DOIT (x); | |
dc810e39 | 132 | bfd_put_16 (abfd, (bfd_vma) x, addr); |
252b5132 RH |
133 | } |
134 | break; | |
135 | ||
136 | case 2: | |
137 | { | |
138 | long x = bfd_get_32 (abfd, addr); | |
139 | DOIT (x); | |
dc810e39 | 140 | bfd_put_32 (abfd, (bfd_vma) x, addr); |
252b5132 RH |
141 | } |
142 | break; | |
143 | ||
144 | default: | |
145 | abort (); | |
146 | } | |
147 | } | |
148 | ||
149 | /* Now let bfd_perform_relocation finish everything up. */ | |
150 | return bfd_reloc_continue; | |
151 | } | |
152 | ||
153 | /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name() | |
154 | in this file), then TARGET_UNDERSCORE should be defined, otherwise it | |
155 | should not. */ | |
156 | #ifndef TARGET_UNDERSCORE | |
157 | #define TARGET_UNDERSCORE '_' | |
158 | #endif | |
159 | ||
160 | #ifndef PCRELOFFSET | |
b34976b6 | 161 | #define PCRELOFFSET TRUE |
252b5132 RH |
162 | #endif |
163 | ||
164 | /* These most certainly belong somewhere else. Just had to get rid of | |
17505c5c | 165 | the manifest constants in the code. */ |
252b5132 RH |
166 | #define ARM_8 0 |
167 | #define ARM_16 1 | |
168 | #define ARM_32 2 | |
169 | #define ARM_26 3 | |
170 | #define ARM_DISP8 4 | |
171 | #define ARM_DISP16 5 | |
172 | #define ARM_DISP32 6 | |
173 | #define ARM_26D 7 | |
c8e7bf0d | 174 | /* 8 is unused. */ |
252b5132 RH |
175 | #define ARM_NEG16 9 |
176 | #define ARM_NEG32 10 | |
177 | #define ARM_RVA32 11 | |
178 | #define ARM_THUMB9 12 | |
179 | #define ARM_THUMB12 13 | |
180 | #define ARM_THUMB23 14 | |
181 | ||
17505c5c NC |
182 | #ifdef ARM_WINCE |
183 | #undef ARM_32 | |
184 | #undef ARM_RVA32 | |
185 | #undef ARM_26 | |
186 | #undef ARM_THUMB12 | |
187 | #undef ARM_26D | |
188 | ||
d3793eaa | 189 | #define ARM_26D 0 |
17505c5c NC |
190 | #define ARM_32 1 |
191 | #define ARM_RVA32 2 | |
192 | #define ARM_26 3 | |
193 | #define ARM_THUMB12 4 | |
17505c5c NC |
194 | #define ARM_SECTION 14 |
195 | #define ARM_SECREL 15 | |
196 | #endif | |
197 | ||
c8e7bf0d NC |
198 | static bfd_reloc_status_type aoutarm_fix_pcrel_26_done |
199 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
200 | static bfd_reloc_status_type aoutarm_fix_pcrel_26 | |
201 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
c8e7bf0d NC |
202 | static bfd_reloc_status_type coff_thumb_pcrel_12 |
203 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
204 | #ifndef ARM_WINCE | |
afe94956 NC |
205 | static bfd_reloc_status_type coff_thumb_pcrel_9 |
206 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
c8e7bf0d NC |
207 | static bfd_reloc_status_type coff_thumb_pcrel_23 |
208 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
209 | #endif | |
210 | ||
d70910e8 | 211 | static reloc_howto_type aoutarm_std_reloc_howto[] = |
917583ad | 212 | { |
17505c5c | 213 | #ifdef ARM_WINCE |
d3793eaa NC |
214 | HOWTO (ARM_26D, |
215 | 2, | |
216 | 2, | |
217 | 24, | |
44e88952 | 218 | TRUE, |
d3793eaa NC |
219 | 0, |
220 | complain_overflow_dont, | |
221 | aoutarm_fix_pcrel_26_done, | |
222 | "ARM_26D", | |
223 | FALSE, | |
224 | 0x00ffffff, | |
225 | 0x0, | |
44e88952 | 226 | PCRELOFFSET), |
917583ad NC |
227 | HOWTO (ARM_32, |
228 | 0, | |
229 | 2, | |
230 | 32, | |
b34976b6 | 231 | FALSE, |
917583ad NC |
232 | 0, |
233 | complain_overflow_bitfield, | |
234 | coff_arm_reloc, | |
235 | "ARM_32", | |
d3793eaa | 236 | FALSE, |
917583ad NC |
237 | 0xffffffff, |
238 | 0xffffffff, | |
239 | PCRELOFFSET), | |
240 | HOWTO (ARM_RVA32, | |
241 | 0, | |
242 | 2, | |
243 | 32, | |
b34976b6 | 244 | FALSE, |
917583ad NC |
245 | 0, |
246 | complain_overflow_bitfield, | |
247 | coff_arm_reloc, | |
248 | "ARM_RVA32", | |
d3793eaa | 249 | FALSE, |
917583ad NC |
250 | 0xffffffff, |
251 | 0xffffffff, | |
252 | PCRELOFFSET), | |
253 | HOWTO (ARM_26, | |
254 | 2, | |
255 | 2, | |
256 | 24, | |
b34976b6 | 257 | TRUE, |
917583ad NC |
258 | 0, |
259 | complain_overflow_signed, | |
260 | aoutarm_fix_pcrel_26 , | |
261 | "ARM_26", | |
b34976b6 | 262 | FALSE, |
917583ad NC |
263 | 0x00ffffff, |
264 | 0x00ffffff, | |
265 | PCRELOFFSET), | |
266 | HOWTO (ARM_THUMB12, | |
267 | 1, | |
268 | 1, | |
269 | 11, | |
b34976b6 | 270 | TRUE, |
917583ad NC |
271 | 0, |
272 | complain_overflow_signed, | |
273 | coff_thumb_pcrel_12 , | |
274 | "ARM_THUMB12", | |
b34976b6 | 275 | FALSE, |
917583ad NC |
276 | 0x000007ff, |
277 | 0x000007ff, | |
278 | PCRELOFFSET), | |
d3793eaa | 279 | EMPTY_HOWTO (-1), |
917583ad NC |
280 | EMPTY_HOWTO (-1), |
281 | EMPTY_HOWTO (-1), | |
282 | EMPTY_HOWTO (-1), | |
283 | EMPTY_HOWTO (-1), | |
284 | EMPTY_HOWTO (-1), | |
285 | EMPTY_HOWTO (-1), | |
286 | EMPTY_HOWTO (-1), | |
287 | EMPTY_HOWTO (-1), | |
288 | HOWTO (ARM_SECTION, | |
289 | 0, | |
290 | 1, | |
291 | 16, | |
b34976b6 | 292 | FALSE, |
917583ad NC |
293 | 0, |
294 | complain_overflow_bitfield, | |
295 | coff_arm_reloc, | |
d3793eaa NC |
296 | "ARM_SECTION", |
297 | FALSE, | |
917583ad NC |
298 | 0x0000ffff, |
299 | 0x0000ffff, | |
300 | PCRELOFFSET), | |
301 | HOWTO (ARM_SECREL, | |
302 | 0, | |
303 | 2, | |
304 | 32, | |
b34976b6 | 305 | FALSE, |
917583ad NC |
306 | 0, |
307 | complain_overflow_bitfield, | |
308 | coff_arm_reloc, | |
d3793eaa NC |
309 | "ARM_SECREL", |
310 | FALSE, | |
917583ad NC |
311 | 0xffffffff, |
312 | 0xffffffff, | |
313 | PCRELOFFSET), | |
17505c5c | 314 | #else /* not ARM_WINCE */ |
c8e7bf0d NC |
315 | HOWTO (ARM_8, |
316 | 0, | |
317 | 0, | |
318 | 8, | |
319 | FALSE, | |
320 | 0, | |
321 | complain_overflow_bitfield, | |
322 | coff_arm_reloc, | |
323 | "ARM_8", | |
324 | TRUE, | |
325 | 0x000000ff, | |
326 | 0x000000ff, | |
327 | PCRELOFFSET), | |
917583ad NC |
328 | HOWTO (ARM_16, |
329 | 0, | |
330 | 1, | |
331 | 16, | |
b34976b6 | 332 | FALSE, |
917583ad NC |
333 | 0, |
334 | complain_overflow_bitfield, | |
335 | coff_arm_reloc, | |
336 | "ARM_16", | |
b34976b6 | 337 | TRUE, |
917583ad NC |
338 | 0x0000ffff, |
339 | 0x0000ffff, | |
340 | PCRELOFFSET), | |
341 | HOWTO (ARM_32, | |
342 | 0, | |
343 | 2, | |
344 | 32, | |
b34976b6 | 345 | FALSE, |
917583ad NC |
346 | 0, |
347 | complain_overflow_bitfield, | |
348 | coff_arm_reloc, | |
349 | "ARM_32", | |
b34976b6 | 350 | TRUE, |
917583ad NC |
351 | 0xffffffff, |
352 | 0xffffffff, | |
353 | PCRELOFFSET), | |
354 | HOWTO (ARM_26, | |
355 | 2, | |
356 | 2, | |
357 | 24, | |
b34976b6 | 358 | TRUE, |
917583ad NC |
359 | 0, |
360 | complain_overflow_signed, | |
361 | aoutarm_fix_pcrel_26 , | |
362 | "ARM_26", | |
b34976b6 | 363 | FALSE, |
917583ad NC |
364 | 0x00ffffff, |
365 | 0x00ffffff, | |
366 | PCRELOFFSET), | |
367 | HOWTO (ARM_DISP8, | |
368 | 0, | |
369 | 0, | |
370 | 8, | |
b34976b6 | 371 | TRUE, |
917583ad NC |
372 | 0, |
373 | complain_overflow_signed, | |
374 | coff_arm_reloc, | |
375 | "ARM_DISP8", | |
b34976b6 | 376 | TRUE, |
917583ad NC |
377 | 0x000000ff, |
378 | 0x000000ff, | |
b34976b6 | 379 | TRUE), |
917583ad NC |
380 | HOWTO (ARM_DISP16, |
381 | 0, | |
382 | 1, | |
383 | 16, | |
b34976b6 | 384 | TRUE, |
917583ad NC |
385 | 0, |
386 | complain_overflow_signed, | |
387 | coff_arm_reloc, | |
388 | "ARM_DISP16", | |
b34976b6 | 389 | TRUE, |
917583ad NC |
390 | 0x0000ffff, |
391 | 0x0000ffff, | |
b34976b6 | 392 | TRUE), |
917583ad NC |
393 | HOWTO (ARM_DISP32, |
394 | 0, | |
395 | 2, | |
396 | 32, | |
b34976b6 | 397 | TRUE, |
917583ad NC |
398 | 0, |
399 | complain_overflow_signed, | |
400 | coff_arm_reloc, | |
401 | "ARM_DISP32", | |
b34976b6 | 402 | TRUE, |
917583ad NC |
403 | 0xffffffff, |
404 | 0xffffffff, | |
b34976b6 | 405 | TRUE), |
917583ad NC |
406 | HOWTO (ARM_26D, |
407 | 2, | |
408 | 2, | |
409 | 24, | |
b34976b6 | 410 | FALSE, |
917583ad NC |
411 | 0, |
412 | complain_overflow_dont, | |
413 | aoutarm_fix_pcrel_26_done, | |
414 | "ARM_26D", | |
b34976b6 | 415 | TRUE, |
917583ad NC |
416 | 0x00ffffff, |
417 | 0x0, | |
b34976b6 | 418 | FALSE), |
917583ad NC |
419 | /* 8 is unused */ |
420 | EMPTY_HOWTO (-1), | |
421 | HOWTO (ARM_NEG16, | |
422 | 0, | |
423 | -1, | |
424 | 16, | |
b34976b6 | 425 | FALSE, |
917583ad NC |
426 | 0, |
427 | complain_overflow_bitfield, | |
428 | coff_arm_reloc, | |
429 | "ARM_NEG16", | |
b34976b6 | 430 | TRUE, |
917583ad NC |
431 | 0x0000ffff, |
432 | 0x0000ffff, | |
b34976b6 | 433 | FALSE), |
917583ad NC |
434 | HOWTO (ARM_NEG32, |
435 | 0, | |
436 | -2, | |
437 | 32, | |
b34976b6 | 438 | FALSE, |
917583ad NC |
439 | 0, |
440 | complain_overflow_bitfield, | |
441 | coff_arm_reloc, | |
442 | "ARM_NEG32", | |
b34976b6 | 443 | TRUE, |
917583ad NC |
444 | 0xffffffff, |
445 | 0xffffffff, | |
b34976b6 | 446 | FALSE), |
917583ad NC |
447 | HOWTO (ARM_RVA32, |
448 | 0, | |
449 | 2, | |
450 | 32, | |
b34976b6 | 451 | FALSE, |
917583ad NC |
452 | 0, |
453 | complain_overflow_bitfield, | |
454 | coff_arm_reloc, | |
455 | "ARM_RVA32", | |
b34976b6 | 456 | TRUE, |
917583ad NC |
457 | 0xffffffff, |
458 | 0xffffffff, | |
459 | PCRELOFFSET), | |
460 | HOWTO (ARM_THUMB9, | |
461 | 1, | |
462 | 1, | |
463 | 8, | |
b34976b6 | 464 | TRUE, |
917583ad NC |
465 | 0, |
466 | complain_overflow_signed, | |
467 | coff_thumb_pcrel_9 , | |
468 | "ARM_THUMB9", | |
b34976b6 | 469 | FALSE, |
917583ad NC |
470 | 0x000000ff, |
471 | 0x000000ff, | |
472 | PCRELOFFSET), | |
473 | HOWTO (ARM_THUMB12, | |
474 | 1, | |
475 | 1, | |
476 | 11, | |
b34976b6 | 477 | TRUE, |
917583ad NC |
478 | 0, |
479 | complain_overflow_signed, | |
480 | coff_thumb_pcrel_12 , | |
481 | "ARM_THUMB12", | |
b34976b6 | 482 | FALSE, |
917583ad NC |
483 | 0x000007ff, |
484 | 0x000007ff, | |
485 | PCRELOFFSET), | |
486 | HOWTO (ARM_THUMB23, | |
487 | 1, | |
488 | 2, | |
489 | 22, | |
b34976b6 | 490 | TRUE, |
917583ad NC |
491 | 0, |
492 | complain_overflow_signed, | |
493 | coff_thumb_pcrel_23 , | |
494 | "ARM_THUMB23", | |
b34976b6 | 495 | FALSE, |
917583ad NC |
496 | 0x07ff07ff, |
497 | 0x07ff07ff, | |
498 | PCRELOFFSET) | |
17505c5c | 499 | #endif /* not ARM_WINCE */ |
917583ad | 500 | }; |
252b5132 | 501 | |
af74ae99 NC |
502 | #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto) |
503 | ||
252b5132 | 504 | #ifdef COFF_WITH_PE |
b34976b6 | 505 | /* Return TRUE if this relocation should |
d70910e8 | 506 | appear in the output .reloc section. */ |
252b5132 | 507 | |
b34976b6 | 508 | static bfd_boolean |
c8e7bf0d NC |
509 | in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED, |
510 | reloc_howto_type * howto) | |
252b5132 RH |
511 | { |
512 | return !howto->pc_relative && howto->type != ARM_RVA32; | |
d70910e8 | 513 | } |
252b5132 RH |
514 | #endif |
515 | ||
af74ae99 NC |
516 | #define RTYPE2HOWTO(cache_ptr, dst) \ |
517 | (cache_ptr)->howto = \ | |
518 | (dst)->r_type < NUM_RELOCS \ | |
519 | ? aoutarm_std_reloc_howto + (dst)->r_type \ | |
520 | : NULL | |
252b5132 RH |
521 | |
522 | #define coff_rtype_to_howto coff_arm_rtype_to_howto | |
523 | ||
524 | static reloc_howto_type * | |
c8e7bf0d NC |
525 | coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED, |
526 | asection *sec, | |
527 | struct internal_reloc *rel, | |
528 | struct coff_link_hash_entry *h ATTRIBUTE_UNUSED, | |
529 | struct internal_syment *sym ATTRIBUTE_UNUSED, | |
530 | bfd_vma *addendp) | |
252b5132 | 531 | { |
af74ae99 | 532 | reloc_howto_type * howto; |
252b5132 | 533 | |
af74ae99 NC |
534 | if (rel->r_type >= NUM_RELOCS) |
535 | return NULL; | |
d70910e8 | 536 | |
252b5132 RH |
537 | howto = aoutarm_std_reloc_howto + rel->r_type; |
538 | ||
539 | if (rel->r_type == ARM_RVA32) | |
17505c5c | 540 | *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase; |
252b5132 RH |
541 | |
542 | return howto; | |
252b5132 | 543 | } |
917583ad | 544 | |
d70910e8 | 545 | /* Used by the assembler. */ |
252b5132 RH |
546 | |
547 | static bfd_reloc_status_type | |
c8e7bf0d NC |
548 | aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED, |
549 | arelent *reloc_entry ATTRIBUTE_UNUSED, | |
550 | asymbol *symbol ATTRIBUTE_UNUSED, | |
551 | void * data ATTRIBUTE_UNUSED, | |
552 | asection *input_section ATTRIBUTE_UNUSED, | |
553 | bfd *output_bfd ATTRIBUTE_UNUSED, | |
554 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
555 | { |
556 | /* This is dead simple at present. */ | |
557 | return bfd_reloc_ok; | |
558 | } | |
559 | ||
d70910e8 | 560 | /* Used by the assembler. */ |
252b5132 RH |
561 | |
562 | static bfd_reloc_status_type | |
c8e7bf0d NC |
563 | aoutarm_fix_pcrel_26 (bfd *abfd, |
564 | arelent *reloc_entry, | |
565 | asymbol *symbol, | |
566 | void * data, | |
567 | asection *input_section, | |
568 | bfd *output_bfd, | |
569 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
570 | { |
571 | bfd_vma relocation; | |
572 | bfd_size_type addr = reloc_entry->address; | |
573 | long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); | |
574 | bfd_reloc_status_type flag = bfd_reloc_ok; | |
d70910e8 | 575 | |
917583ad | 576 | /* If this is an undefined symbol, return error. */ |
252b5132 RH |
577 | if (symbol->section == &bfd_und_section |
578 | && (symbol->flags & BSF_WEAK) == 0) | |
579 | return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; | |
580 | ||
581 | /* If the sections are different, and we are doing a partial relocation, | |
582 | just ignore it for now. */ | |
583 | if (symbol->section->name != input_section->name | |
584 | && output_bfd != (bfd *)NULL) | |
585 | return bfd_reloc_continue; | |
586 | ||
587 | relocation = (target & 0x00ffffff) << 2; | |
917583ad | 588 | relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */ |
252b5132 RH |
589 | relocation += symbol->value; |
590 | relocation += symbol->section->output_section->vma; | |
591 | relocation += symbol->section->output_offset; | |
592 | relocation += reloc_entry->addend; | |
593 | relocation -= input_section->output_section->vma; | |
594 | relocation -= input_section->output_offset; | |
595 | relocation -= addr; | |
d70910e8 | 596 | |
252b5132 RH |
597 | if (relocation & 3) |
598 | return bfd_reloc_overflow; | |
599 | ||
917583ad | 600 | /* Check for overflow. */ |
252b5132 RH |
601 | if (relocation & 0x02000000) |
602 | { | |
603 | if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff) | |
604 | flag = bfd_reloc_overflow; | |
605 | } | |
dc810e39 | 606 | else if (relocation & ~(bfd_vma) 0x03ffffff) |
252b5132 RH |
607 | flag = bfd_reloc_overflow; |
608 | ||
609 | target &= ~0x00ffffff; | |
610 | target |= (relocation >> 2) & 0x00ffffff; | |
dc810e39 | 611 | bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); |
252b5132 RH |
612 | |
613 | /* Now the ARM magic... Change the reloc type so that it is marked as done. | |
614 | Strictly this is only necessary if we are doing a partial relocation. */ | |
615 | reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D]; | |
616 | ||
617 | return flag; | |
618 | } | |
619 | ||
620 | static bfd_reloc_status_type | |
c8e7bf0d NC |
621 | coff_thumb_pcrel_common (bfd *abfd, |
622 | arelent *reloc_entry, | |
623 | asymbol *symbol, | |
624 | void * data, | |
625 | asection *input_section, | |
626 | bfd *output_bfd, | |
627 | char **error_message ATTRIBUTE_UNUSED, | |
628 | thumb_pcrel_branchtype btype) | |
252b5132 RH |
629 | { |
630 | bfd_vma relocation = 0; | |
631 | bfd_size_type addr = reloc_entry->address; | |
632 | long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); | |
633 | bfd_reloc_status_type flag = bfd_reloc_ok; | |
634 | bfd_vma dstmsk; | |
635 | bfd_vma offmsk; | |
636 | bfd_vma signbit; | |
637 | ||
638 | /* NOTE: This routine is currently used by GAS, but not by the link | |
639 | phase. */ | |
252b5132 RH |
640 | switch (btype) |
641 | { | |
642 | case b9: | |
643 | dstmsk = 0x000000ff; | |
644 | offmsk = 0x000001fe; | |
645 | signbit = 0x00000100; | |
646 | break; | |
647 | ||
648 | case b12: | |
649 | dstmsk = 0x000007ff; | |
650 | offmsk = 0x00000ffe; | |
651 | signbit = 0x00000800; | |
652 | break; | |
653 | ||
654 | case b23: | |
655 | dstmsk = 0x07ff07ff; | |
656 | offmsk = 0x007fffff; | |
657 | signbit = 0x00400000; | |
658 | break; | |
659 | ||
660 | default: | |
661 | abort (); | |
662 | } | |
d70910e8 | 663 | |
917583ad | 664 | /* If this is an undefined symbol, return error. */ |
252b5132 RH |
665 | if (symbol->section == &bfd_und_section |
666 | && (symbol->flags & BSF_WEAK) == 0) | |
667 | return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; | |
668 | ||
669 | /* If the sections are different, and we are doing a partial relocation, | |
670 | just ignore it for now. */ | |
671 | if (symbol->section->name != input_section->name | |
672 | && output_bfd != (bfd *)NULL) | |
673 | return bfd_reloc_continue; | |
674 | ||
675 | switch (btype) | |
676 | { | |
677 | case b9: | |
678 | case b12: | |
679 | relocation = ((target & dstmsk) << 1); | |
680 | break; | |
681 | ||
682 | case b23: | |
683 | if (bfd_big_endian (abfd)) | |
684 | relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4); | |
685 | else | |
686 | relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15); | |
687 | break; | |
688 | ||
689 | default: | |
690 | abort (); | |
691 | } | |
692 | ||
917583ad | 693 | relocation = (relocation ^ signbit) - signbit; /* Sign extend. */ |
252b5132 RH |
694 | relocation += symbol->value; |
695 | relocation += symbol->section->output_section->vma; | |
696 | relocation += symbol->section->output_offset; | |
697 | relocation += reloc_entry->addend; | |
698 | relocation -= input_section->output_section->vma; | |
699 | relocation -= input_section->output_offset; | |
700 | relocation -= addr; | |
701 | ||
702 | if (relocation & 1) | |
703 | return bfd_reloc_overflow; | |
704 | ||
917583ad | 705 | /* Check for overflow. */ |
252b5132 RH |
706 | if (relocation & signbit) |
707 | { | |
708 | if ((relocation & ~offmsk) != ~offmsk) | |
709 | flag = bfd_reloc_overflow; | |
710 | } | |
711 | else if (relocation & ~offmsk) | |
712 | flag = bfd_reloc_overflow; | |
713 | ||
714 | target &= ~dstmsk; | |
715 | switch (btype) | |
716 | { | |
717 | case b9: | |
718 | case b12: | |
719 | target |= (relocation >> 1); | |
720 | break; | |
721 | ||
722 | case b23: | |
723 | if (bfd_big_endian (abfd)) | |
dc810e39 AM |
724 | target |= (((relocation & 0xfff) >> 1) |
725 | | ((relocation << 4) & 0x07ff0000)); | |
252b5132 | 726 | else |
dc810e39 AM |
727 | target |= (((relocation & 0xffe) << 15) |
728 | | ((relocation >> 12) & 0x7ff)); | |
252b5132 RH |
729 | break; |
730 | ||
731 | default: | |
732 | abort (); | |
733 | } | |
734 | ||
dc810e39 | 735 | bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); |
252b5132 RH |
736 | |
737 | /* Now the ARM magic... Change the reloc type so that it is marked as done. | |
738 | Strictly this is only necessary if we are doing a partial relocation. */ | |
739 | reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D]; | |
d70910e8 | 740 | |
917583ad | 741 | /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */ |
252b5132 RH |
742 | return flag; |
743 | } | |
744 | ||
7831a775 | 745 | #ifndef ARM_WINCE |
252b5132 | 746 | static bfd_reloc_status_type |
c8e7bf0d NC |
747 | coff_thumb_pcrel_23 (bfd *abfd, |
748 | arelent *reloc_entry, | |
749 | asymbol *symbol, | |
750 | void * data, | |
751 | asection *input_section, | |
752 | bfd *output_bfd, | |
753 | char **error_message) | |
252b5132 RH |
754 | { |
755 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
dc810e39 AM |
756 | input_section, output_bfd, error_message, |
757 | b23); | |
252b5132 RH |
758 | } |
759 | ||
760 | static bfd_reloc_status_type | |
c8e7bf0d NC |
761 | coff_thumb_pcrel_9 (bfd *abfd, |
762 | arelent *reloc_entry, | |
763 | asymbol *symbol, | |
764 | void * data, | |
765 | asection *input_section, | |
766 | bfd *output_bfd, | |
767 | char **error_message) | |
252b5132 RH |
768 | { |
769 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
dc810e39 | 770 | input_section, output_bfd, error_message, |
7831a775 | 771 | b9); |
252b5132 | 772 | } |
7831a775 | 773 | #endif /* not ARM_WINCE */ |
252b5132 RH |
774 | |
775 | static bfd_reloc_status_type | |
c8e7bf0d NC |
776 | coff_thumb_pcrel_12 (bfd *abfd, |
777 | arelent *reloc_entry, | |
778 | asymbol *symbol, | |
779 | void * data, | |
780 | asection *input_section, | |
781 | bfd *output_bfd, | |
782 | char **error_message) | |
252b5132 RH |
783 | { |
784 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
dc810e39 | 785 | input_section, output_bfd, error_message, |
7831a775 | 786 | b12); |
252b5132 RH |
787 | } |
788 | ||
dc810e39 | 789 | static const struct reloc_howto_struct * |
c8e7bf0d | 790 | coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) |
252b5132 | 791 | { |
af74ae99 | 792 | #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j |
d70910e8 | 793 | |
252b5132 RH |
794 | if (code == BFD_RELOC_CTOR) |
795 | switch (bfd_get_arch_info (abfd)->bits_per_address) | |
796 | { | |
797 | case 32: | |
798 | code = BFD_RELOC_32; | |
799 | break; | |
917583ad | 800 | default: |
c8e7bf0d | 801 | return NULL; |
252b5132 RH |
802 | } |
803 | ||
804 | switch (code) | |
805 | { | |
17505c5c NC |
806 | #ifdef ARM_WINCE |
807 | ASTD (BFD_RELOC_32, ARM_32); | |
808 | ASTD (BFD_RELOC_RVA, ARM_RVA32); | |
809 | ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); | |
810 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); | |
811 | #else | |
252b5132 RH |
812 | ASTD (BFD_RELOC_8, ARM_8); |
813 | ASTD (BFD_RELOC_16, ARM_16); | |
814 | ASTD (BFD_RELOC_32, ARM_32); | |
815 | ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); | |
077b8428 | 816 | ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26); |
252b5132 RH |
817 | ASTD (BFD_RELOC_8_PCREL, ARM_DISP8); |
818 | ASTD (BFD_RELOC_16_PCREL, ARM_DISP16); | |
819 | ASTD (BFD_RELOC_32_PCREL, ARM_DISP32); | |
820 | ASTD (BFD_RELOC_RVA, ARM_RVA32); | |
821 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9); | |
822 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); | |
823 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23); | |
f8f3c6cc | 824 | ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23); |
d70910e8 | 825 | #endif |
c8e7bf0d | 826 | default: return NULL; |
252b5132 RH |
827 | } |
828 | } | |
829 | ||
c8e7bf0d NC |
830 | #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2 |
831 | #define COFF_PAGE_SIZE 0x1000 | |
252b5132 | 832 | |
c8e7bf0d | 833 | /* Turn a howto into a reloc nunmber. */ |
252b5132 | 834 | #define SELECT_RELOC(x,howto) { x.r_type = howto->type; } |
c8e7bf0d NC |
835 | #define BADMAG(x) ARMBADMAG(x) |
836 | #define ARM 1 /* Customize coffcode.h. */ | |
252b5132 | 837 | |
7831a775 | 838 | #ifndef ARM_WINCE |
2106126f | 839 | /* Make sure that the 'r_offset' field is copied properly |
830629ab | 840 | so that identical binaries will compare the same. */ |
2106126f NC |
841 | #define SWAP_IN_RELOC_OFFSET H_GET_32 |
842 | #define SWAP_OUT_RELOC_OFFSET H_PUT_32 | |
7831a775 | 843 | #endif |
2106126f | 844 | |
252b5132 RH |
845 | /* Extend the coff_link_hash_table structure with a few ARM specific fields. |
846 | This allows us to store global data here without actually creating any | |
847 | global variables, which is a no-no in the BFD world. */ | |
848 | struct coff_arm_link_hash_table | |
917583ad NC |
849 | { |
850 | /* The original coff_link_hash_table structure. MUST be first field. */ | |
851 | struct coff_link_hash_table root; | |
d70910e8 | 852 | |
5c4491d3 | 853 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
dc810e39 | 854 | bfd_size_type thumb_glue_size; |
d70910e8 | 855 | |
5c4491d3 | 856 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
dc810e39 | 857 | bfd_size_type arm_glue_size; |
252b5132 | 858 | |
5c4491d3 | 859 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
917583ad | 860 | bfd * bfd_of_glue_owner; |
252b5132 | 861 | |
917583ad NC |
862 | /* Support interworking with old, non-interworking aware ARM code. */ |
863 | int support_old_code; | |
252b5132 RH |
864 | }; |
865 | ||
866 | /* Get the ARM coff linker hash table from a link_info structure. */ | |
867 | #define coff_arm_hash_table(info) \ | |
868 | ((struct coff_arm_link_hash_table *) ((info)->hash)) | |
869 | ||
870 | /* Create an ARM coff linker hash table. */ | |
871 | ||
872 | static struct bfd_link_hash_table * | |
c8e7bf0d | 873 | coff_arm_link_hash_table_create (bfd * abfd) |
252b5132 RH |
874 | { |
875 | struct coff_arm_link_hash_table * ret; | |
dc810e39 | 876 | bfd_size_type amt = sizeof (struct coff_arm_link_hash_table); |
252b5132 | 877 | |
c8e7bf0d NC |
878 | ret = bfd_malloc (amt); |
879 | if (ret == NULL) | |
252b5132 RH |
880 | return NULL; |
881 | ||
66eb6687 AM |
882 | if (!_bfd_coff_link_hash_table_init (&ret->root, |
883 | abfd, | |
884 | _bfd_coff_link_hash_newfunc, | |
885 | sizeof (struct coff_link_hash_entry))) | |
252b5132 | 886 | { |
e2d34d7d | 887 | free (ret); |
c8e7bf0d | 888 | return NULL; |
252b5132 RH |
889 | } |
890 | ||
891 | ret->thumb_glue_size = 0; | |
892 | ret->arm_glue_size = 0; | |
893 | ret->bfd_of_glue_owner = NULL; | |
894 | ||
895 | return & ret->root.root; | |
896 | } | |
897 | ||
271025eb | 898 | static void |
c8e7bf0d NC |
899 | arm_emit_base_file_entry (struct bfd_link_info *info, |
900 | bfd *output_bfd, | |
901 | asection *input_section, | |
902 | bfd_vma reloc_offset) | |
252b5132 RH |
903 | { |
904 | bfd_vma addr = reloc_offset | |
905 | - input_section->vma | |
906 | + input_section->output_offset | |
907 | + input_section->output_section->vma; | |
908 | ||
917583ad NC |
909 | if (coff_data (output_bfd)->pe) |
910 | addr -= pe_data (output_bfd)->pe_opthdr.ImageBase; | |
911 | fwrite (& addr, 1, sizeof (addr), (FILE *) info->base_file); | |
252b5132 RH |
912 | |
913 | } | |
914 | \f | |
7831a775 | 915 | #ifndef ARM_WINCE |
252b5132 RH |
916 | /* The thumb form of a long branch is a bit finicky, because the offset |
917 | encoding is split over two fields, each in it's own instruction. They | |
d70910e8 | 918 | can occur in any order. So given a thumb form of long branch, and an |
252b5132 | 919 | offset, insert the offset into the thumb branch and return finished |
d70910e8 | 920 | instruction. |
252b5132 | 921 | |
d70910e8 | 922 | It takes two thumb instructions to encode the target address. Each has |
5c4491d3 | 923 | 11 bits to invest. The upper 11 bits are stored in one (identified by |
d70910e8 KH |
924 | H-0.. see below), the lower 11 bits are stored in the other (identified |
925 | by H-1). | |
252b5132 | 926 | |
d70910e8 | 927 | Combine together and shifted left by 1 (it's a half word address) and |
252b5132 RH |
928 | there you have it. |
929 | ||
930 | Op: 1111 = F, | |
931 | H-0, upper address-0 = 000 | |
932 | Op: 1111 = F, | |
933 | H-1, lower address-0 = 800 | |
934 | ||
d70910e8 | 935 | They can be ordered either way, but the arm tools I've seen always put |
252b5132 RH |
936 | the lower one first. It probably doesn't matter. krk@cygnus.com |
937 | ||
938 | XXX: Actually the order does matter. The second instruction (H-1) | |
939 | moves the computed address into the PC, so it must be the second one | |
940 | in the sequence. The problem, however is that whilst little endian code | |
941 | stores the instructions in HI then LOW order, big endian code does the | |
917583ad | 942 | reverse. nickc@cygnus.com. */ |
252b5132 RH |
943 | |
944 | #define LOW_HI_ORDER 0xF800F000 | |
945 | #define HI_LOW_ORDER 0xF000F800 | |
946 | ||
947 | static insn32 | |
c8e7bf0d | 948 | insert_thumb_branch (insn32 br_insn, int rel_off) |
252b5132 RH |
949 | { |
950 | unsigned int low_bits; | |
951 | unsigned int high_bits; | |
952 | ||
c8e7bf0d | 953 | BFD_ASSERT ((rel_off & 1) != 1); |
252b5132 | 954 | |
c8e7bf0d NC |
955 | rel_off >>= 1; /* Half word aligned address. */ |
956 | low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */ | |
957 | high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */ | |
252b5132 RH |
958 | |
959 | if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER) | |
960 | br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits; | |
961 | else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER) | |
962 | br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits; | |
963 | else | |
dc810e39 AM |
964 | /* FIXME: the BFD library should never abort except for internal errors |
965 | - it should return an error status. */ | |
917583ad | 966 | abort (); /* Error - not a valid branch instruction form. */ |
252b5132 RH |
967 | |
968 | return br_insn; | |
969 | } | |
7831a775 | 970 | |
252b5132 RH |
971 | \f |
972 | static struct coff_link_hash_entry * | |
c8e7bf0d NC |
973 | find_thumb_glue (struct bfd_link_info *info, |
974 | const char *name, | |
975 | bfd *input_bfd) | |
252b5132 | 976 | { |
dc810e39 AM |
977 | char *tmp_name; |
978 | struct coff_link_hash_entry *myh; | |
979 | bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; | |
252b5132 | 980 | |
c8e7bf0d | 981 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
982 | |
983 | BFD_ASSERT (tmp_name); | |
984 | ||
985 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
d70910e8 | 986 | |
252b5132 | 987 | myh = coff_link_hash_lookup |
b34976b6 | 988 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 989 | |
252b5132 RH |
990 | if (myh == NULL) |
991 | /* xgettext:c-format */ | |
d003868e AM |
992 | _bfd_error_handler (_("%B: unable to find THUMB glue '%s' for `%s'"), |
993 | input_bfd, tmp_name, name); | |
d70910e8 | 994 | |
252b5132 RH |
995 | free (tmp_name); |
996 | ||
997 | return myh; | |
998 | } | |
7831a775 | 999 | #endif /* not ARM_WINCE */ |
252b5132 RH |
1000 | |
1001 | static struct coff_link_hash_entry * | |
c8e7bf0d NC |
1002 | find_arm_glue (struct bfd_link_info *info, |
1003 | const char *name, | |
1004 | bfd *input_bfd) | |
252b5132 | 1005 | { |
dc810e39 | 1006 | char *tmp_name; |
252b5132 | 1007 | struct coff_link_hash_entry * myh; |
dc810e39 | 1008 | bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; |
252b5132 | 1009 | |
c8e7bf0d | 1010 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1011 | |
1012 | BFD_ASSERT (tmp_name); | |
1013 | ||
1014 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
d70910e8 | 1015 | |
252b5132 | 1016 | myh = coff_link_hash_lookup |
b34976b6 | 1017 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
1018 | |
1019 | if (myh == NULL) | |
1020 | /* xgettext:c-format */ | |
d003868e AM |
1021 | _bfd_error_handler (_("%B: unable to find ARM glue '%s' for `%s'"), |
1022 | input_bfd, tmp_name, name); | |
d70910e8 | 1023 | |
252b5132 RH |
1024 | free (tmp_name); |
1025 | ||
1026 | return myh; | |
1027 | } | |
1028 | ||
1029 | /* | |
1030 | ARM->Thumb glue: | |
1031 | ||
1032 | .arm | |
1033 | __func_from_arm: | |
1034 | ldr r12, __func_addr | |
1035 | bx r12 | |
1036 | __func_addr: | |
1037 | .word func @ behave as if you saw a ARM_32 reloc | |
1038 | */ | |
1039 | ||
1040 | #define ARM2THUMB_GLUE_SIZE 12 | |
1041 | static const insn32 a2t1_ldr_insn = 0xe59fc000; | |
1042 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
1043 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
1044 | ||
252b5132 RH |
1045 | /* |
1046 | Thumb->ARM: Thumb->(non-interworking aware) ARM | |
1047 | ||
1048 | .thumb .thumb | |
1049 | .align 2 .align 2 | |
1050 | __func_from_thumb: __func_from_thumb: | |
1051 | bx pc push {r6, lr} | |
1052 | nop ldr r6, __func_addr | |
1053 | .arm mov lr, pc | |
1054 | __func_change_to_arm: bx r6 | |
1055 | b func .arm | |
1056 | __func_back_to_thumb: | |
1057 | ldmia r13! {r6, lr} | |
1058 | bx lr | |
1059 | __func_addr: | |
d70910e8 | 1060 | .word func |
252b5132 RH |
1061 | */ |
1062 | ||
1063 | #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8) | |
2dc773a0 | 1064 | #ifndef ARM_WINCE |
252b5132 RH |
1065 | static const insn16 t2a1_bx_pc_insn = 0x4778; |
1066 | static const insn16 t2a2_noop_insn = 0x46c0; | |
1067 | static const insn32 t2a3_b_insn = 0xea000000; | |
1068 | ||
252b5132 RH |
1069 | static const insn16 t2a1_push_insn = 0xb540; |
1070 | static const insn16 t2a2_ldr_insn = 0x4e03; | |
1071 | static const insn16 t2a3_mov_insn = 0x46fe; | |
1072 | static const insn16 t2a4_bx_insn = 0x4730; | |
1073 | static const insn32 t2a5_pop_insn = 0xe8bd4040; | |
1074 | static const insn32 t2a6_bx_insn = 0xe12fff1e; | |
2dc773a0 | 1075 | #endif |
252b5132 RH |
1076 | |
1077 | /* TODO: | |
1078 | We should really create new local (static) symbols in destination | |
1079 | object for each stub we create. We should also create local | |
1080 | (static) symbols within the stubs when switching between ARM and | |
1081 | Thumb code. This will ensure that the debugger and disassembler | |
1082 | can present a better view of stubs. | |
1083 | ||
1084 | We can treat stubs like literal sections, and for the THUMB9 ones | |
1085 | (short addressing range) we should be able to insert the stubs | |
1086 | between sections. i.e. the simplest approach (since relocations | |
1087 | are done on a section basis) is to dump the stubs at the end of | |
1088 | processing a section. That way we can always try and minimise the | |
1089 | offset to and from a stub. However, this does not map well onto | |
1090 | the way that the linker/BFD does its work: mapping all input | |
1091 | sections to output sections via the linker script before doing | |
1092 | all the processing. | |
1093 | ||
1094 | Unfortunately it may be easier to just to disallow short range | |
1095 | Thumb->ARM stubs (i.e. no conditional inter-working branches, | |
1096 | only branch-and-link (BL) calls. This will simplify the processing | |
1097 | since we can then put all of the stubs into their own section. | |
1098 | ||
1099 | TODO: | |
1100 | On a different subject, rather than complaining when a | |
1101 | branch cannot fit in the number of bits available for the | |
1102 | instruction we should generate a trampoline stub (needed to | |
1103 | address the complete 32bit address space). */ | |
1104 | ||
d70910e8 | 1105 | /* The standard COFF backend linker does not cope with the special |
252b5132 RH |
1106 | Thumb BRANCH23 relocation. The alternative would be to split the |
1107 | BRANCH23 into seperate HI23 and LO23 relocations. However, it is a | |
d70910e8 | 1108 | bit simpler simply providing our own relocation driver. */ |
252b5132 RH |
1109 | |
1110 | /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE: | |
1111 | This code is a very slightly modified copy of | |
1112 | _bfd_coff_generic_relocate_section. It would be a much more | |
1113 | maintainable solution to have a MACRO that could be expanded within | |
1114 | _bfd_coff_generic_relocate_section that would only be provided for | |
1115 | ARM/Thumb builds. It is only the code marked THUMBEXTENSION that | |
1116 | is different from the original. */ | |
1117 | ||
b34976b6 | 1118 | static bfd_boolean |
c8e7bf0d NC |
1119 | coff_arm_relocate_section (bfd *output_bfd, |
1120 | struct bfd_link_info *info, | |
1121 | bfd *input_bfd, | |
1122 | asection *input_section, | |
1123 | bfd_byte *contents, | |
1124 | struct internal_reloc *relocs, | |
1125 | struct internal_syment *syms, | |
1126 | asection **sections) | |
252b5132 RH |
1127 | { |
1128 | struct internal_reloc * rel; | |
1129 | struct internal_reloc * relend; | |
2dc773a0 | 1130 | #ifndef ARM_WINCE |
07515404 | 1131 | bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section); |
2dc773a0 | 1132 | #endif |
252b5132 RH |
1133 | |
1134 | rel = relocs; | |
1135 | relend = rel + input_section->reloc_count; | |
1136 | ||
1137 | for (; rel < relend; rel++) | |
1138 | { | |
1139 | int done = 0; | |
1140 | long symndx; | |
1141 | struct coff_link_hash_entry * h; | |
1142 | struct internal_syment * sym; | |
1143 | bfd_vma addend; | |
1144 | bfd_vma val; | |
1145 | reloc_howto_type * howto; | |
1146 | bfd_reloc_status_type rstat; | |
1147 | bfd_vma h_val; | |
1148 | ||
1149 | symndx = rel->r_symndx; | |
1150 | ||
1151 | if (symndx == -1) | |
1152 | { | |
1153 | h = NULL; | |
1154 | sym = NULL; | |
1155 | } | |
1156 | else | |
d70910e8 | 1157 | { |
252b5132 RH |
1158 | h = obj_coff_sym_hashes (input_bfd)[symndx]; |
1159 | sym = syms + symndx; | |
1160 | } | |
1161 | ||
1162 | /* COFF treats common symbols in one of two ways. Either the | |
1163 | size of the symbol is included in the section contents, or it | |
1164 | is not. We assume that the size is not included, and force | |
1165 | the rtype_to_howto function to adjust the addend as needed. */ | |
1166 | ||
1167 | if (sym != NULL && sym->n_scnum != 0) | |
1168 | addend = - sym->n_value; | |
1169 | else | |
1170 | addend = 0; | |
1171 | ||
252b5132 RH |
1172 | howto = coff_rtype_to_howto (input_bfd, input_section, rel, h, |
1173 | sym, &addend); | |
1174 | if (howto == NULL) | |
b34976b6 | 1175 | return FALSE; |
252b5132 RH |
1176 | |
1177 | /* The relocation_section function will skip pcrel_offset relocs | |
1049f94e | 1178 | when doing a relocatable link. However, we want to convert |
d21356d8 | 1179 | ARM_26 to ARM_26D relocs if possible. We return a fake howto in |
252b5132 | 1180 | this case without pcrel_offset set, and adjust the addend to |
44e88952 NC |
1181 | compensate. 'partial_inplace' is also set, since we want 'done' |
1182 | relocations to be reflected in section's data. */ | |
252b5132 RH |
1183 | if (rel->r_type == ARM_26 |
1184 | && h != NULL | |
1049f94e | 1185 | && info->relocatable |
252b5132 RH |
1186 | && (h->root.type == bfd_link_hash_defined |
1187 | || h->root.type == bfd_link_hash_defweak) | |
dc810e39 AM |
1188 | && (h->root.u.def.section->output_section |
1189 | == input_section->output_section)) | |
252b5132 | 1190 | { |
d70910e8 | 1191 | static reloc_howto_type fake_arm26_reloc = |
252b5132 RH |
1192 | HOWTO (ARM_26, |
1193 | 2, | |
1194 | 2, | |
1195 | 24, | |
b34976b6 | 1196 | TRUE, |
252b5132 RH |
1197 | 0, |
1198 | complain_overflow_signed, | |
1199 | aoutarm_fix_pcrel_26 , | |
1200 | "ARM_26", | |
44e88952 | 1201 | TRUE, |
252b5132 | 1202 | 0x00ffffff, |
d70910e8 | 1203 | 0x00ffffff, |
b34976b6 | 1204 | FALSE); |
252b5132 RH |
1205 | |
1206 | addend -= rel->r_vaddr - input_section->vma; | |
44e88952 NC |
1207 | #ifdef ARM_WINCE |
1208 | /* FIXME: I don't know why, but the hack is necessary for correct | |
c8e7bf0d | 1209 | generation of bl's instruction offset. */ |
44e88952 NC |
1210 | addend -= 8; |
1211 | #endif | |
252b5132 RH |
1212 | howto = &fake_arm26_reloc; |
1213 | } | |
1214 | ||
17505c5c NC |
1215 | #ifdef ARM_WINCE |
1216 | /* MS ARM-CE makes the reloc relative to the opcode's pc, not | |
d70910e8 | 1217 | the next opcode's pc, so is off by one. */ |
17505c5c | 1218 | #endif |
d70910e8 | 1219 | |
1049f94e | 1220 | /* If we are doing a relocatable link, then we can just ignore |
252b5132 | 1221 | a PC relative reloc that is pcrel_offset. It will already |
1049f94e | 1222 | have the correct value. If this is not a relocatable link, |
252b5132 RH |
1223 | then we should ignore the symbol value. */ |
1224 | if (howto->pc_relative && howto->pcrel_offset) | |
1225 | { | |
1049f94e | 1226 | if (info->relocatable) |
252b5132 | 1227 | continue; |
87748b32 NC |
1228 | /* FIXME - it is not clear which targets need this next test |
1229 | and which do not. It is known that it is needed for the | |
d8adc60f | 1230 | VxWorks and EPOC-PE targets, but it is also known that it |
5c4491d3 | 1231 | was suppressed for other ARM targets. This ought to be |
d8adc60f NC |
1232 | sorted out one day. */ |
1233 | #ifdef ARM_COFF_BUGFIX | |
87748b32 NC |
1234 | /* We must not ignore the symbol value. If the symbol is |
1235 | within the same section, the relocation should have already | |
1236 | been fixed, but if it is not, we'll be handed a reloc into | |
1237 | the beginning of the symbol's section, so we must not cancel | |
1238 | out the symbol's value, otherwise we'll be adding it in | |
1239 | twice. */ | |
252b5132 RH |
1240 | if (sym != NULL && sym->n_scnum != 0) |
1241 | addend += sym->n_value; | |
ed1de528 | 1242 | #endif |
252b5132 RH |
1243 | } |
1244 | ||
1245 | val = 0; | |
1246 | ||
1247 | if (h == NULL) | |
1248 | { | |
1249 | asection *sec; | |
1250 | ||
1251 | if (symndx == -1) | |
1252 | { | |
1253 | sec = bfd_abs_section_ptr; | |
1254 | val = 0; | |
1255 | } | |
1256 | else | |
1257 | { | |
1258 | sec = sections[symndx]; | |
1259 | val = (sec->output_section->vma | |
1260 | + sec->output_offset | |
1261 | + sym->n_value | |
1262 | - sec->vma); | |
1263 | } | |
1264 | } | |
1265 | else | |
1266 | { | |
252b5132 RH |
1267 | /* We don't output the stubs if we are generating a |
1268 | relocatable output file, since we may as well leave the | |
1269 | stub generation to the final linker pass. If we fail to | |
1270 | verify that the name is defined, we'll try to build stubs | |
d70910e8 | 1271 | for an undefined name... */ |
1049f94e | 1272 | if (! info->relocatable |
252b5132 RH |
1273 | && ( h->root.type == bfd_link_hash_defined |
1274 | || h->root.type == bfd_link_hash_defweak)) | |
1275 | { | |
1276 | asection * h_sec = h->root.u.def.section; | |
1277 | const char * name = h->root.root.string; | |
d70910e8 | 1278 | |
252b5132 RH |
1279 | /* h locates the symbol referenced in the reloc. */ |
1280 | h_val = (h->root.u.def.value | |
1281 | + h_sec->output_section->vma | |
1282 | + h_sec->output_offset); | |
1283 | ||
1284 | if (howto->type == ARM_26) | |
1285 | { | |
1286 | if ( h->class == C_THUMBSTATFUNC | |
1287 | || h->class == C_THUMBEXTFUNC) | |
1288 | { | |
917583ad | 1289 | /* Arm code calling a Thumb function. */ |
252b5132 | 1290 | unsigned long int tmp; |
dc810e39 | 1291 | bfd_vma my_offset; |
252b5132 RH |
1292 | asection * s; |
1293 | long int ret_offset; | |
d70910e8 | 1294 | struct coff_link_hash_entry * myh; |
252b5132 | 1295 | struct coff_arm_link_hash_table * globals; |
d70910e8 | 1296 | |
252b5132 RH |
1297 | myh = find_arm_glue (info, name, input_bfd); |
1298 | if (myh == NULL) | |
b34976b6 | 1299 | return FALSE; |
252b5132 RH |
1300 | |
1301 | globals = coff_arm_hash_table (info); | |
1302 | ||
1303 | BFD_ASSERT (globals != NULL); | |
1304 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1305 | |
252b5132 | 1306 | my_offset = myh->root.u.def.value; |
d70910e8 KH |
1307 | |
1308 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
252b5132 RH |
1309 | ARM2THUMB_GLUE_SECTION_NAME); |
1310 | BFD_ASSERT (s != NULL); | |
1311 | BFD_ASSERT (s->contents != NULL); | |
1312 | BFD_ASSERT (s->output_section != NULL); | |
1313 | ||
1314 | if ((my_offset & 0x01) == 0x01) | |
1315 | { | |
1316 | if (h_sec->owner != NULL | |
1317 | && INTERWORK_SET (h_sec->owner) | |
1318 | && ! INTERWORK_FLAG (h_sec->owner)) | |
d003868e AM |
1319 | _bfd_error_handler |
1320 | /* xgettext:c-format */ | |
1321 | (_("%B(%s): warning: interworking not enabled.\n" | |
1322 | " first occurrence: %B: arm call to thumb"), | |
1323 | h_sec->owner, input_bfd, name); | |
252b5132 RH |
1324 | |
1325 | --my_offset; | |
1326 | myh->root.u.def.value = my_offset; | |
1327 | ||
dc810e39 | 1328 | bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn, |
252b5132 | 1329 | s->contents + my_offset); |
d70910e8 | 1330 | |
dc810e39 | 1331 | bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
252b5132 | 1332 | s->contents + my_offset + 4); |
d70910e8 | 1333 | |
252b5132 RH |
1334 | /* It's a thumb address. Add the low order bit. */ |
1335 | bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn, | |
1336 | s->contents + my_offset + 8); | |
1337 | ||
1338 | if (info->base_file) | |
d70910e8 | 1339 | arm_emit_base_file_entry (info, output_bfd, s, |
dc810e39 | 1340 | my_offset + 8); |
252b5132 RH |
1341 | |
1342 | } | |
1343 | ||
1344 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
1345 | ||
1346 | tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr | |
1347 | - input_section->vma); | |
d70910e8 | 1348 | |
252b5132 RH |
1349 | tmp = tmp & 0xFF000000; |
1350 | ||
d70910e8 | 1351 | /* Somehow these are both 4 too far, so subtract 8. */ |
252b5132 RH |
1352 | ret_offset = |
1353 | s->output_offset | |
d70910e8 | 1354 | + my_offset |
252b5132 RH |
1355 | + s->output_section->vma |
1356 | - (input_section->output_offset | |
d70910e8 | 1357 | + input_section->output_section->vma |
252b5132 RH |
1358 | + rel->r_vaddr) |
1359 | - 8; | |
1360 | ||
1361 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); | |
d70910e8 | 1362 | |
dc810e39 AM |
1363 | bfd_put_32 (output_bfd, (bfd_vma) tmp, |
1364 | contents + rel->r_vaddr - input_section->vma); | |
252b5132 RH |
1365 | done = 1; |
1366 | } | |
1367 | } | |
d70910e8 | 1368 | |
17505c5c | 1369 | #ifndef ARM_WINCE |
917583ad | 1370 | /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */ |
252b5132 RH |
1371 | else if (howto->type == ARM_THUMB23) |
1372 | { | |
d70910e8 | 1373 | if ( h->class == C_EXT |
252b5132 RH |
1374 | || h->class == C_STAT |
1375 | || h->class == C_LABEL) | |
1376 | { | |
c8e7bf0d | 1377 | /* Thumb code calling an ARM function. */ |
252b5132 | 1378 | asection * s = 0; |
dc810e39 | 1379 | bfd_vma my_offset; |
252b5132 RH |
1380 | unsigned long int tmp; |
1381 | long int ret_offset; | |
1382 | struct coff_link_hash_entry * myh; | |
1383 | struct coff_arm_link_hash_table * globals; | |
1384 | ||
1385 | myh = find_thumb_glue (info, name, input_bfd); | |
1386 | if (myh == NULL) | |
b34976b6 | 1387 | return FALSE; |
252b5132 RH |
1388 | |
1389 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1390 | |
252b5132 RH |
1391 | BFD_ASSERT (globals != NULL); |
1392 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1393 | |
252b5132 | 1394 | my_offset = myh->root.u.def.value; |
d70910e8 KH |
1395 | |
1396 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
252b5132 | 1397 | THUMB2ARM_GLUE_SECTION_NAME); |
d70910e8 | 1398 | |
252b5132 RH |
1399 | BFD_ASSERT (s != NULL); |
1400 | BFD_ASSERT (s->contents != NULL); | |
1401 | BFD_ASSERT (s->output_section != NULL); | |
d70910e8 | 1402 | |
252b5132 RH |
1403 | if ((my_offset & 0x01) == 0x01) |
1404 | { | |
1405 | if (h_sec->owner != NULL | |
1406 | && INTERWORK_SET (h_sec->owner) | |
1407 | && ! INTERWORK_FLAG (h_sec->owner) | |
1408 | && ! globals->support_old_code) | |
d003868e AM |
1409 | _bfd_error_handler |
1410 | /* xgettext:c-format */ | |
1411 | (_("%B(%s): warning: interworking not enabled.\n" | |
1412 | " first occurrence: %B: thumb call to arm\n" | |
1413 | " consider relinking with --support-old-code enabled"), | |
1414 | h_sec->owner, input_bfd, name); | |
d70910e8 | 1415 | |
252b5132 RH |
1416 | -- my_offset; |
1417 | myh->root.u.def.value = my_offset; | |
1418 | ||
1419 | if (globals->support_old_code) | |
1420 | { | |
dc810e39 | 1421 | bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn, |
252b5132 | 1422 | s->contents + my_offset); |
d70910e8 | 1423 | |
dc810e39 | 1424 | bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn, |
252b5132 RH |
1425 | s->contents + my_offset + 2); |
1426 | ||
dc810e39 | 1427 | bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn, |
252b5132 RH |
1428 | s->contents + my_offset + 4); |
1429 | ||
dc810e39 | 1430 | bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn, |
252b5132 | 1431 | s->contents + my_offset + 6); |
d70910e8 | 1432 | |
dc810e39 | 1433 | bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn, |
252b5132 | 1434 | s->contents + my_offset + 8); |
d70910e8 | 1435 | |
dc810e39 | 1436 | bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn, |
252b5132 | 1437 | s->contents + my_offset + 12); |
d70910e8 | 1438 | |
252b5132 RH |
1439 | /* Store the address of the function in the last word of the stub. */ |
1440 | bfd_put_32 (output_bfd, h_val, | |
1441 | s->contents + my_offset + 16); | |
fa0e42e4 CM |
1442 | |
1443 | if (info->base_file) | |
dc810e39 AM |
1444 | arm_emit_base_file_entry (info, output_bfd, s, |
1445 | my_offset + 16); | |
252b5132 RH |
1446 | } |
1447 | else | |
1448 | { | |
dc810e39 | 1449 | bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
252b5132 | 1450 | s->contents + my_offset); |
d70910e8 | 1451 | |
dc810e39 | 1452 | bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn, |
252b5132 | 1453 | s->contents + my_offset + 2); |
d70910e8 | 1454 | |
252b5132 | 1455 | ret_offset = |
c8e7bf0d NC |
1456 | /* Address of destination of the stub. */ |
1457 | ((bfd_signed_vma) h_val) | |
252b5132 | 1458 | - ((bfd_signed_vma) |
c8e7bf0d NC |
1459 | /* Offset from the start of the current section to the start of the stubs. */ |
1460 | (s->output_offset | |
1461 | /* Offset of the start of this stub from the start of the stubs. */ | |
1462 | + my_offset | |
1463 | /* Address of the start of the current section. */ | |
1464 | + s->output_section->vma) | |
1465 | /* The branch instruction is 4 bytes into the stub. */ | |
1466 | + 4 | |
1467 | /* ARM branches work from the pc of the instruction + 8. */ | |
1468 | + 8); | |
d70910e8 | 1469 | |
252b5132 | 1470 | bfd_put_32 (output_bfd, |
dc810e39 | 1471 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), |
252b5132 RH |
1472 | s->contents + my_offset + 4); |
1473 | ||
252b5132 RH |
1474 | } |
1475 | } | |
1476 | ||
1477 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
1478 | ||
1479 | /* Now go back and fix up the original BL insn to point | |
1480 | to here. */ | |
1481 | ret_offset = | |
1482 | s->output_offset | |
1483 | + my_offset | |
1484 | - (input_section->output_offset | |
1485 | + rel->r_vaddr) | |
1486 | -4; | |
d70910e8 | 1487 | |
252b5132 RH |
1488 | tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr |
1489 | - input_section->vma); | |
1490 | ||
1491 | bfd_put_32 (output_bfd, | |
dc810e39 AM |
1492 | (bfd_vma) insert_thumb_branch (tmp, |
1493 | ret_offset), | |
1494 | contents + rel->r_vaddr - input_section->vma); | |
d70910e8 | 1495 | |
252b5132 RH |
1496 | done = 1; |
1497 | } | |
1498 | } | |
17505c5c | 1499 | #endif |
252b5132 | 1500 | } |
d70910e8 | 1501 | |
252b5132 RH |
1502 | /* If the relocation type and destination symbol does not |
1503 | fall into one of the above categories, then we can just | |
d70910e8 | 1504 | perform a direct link. */ |
252b5132 RH |
1505 | |
1506 | if (done) | |
1507 | rstat = bfd_reloc_ok; | |
d70910e8 | 1508 | else |
252b5132 RH |
1509 | if ( h->root.type == bfd_link_hash_defined |
1510 | || h->root.type == bfd_link_hash_defweak) | |
1511 | { | |
1512 | asection *sec; | |
1513 | ||
1514 | sec = h->root.u.def.section; | |
1515 | val = (h->root.u.def.value | |
1516 | + sec->output_section->vma | |
1517 | + sec->output_offset); | |
1518 | } | |
1519 | ||
1049f94e | 1520 | else if (! info->relocatable) |
252b5132 RH |
1521 | { |
1522 | if (! ((*info->callbacks->undefined_symbol) | |
1523 | (info, h->root.root.string, input_bfd, input_section, | |
b34976b6 AM |
1524 | rel->r_vaddr - input_section->vma, TRUE))) |
1525 | return FALSE; | |
252b5132 RH |
1526 | } |
1527 | } | |
1528 | ||
1529 | if (info->base_file) | |
1530 | { | |
d70910e8 | 1531 | /* Emit a reloc if the backend thinks it needs it. */ |
252b5132 | 1532 | if (sym && pe_data(output_bfd)->in_reloc_p(output_bfd, howto)) |
dc810e39 AM |
1533 | arm_emit_base_file_entry (info, output_bfd, input_section, |
1534 | rel->r_vaddr); | |
252b5132 | 1535 | } |
d70910e8 | 1536 | |
252b5132 RH |
1537 | if (done) |
1538 | rstat = bfd_reloc_ok; | |
17505c5c | 1539 | #ifndef ARM_WINCE |
c8e7bf0d | 1540 | /* Only perform this fix during the final link, not a relocatable link. */ |
1049f94e | 1541 | else if (! info->relocatable |
252b5132 RH |
1542 | && howto->type == ARM_THUMB23) |
1543 | { | |
1544 | /* This is pretty much a copy of what the default | |
1545 | _bfd_final_link_relocate and _bfd_relocate_contents | |
1546 | routines do to perform a relocation, with special | |
1547 | processing for the split addressing of the Thumb BL | |
1548 | instruction. Again, it would probably be simpler adding a | |
1549 | ThumbBRANCH23 specific macro expansion into the default | |
1550 | code. */ | |
d70910e8 | 1551 | |
252b5132 | 1552 | bfd_vma address = rel->r_vaddr - input_section->vma; |
d70910e8 | 1553 | |
07515404 | 1554 | if (address > high_address) |
252b5132 RH |
1555 | rstat = bfd_reloc_outofrange; |
1556 | else | |
1557 | { | |
b34976b6 AM |
1558 | bfd_vma relocation = val + addend; |
1559 | int size = bfd_get_reloc_size (howto); | |
1560 | bfd_boolean overflow = FALSE; | |
1561 | bfd_byte *location = contents + address; | |
1562 | bfd_vma x = bfd_get_32 (input_bfd, location); | |
1563 | bfd_vma src_mask = 0x007FFFFE; | |
1564 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; | |
1565 | bfd_signed_vma reloc_signed_min = ~reloc_signed_max; | |
1566 | bfd_vma check; | |
1567 | bfd_signed_vma signed_check; | |
1568 | bfd_vma add; | |
1569 | bfd_signed_vma signed_add; | |
252b5132 RH |
1570 | |
1571 | BFD_ASSERT (size == 4); | |
d70910e8 | 1572 | |
4f3c3dbb | 1573 | /* howto->pc_relative should be TRUE for type 14 BRANCH23. */ |
252b5132 RH |
1574 | relocation -= (input_section->output_section->vma |
1575 | + input_section->output_offset); | |
d70910e8 | 1576 | |
4f3c3dbb | 1577 | /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */ |
252b5132 | 1578 | relocation -= address; |
d70910e8 KH |
1579 | |
1580 | /* No need to negate the relocation with BRANCH23. */ | |
252b5132 RH |
1581 | /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */ |
1582 | /* howto->rightshift == 1 */ | |
d70910e8 | 1583 | |
4f3c3dbb | 1584 | /* Drop unwanted bits from the value we are relocating to. */ |
252b5132 | 1585 | check = relocation >> howto->rightshift; |
d70910e8 | 1586 | |
252b5132 RH |
1587 | /* If this is a signed value, the rightshift just dropped |
1588 | leading 1 bits (assuming twos complement). */ | |
1589 | if ((bfd_signed_vma) relocation >= 0) | |
1590 | signed_check = check; | |
1591 | else | |
1592 | signed_check = (check | |
1593 | | ((bfd_vma) - 1 | |
1594 | & ~((bfd_vma) - 1 >> howto->rightshift))); | |
d70910e8 | 1595 | |
252b5132 RH |
1596 | /* Get the value from the object file. */ |
1597 | if (bfd_big_endian (input_bfd)) | |
4f3c3dbb | 1598 | add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1); |
252b5132 | 1599 | else |
4f3c3dbb | 1600 | add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15)); |
252b5132 RH |
1601 | |
1602 | /* Get the value from the object file with an appropriate sign. | |
1603 | The expression involving howto->src_mask isolates the upper | |
1604 | bit of src_mask. If that bit is set in the value we are | |
1605 | adding, it is negative, and we subtract out that number times | |
1606 | two. If src_mask includes the highest possible bit, then we | |
1607 | can not get the upper bit, but that does not matter since | |
1608 | signed_add needs no adjustment to become negative in that | |
1609 | case. */ | |
252b5132 | 1610 | signed_add = add; |
d70910e8 | 1611 | |
252b5132 RH |
1612 | if ((add & (((~ src_mask) >> 1) & src_mask)) != 0) |
1613 | signed_add -= (((~ src_mask) >> 1) & src_mask) << 1; | |
d70910e8 | 1614 | |
4f3c3dbb | 1615 | /* howto->bitpos == 0 */ |
252b5132 RH |
1616 | /* Add the value from the object file, shifted so that it is a |
1617 | straight number. */ | |
252b5132 | 1618 | signed_check += signed_add; |
4f3c3dbb | 1619 | relocation += signed_add; |
252b5132 RH |
1620 | |
1621 | BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed); | |
1622 | ||
1623 | /* Assumes two's complement. */ | |
1624 | if ( signed_check > reloc_signed_max | |
1625 | || signed_check < reloc_signed_min) | |
b34976b6 | 1626 | overflow = TRUE; |
d70910e8 | 1627 | |
c62e1cc3 NC |
1628 | /* Put the relocation into the correct bits. |
1629 | For a BLX instruction, make sure that the relocation is rounded up | |
1630 | to a word boundary. This follows the semantics of the instruction | |
1631 | which specifies that bit 1 of the target address will come from bit | |
1632 | 1 of the base address. */ | |
252b5132 | 1633 | if (bfd_big_endian (input_bfd)) |
c62e1cc3 NC |
1634 | { |
1635 | if ((x & 0x1800) == 0x0800 && (relocation & 0x02)) | |
1636 | relocation += 2; | |
1637 | relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000)); | |
1638 | } | |
252b5132 | 1639 | else |
c62e1cc3 NC |
1640 | { |
1641 | if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02)) | |
1642 | relocation += 2; | |
1643 | relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff)); | |
1644 | } | |
d70910e8 | 1645 | |
4f3c3dbb | 1646 | /* Add the relocation to the correct bits of X. */ |
252b5132 RH |
1647 | x = ((x & ~howto->dst_mask) | relocation); |
1648 | ||
4f3c3dbb | 1649 | /* Put the relocated value back in the object file. */ |
252b5132 RH |
1650 | bfd_put_32 (input_bfd, x, location); |
1651 | ||
1652 | rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok; | |
1653 | } | |
1654 | } | |
17505c5c | 1655 | #endif |
252b5132 | 1656 | else |
1e7fef1d NC |
1657 | if (info->relocatable && ! howto->partial_inplace) |
1658 | rstat = bfd_reloc_ok; | |
1659 | else | |
1660 | rstat = _bfd_final_link_relocate (howto, input_bfd, input_section, | |
1661 | contents, | |
1662 | rel->r_vaddr - input_section->vma, | |
1663 | val, addend); | |
c8e7bf0d | 1664 | /* Only perform this fix during the final link, not a relocatable link. */ |
1049f94e | 1665 | if (! info->relocatable |
b44267fd | 1666 | && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32)) |
252b5132 RH |
1667 | { |
1668 | /* Determine if we need to set the bottom bit of a relocated address | |
1669 | because the address is the address of a Thumb code symbol. */ | |
b34976b6 | 1670 | int patchit = FALSE; |
d70910e8 | 1671 | |
252b5132 RH |
1672 | if (h != NULL |
1673 | && ( h->class == C_THUMBSTATFUNC | |
1674 | || h->class == C_THUMBEXTFUNC)) | |
1675 | { | |
b34976b6 | 1676 | patchit = TRUE; |
252b5132 RH |
1677 | } |
1678 | else if (sym != NULL | |
1679 | && sym->n_scnum > N_UNDEF) | |
1680 | { | |
1681 | /* No hash entry - use the symbol instead. */ | |
252b5132 RH |
1682 | if ( sym->n_sclass == C_THUMBSTATFUNC |
1683 | || sym->n_sclass == C_THUMBEXTFUNC) | |
b34976b6 | 1684 | patchit = TRUE; |
252b5132 RH |
1685 | } |
1686 | ||
1687 | if (patchit) | |
1688 | { | |
1689 | bfd_byte * location = contents + rel->r_vaddr - input_section->vma; | |
1690 | bfd_vma x = bfd_get_32 (input_bfd, location); | |
1691 | ||
1692 | bfd_put_32 (input_bfd, x | 1, location); | |
1693 | } | |
1694 | } | |
d70910e8 | 1695 | |
252b5132 RH |
1696 | switch (rstat) |
1697 | { | |
1698 | default: | |
1699 | abort (); | |
1700 | case bfd_reloc_ok: | |
1701 | break; | |
1702 | case bfd_reloc_outofrange: | |
1703 | (*_bfd_error_handler) | |
d003868e AM |
1704 | (_("%B: bad reloc address 0x%lx in section `%A'"), |
1705 | input_bfd, input_section, (unsigned long) rel->r_vaddr); | |
b34976b6 | 1706 | return FALSE; |
252b5132 RH |
1707 | case bfd_reloc_overflow: |
1708 | { | |
1709 | const char *name; | |
1710 | char buf[SYMNMLEN + 1]; | |
1711 | ||
1712 | if (symndx == -1) | |
1713 | name = "*ABS*"; | |
1714 | else if (h != NULL) | |
dfeffb9f | 1715 | name = NULL; |
252b5132 RH |
1716 | else |
1717 | { | |
1718 | name = _bfd_coff_internal_syment_name (input_bfd, sym, buf); | |
1719 | if (name == NULL) | |
b34976b6 | 1720 | return FALSE; |
252b5132 RH |
1721 | } |
1722 | ||
1723 | if (! ((*info->callbacks->reloc_overflow) | |
dfeffb9f L |
1724 | (info, (h ? &h->root : NULL), name, howto->name, |
1725 | (bfd_vma) 0, input_bfd, input_section, | |
1726 | rel->r_vaddr - input_section->vma))) | |
b34976b6 | 1727 | return FALSE; |
252b5132 RH |
1728 | } |
1729 | } | |
1730 | } | |
1731 | ||
b34976b6 | 1732 | return TRUE; |
252b5132 RH |
1733 | } |
1734 | ||
e049a0de ILT |
1735 | #ifndef COFF_IMAGE_WITH_PE |
1736 | ||
b34976b6 | 1737 | bfd_boolean |
c8e7bf0d | 1738 | bfd_arm_allocate_interworking_sections (struct bfd_link_info * info) |
252b5132 RH |
1739 | { |
1740 | asection * s; | |
1741 | bfd_byte * foo; | |
1742 | struct coff_arm_link_hash_table * globals; | |
252b5132 RH |
1743 | |
1744 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1745 | |
252b5132 RH |
1746 | BFD_ASSERT (globals != NULL); |
1747 | ||
1748 | if (globals->arm_glue_size != 0) | |
1749 | { | |
1750 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1751 | |
252b5132 RH |
1752 | s = bfd_get_section_by_name |
1753 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
1754 | ||
1755 | BFD_ASSERT (s != NULL); | |
d70910e8 | 1756 | |
c8e7bf0d | 1757 | foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size); |
d70910e8 | 1758 | |
eea6121a | 1759 | s->size = globals->arm_glue_size; |
252b5132 RH |
1760 | s->contents = foo; |
1761 | } | |
1762 | ||
1763 | if (globals->thumb_glue_size != 0) | |
1764 | { | |
1765 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1766 | |
252b5132 RH |
1767 | s = bfd_get_section_by_name |
1768 | (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); | |
1769 | ||
1770 | BFD_ASSERT (s != NULL); | |
d70910e8 | 1771 | |
c8e7bf0d | 1772 | foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size); |
d70910e8 | 1773 | |
eea6121a | 1774 | s->size = globals->thumb_glue_size; |
252b5132 RH |
1775 | s->contents = foo; |
1776 | } | |
1777 | ||
b34976b6 | 1778 | return TRUE; |
252b5132 RH |
1779 | } |
1780 | ||
1781 | static void | |
c8e7bf0d NC |
1782 | record_arm_to_thumb_glue (struct bfd_link_info * info, |
1783 | struct coff_link_hash_entry * h) | |
252b5132 RH |
1784 | { |
1785 | const char * name = h->root.root.string; | |
1786 | register asection * s; | |
1787 | char * tmp_name; | |
1788 | struct coff_link_hash_entry * myh; | |
14a793b2 | 1789 | struct bfd_link_hash_entry * bh; |
252b5132 | 1790 | struct coff_arm_link_hash_table * globals; |
dc810e39 AM |
1791 | bfd_vma val; |
1792 | bfd_size_type amt; | |
252b5132 RH |
1793 | |
1794 | globals = coff_arm_hash_table (info); | |
1795 | ||
1796 | BFD_ASSERT (globals != NULL); | |
1797 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1798 | ||
1799 | s = bfd_get_section_by_name | |
1800 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
1801 | ||
1802 | BFD_ASSERT (s != NULL); | |
1803 | ||
dc810e39 | 1804 | amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; |
c8e7bf0d | 1805 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1806 | |
1807 | BFD_ASSERT (tmp_name); | |
1808 | ||
1809 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
d70910e8 | 1810 | |
252b5132 | 1811 | myh = coff_link_hash_lookup |
b34976b6 | 1812 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 1813 | |
252b5132 RH |
1814 | if (myh != NULL) |
1815 | { | |
1816 | free (tmp_name); | |
c8e7bf0d NC |
1817 | /* We've already seen this guy. */ |
1818 | return; | |
252b5132 RH |
1819 | } |
1820 | ||
1821 | /* The only trick here is using globals->arm_glue_size as the value. Even | |
1822 | though the section isn't allocated yet, this is where we will be putting | |
1823 | it. */ | |
14a793b2 | 1824 | bh = NULL; |
dc810e39 | 1825 | val = globals->arm_glue_size + 1; |
252b5132 | 1826 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1827 | BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); |
d70910e8 | 1828 | |
252b5132 | 1829 | free (tmp_name); |
d70910e8 | 1830 | |
252b5132 RH |
1831 | globals->arm_glue_size += ARM2THUMB_GLUE_SIZE; |
1832 | ||
1833 | return; | |
1834 | } | |
1835 | ||
7831a775 | 1836 | #ifndef ARM_WINCE |
252b5132 | 1837 | static void |
c8e7bf0d NC |
1838 | record_thumb_to_arm_glue (struct bfd_link_info * info, |
1839 | struct coff_link_hash_entry * h) | |
252b5132 RH |
1840 | { |
1841 | const char * name = h->root.root.string; | |
c8e7bf0d | 1842 | asection * s; |
252b5132 RH |
1843 | char * tmp_name; |
1844 | struct coff_link_hash_entry * myh; | |
14a793b2 | 1845 | struct bfd_link_hash_entry * bh; |
252b5132 | 1846 | struct coff_arm_link_hash_table * globals; |
dc810e39 AM |
1847 | bfd_vma val; |
1848 | bfd_size_type amt; | |
252b5132 | 1849 | |
252b5132 | 1850 | globals = coff_arm_hash_table (info); |
d70910e8 | 1851 | |
252b5132 RH |
1852 | BFD_ASSERT (globals != NULL); |
1853 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1854 | ||
1855 | s = bfd_get_section_by_name | |
1856 | (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); | |
1857 | ||
1858 | BFD_ASSERT (s != NULL); | |
1859 | ||
dc810e39 | 1860 | amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; |
c8e7bf0d | 1861 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1862 | |
1863 | BFD_ASSERT (tmp_name); | |
1864 | ||
1865 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
1866 | ||
1867 | myh = coff_link_hash_lookup | |
b34976b6 | 1868 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 1869 | |
252b5132 RH |
1870 | if (myh != NULL) |
1871 | { | |
1872 | free (tmp_name); | |
c8e7bf0d NC |
1873 | /* We've already seen this guy. */ |
1874 | return; | |
252b5132 RH |
1875 | } |
1876 | ||
14a793b2 | 1877 | bh = NULL; |
dc810e39 | 1878 | val = globals->thumb_glue_size + 1; |
252b5132 | 1879 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1880 | BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); |
d70910e8 | 1881 | |
252b5132 | 1882 | /* If we mark it 'thumb', the disassembler will do a better job. */ |
14a793b2 | 1883 | myh = (struct coff_link_hash_entry *) bh; |
252b5132 RH |
1884 | myh->class = C_THUMBEXTFUNC; |
1885 | ||
1886 | free (tmp_name); | |
1887 | ||
1888 | /* Allocate another symbol to mark where we switch to arm mode. */ | |
d70910e8 | 1889 | |
252b5132 RH |
1890 | #define CHANGE_TO_ARM "__%s_change_to_arm" |
1891 | #define BACK_FROM_ARM "__%s_back_from_arm" | |
d70910e8 | 1892 | |
dc810e39 | 1893 | amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1; |
c8e7bf0d | 1894 | tmp_name = bfd_malloc (amt); |
d70910e8 | 1895 | |
252b5132 | 1896 | BFD_ASSERT (tmp_name); |
d70910e8 | 1897 | |
252b5132 RH |
1898 | sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name); |
1899 | ||
14a793b2 | 1900 | bh = NULL; |
dc810e39 | 1901 | val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4); |
252b5132 | 1902 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1903 | BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh); |
252b5132 | 1904 | |
d70910e8 KH |
1905 | free (tmp_name); |
1906 | ||
252b5132 RH |
1907 | globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE; |
1908 | ||
1909 | return; | |
1910 | } | |
7831a775 | 1911 | #endif /* not ARM_WINCE */ |
252b5132 RH |
1912 | |
1913 | /* Select a BFD to be used to hold the sections used by the glue code. | |
1914 | This function is called from the linker scripts in ld/emultempl/ | |
1915 | {armcoff/pe}.em */ | |
e049a0de | 1916 | |
b34976b6 | 1917 | bfd_boolean |
c8e7bf0d NC |
1918 | bfd_arm_get_bfd_for_interworking (bfd * abfd, |
1919 | struct bfd_link_info * info) | |
252b5132 RH |
1920 | { |
1921 | struct coff_arm_link_hash_table * globals; | |
1922 | flagword flags; | |
1923 | asection * sec; | |
d70910e8 | 1924 | |
252b5132 RH |
1925 | /* If we are only performing a partial link do not bother |
1926 | getting a bfd to hold the glue. */ | |
1049f94e | 1927 | if (info->relocatable) |
b34976b6 | 1928 | return TRUE; |
d70910e8 | 1929 | |
252b5132 | 1930 | globals = coff_arm_hash_table (info); |
d70910e8 | 1931 | |
252b5132 RH |
1932 | BFD_ASSERT (globals != NULL); |
1933 | ||
1934 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 1935 | return TRUE; |
d70910e8 | 1936 | |
252b5132 | 1937 | sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME); |
d70910e8 KH |
1938 | |
1939 | if (sec == NULL) | |
252b5132 | 1940 | { |
ba3d4249 | 1941 | flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY; |
d70910e8 | 1942 | |
252b5132 | 1943 | sec = bfd_make_section (abfd, ARM2THUMB_GLUE_SECTION_NAME); |
d70910e8 | 1944 | |
252b5132 RH |
1945 | if (sec == NULL |
1946 | || ! bfd_set_section_flags (abfd, sec, flags) | |
1947 | || ! bfd_set_section_alignment (abfd, sec, 2)) | |
b34976b6 | 1948 | return FALSE; |
252b5132 RH |
1949 | } |
1950 | ||
1951 | sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME); | |
1952 | ||
d70910e8 | 1953 | if (sec == NULL) |
252b5132 | 1954 | { |
ba3d4249 | 1955 | flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE | SEC_READONLY; |
d70910e8 | 1956 | |
252b5132 | 1957 | sec = bfd_make_section (abfd, THUMB2ARM_GLUE_SECTION_NAME); |
d70910e8 | 1958 | |
252b5132 RH |
1959 | if (sec == NULL |
1960 | || ! bfd_set_section_flags (abfd, sec, flags) | |
1961 | || ! bfd_set_section_alignment (abfd, sec, 2)) | |
b34976b6 | 1962 | return FALSE; |
252b5132 | 1963 | } |
d70910e8 | 1964 | |
252b5132 RH |
1965 | /* Save the bfd for later use. */ |
1966 | globals->bfd_of_glue_owner = abfd; | |
d70910e8 | 1967 | |
b34976b6 | 1968 | return TRUE; |
252b5132 RH |
1969 | } |
1970 | ||
b34976b6 | 1971 | bfd_boolean |
c8e7bf0d NC |
1972 | bfd_arm_process_before_allocation (bfd * abfd, |
1973 | struct bfd_link_info * info, | |
1974 | int support_old_code) | |
252b5132 RH |
1975 | { |
1976 | asection * sec; | |
1977 | struct coff_arm_link_hash_table * globals; | |
1978 | ||
1979 | /* If we are only performing a partial link do not bother | |
1980 | to construct any glue. */ | |
1049f94e | 1981 | if (info->relocatable) |
b34976b6 | 1982 | return TRUE; |
d70910e8 | 1983 | |
252b5132 RH |
1984 | /* Here we have a bfd that is to be included on the link. We have a hook |
1985 | to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 RH |
1986 | _bfd_coff_get_external_symbols (abfd); |
1987 | ||
1988 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1989 | |
252b5132 RH |
1990 | BFD_ASSERT (globals != NULL); |
1991 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1992 | ||
1993 | globals->support_old_code = support_old_code; | |
d70910e8 | 1994 | |
252b5132 RH |
1995 | /* Rummage around all the relocs and map the glue vectors. */ |
1996 | sec = abfd->sections; | |
1997 | ||
1998 | if (sec == NULL) | |
b34976b6 | 1999 | return TRUE; |
252b5132 RH |
2000 | |
2001 | for (; sec != NULL; sec = sec->next) | |
2002 | { | |
2003 | struct internal_reloc * i; | |
2004 | struct internal_reloc * rel; | |
2005 | ||
d70910e8 | 2006 | if (sec->reloc_count == 0) |
252b5132 RH |
2007 | continue; |
2008 | ||
2009 | /* Load the relocs. */ | |
d70910e8 | 2010 | /* FIXME: there may be a storage leak here. */ |
252b5132 | 2011 | i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0); |
d70910e8 | 2012 | |
252b5132 RH |
2013 | BFD_ASSERT (i != 0); |
2014 | ||
d70910e8 | 2015 | for (rel = i; rel < i + sec->reloc_count; ++rel) |
252b5132 RH |
2016 | { |
2017 | unsigned short r_type = rel->r_type; | |
86033394 | 2018 | long symndx; |
252b5132 RH |
2019 | struct coff_link_hash_entry * h; |
2020 | ||
2021 | symndx = rel->r_symndx; | |
2022 | ||
d70910e8 | 2023 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
2024 | if (symndx == -1) |
2025 | continue; | |
2026 | ||
17505c5c | 2027 | /* If the index is outside of the range of our table, something has gone wrong. */ |
af74ae99 NC |
2028 | if (symndx >= obj_conv_table_size (abfd)) |
2029 | { | |
d003868e AM |
2030 | _bfd_error_handler (_("%B: illegal symbol index in reloc: %d"), |
2031 | abfd, symndx); | |
af74ae99 NC |
2032 | continue; |
2033 | } | |
d70910e8 | 2034 | |
252b5132 RH |
2035 | h = obj_coff_sym_hashes (abfd)[symndx]; |
2036 | ||
2037 | /* If the relocation is against a static symbol it must be within | |
2038 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
2039 | if (h == NULL) | |
2040 | continue; | |
2041 | ||
2042 | switch (r_type) | |
2043 | { | |
2044 | case ARM_26: | |
2045 | /* This one is a call from arm code. We need to look up | |
2046 | the target of the call. If it is a thumb target, we | |
2047 | insert glue. */ | |
d70910e8 | 2048 | |
252b5132 RH |
2049 | if (h->class == C_THUMBEXTFUNC) |
2050 | record_arm_to_thumb_glue (info, h); | |
2051 | break; | |
d70910e8 | 2052 | |
17505c5c | 2053 | #ifndef ARM_WINCE |
252b5132 RH |
2054 | case ARM_THUMB23: |
2055 | /* This one is a call from thumb code. We used to look | |
2056 | for ARM_THUMB9 and ARM_THUMB12 as well. We need to look | |
2057 | up the target of the call. If it is an arm target, we | |
2058 | insert glue. If the symbol does not exist it will be | |
2059 | given a class of C_EXT and so we will generate a stub | |
2060 | for it. This is not really a problem, since the link | |
2061 | is doomed anyway. */ | |
2062 | ||
2063 | switch (h->class) | |
2064 | { | |
2065 | case C_EXT: | |
2066 | case C_STAT: | |
2067 | case C_LABEL: | |
2068 | record_thumb_to_arm_glue (info, h); | |
2069 | break; | |
2070 | default: | |
2071 | ; | |
2072 | } | |
2073 | break; | |
17505c5c | 2074 | #endif |
d70910e8 | 2075 | |
252b5132 RH |
2076 | default: |
2077 | break; | |
2078 | } | |
2079 | } | |
2080 | } | |
2081 | ||
b34976b6 | 2082 | return TRUE; |
252b5132 RH |
2083 | } |
2084 | ||
e049a0de ILT |
2085 | #endif /* ! defined (COFF_IMAGE_WITH_PE) */ |
2086 | ||
252b5132 RH |
2087 | #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup |
2088 | #define coff_relocate_section coff_arm_relocate_section | |
2089 | #define coff_bfd_is_local_label_name coff_arm_is_local_label_name | |
2090 | #define coff_adjust_symndx coff_arm_adjust_symndx | |
2091 | #define coff_link_output_has_begun coff_arm_link_output_has_begun | |
2092 | #define coff_final_link_postscript coff_arm_final_link_postscript | |
2093 | #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data | |
2094 | #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data | |
2095 | #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags | |
2096 | #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data | |
2097 | #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create | |
2098 | ||
d21356d8 NC |
2099 | /* When doing a relocatable link, we want to convert ARM_26 relocs |
2100 | into ARM_26D relocs. */ | |
252b5132 | 2101 | |
b34976b6 | 2102 | static bfd_boolean |
c8e7bf0d NC |
2103 | coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED, |
2104 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
2105 | bfd *ibfd, | |
2106 | asection *sec, | |
2107 | struct internal_reloc *irel, | |
2108 | bfd_boolean *adjustedp) | |
252b5132 | 2109 | { |
d21356d8 | 2110 | if (irel->r_type == ARM_26) |
252b5132 RH |
2111 | { |
2112 | struct coff_link_hash_entry *h; | |
2113 | ||
2114 | h = obj_coff_sym_hashes (ibfd)[irel->r_symndx]; | |
2115 | if (h != NULL | |
2116 | && (h->root.type == bfd_link_hash_defined | |
2117 | || h->root.type == bfd_link_hash_defweak) | |
2118 | && h->root.u.def.section->output_section == sec->output_section) | |
d21356d8 | 2119 | irel->r_type = ARM_26D; |
252b5132 | 2120 | } |
b34976b6 AM |
2121 | *adjustedp = FALSE; |
2122 | return TRUE; | |
252b5132 RH |
2123 | } |
2124 | ||
2125 | /* Called when merging the private data areas of two BFDs. | |
2126 | This is important as it allows us to detect if we are | |
2127 | attempting to merge binaries compiled for different ARM | |
5c4491d3 | 2128 | targets, eg different CPUs or different APCS's. */ |
252b5132 | 2129 | |
b34976b6 | 2130 | static bfd_boolean |
c8e7bf0d | 2131 | coff_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) |
252b5132 RH |
2132 | { |
2133 | BFD_ASSERT (ibfd != NULL && obfd != NULL); | |
2134 | ||
2135 | if (ibfd == obfd) | |
b34976b6 | 2136 | return TRUE; |
252b5132 RH |
2137 | |
2138 | /* If the two formats are different we cannot merge anything. | |
2139 | This is not an error, since it is permissable to change the | |
2140 | input and output formats. */ | |
2141 | if ( ibfd->xvec->flavour != bfd_target_coff_flavour | |
2142 | || obfd->xvec->flavour != bfd_target_coff_flavour) | |
b34976b6 | 2143 | return TRUE; |
252b5132 | 2144 | |
5a6c6817 NC |
2145 | /* Determine what should happen if the input ARM architecture |
2146 | does not match the output ARM architecture. */ | |
2147 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
2148 | return FALSE; | |
2149 | ||
2150 | /* Verify that the APCS is the same for the two BFDs. */ | |
252b5132 RH |
2151 | if (APCS_SET (ibfd)) |
2152 | { | |
2153 | if (APCS_SET (obfd)) | |
2154 | { | |
2155 | /* If the src and dest have different APCS flag bits set, fail. */ | |
2156 | if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd)) | |
2157 | { | |
2158 | _bfd_error_handler | |
2159 | /* xgettext: c-format */ | |
d003868e AM |
2160 | (_("ERROR: %B is compiled for APCS-%d, whereas %B is compiled for APCS-%d"), |
2161 | ibfd, obfd, | |
2162 | APCS_26_FLAG (ibfd) ? 26 : 32, | |
2163 | APCS_26_FLAG (obfd) ? 26 : 32 | |
252b5132 RH |
2164 | ); |
2165 | ||
2166 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2167 | return FALSE; |
252b5132 | 2168 | } |
d70910e8 | 2169 | |
252b5132 RH |
2170 | if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd)) |
2171 | { | |
2172 | const char *msg; | |
2173 | ||
2174 | if (APCS_FLOAT_FLAG (ibfd)) | |
2175 | /* xgettext: c-format */ | |
d003868e | 2176 | msg = _("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"); |
252b5132 RH |
2177 | else |
2178 | /* xgettext: c-format */ | |
d003868e | 2179 | msg = _("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"); |
d70910e8 | 2180 | |
d003868e | 2181 | _bfd_error_handler (msg, ibfd, obfd); |
252b5132 RH |
2182 | |
2183 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2184 | return FALSE; |
252b5132 | 2185 | } |
d70910e8 | 2186 | |
252b5132 RH |
2187 | if (PIC_FLAG (obfd) != PIC_FLAG (ibfd)) |
2188 | { | |
2189 | const char * msg; | |
2190 | ||
2191 | if (PIC_FLAG (ibfd)) | |
2192 | /* xgettext: c-format */ | |
d003868e | 2193 | msg = _("ERROR: %B is compiled as position independent code, whereas target %B is absolute position"); |
252b5132 RH |
2194 | else |
2195 | /* xgettext: c-format */ | |
d003868e AM |
2196 | msg = _("ERROR: %B is compiled as absolute position code, whereas target %B is position independent"); |
2197 | _bfd_error_handler (msg, ibfd, obfd); | |
252b5132 RH |
2198 | |
2199 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2200 | return FALSE; |
252b5132 RH |
2201 | } |
2202 | } | |
2203 | else | |
2204 | { | |
2205 | SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd)); | |
d70910e8 | 2206 | |
252b5132 RH |
2207 | /* Set up the arch and fields as well as these are probably wrong. */ |
2208 | bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
2209 | } | |
2210 | } | |
2211 | ||
2212 | /* Check the interworking support. */ | |
2213 | if (INTERWORK_SET (ibfd)) | |
2214 | { | |
2215 | if (INTERWORK_SET (obfd)) | |
2216 | { | |
2217 | /* If the src and dest differ in their interworking issue a warning. */ | |
2218 | if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd)) | |
2219 | { | |
2220 | const char * msg; | |
2221 | ||
2222 | if (INTERWORK_FLAG (ibfd)) | |
2223 | /* xgettext: c-format */ | |
d003868e | 2224 | msg = _("Warning: %B supports interworking, whereas %B does not"); |
252b5132 RH |
2225 | else |
2226 | /* xgettext: c-format */ | |
d003868e | 2227 | msg = _("Warning: %B does not support interworking, whereas %B does"); |
d70910e8 | 2228 | |
d003868e | 2229 | _bfd_error_handler (msg, ibfd, obfd); |
252b5132 RH |
2230 | } |
2231 | } | |
2232 | else | |
2233 | { | |
2234 | SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd)); | |
2235 | } | |
2236 | } | |
2237 | ||
b34976b6 | 2238 | return TRUE; |
252b5132 RH |
2239 | } |
2240 | ||
252b5132 RH |
2241 | /* Display the flags field. */ |
2242 | ||
b34976b6 | 2243 | static bfd_boolean |
c8e7bf0d | 2244 | coff_arm_print_private_bfd_data (bfd * abfd, void * ptr) |
252b5132 RH |
2245 | { |
2246 | FILE * file = (FILE *) ptr; | |
d70910e8 | 2247 | |
252b5132 | 2248 | BFD_ASSERT (abfd != NULL && ptr != NULL); |
d70910e8 | 2249 | |
252b5132 RH |
2250 | /* xgettext:c-format */ |
2251 | fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags); | |
d70910e8 | 2252 | |
252b5132 RH |
2253 | if (APCS_SET (abfd)) |
2254 | { | |
5c4491d3 | 2255 | /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */ |
252b5132 RH |
2256 | fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32); |
2257 | ||
2258 | if (APCS_FLOAT_FLAG (abfd)) | |
2259 | fprintf (file, _(" [floats passed in float registers]")); | |
2260 | else | |
2261 | fprintf (file, _(" [floats passed in integer registers]")); | |
2262 | ||
2263 | if (PIC_FLAG (abfd)) | |
2264 | fprintf (file, _(" [position independent]")); | |
2265 | else | |
2266 | fprintf (file, _(" [absolute position]")); | |
2267 | } | |
d70910e8 | 2268 | |
252b5132 RH |
2269 | if (! INTERWORK_SET (abfd)) |
2270 | fprintf (file, _(" [interworking flag not initialised]")); | |
2271 | else if (INTERWORK_FLAG (abfd)) | |
2272 | fprintf (file, _(" [interworking supported]")); | |
2273 | else | |
2274 | fprintf (file, _(" [interworking not supported]")); | |
d70910e8 | 2275 | |
252b5132 | 2276 | fputc ('\n', file); |
d70910e8 | 2277 | |
b34976b6 | 2278 | return TRUE; |
252b5132 RH |
2279 | } |
2280 | ||
252b5132 RH |
2281 | /* Copies the given flags into the coff_tdata.flags field. |
2282 | Typically these flags come from the f_flags[] field of | |
2283 | the COFF filehdr structure, which contains important, | |
2284 | target specific information. | |
2285 | Note: Although this function is static, it is explicitly | |
2286 | called from both coffcode.h and peicode.h. */ | |
2287 | ||
b34976b6 | 2288 | static bfd_boolean |
c8e7bf0d | 2289 | _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags) |
252b5132 RH |
2290 | { |
2291 | flagword flag; | |
2292 | ||
2293 | BFD_ASSERT (abfd != NULL); | |
2294 | ||
2295 | flag = (flags & F_APCS26) ? F_APCS_26 : 0; | |
d70910e8 | 2296 | |
252b5132 RH |
2297 | /* Make sure that the APCS field has not been initialised to the opposite |
2298 | value. */ | |
2299 | if (APCS_SET (abfd) | |
2300 | && ( (APCS_26_FLAG (abfd) != flag) | |
2301 | || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT)) | |
948221a8 | 2302 | || (PIC_FLAG (abfd) != (flags & F_PIC)) |
252b5132 | 2303 | )) |
b34976b6 | 2304 | return FALSE; |
252b5132 RH |
2305 | |
2306 | flag |= (flags & (F_APCS_FLOAT | F_PIC)); | |
d70910e8 | 2307 | |
252b5132 RH |
2308 | SET_APCS_FLAGS (abfd, flag); |
2309 | ||
2310 | flag = (flags & F_INTERWORK); | |
d70910e8 | 2311 | |
252b5132 RH |
2312 | /* If the BFD has already had its interworking flag set, but it |
2313 | is different from the value that we have been asked to set, | |
2314 | then assume that that merged code will not support interworking | |
2315 | and set the flag accordingly. */ | |
2316 | if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag)) | |
2317 | { | |
2318 | if (flag) | |
2319 | /* xgettext: c-format */ | |
d003868e AM |
2320 | _bfd_error_handler (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), |
2321 | abfd); | |
252b5132 RH |
2322 | else |
2323 | /* xgettext: c-format */ | |
d003868e AM |
2324 | _bfd_error_handler (_("Warning: Clearing the interworking flag of %B due to outside request"), |
2325 | abfd); | |
252b5132 RH |
2326 | flag = 0; |
2327 | } | |
2328 | ||
2329 | SET_INTERWORK_FLAG (abfd, flag); | |
2330 | ||
b34976b6 | 2331 | return TRUE; |
252b5132 RH |
2332 | } |
2333 | ||
252b5132 RH |
2334 | /* Copy the important parts of the target specific data |
2335 | from one instance of a BFD to another. */ | |
2336 | ||
b34976b6 | 2337 | static bfd_boolean |
c8e7bf0d | 2338 | coff_arm_copy_private_bfd_data (bfd * src, bfd * dest) |
252b5132 RH |
2339 | { |
2340 | BFD_ASSERT (src != NULL && dest != NULL); | |
d70910e8 | 2341 | |
252b5132 | 2342 | if (src == dest) |
b34976b6 | 2343 | return TRUE; |
252b5132 RH |
2344 | |
2345 | /* If the destination is not in the same format as the source, do not do | |
2346 | the copy. */ | |
2347 | if (src->xvec != dest->xvec) | |
b34976b6 | 2348 | return TRUE; |
252b5132 | 2349 | |
c8e7bf0d | 2350 | /* Copy the flags field. */ |
252b5132 RH |
2351 | if (APCS_SET (src)) |
2352 | { | |
2353 | if (APCS_SET (dest)) | |
2354 | { | |
2355 | /* If the src and dest have different APCS flag bits set, fail. */ | |
2356 | if (APCS_26_FLAG (dest) != APCS_26_FLAG (src)) | |
b34976b6 | 2357 | return FALSE; |
d70910e8 | 2358 | |
252b5132 | 2359 | if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src)) |
b34976b6 | 2360 | return FALSE; |
d70910e8 | 2361 | |
252b5132 | 2362 | if (PIC_FLAG (dest) != PIC_FLAG (src)) |
b34976b6 | 2363 | return FALSE; |
252b5132 RH |
2364 | } |
2365 | else | |
2366 | SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src) | |
2367 | | PIC_FLAG (src)); | |
2368 | } | |
2369 | ||
2370 | if (INTERWORK_SET (src)) | |
2371 | { | |
2372 | if (INTERWORK_SET (dest)) | |
2373 | { | |
2374 | /* If the src and dest have different interworking flags then turn | |
2375 | off the interworking bit. */ | |
2376 | if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src)) | |
2377 | { | |
2378 | if (INTERWORK_FLAG (dest)) | |
2379 | { | |
2380 | /* xgettext:c-format */ | |
ae1a89b7 | 2381 | _bfd_error_handler (("\ |
d003868e AM |
2382 | Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), |
2383 | dest, src); | |
252b5132 | 2384 | } |
d70910e8 | 2385 | |
252b5132 RH |
2386 | SET_INTERWORK_FLAG (dest, 0); |
2387 | } | |
2388 | } | |
2389 | else | |
2390 | { | |
2391 | SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src)); | |
2392 | } | |
2393 | } | |
2394 | ||
b34976b6 | 2395 | return TRUE; |
252b5132 RH |
2396 | } |
2397 | ||
2398 | /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX | |
c31c1f70 NC |
2399 | *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */ |
2400 | #define LOCAL_LABEL_PREFIX "" | |
252b5132 RH |
2401 | #ifndef USER_LABEL_PREFIX |
2402 | #define USER_LABEL_PREFIX "_" | |
2403 | #endif | |
2404 | ||
f8111282 NC |
2405 | /* Like _bfd_coff_is_local_label_name, but |
2406 | a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be | |
2407 | non-local. | |
2408 | b) Allow other prefixes than ".", e.g. an empty prefix would cause all | |
2409 | labels of the form Lxxx to be stripped. */ | |
c8e7bf0d | 2410 | |
b34976b6 | 2411 | static bfd_boolean |
c8e7bf0d NC |
2412 | coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED, |
2413 | const char * name) | |
252b5132 | 2414 | { |
252b5132 RH |
2415 | #ifdef USER_LABEL_PREFIX |
2416 | if (USER_LABEL_PREFIX[0] != 0) | |
2417 | { | |
5ff625e9 AM |
2418 | size_t len = strlen (USER_LABEL_PREFIX); |
2419 | ||
2420 | if (strncmp (name, USER_LABEL_PREFIX, len) == 0) | |
b34976b6 | 2421 | return FALSE; |
252b5132 RH |
2422 | } |
2423 | #endif | |
f8111282 NC |
2424 | |
2425 | #ifdef LOCAL_LABEL_PREFIX | |
2426 | /* If there is a prefix for local labels then look for this. | |
d70910e8 KH |
2427 | If the prefix exists, but it is empty, then ignore the test. */ |
2428 | ||
f8111282 | 2429 | if (LOCAL_LABEL_PREFIX[0] != 0) |
252b5132 | 2430 | { |
dc810e39 | 2431 | size_t len = strlen (LOCAL_LABEL_PREFIX); |
d70910e8 | 2432 | |
f8111282 | 2433 | if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0) |
b34976b6 | 2434 | return FALSE; |
d70910e8 | 2435 | |
f8111282 NC |
2436 | /* Perform the checks below for the rest of the name. */ |
2437 | name += len; | |
252b5132 | 2438 | } |
f8111282 | 2439 | #endif |
d70910e8 | 2440 | |
f8111282 | 2441 | return name[0] == 'L'; |
252b5132 RH |
2442 | } |
2443 | ||
2444 | /* This piece of machinery exists only to guarantee that the bfd that holds | |
d70910e8 | 2445 | the glue section is written last. |
252b5132 RH |
2446 | |
2447 | This does depend on bfd_make_section attaching a new section to the | |
c8e7bf0d | 2448 | end of the section list for the bfd. */ |
252b5132 | 2449 | |
b34976b6 | 2450 | static bfd_boolean |
c8e7bf0d | 2451 | coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info) |
252b5132 RH |
2452 | { |
2453 | return (sub->output_has_begun | |
2454 | || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner); | |
2455 | } | |
2456 | ||
b34976b6 | 2457 | static bfd_boolean |
c8e7bf0d NC |
2458 | coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED, |
2459 | struct coff_final_link_info * pfinfo) | |
252b5132 RH |
2460 | { |
2461 | struct coff_arm_link_hash_table * globals; | |
2462 | ||
2463 | globals = coff_arm_hash_table (pfinfo->info); | |
d70910e8 | 2464 | |
252b5132 | 2465 | BFD_ASSERT (globals != NULL); |
d70910e8 | 2466 | |
252b5132 RH |
2467 | if (globals->bfd_of_glue_owner != NULL) |
2468 | { | |
2469 | if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner)) | |
b34976b6 | 2470 | return FALSE; |
d70910e8 | 2471 | |
b34976b6 | 2472 | globals->bfd_of_glue_owner->output_has_begun = TRUE; |
252b5132 | 2473 | } |
d70910e8 | 2474 | |
5a6c6817 | 2475 | return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
252b5132 RH |
2476 | } |
2477 | ||
252b5132 RH |
2478 | #include "coffcode.h" |
2479 | ||
c3c89269 NC |
2480 | #ifndef TARGET_LITTLE_SYM |
2481 | #define TARGET_LITTLE_SYM armcoff_little_vec | |
252b5132 | 2482 | #endif |
c3c89269 NC |
2483 | #ifndef TARGET_LITTLE_NAME |
2484 | #define TARGET_LITTLE_NAME "coff-arm-little" | |
252b5132 | 2485 | #endif |
c3c89269 NC |
2486 | #ifndef TARGET_BIG_SYM |
2487 | #define TARGET_BIG_SYM armcoff_big_vec | |
252b5132 | 2488 | #endif |
c3c89269 NC |
2489 | #ifndef TARGET_BIG_NAME |
2490 | #define TARGET_BIG_NAME "coff-arm-big" | |
252b5132 | 2491 | #endif |
252b5132 | 2492 | |
c3c89269 NC |
2493 | #ifndef TARGET_UNDERSCORE |
2494 | #define TARGET_UNDERSCORE 0 | |
252b5132 | 2495 | #endif |
c3c89269 | 2496 | |
f78c5281 | 2497 | #ifndef EXTRA_S_FLAGS |
c3c89269 | 2498 | #ifdef COFF_WITH_PE |
20650579 | 2499 | #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES) |
252b5132 | 2500 | #else |
20650579 | 2501 | #define EXTRA_S_FLAGS SEC_CODE |
252b5132 | 2502 | #endif |
f78c5281 | 2503 | #endif |
252b5132 | 2504 | |
c3c89269 NC |
2505 | /* Forward declaration for use initialising alternative_target field. */ |
2506 | extern const bfd_target TARGET_BIG_SYM ; | |
252b5132 | 2507 | |
c3c89269 | 2508 | /* Target vectors. */ |
3fa78519 SS |
2509 | CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE) |
2510 | CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE) |