Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* BFD back-end for ARM COFF files. |
219d1afa | 2 | Copyright (C) 1990-2018 Free Software Foundation, Inc. |
252b5132 RH |
3 | Written by Cygnus Support. |
4 | ||
d21356d8 | 5 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 6 | |
d21356d8 NC |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 9 | the Free Software Foundation; either version 3 of the License, or |
d21356d8 | 10 | (at your option) any later version. |
252b5132 | 11 | |
d21356d8 NC |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
252b5132 | 16 | |
d21356d8 NC |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
20 | MA 02110-1301, USA. */ | |
252b5132 | 21 | |
252b5132 | 22 | #include "sysdep.h" |
3db64b00 | 23 | #include "bfd.h" |
252b5132 | 24 | #include "libbfd.h" |
252b5132 | 25 | #include "coff/arm.h" |
252b5132 RH |
26 | #include "coff/internal.h" |
27 | ||
28 | #ifdef COFF_WITH_PE | |
29 | #include "coff/pe.h" | |
30 | #endif | |
31 | ||
32 | #include "libcoff.h" | |
33 | ||
34 | /* Macros for manipulation the bits in the flags field of the coff data | |
35 | structure. */ | |
dc810e39 AM |
36 | #define APCS_26_FLAG(abfd) \ |
37 | (coff_data (abfd)->flags & F_APCS_26) | |
38 | ||
39 | #define APCS_FLOAT_FLAG(abfd) \ | |
40 | (coff_data (abfd)->flags & F_APCS_FLOAT) | |
41 | ||
42 | #define PIC_FLAG(abfd) \ | |
43 | (coff_data (abfd)->flags & F_PIC) | |
44 | ||
45 | #define APCS_SET(abfd) \ | |
46 | (coff_data (abfd)->flags & F_APCS_SET) | |
47 | ||
48 | #define SET_APCS_FLAGS(abfd, flgs) \ | |
49 | do \ | |
50 | { \ | |
51 | coff_data (abfd)->flags &= ~(F_APCS_26 | F_APCS_FLOAT | F_PIC); \ | |
52 | coff_data (abfd)->flags |= (flgs) | F_APCS_SET; \ | |
53 | } \ | |
54 | while (0) | |
55 | ||
56 | #define INTERWORK_FLAG(abfd) \ | |
57 | (coff_data (abfd)->flags & F_INTERWORK) | |
58 | ||
59 | #define INTERWORK_SET(abfd) \ | |
60 | (coff_data (abfd)->flags & F_INTERWORK_SET) | |
61 | ||
62 | #define SET_INTERWORK_FLAG(abfd, flg) \ | |
63 | do \ | |
64 | { \ | |
65 | coff_data (abfd)->flags &= ~F_INTERWORK; \ | |
66 | coff_data (abfd)->flags |= (flg) | F_INTERWORK_SET; \ | |
67 | } \ | |
68 | while (0) | |
af74ae99 NC |
69 | |
70 | #ifndef NUM_ELEM | |
71 | #define NUM_ELEM(a) ((sizeof (a)) / sizeof ((a)[0])) | |
72 | #endif | |
d70910e8 | 73 | |
252b5132 | 74 | typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype; |
c8e7bf0d | 75 | /* Some typedefs for holding instructions. */ |
252b5132 RH |
76 | typedef unsigned long int insn32; |
77 | typedef unsigned short int insn16; | |
78 | ||
252b5132 RH |
79 | /* The linker script knows the section names for placement. |
80 | The entry_names are used to do simple name mangling on the stubs. | |
81 | Given a function name, and its type, the stub can be found. The | |
917583ad | 82 | name can be changed. The only requirement is the %s be present. */ |
d70910e8 | 83 | |
252b5132 RH |
84 | #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" |
85 | #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" | |
86 | ||
87 | #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" | |
88 | #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" | |
89 | ||
d70910e8 | 90 | /* Used by the assembler. */ |
917583ad | 91 | |
252b5132 | 92 | static bfd_reloc_status_type |
c8e7bf0d NC |
93 | coff_arm_reloc (bfd *abfd, |
94 | arelent *reloc_entry, | |
95 | asymbol *symbol ATTRIBUTE_UNUSED, | |
96 | void * data, | |
97 | asection *input_section ATTRIBUTE_UNUSED, | |
98 | bfd *output_bfd, | |
99 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
100 | { |
101 | symvalue diff; | |
c8e7bf0d NC |
102 | |
103 | if (output_bfd == NULL) | |
252b5132 RH |
104 | return bfd_reloc_continue; |
105 | ||
106 | diff = reloc_entry->addend; | |
107 | ||
dc810e39 AM |
108 | #define DOIT(x) \ |
109 | x = ((x & ~howto->dst_mask) \ | |
110 | | (((x & howto->src_mask) + diff) & howto->dst_mask)) | |
252b5132 | 111 | |
b23dc97f NC |
112 | if (diff != 0) |
113 | { | |
114 | reloc_howto_type *howto = reloc_entry->howto; | |
115 | unsigned char *addr = (unsigned char *) data + reloc_entry->address; | |
116 | ||
117 | if (! bfd_reloc_offset_in_range (howto, abfd, input_section, | |
118 | reloc_entry->address | |
119 | * bfd_octets_per_byte (abfd))) | |
120 | return bfd_reloc_outofrange; | |
121 | ||
122 | switch (howto->size) | |
123 | { | |
124 | case 0: | |
125 | { | |
126 | char x = bfd_get_8 (abfd, addr); | |
127 | DOIT (x); | |
128 | bfd_put_8 (abfd, x, addr); | |
129 | } | |
130 | break; | |
131 | ||
132 | case 1: | |
133 | { | |
134 | short x = bfd_get_16 (abfd, addr); | |
135 | DOIT (x); | |
136 | bfd_put_16 (abfd, (bfd_vma) x, addr); | |
137 | } | |
138 | break; | |
252b5132 | 139 | |
b23dc97f | 140 | case 2: |
252b5132 | 141 | { |
b23dc97f NC |
142 | long x = bfd_get_32 (abfd, addr); |
143 | DOIT (x); | |
144 | bfd_put_32 (abfd, (bfd_vma) x, addr); | |
252b5132 | 145 | } |
b23dc97f NC |
146 | break; |
147 | ||
148 | default: | |
149 | abort (); | |
150 | } | |
151 | } | |
252b5132 RH |
152 | |
153 | /* Now let bfd_perform_relocation finish everything up. */ | |
154 | return bfd_reloc_continue; | |
155 | } | |
156 | ||
157 | /* If USER_LABEL_PREFIX is defined as "_" (see coff_arm_is_local_label_name() | |
158 | in this file), then TARGET_UNDERSCORE should be defined, otherwise it | |
159 | should not. */ | |
160 | #ifndef TARGET_UNDERSCORE | |
161 | #define TARGET_UNDERSCORE '_' | |
162 | #endif | |
163 | ||
164 | #ifndef PCRELOFFSET | |
b34976b6 | 165 | #define PCRELOFFSET TRUE |
252b5132 RH |
166 | #endif |
167 | ||
168 | /* These most certainly belong somewhere else. Just had to get rid of | |
17505c5c | 169 | the manifest constants in the code. */ |
7148cc28 NC |
170 | |
171 | #ifdef ARM_WINCE | |
172 | ||
173 | #define ARM_26D 0 | |
174 | #define ARM_32 1 | |
175 | #define ARM_RVA32 2 | |
176 | #define ARM_26 3 | |
177 | #define ARM_THUMB12 4 | |
178 | #define ARM_SECTION 14 | |
179 | #define ARM_SECREL 15 | |
180 | ||
181 | #else | |
182 | ||
07d6d2b8 AM |
183 | #define ARM_8 0 |
184 | #define ARM_16 1 | |
185 | #define ARM_32 2 | |
186 | #define ARM_26 3 | |
252b5132 RH |
187 | #define ARM_DISP8 4 |
188 | #define ARM_DISP16 5 | |
189 | #define ARM_DISP32 6 | |
07d6d2b8 | 190 | #define ARM_26D 7 |
c8e7bf0d | 191 | /* 8 is unused. */ |
252b5132 RH |
192 | #define ARM_NEG16 9 |
193 | #define ARM_NEG32 10 | |
194 | #define ARM_RVA32 11 | |
195 | #define ARM_THUMB9 12 | |
196 | #define ARM_THUMB12 13 | |
197 | #define ARM_THUMB23 14 | |
198 | ||
17505c5c NC |
199 | #endif |
200 | ||
c8e7bf0d NC |
201 | static bfd_reloc_status_type aoutarm_fix_pcrel_26_done |
202 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
203 | static bfd_reloc_status_type aoutarm_fix_pcrel_26 | |
204 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
c8e7bf0d NC |
205 | static bfd_reloc_status_type coff_thumb_pcrel_12 |
206 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
207 | #ifndef ARM_WINCE | |
afe94956 NC |
208 | static bfd_reloc_status_type coff_thumb_pcrel_9 |
209 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
c8e7bf0d NC |
210 | static bfd_reloc_status_type coff_thumb_pcrel_23 |
211 | (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **); | |
212 | #endif | |
213 | ||
d70910e8 | 214 | static reloc_howto_type aoutarm_std_reloc_howto[] = |
917583ad | 215 | { |
17505c5c | 216 | #ifdef ARM_WINCE |
d3793eaa NC |
217 | HOWTO (ARM_26D, |
218 | 2, | |
219 | 2, | |
220 | 24, | |
44e88952 | 221 | TRUE, |
d3793eaa NC |
222 | 0, |
223 | complain_overflow_dont, | |
224 | aoutarm_fix_pcrel_26_done, | |
225 | "ARM_26D", | |
07d6d2b8 | 226 | TRUE, /* partial_inplace. */ |
d3793eaa NC |
227 | 0x00ffffff, |
228 | 0x0, | |
44e88952 | 229 | PCRELOFFSET), |
917583ad NC |
230 | HOWTO (ARM_32, |
231 | 0, | |
232 | 2, | |
233 | 32, | |
b34976b6 | 234 | FALSE, |
917583ad NC |
235 | 0, |
236 | complain_overflow_bitfield, | |
237 | coff_arm_reloc, | |
238 | "ARM_32", | |
07d6d2b8 | 239 | TRUE, /* partial_inplace. */ |
917583ad NC |
240 | 0xffffffff, |
241 | 0xffffffff, | |
242 | PCRELOFFSET), | |
243 | HOWTO (ARM_RVA32, | |
244 | 0, | |
245 | 2, | |
246 | 32, | |
b34976b6 | 247 | FALSE, |
917583ad NC |
248 | 0, |
249 | complain_overflow_bitfield, | |
250 | coff_arm_reloc, | |
251 | "ARM_RVA32", | |
07d6d2b8 | 252 | TRUE, /* partial_inplace. */ |
917583ad NC |
253 | 0xffffffff, |
254 | 0xffffffff, | |
255 | PCRELOFFSET), | |
256 | HOWTO (ARM_26, | |
257 | 2, | |
258 | 2, | |
259 | 24, | |
b34976b6 | 260 | TRUE, |
917583ad NC |
261 | 0, |
262 | complain_overflow_signed, | |
263 | aoutarm_fix_pcrel_26 , | |
264 | "ARM_26", | |
b34976b6 | 265 | FALSE, |
917583ad NC |
266 | 0x00ffffff, |
267 | 0x00ffffff, | |
268 | PCRELOFFSET), | |
269 | HOWTO (ARM_THUMB12, | |
270 | 1, | |
271 | 1, | |
272 | 11, | |
b34976b6 | 273 | TRUE, |
917583ad NC |
274 | 0, |
275 | complain_overflow_signed, | |
276 | coff_thumb_pcrel_12 , | |
277 | "ARM_THUMB12", | |
b34976b6 | 278 | FALSE, |
917583ad NC |
279 | 0x000007ff, |
280 | 0x000007ff, | |
281 | PCRELOFFSET), | |
d3793eaa | 282 | EMPTY_HOWTO (-1), |
917583ad NC |
283 | EMPTY_HOWTO (-1), |
284 | EMPTY_HOWTO (-1), | |
285 | EMPTY_HOWTO (-1), | |
286 | EMPTY_HOWTO (-1), | |
287 | EMPTY_HOWTO (-1), | |
288 | EMPTY_HOWTO (-1), | |
289 | EMPTY_HOWTO (-1), | |
290 | EMPTY_HOWTO (-1), | |
291 | HOWTO (ARM_SECTION, | |
292 | 0, | |
293 | 1, | |
294 | 16, | |
b34976b6 | 295 | FALSE, |
917583ad NC |
296 | 0, |
297 | complain_overflow_bitfield, | |
298 | coff_arm_reloc, | |
d3793eaa | 299 | "ARM_SECTION", |
07d6d2b8 | 300 | TRUE, /* partial_inplace. */ |
917583ad NC |
301 | 0x0000ffff, |
302 | 0x0000ffff, | |
303 | PCRELOFFSET), | |
304 | HOWTO (ARM_SECREL, | |
305 | 0, | |
306 | 2, | |
307 | 32, | |
b34976b6 | 308 | FALSE, |
917583ad NC |
309 | 0, |
310 | complain_overflow_bitfield, | |
311 | coff_arm_reloc, | |
d3793eaa | 312 | "ARM_SECREL", |
07d6d2b8 | 313 | TRUE, /* partial_inplace. */ |
917583ad NC |
314 | 0xffffffff, |
315 | 0xffffffff, | |
316 | PCRELOFFSET), | |
17505c5c | 317 | #else /* not ARM_WINCE */ |
c8e7bf0d NC |
318 | HOWTO (ARM_8, |
319 | 0, | |
320 | 0, | |
321 | 8, | |
322 | FALSE, | |
323 | 0, | |
324 | complain_overflow_bitfield, | |
325 | coff_arm_reloc, | |
326 | "ARM_8", | |
327 | TRUE, | |
328 | 0x000000ff, | |
329 | 0x000000ff, | |
330 | PCRELOFFSET), | |
917583ad NC |
331 | HOWTO (ARM_16, |
332 | 0, | |
333 | 1, | |
334 | 16, | |
b34976b6 | 335 | FALSE, |
917583ad NC |
336 | 0, |
337 | complain_overflow_bitfield, | |
338 | coff_arm_reloc, | |
339 | "ARM_16", | |
b34976b6 | 340 | TRUE, |
917583ad NC |
341 | 0x0000ffff, |
342 | 0x0000ffff, | |
343 | PCRELOFFSET), | |
344 | HOWTO (ARM_32, | |
345 | 0, | |
346 | 2, | |
347 | 32, | |
b34976b6 | 348 | FALSE, |
917583ad NC |
349 | 0, |
350 | complain_overflow_bitfield, | |
351 | coff_arm_reloc, | |
352 | "ARM_32", | |
b34976b6 | 353 | TRUE, |
917583ad NC |
354 | 0xffffffff, |
355 | 0xffffffff, | |
356 | PCRELOFFSET), | |
357 | HOWTO (ARM_26, | |
358 | 2, | |
359 | 2, | |
360 | 24, | |
b34976b6 | 361 | TRUE, |
917583ad NC |
362 | 0, |
363 | complain_overflow_signed, | |
364 | aoutarm_fix_pcrel_26 , | |
365 | "ARM_26", | |
b34976b6 | 366 | FALSE, |
917583ad NC |
367 | 0x00ffffff, |
368 | 0x00ffffff, | |
369 | PCRELOFFSET), | |
370 | HOWTO (ARM_DISP8, | |
371 | 0, | |
372 | 0, | |
373 | 8, | |
b34976b6 | 374 | TRUE, |
917583ad NC |
375 | 0, |
376 | complain_overflow_signed, | |
377 | coff_arm_reloc, | |
378 | "ARM_DISP8", | |
b34976b6 | 379 | TRUE, |
917583ad NC |
380 | 0x000000ff, |
381 | 0x000000ff, | |
b34976b6 | 382 | TRUE), |
917583ad NC |
383 | HOWTO (ARM_DISP16, |
384 | 0, | |
385 | 1, | |
386 | 16, | |
b34976b6 | 387 | TRUE, |
917583ad NC |
388 | 0, |
389 | complain_overflow_signed, | |
390 | coff_arm_reloc, | |
391 | "ARM_DISP16", | |
b34976b6 | 392 | TRUE, |
917583ad NC |
393 | 0x0000ffff, |
394 | 0x0000ffff, | |
b34976b6 | 395 | TRUE), |
917583ad NC |
396 | HOWTO (ARM_DISP32, |
397 | 0, | |
398 | 2, | |
399 | 32, | |
b34976b6 | 400 | TRUE, |
917583ad NC |
401 | 0, |
402 | complain_overflow_signed, | |
403 | coff_arm_reloc, | |
404 | "ARM_DISP32", | |
b34976b6 | 405 | TRUE, |
917583ad NC |
406 | 0xffffffff, |
407 | 0xffffffff, | |
b34976b6 | 408 | TRUE), |
917583ad NC |
409 | HOWTO (ARM_26D, |
410 | 2, | |
411 | 2, | |
412 | 24, | |
b34976b6 | 413 | FALSE, |
917583ad NC |
414 | 0, |
415 | complain_overflow_dont, | |
416 | aoutarm_fix_pcrel_26_done, | |
417 | "ARM_26D", | |
b34976b6 | 418 | TRUE, |
917583ad NC |
419 | 0x00ffffff, |
420 | 0x0, | |
b34976b6 | 421 | FALSE), |
917583ad NC |
422 | /* 8 is unused */ |
423 | EMPTY_HOWTO (-1), | |
424 | HOWTO (ARM_NEG16, | |
425 | 0, | |
426 | -1, | |
427 | 16, | |
b34976b6 | 428 | FALSE, |
917583ad NC |
429 | 0, |
430 | complain_overflow_bitfield, | |
431 | coff_arm_reloc, | |
432 | "ARM_NEG16", | |
b34976b6 | 433 | TRUE, |
917583ad NC |
434 | 0x0000ffff, |
435 | 0x0000ffff, | |
b34976b6 | 436 | FALSE), |
917583ad NC |
437 | HOWTO (ARM_NEG32, |
438 | 0, | |
439 | -2, | |
440 | 32, | |
b34976b6 | 441 | FALSE, |
917583ad NC |
442 | 0, |
443 | complain_overflow_bitfield, | |
444 | coff_arm_reloc, | |
445 | "ARM_NEG32", | |
b34976b6 | 446 | TRUE, |
917583ad NC |
447 | 0xffffffff, |
448 | 0xffffffff, | |
b34976b6 | 449 | FALSE), |
917583ad NC |
450 | HOWTO (ARM_RVA32, |
451 | 0, | |
452 | 2, | |
453 | 32, | |
b34976b6 | 454 | FALSE, |
917583ad NC |
455 | 0, |
456 | complain_overflow_bitfield, | |
457 | coff_arm_reloc, | |
458 | "ARM_RVA32", | |
b34976b6 | 459 | TRUE, |
917583ad NC |
460 | 0xffffffff, |
461 | 0xffffffff, | |
462 | PCRELOFFSET), | |
463 | HOWTO (ARM_THUMB9, | |
464 | 1, | |
465 | 1, | |
466 | 8, | |
b34976b6 | 467 | TRUE, |
917583ad NC |
468 | 0, |
469 | complain_overflow_signed, | |
470 | coff_thumb_pcrel_9 , | |
471 | "ARM_THUMB9", | |
b34976b6 | 472 | FALSE, |
917583ad NC |
473 | 0x000000ff, |
474 | 0x000000ff, | |
475 | PCRELOFFSET), | |
476 | HOWTO (ARM_THUMB12, | |
477 | 1, | |
478 | 1, | |
479 | 11, | |
b34976b6 | 480 | TRUE, |
917583ad NC |
481 | 0, |
482 | complain_overflow_signed, | |
483 | coff_thumb_pcrel_12 , | |
484 | "ARM_THUMB12", | |
b34976b6 | 485 | FALSE, |
917583ad NC |
486 | 0x000007ff, |
487 | 0x000007ff, | |
488 | PCRELOFFSET), | |
489 | HOWTO (ARM_THUMB23, | |
490 | 1, | |
491 | 2, | |
492 | 22, | |
b34976b6 | 493 | TRUE, |
917583ad NC |
494 | 0, |
495 | complain_overflow_signed, | |
496 | coff_thumb_pcrel_23 , | |
497 | "ARM_THUMB23", | |
b34976b6 | 498 | FALSE, |
917583ad NC |
499 | 0x07ff07ff, |
500 | 0x07ff07ff, | |
501 | PCRELOFFSET) | |
17505c5c | 502 | #endif /* not ARM_WINCE */ |
917583ad | 503 | }; |
252b5132 | 504 | |
af74ae99 NC |
505 | #define NUM_RELOCS NUM_ELEM (aoutarm_std_reloc_howto) |
506 | ||
252b5132 | 507 | #ifdef COFF_WITH_PE |
b34976b6 | 508 | /* Return TRUE if this relocation should |
d70910e8 | 509 | appear in the output .reloc section. */ |
252b5132 | 510 | |
b34976b6 | 511 | static bfd_boolean |
c8e7bf0d NC |
512 | in_reloc_p (bfd * abfd ATTRIBUTE_UNUSED, |
513 | reloc_howto_type * howto) | |
252b5132 RH |
514 | { |
515 | return !howto->pc_relative && howto->type != ARM_RVA32; | |
d70910e8 | 516 | } |
252b5132 RH |
517 | #endif |
518 | ||
af74ae99 NC |
519 | #define RTYPE2HOWTO(cache_ptr, dst) \ |
520 | (cache_ptr)->howto = \ | |
521 | (dst)->r_type < NUM_RELOCS \ | |
522 | ? aoutarm_std_reloc_howto + (dst)->r_type \ | |
523 | : NULL | |
252b5132 RH |
524 | |
525 | #define coff_rtype_to_howto coff_arm_rtype_to_howto | |
526 | ||
527 | static reloc_howto_type * | |
c8e7bf0d NC |
528 | coff_arm_rtype_to_howto (bfd *abfd ATTRIBUTE_UNUSED, |
529 | asection *sec, | |
530 | struct internal_reloc *rel, | |
531 | struct coff_link_hash_entry *h ATTRIBUTE_UNUSED, | |
532 | struct internal_syment *sym ATTRIBUTE_UNUSED, | |
533 | bfd_vma *addendp) | |
252b5132 | 534 | { |
af74ae99 | 535 | reloc_howto_type * howto; |
252b5132 | 536 | |
af74ae99 NC |
537 | if (rel->r_type >= NUM_RELOCS) |
538 | return NULL; | |
d70910e8 | 539 | |
252b5132 RH |
540 | howto = aoutarm_std_reloc_howto + rel->r_type; |
541 | ||
542 | if (rel->r_type == ARM_RVA32) | |
17505c5c | 543 | *addendp -= pe_data (sec->output_section->owner)->pe_opthdr.ImageBase; |
252b5132 | 544 | |
0be038d6 | 545 | #if defined COFF_WITH_PE && defined ARM_WINCE |
f0927246 NC |
546 | if (rel->r_type == ARM_SECREL) |
547 | { | |
548 | bfd_vma osect_vma; | |
549 | ||
550 | if (h && (h->type == bfd_link_hash_defined | |
551 | || h->type == bfd_link_hash_defweak)) | |
552 | osect_vma = h->root.u.def.section->output_section->vma; | |
553 | else | |
554 | { | |
f0927246 NC |
555 | int i; |
556 | ||
557 | /* Sigh, the only way to get the section to offset against | |
558 | is to find it the hard way. */ | |
559 | ||
560 | for (sec = abfd->sections, i = 1; i < sym->n_scnum; i++) | |
561 | sec = sec->next; | |
562 | ||
563 | osect_vma = sec->output_section->vma; | |
564 | } | |
565 | ||
566 | *addendp -= osect_vma; | |
567 | } | |
568 | #endif | |
569 | ||
252b5132 | 570 | return howto; |
252b5132 | 571 | } |
917583ad | 572 | |
d70910e8 | 573 | /* Used by the assembler. */ |
252b5132 RH |
574 | |
575 | static bfd_reloc_status_type | |
c8e7bf0d NC |
576 | aoutarm_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED, |
577 | arelent *reloc_entry ATTRIBUTE_UNUSED, | |
578 | asymbol *symbol ATTRIBUTE_UNUSED, | |
579 | void * data ATTRIBUTE_UNUSED, | |
580 | asection *input_section ATTRIBUTE_UNUSED, | |
581 | bfd *output_bfd ATTRIBUTE_UNUSED, | |
582 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
583 | { |
584 | /* This is dead simple at present. */ | |
585 | return bfd_reloc_ok; | |
586 | } | |
587 | ||
d70910e8 | 588 | /* Used by the assembler. */ |
252b5132 RH |
589 | |
590 | static bfd_reloc_status_type | |
c8e7bf0d NC |
591 | aoutarm_fix_pcrel_26 (bfd *abfd, |
592 | arelent *reloc_entry, | |
593 | asymbol *symbol, | |
594 | void * data, | |
595 | asection *input_section, | |
596 | bfd *output_bfd, | |
597 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
598 | { |
599 | bfd_vma relocation; | |
600 | bfd_size_type addr = reloc_entry->address; | |
601 | long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); | |
602 | bfd_reloc_status_type flag = bfd_reloc_ok; | |
d70910e8 | 603 | |
917583ad | 604 | /* If this is an undefined symbol, return error. */ |
45dfa85a | 605 | if (bfd_is_und_section (symbol->section) |
252b5132 RH |
606 | && (symbol->flags & BSF_WEAK) == 0) |
607 | return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; | |
608 | ||
609 | /* If the sections are different, and we are doing a partial relocation, | |
610 | just ignore it for now. */ | |
611 | if (symbol->section->name != input_section->name | |
612 | && output_bfd != (bfd *)NULL) | |
613 | return bfd_reloc_continue; | |
614 | ||
615 | relocation = (target & 0x00ffffff) << 2; | |
917583ad | 616 | relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */ |
252b5132 RH |
617 | relocation += symbol->value; |
618 | relocation += symbol->section->output_section->vma; | |
619 | relocation += symbol->section->output_offset; | |
620 | relocation += reloc_entry->addend; | |
621 | relocation -= input_section->output_section->vma; | |
622 | relocation -= input_section->output_offset; | |
623 | relocation -= addr; | |
d70910e8 | 624 | |
252b5132 RH |
625 | if (relocation & 3) |
626 | return bfd_reloc_overflow; | |
627 | ||
917583ad | 628 | /* Check for overflow. */ |
252b5132 RH |
629 | if (relocation & 0x02000000) |
630 | { | |
631 | if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff) | |
632 | flag = bfd_reloc_overflow; | |
633 | } | |
dc810e39 | 634 | else if (relocation & ~(bfd_vma) 0x03ffffff) |
252b5132 RH |
635 | flag = bfd_reloc_overflow; |
636 | ||
637 | target &= ~0x00ffffff; | |
638 | target |= (relocation >> 2) & 0x00ffffff; | |
dc810e39 | 639 | bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); |
252b5132 RH |
640 | |
641 | /* Now the ARM magic... Change the reloc type so that it is marked as done. | |
642 | Strictly this is only necessary if we are doing a partial relocation. */ | |
643 | reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D]; | |
644 | ||
645 | return flag; | |
646 | } | |
647 | ||
648 | static bfd_reloc_status_type | |
c8e7bf0d NC |
649 | coff_thumb_pcrel_common (bfd *abfd, |
650 | arelent *reloc_entry, | |
651 | asymbol *symbol, | |
652 | void * data, | |
653 | asection *input_section, | |
654 | bfd *output_bfd, | |
655 | char **error_message ATTRIBUTE_UNUSED, | |
656 | thumb_pcrel_branchtype btype) | |
252b5132 RH |
657 | { |
658 | bfd_vma relocation = 0; | |
659 | bfd_size_type addr = reloc_entry->address; | |
660 | long target = bfd_get_32 (abfd, (bfd_byte *) data + addr); | |
661 | bfd_reloc_status_type flag = bfd_reloc_ok; | |
662 | bfd_vma dstmsk; | |
663 | bfd_vma offmsk; | |
664 | bfd_vma signbit; | |
665 | ||
666 | /* NOTE: This routine is currently used by GAS, but not by the link | |
667 | phase. */ | |
252b5132 RH |
668 | switch (btype) |
669 | { | |
670 | case b9: | |
671 | dstmsk = 0x000000ff; | |
672 | offmsk = 0x000001fe; | |
673 | signbit = 0x00000100; | |
674 | break; | |
675 | ||
676 | case b12: | |
677 | dstmsk = 0x000007ff; | |
678 | offmsk = 0x00000ffe; | |
679 | signbit = 0x00000800; | |
680 | break; | |
681 | ||
682 | case b23: | |
683 | dstmsk = 0x07ff07ff; | |
684 | offmsk = 0x007fffff; | |
685 | signbit = 0x00400000; | |
686 | break; | |
687 | ||
688 | default: | |
689 | abort (); | |
690 | } | |
d70910e8 | 691 | |
917583ad | 692 | /* If this is an undefined symbol, return error. */ |
45dfa85a | 693 | if (bfd_is_und_section (symbol->section) |
252b5132 RH |
694 | && (symbol->flags & BSF_WEAK) == 0) |
695 | return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined; | |
696 | ||
697 | /* If the sections are different, and we are doing a partial relocation, | |
698 | just ignore it for now. */ | |
699 | if (symbol->section->name != input_section->name | |
700 | && output_bfd != (bfd *)NULL) | |
701 | return bfd_reloc_continue; | |
702 | ||
703 | switch (btype) | |
704 | { | |
705 | case b9: | |
706 | case b12: | |
707 | relocation = ((target & dstmsk) << 1); | |
708 | break; | |
709 | ||
710 | case b23: | |
711 | if (bfd_big_endian (abfd)) | |
712 | relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4); | |
713 | else | |
714 | relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15); | |
715 | break; | |
716 | ||
717 | default: | |
718 | abort (); | |
719 | } | |
720 | ||
917583ad | 721 | relocation = (relocation ^ signbit) - signbit; /* Sign extend. */ |
252b5132 RH |
722 | relocation += symbol->value; |
723 | relocation += symbol->section->output_section->vma; | |
724 | relocation += symbol->section->output_offset; | |
725 | relocation += reloc_entry->addend; | |
726 | relocation -= input_section->output_section->vma; | |
727 | relocation -= input_section->output_offset; | |
728 | relocation -= addr; | |
729 | ||
730 | if (relocation & 1) | |
731 | return bfd_reloc_overflow; | |
732 | ||
917583ad | 733 | /* Check for overflow. */ |
252b5132 RH |
734 | if (relocation & signbit) |
735 | { | |
736 | if ((relocation & ~offmsk) != ~offmsk) | |
737 | flag = bfd_reloc_overflow; | |
738 | } | |
739 | else if (relocation & ~offmsk) | |
740 | flag = bfd_reloc_overflow; | |
741 | ||
742 | target &= ~dstmsk; | |
743 | switch (btype) | |
744 | { | |
745 | case b9: | |
746 | case b12: | |
747 | target |= (relocation >> 1); | |
748 | break; | |
749 | ||
750 | case b23: | |
751 | if (bfd_big_endian (abfd)) | |
dc810e39 AM |
752 | target |= (((relocation & 0xfff) >> 1) |
753 | | ((relocation << 4) & 0x07ff0000)); | |
252b5132 | 754 | else |
dc810e39 AM |
755 | target |= (((relocation & 0xffe) << 15) |
756 | | ((relocation >> 12) & 0x7ff)); | |
252b5132 RH |
757 | break; |
758 | ||
759 | default: | |
760 | abort (); | |
761 | } | |
762 | ||
dc810e39 | 763 | bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr); |
252b5132 RH |
764 | |
765 | /* Now the ARM magic... Change the reloc type so that it is marked as done. | |
766 | Strictly this is only necessary if we are doing a partial relocation. */ | |
767 | reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D]; | |
d70910e8 | 768 | |
917583ad | 769 | /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations. */ |
252b5132 RH |
770 | return flag; |
771 | } | |
772 | ||
7831a775 | 773 | #ifndef ARM_WINCE |
252b5132 | 774 | static bfd_reloc_status_type |
c8e7bf0d NC |
775 | coff_thumb_pcrel_23 (bfd *abfd, |
776 | arelent *reloc_entry, | |
777 | asymbol *symbol, | |
778 | void * data, | |
779 | asection *input_section, | |
780 | bfd *output_bfd, | |
781 | char **error_message) | |
252b5132 RH |
782 | { |
783 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
07d6d2b8 | 784 | input_section, output_bfd, error_message, |
dc810e39 | 785 | b23); |
252b5132 RH |
786 | } |
787 | ||
788 | static bfd_reloc_status_type | |
c8e7bf0d NC |
789 | coff_thumb_pcrel_9 (bfd *abfd, |
790 | arelent *reloc_entry, | |
791 | asymbol *symbol, | |
792 | void * data, | |
793 | asection *input_section, | |
794 | bfd *output_bfd, | |
795 | char **error_message) | |
252b5132 RH |
796 | { |
797 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
07d6d2b8 | 798 | input_section, output_bfd, error_message, |
7831a775 | 799 | b9); |
252b5132 | 800 | } |
7831a775 | 801 | #endif /* not ARM_WINCE */ |
252b5132 RH |
802 | |
803 | static bfd_reloc_status_type | |
c8e7bf0d NC |
804 | coff_thumb_pcrel_12 (bfd *abfd, |
805 | arelent *reloc_entry, | |
806 | asymbol *symbol, | |
807 | void * data, | |
808 | asection *input_section, | |
809 | bfd *output_bfd, | |
810 | char **error_message) | |
252b5132 RH |
811 | { |
812 | return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, | |
07d6d2b8 | 813 | input_section, output_bfd, error_message, |
7831a775 | 814 | b12); |
252b5132 RH |
815 | } |
816 | ||
dc810e39 | 817 | static const struct reloc_howto_struct * |
c8e7bf0d | 818 | coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) |
252b5132 | 819 | { |
af74ae99 | 820 | #define ASTD(i,j) case i: return aoutarm_std_reloc_howto + j |
d70910e8 | 821 | |
252b5132 | 822 | if (code == BFD_RELOC_CTOR) |
30d10e9e | 823 | switch (bfd_arch_bits_per_address (abfd)) |
252b5132 RH |
824 | { |
825 | case 32: | |
07d6d2b8 AM |
826 | code = BFD_RELOC_32; |
827 | break; | |
917583ad | 828 | default: |
c8e7bf0d | 829 | return NULL; |
252b5132 RH |
830 | } |
831 | ||
832 | switch (code) | |
833 | { | |
17505c5c | 834 | #ifdef ARM_WINCE |
07d6d2b8 AM |
835 | ASTD (BFD_RELOC_32, ARM_32); |
836 | ASTD (BFD_RELOC_RVA, ARM_RVA32); | |
837 | ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); | |
17505c5c | 838 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); |
07d6d2b8 | 839 | ASTD (BFD_RELOC_32_SECREL, ARM_SECREL); |
17505c5c | 840 | #else |
07d6d2b8 AM |
841 | ASTD (BFD_RELOC_8, ARM_8); |
842 | ASTD (BFD_RELOC_16, ARM_16); | |
843 | ASTD (BFD_RELOC_32, ARM_32); | |
844 | ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); | |
845 | ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26); | |
846 | ASTD (BFD_RELOC_8_PCREL, ARM_DISP8); | |
847 | ASTD (BFD_RELOC_16_PCREL, ARM_DISP16); | |
848 | ASTD (BFD_RELOC_32_PCREL, ARM_DISP32); | |
849 | ASTD (BFD_RELOC_RVA, ARM_RVA32); | |
252b5132 RH |
850 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9); |
851 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); | |
852 | ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23); | |
07d6d2b8 | 853 | ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23); |
d70910e8 | 854 | #endif |
c8e7bf0d | 855 | default: return NULL; |
252b5132 RH |
856 | } |
857 | } | |
858 | ||
157090f7 AM |
859 | static reloc_howto_type * |
860 | coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
861 | const char *r_name) | |
862 | { | |
863 | unsigned int i; | |
864 | ||
865 | for (i = 0; | |
866 | i < (sizeof (aoutarm_std_reloc_howto) | |
867 | / sizeof (aoutarm_std_reloc_howto[0])); | |
868 | i++) | |
869 | if (aoutarm_std_reloc_howto[i].name != NULL | |
870 | && strcasecmp (aoutarm_std_reloc_howto[i].name, r_name) == 0) | |
871 | return &aoutarm_std_reloc_howto[i]; | |
872 | ||
873 | return NULL; | |
874 | } | |
875 | ||
c8e7bf0d | 876 | #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2 |
07d6d2b8 | 877 | #define COFF_PAGE_SIZE 0x1000 |
252b5132 | 878 | |
c8e7bf0d | 879 | /* Turn a howto into a reloc nunmber. */ |
252b5132 | 880 | #define SELECT_RELOC(x,howto) { x.r_type = howto->type; } |
07d6d2b8 AM |
881 | #define BADMAG(x) ARMBADMAG(x) |
882 | #define ARM 1 /* Customize coffcode.h. */ | |
252b5132 | 883 | |
7831a775 | 884 | #ifndef ARM_WINCE |
2106126f | 885 | /* Make sure that the 'r_offset' field is copied properly |
830629ab | 886 | so that identical binaries will compare the same. */ |
2106126f NC |
887 | #define SWAP_IN_RELOC_OFFSET H_GET_32 |
888 | #define SWAP_OUT_RELOC_OFFSET H_PUT_32 | |
7831a775 | 889 | #endif |
2106126f | 890 | |
252b5132 RH |
891 | /* Extend the coff_link_hash_table structure with a few ARM specific fields. |
892 | This allows us to store global data here without actually creating any | |
893 | global variables, which is a no-no in the BFD world. */ | |
894 | struct coff_arm_link_hash_table | |
917583ad NC |
895 | { |
896 | /* The original coff_link_hash_table structure. MUST be first field. */ | |
897 | struct coff_link_hash_table root; | |
d70910e8 | 898 | |
5c4491d3 | 899 | /* The size in bytes of the section containing the Thumb-to-ARM glue. */ |
dc810e39 | 900 | bfd_size_type thumb_glue_size; |
d70910e8 | 901 | |
5c4491d3 | 902 | /* The size in bytes of the section containing the ARM-to-Thumb glue. */ |
dc810e39 | 903 | bfd_size_type arm_glue_size; |
252b5132 | 904 | |
5c4491d3 | 905 | /* An arbitrary input BFD chosen to hold the glue sections. */ |
917583ad | 906 | bfd * bfd_of_glue_owner; |
252b5132 | 907 | |
917583ad | 908 | /* Support interworking with old, non-interworking aware ARM code. */ |
07d6d2b8 | 909 | int support_old_code; |
252b5132 RH |
910 | }; |
911 | ||
912 | /* Get the ARM coff linker hash table from a link_info structure. */ | |
913 | #define coff_arm_hash_table(info) \ | |
914 | ((struct coff_arm_link_hash_table *) ((info)->hash)) | |
915 | ||
916 | /* Create an ARM coff linker hash table. */ | |
917 | ||
918 | static struct bfd_link_hash_table * | |
c8e7bf0d | 919 | coff_arm_link_hash_table_create (bfd * abfd) |
252b5132 RH |
920 | { |
921 | struct coff_arm_link_hash_table * ret; | |
dc810e39 | 922 | bfd_size_type amt = sizeof (struct coff_arm_link_hash_table); |
252b5132 | 923 | |
7bf52ea2 | 924 | ret = bfd_zmalloc (amt); |
c8e7bf0d | 925 | if (ret == NULL) |
252b5132 RH |
926 | return NULL; |
927 | ||
66eb6687 AM |
928 | if (!_bfd_coff_link_hash_table_init (&ret->root, |
929 | abfd, | |
930 | _bfd_coff_link_hash_newfunc, | |
931 | sizeof (struct coff_link_hash_entry))) | |
252b5132 | 932 | { |
e2d34d7d | 933 | free (ret); |
c8e7bf0d | 934 | return NULL; |
252b5132 RH |
935 | } |
936 | ||
252b5132 RH |
937 | return & ret->root.root; |
938 | } | |
939 | ||
b1657152 | 940 | static bfd_boolean |
c8e7bf0d NC |
941 | arm_emit_base_file_entry (struct bfd_link_info *info, |
942 | bfd *output_bfd, | |
943 | asection *input_section, | |
944 | bfd_vma reloc_offset) | |
252b5132 | 945 | { |
b1657152 AM |
946 | bfd_vma addr = (reloc_offset |
947 | - input_section->vma | |
948 | + input_section->output_offset | |
949 | + input_section->output_section->vma); | |
252b5132 | 950 | |
917583ad NC |
951 | if (coff_data (output_bfd)->pe) |
952 | addr -= pe_data (output_bfd)->pe_opthdr.ImageBase; | |
b1657152 AM |
953 | if (fwrite (&addr, sizeof (addr), 1, (FILE *) info->base_file) == 1) |
954 | return TRUE; | |
252b5132 | 955 | |
b1657152 AM |
956 | bfd_set_error (bfd_error_system_call); |
957 | return FALSE; | |
252b5132 RH |
958 | } |
959 | \f | |
7831a775 | 960 | #ifndef ARM_WINCE |
252b5132 RH |
961 | /* The thumb form of a long branch is a bit finicky, because the offset |
962 | encoding is split over two fields, each in it's own instruction. They | |
d70910e8 | 963 | can occur in any order. So given a thumb form of long branch, and an |
252b5132 | 964 | offset, insert the offset into the thumb branch and return finished |
d70910e8 | 965 | instruction. |
252b5132 | 966 | |
d70910e8 | 967 | It takes two thumb instructions to encode the target address. Each has |
5c4491d3 | 968 | 11 bits to invest. The upper 11 bits are stored in one (identified by |
d70910e8 KH |
969 | H-0.. see below), the lower 11 bits are stored in the other (identified |
970 | by H-1). | |
252b5132 | 971 | |
d70910e8 | 972 | Combine together and shifted left by 1 (it's a half word address) and |
252b5132 RH |
973 | there you have it. |
974 | ||
975 | Op: 1111 = F, | |
976 | H-0, upper address-0 = 000 | |
977 | Op: 1111 = F, | |
978 | H-1, lower address-0 = 800 | |
979 | ||
d70910e8 | 980 | They can be ordered either way, but the arm tools I've seen always put |
252b5132 RH |
981 | the lower one first. It probably doesn't matter. krk@cygnus.com |
982 | ||
983 | XXX: Actually the order does matter. The second instruction (H-1) | |
984 | moves the computed address into the PC, so it must be the second one | |
985 | in the sequence. The problem, however is that whilst little endian code | |
986 | stores the instructions in HI then LOW order, big endian code does the | |
917583ad | 987 | reverse. nickc@cygnus.com. */ |
252b5132 RH |
988 | |
989 | #define LOW_HI_ORDER 0xF800F000 | |
990 | #define HI_LOW_ORDER 0xF000F800 | |
991 | ||
992 | static insn32 | |
c8e7bf0d | 993 | insert_thumb_branch (insn32 br_insn, int rel_off) |
252b5132 RH |
994 | { |
995 | unsigned int low_bits; | |
996 | unsigned int high_bits; | |
997 | ||
c8e7bf0d | 998 | BFD_ASSERT ((rel_off & 1) != 1); |
252b5132 | 999 | |
07d6d2b8 AM |
1000 | rel_off >>= 1; /* Half word aligned address. */ |
1001 | low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */ | |
c8e7bf0d | 1002 | high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */ |
252b5132 RH |
1003 | |
1004 | if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER) | |
1005 | br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits; | |
1006 | else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER) | |
1007 | br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits; | |
1008 | else | |
dc810e39 AM |
1009 | /* FIXME: the BFD library should never abort except for internal errors |
1010 | - it should return an error status. */ | |
917583ad | 1011 | abort (); /* Error - not a valid branch instruction form. */ |
252b5132 RH |
1012 | |
1013 | return br_insn; | |
1014 | } | |
7831a775 | 1015 | |
252b5132 RH |
1016 | \f |
1017 | static struct coff_link_hash_entry * | |
c8e7bf0d NC |
1018 | find_thumb_glue (struct bfd_link_info *info, |
1019 | const char *name, | |
1020 | bfd *input_bfd) | |
252b5132 | 1021 | { |
dc810e39 AM |
1022 | char *tmp_name; |
1023 | struct coff_link_hash_entry *myh; | |
1024 | bfd_size_type amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; | |
252b5132 | 1025 | |
c8e7bf0d | 1026 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1027 | |
1028 | BFD_ASSERT (tmp_name); | |
1029 | ||
1030 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
d70910e8 | 1031 | |
252b5132 | 1032 | myh = coff_link_hash_lookup |
b34976b6 | 1033 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 1034 | |
252b5132 RH |
1035 | if (myh == NULL) |
1036 | /* xgettext:c-format */ | |
871b3ab2 | 1037 | _bfd_error_handler (_("%pB: unable to find THUMB glue '%s' for `%s'"), |
d003868e | 1038 | input_bfd, tmp_name, name); |
d70910e8 | 1039 | |
252b5132 RH |
1040 | free (tmp_name); |
1041 | ||
1042 | return myh; | |
1043 | } | |
7831a775 | 1044 | #endif /* not ARM_WINCE */ |
252b5132 RH |
1045 | |
1046 | static struct coff_link_hash_entry * | |
c8e7bf0d NC |
1047 | find_arm_glue (struct bfd_link_info *info, |
1048 | const char *name, | |
1049 | bfd *input_bfd) | |
252b5132 | 1050 | { |
dc810e39 | 1051 | char *tmp_name; |
252b5132 | 1052 | struct coff_link_hash_entry * myh; |
dc810e39 | 1053 | bfd_size_type amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; |
252b5132 | 1054 | |
c8e7bf0d | 1055 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1056 | |
1057 | BFD_ASSERT (tmp_name); | |
1058 | ||
1059 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
d70910e8 | 1060 | |
252b5132 | 1061 | myh = coff_link_hash_lookup |
b34976b6 | 1062 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
252b5132 RH |
1063 | |
1064 | if (myh == NULL) | |
1065 | /* xgettext:c-format */ | |
871b3ab2 | 1066 | _bfd_error_handler (_("%pB: unable to find ARM glue '%s' for `%s'"), |
d003868e | 1067 | input_bfd, tmp_name, name); |
d70910e8 | 1068 | |
252b5132 RH |
1069 | free (tmp_name); |
1070 | ||
1071 | return myh; | |
1072 | } | |
1073 | ||
1074 | /* | |
1075 | ARM->Thumb glue: | |
1076 | ||
1077 | .arm | |
1078 | __func_from_arm: | |
1079 | ldr r12, __func_addr | |
1080 | bx r12 | |
1081 | __func_addr: | |
07d6d2b8 | 1082 | .word func @ behave as if you saw a ARM_32 reloc |
252b5132 RH |
1083 | */ |
1084 | ||
1085 | #define ARM2THUMB_GLUE_SIZE 12 | |
1086 | static const insn32 a2t1_ldr_insn = 0xe59fc000; | |
1087 | static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; | |
1088 | static const insn32 a2t3_func_addr_insn = 0x00000001; | |
1089 | ||
252b5132 RH |
1090 | /* |
1091 | Thumb->ARM: Thumb->(non-interworking aware) ARM | |
1092 | ||
1093 | .thumb .thumb | |
1094 | .align 2 .align 2 | |
1095 | __func_from_thumb: __func_from_thumb: | |
1096 | bx pc push {r6, lr} | |
1097 | nop ldr r6, __func_addr | |
1098 | .arm mov lr, pc | |
1099 | __func_change_to_arm: bx r6 | |
07d6d2b8 | 1100 | b func .arm |
252b5132 | 1101 | __func_back_to_thumb: |
07d6d2b8 AM |
1102 | ldmia r13! {r6, lr} |
1103 | bx lr | |
1104 | __func_addr: | |
1105 | .word func | |
252b5132 RH |
1106 | */ |
1107 | ||
1108 | #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8) | |
2dc773a0 | 1109 | #ifndef ARM_WINCE |
252b5132 RH |
1110 | static const insn16 t2a1_bx_pc_insn = 0x4778; |
1111 | static const insn16 t2a2_noop_insn = 0x46c0; | |
1112 | static const insn32 t2a3_b_insn = 0xea000000; | |
1113 | ||
252b5132 RH |
1114 | static const insn16 t2a1_push_insn = 0xb540; |
1115 | static const insn16 t2a2_ldr_insn = 0x4e03; | |
1116 | static const insn16 t2a3_mov_insn = 0x46fe; | |
1117 | static const insn16 t2a4_bx_insn = 0x4730; | |
1118 | static const insn32 t2a5_pop_insn = 0xe8bd4040; | |
1119 | static const insn32 t2a6_bx_insn = 0xe12fff1e; | |
2dc773a0 | 1120 | #endif |
252b5132 RH |
1121 | |
1122 | /* TODO: | |
1123 | We should really create new local (static) symbols in destination | |
1124 | object for each stub we create. We should also create local | |
1125 | (static) symbols within the stubs when switching between ARM and | |
1126 | Thumb code. This will ensure that the debugger and disassembler | |
1127 | can present a better view of stubs. | |
1128 | ||
1129 | We can treat stubs like literal sections, and for the THUMB9 ones | |
1130 | (short addressing range) we should be able to insert the stubs | |
1131 | between sections. i.e. the simplest approach (since relocations | |
1132 | are done on a section basis) is to dump the stubs at the end of | |
1133 | processing a section. That way we can always try and minimise the | |
1134 | offset to and from a stub. However, this does not map well onto | |
1135 | the way that the linker/BFD does its work: mapping all input | |
1136 | sections to output sections via the linker script before doing | |
1137 | all the processing. | |
1138 | ||
1139 | Unfortunately it may be easier to just to disallow short range | |
1140 | Thumb->ARM stubs (i.e. no conditional inter-working branches, | |
1141 | only branch-and-link (BL) calls. This will simplify the processing | |
1142 | since we can then put all of the stubs into their own section. | |
1143 | ||
1144 | TODO: | |
1145 | On a different subject, rather than complaining when a | |
1146 | branch cannot fit in the number of bits available for the | |
1147 | instruction we should generate a trampoline stub (needed to | |
1148 | address the complete 32bit address space). */ | |
1149 | ||
d70910e8 | 1150 | /* The standard COFF backend linker does not cope with the special |
252b5132 RH |
1151 | Thumb BRANCH23 relocation. The alternative would be to split the |
1152 | BRANCH23 into seperate HI23 and LO23 relocations. However, it is a | |
d70910e8 | 1153 | bit simpler simply providing our own relocation driver. */ |
252b5132 RH |
1154 | |
1155 | /* The reloc processing routine for the ARM/Thumb COFF linker. NOTE: | |
1156 | This code is a very slightly modified copy of | |
1157 | _bfd_coff_generic_relocate_section. It would be a much more | |
1158 | maintainable solution to have a MACRO that could be expanded within | |
1159 | _bfd_coff_generic_relocate_section that would only be provided for | |
1160 | ARM/Thumb builds. It is only the code marked THUMBEXTENSION that | |
1161 | is different from the original. */ | |
1162 | ||
b34976b6 | 1163 | static bfd_boolean |
c8e7bf0d NC |
1164 | coff_arm_relocate_section (bfd *output_bfd, |
1165 | struct bfd_link_info *info, | |
1166 | bfd *input_bfd, | |
1167 | asection *input_section, | |
1168 | bfd_byte *contents, | |
1169 | struct internal_reloc *relocs, | |
1170 | struct internal_syment *syms, | |
1171 | asection **sections) | |
252b5132 RH |
1172 | { |
1173 | struct internal_reloc * rel; | |
1174 | struct internal_reloc * relend; | |
2dc773a0 | 1175 | #ifndef ARM_WINCE |
07515404 | 1176 | bfd_vma high_address = bfd_get_section_limit (input_bfd, input_section); |
2dc773a0 | 1177 | #endif |
252b5132 RH |
1178 | |
1179 | rel = relocs; | |
1180 | relend = rel + input_section->reloc_count; | |
1181 | ||
1182 | for (; rel < relend; rel++) | |
1183 | { | |
07d6d2b8 AM |
1184 | int done = 0; |
1185 | long symndx; | |
252b5132 | 1186 | struct coff_link_hash_entry * h; |
07d6d2b8 AM |
1187 | struct internal_syment * sym; |
1188 | bfd_vma addend; | |
1189 | bfd_vma val; | |
1190 | reloc_howto_type * howto; | |
1191 | bfd_reloc_status_type rstat; | |
1192 | bfd_vma h_val; | |
252b5132 RH |
1193 | |
1194 | symndx = rel->r_symndx; | |
1195 | ||
1196 | if (symndx == -1) | |
1197 | { | |
1198 | h = NULL; | |
1199 | sym = NULL; | |
1200 | } | |
1201 | else | |
d70910e8 | 1202 | { |
252b5132 RH |
1203 | h = obj_coff_sym_hashes (input_bfd)[symndx]; |
1204 | sym = syms + symndx; | |
1205 | } | |
1206 | ||
1207 | /* COFF treats common symbols in one of two ways. Either the | |
07d6d2b8 AM |
1208 | size of the symbol is included in the section contents, or it |
1209 | is not. We assume that the size is not included, and force | |
1210 | the rtype_to_howto function to adjust the addend as needed. */ | |
252b5132 RH |
1211 | |
1212 | if (sym != NULL && sym->n_scnum != 0) | |
1213 | addend = - sym->n_value; | |
1214 | else | |
1215 | addend = 0; | |
1216 | ||
252b5132 RH |
1217 | howto = coff_rtype_to_howto (input_bfd, input_section, rel, h, |
1218 | sym, &addend); | |
1219 | if (howto == NULL) | |
b34976b6 | 1220 | return FALSE; |
252b5132 RH |
1221 | |
1222 | /* The relocation_section function will skip pcrel_offset relocs | |
07d6d2b8 AM |
1223 | when doing a relocatable link. However, we want to convert |
1224 | ARM_26 to ARM_26D relocs if possible. We return a fake howto in | |
1225 | this case without pcrel_offset set, and adjust the addend to | |
1226 | compensate. 'partial_inplace' is also set, since we want 'done' | |
1227 | relocations to be reflected in section's data. */ | |
252b5132 | 1228 | if (rel->r_type == ARM_26 |
07d6d2b8 AM |
1229 | && h != NULL |
1230 | && bfd_link_relocatable (info) | |
1231 | && (h->root.type == bfd_link_hash_defined | |
252b5132 | 1232 | || h->root.type == bfd_link_hash_defweak) |
07d6d2b8 | 1233 | && (h->root.u.def.section->output_section |
dc810e39 | 1234 | == input_section->output_section)) |
07d6d2b8 AM |
1235 | { |
1236 | static reloc_howto_type fake_arm26_reloc = | |
252b5132 | 1237 | HOWTO (ARM_26, |
07d6d2b8 AM |
1238 | 2, |
1239 | 2, | |
1240 | 24, | |
1241 | TRUE, | |
1242 | 0, | |
1243 | complain_overflow_signed, | |
1244 | aoutarm_fix_pcrel_26 , | |
1245 | "ARM_26", | |
1246 | TRUE, | |
1247 | 0x00ffffff, | |
1248 | 0x00ffffff, | |
1249 | FALSE); | |
1250 | ||
1251 | addend -= rel->r_vaddr - input_section->vma; | |
44e88952 | 1252 | #ifdef ARM_WINCE |
07d6d2b8 AM |
1253 | /* FIXME: I don't know why, but the hack is necessary for correct |
1254 | generation of bl's instruction offset. */ | |
1255 | addend -= 8; | |
44e88952 | 1256 | #endif |
07d6d2b8 AM |
1257 | howto = & fake_arm26_reloc; |
1258 | } | |
252b5132 | 1259 | |
17505c5c NC |
1260 | #ifdef ARM_WINCE |
1261 | /* MS ARM-CE makes the reloc relative to the opcode's pc, not | |
d70910e8 | 1262 | the next opcode's pc, so is off by one. */ |
0e1862bb | 1263 | if (howto->pc_relative && !bfd_link_relocatable (info)) |
53baae48 | 1264 | addend -= 8; |
17505c5c | 1265 | #endif |
d70910e8 | 1266 | |
1049f94e | 1267 | /* If we are doing a relocatable link, then we can just ignore |
07d6d2b8 AM |
1268 | a PC relative reloc that is pcrel_offset. It will already |
1269 | have the correct value. If this is not a relocatable link, | |
1270 | then we should ignore the symbol value. */ | |
252b5132 | 1271 | if (howto->pc_relative && howto->pcrel_offset) |
07d6d2b8 AM |
1272 | { |
1273 | if (bfd_link_relocatable (info)) | |
1274 | continue; | |
87748b32 NC |
1275 | /* FIXME - it is not clear which targets need this next test |
1276 | and which do not. It is known that it is needed for the | |
d8adc60f | 1277 | VxWorks and EPOC-PE targets, but it is also known that it |
5c4491d3 | 1278 | was suppressed for other ARM targets. This ought to be |
d8adc60f NC |
1279 | sorted out one day. */ |
1280 | #ifdef ARM_COFF_BUGFIX | |
87748b32 NC |
1281 | /* We must not ignore the symbol value. If the symbol is |
1282 | within the same section, the relocation should have already | |
1283 | been fixed, but if it is not, we'll be handed a reloc into | |
1284 | the beginning of the symbol's section, so we must not cancel | |
1285 | out the symbol's value, otherwise we'll be adding it in | |
1286 | twice. */ | |
07d6d2b8 AM |
1287 | if (sym != NULL && sym->n_scnum != 0) |
1288 | addend += sym->n_value; | |
ed1de528 | 1289 | #endif |
07d6d2b8 | 1290 | } |
252b5132 RH |
1291 | |
1292 | val = 0; | |
1293 | ||
1294 | if (h == NULL) | |
1295 | { | |
1296 | asection *sec; | |
1297 | ||
1298 | if (symndx == -1) | |
1299 | { | |
1300 | sec = bfd_abs_section_ptr; | |
1301 | val = 0; | |
1302 | } | |
1303 | else | |
1304 | { | |
1305 | sec = sections[symndx]; | |
07d6d2b8 | 1306 | val = (sec->output_section->vma |
252b5132 RH |
1307 | + sec->output_offset |
1308 | + sym->n_value | |
1309 | - sec->vma); | |
1310 | } | |
1311 | } | |
1312 | else | |
1313 | { | |
07d6d2b8 AM |
1314 | /* We don't output the stubs if we are generating a |
1315 | relocatable output file, since we may as well leave the | |
1316 | stub generation to the final linker pass. If we fail to | |
252b5132 | 1317 | verify that the name is defined, we'll try to build stubs |
d70910e8 | 1318 | for an undefined name... */ |
07d6d2b8 | 1319 | if (! bfd_link_relocatable (info) |
252b5132 RH |
1320 | && ( h->root.type == bfd_link_hash_defined |
1321 | || h->root.type == bfd_link_hash_defweak)) | |
07d6d2b8 | 1322 | { |
252b5132 RH |
1323 | asection * h_sec = h->root.u.def.section; |
1324 | const char * name = h->root.root.string; | |
d70910e8 | 1325 | |
252b5132 RH |
1326 | /* h locates the symbol referenced in the reloc. */ |
1327 | h_val = (h->root.u.def.value | |
1328 | + h_sec->output_section->vma | |
1329 | + h_sec->output_offset); | |
1330 | ||
07d6d2b8 AM |
1331 | if (howto->type == ARM_26) |
1332 | { | |
1333 | if ( h->symbol_class == C_THUMBSTATFUNC | |
96d56e9f | 1334 | || h->symbol_class == C_THUMBEXTFUNC) |
252b5132 | 1335 | { |
917583ad | 1336 | /* Arm code calling a Thumb function. */ |
07d6d2b8 AM |
1337 | unsigned long int tmp; |
1338 | bfd_vma my_offset; | |
1339 | asection * s; | |
1340 | long int ret_offset; | |
1341 | struct coff_link_hash_entry * myh; | |
252b5132 | 1342 | struct coff_arm_link_hash_table * globals; |
d70910e8 | 1343 | |
252b5132 RH |
1344 | myh = find_arm_glue (info, name, input_bfd); |
1345 | if (myh == NULL) | |
b34976b6 | 1346 | return FALSE; |
252b5132 RH |
1347 | |
1348 | globals = coff_arm_hash_table (info); | |
1349 | ||
1350 | BFD_ASSERT (globals != NULL); | |
1351 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1352 | |
252b5132 | 1353 | my_offset = myh->root.u.def.value; |
d70910e8 KH |
1354 | |
1355 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
252b5132 RH |
1356 | ARM2THUMB_GLUE_SECTION_NAME); |
1357 | BFD_ASSERT (s != NULL); | |
1358 | BFD_ASSERT (s->contents != NULL); | |
1359 | BFD_ASSERT (s->output_section != NULL); | |
1360 | ||
1361 | if ((my_offset & 0x01) == 0x01) | |
1362 | { | |
1363 | if (h_sec->owner != NULL | |
1364 | && INTERWORK_SET (h_sec->owner) | |
1365 | && ! INTERWORK_FLAG (h_sec->owner)) | |
d003868e AM |
1366 | _bfd_error_handler |
1367 | /* xgettext:c-format */ | |
59d08d6c AM |
1368 | (_("%pB(%s): warning: interworking not enabled; " |
1369 | "first occurrence: %pB: arm call to thumb"), | |
c08bb8dd | 1370 | h_sec->owner, name, input_bfd); |
252b5132 RH |
1371 | |
1372 | --my_offset; | |
1373 | myh->root.u.def.value = my_offset; | |
1374 | ||
dc810e39 | 1375 | bfd_put_32 (output_bfd, (bfd_vma) a2t1_ldr_insn, |
252b5132 | 1376 | s->contents + my_offset); |
d70910e8 | 1377 | |
dc810e39 | 1378 | bfd_put_32 (output_bfd, (bfd_vma) a2t2_bx_r12_insn, |
252b5132 | 1379 | s->contents + my_offset + 4); |
d70910e8 | 1380 | |
252b5132 RH |
1381 | /* It's a thumb address. Add the low order bit. */ |
1382 | bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn, | |
1383 | s->contents + my_offset + 8); | |
1384 | ||
07d6d2b8 | 1385 | if (info->base_file |
b1657152 AM |
1386 | && !arm_emit_base_file_entry (info, output_bfd, |
1387 | s, my_offset + 8)) | |
1388 | return FALSE; | |
252b5132 RH |
1389 | } |
1390 | ||
1391 | BFD_ASSERT (my_offset <= globals->arm_glue_size); | |
1392 | ||
1393 | tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr | |
1394 | - input_section->vma); | |
d70910e8 | 1395 | |
252b5132 RH |
1396 | tmp = tmp & 0xFF000000; |
1397 | ||
d70910e8 | 1398 | /* Somehow these are both 4 too far, so subtract 8. */ |
252b5132 RH |
1399 | ret_offset = |
1400 | s->output_offset | |
d70910e8 | 1401 | + my_offset |
252b5132 RH |
1402 | + s->output_section->vma |
1403 | - (input_section->output_offset | |
d70910e8 | 1404 | + input_section->output_section->vma |
252b5132 RH |
1405 | + rel->r_vaddr) |
1406 | - 8; | |
1407 | ||
1408 | tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); | |
d70910e8 | 1409 | |
dc810e39 AM |
1410 | bfd_put_32 (output_bfd, (bfd_vma) tmp, |
1411 | contents + rel->r_vaddr - input_section->vma); | |
252b5132 RH |
1412 | done = 1; |
1413 | } | |
07d6d2b8 | 1414 | } |
d70910e8 | 1415 | |
17505c5c | 1416 | #ifndef ARM_WINCE |
917583ad | 1417 | /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */ |
07d6d2b8 AM |
1418 | else if (howto->type == ARM_THUMB23) |
1419 | { | |
1420 | if ( h->symbol_class == C_EXT | |
96d56e9f NC |
1421 | || h->symbol_class == C_STAT |
1422 | || h->symbol_class == C_LABEL) | |
252b5132 | 1423 | { |
c8e7bf0d | 1424 | /* Thumb code calling an ARM function. */ |
07d6d2b8 AM |
1425 | asection * s = 0; |
1426 | bfd_vma my_offset; | |
1427 | unsigned long int tmp; | |
1428 | long int ret_offset; | |
1429 | struct coff_link_hash_entry * myh; | |
1430 | struct coff_arm_link_hash_table * globals; | |
252b5132 RH |
1431 | |
1432 | myh = find_thumb_glue (info, name, input_bfd); | |
1433 | if (myh == NULL) | |
b34976b6 | 1434 | return FALSE; |
252b5132 RH |
1435 | |
1436 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1437 | |
252b5132 RH |
1438 | BFD_ASSERT (globals != NULL); |
1439 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1440 | |
252b5132 | 1441 | my_offset = myh->root.u.def.value; |
d70910e8 KH |
1442 | |
1443 | s = bfd_get_section_by_name (globals->bfd_of_glue_owner, | |
252b5132 | 1444 | THUMB2ARM_GLUE_SECTION_NAME); |
d70910e8 | 1445 | |
252b5132 RH |
1446 | BFD_ASSERT (s != NULL); |
1447 | BFD_ASSERT (s->contents != NULL); | |
1448 | BFD_ASSERT (s->output_section != NULL); | |
d70910e8 | 1449 | |
252b5132 RH |
1450 | if ((my_offset & 0x01) == 0x01) |
1451 | { | |
1452 | if (h_sec->owner != NULL | |
1453 | && INTERWORK_SET (h_sec->owner) | |
1454 | && ! INTERWORK_FLAG (h_sec->owner) | |
1455 | && ! globals->support_old_code) | |
d003868e AM |
1456 | _bfd_error_handler |
1457 | /* xgettext:c-format */ | |
59d08d6c AM |
1458 | (_("%pB(%s): warning: interworking not enabled; " |
1459 | "first occurrence: %pB: thumb call to arm; " | |
1460 | "consider relinking with --support-old-code " | |
1461 | "enabled"), | |
c08bb8dd | 1462 | h_sec->owner, name, input_bfd); |
d70910e8 | 1463 | |
252b5132 RH |
1464 | -- my_offset; |
1465 | myh->root.u.def.value = my_offset; | |
1466 | ||
1467 | if (globals->support_old_code) | |
1468 | { | |
dc810e39 | 1469 | bfd_put_16 (output_bfd, (bfd_vma) t2a1_push_insn, |
252b5132 | 1470 | s->contents + my_offset); |
d70910e8 | 1471 | |
dc810e39 | 1472 | bfd_put_16 (output_bfd, (bfd_vma) t2a2_ldr_insn, |
252b5132 RH |
1473 | s->contents + my_offset + 2); |
1474 | ||
dc810e39 | 1475 | bfd_put_16 (output_bfd, (bfd_vma) t2a3_mov_insn, |
252b5132 RH |
1476 | s->contents + my_offset + 4); |
1477 | ||
dc810e39 | 1478 | bfd_put_16 (output_bfd, (bfd_vma) t2a4_bx_insn, |
252b5132 | 1479 | s->contents + my_offset + 6); |
d70910e8 | 1480 | |
dc810e39 | 1481 | bfd_put_32 (output_bfd, (bfd_vma) t2a5_pop_insn, |
252b5132 | 1482 | s->contents + my_offset + 8); |
d70910e8 | 1483 | |
dc810e39 | 1484 | bfd_put_32 (output_bfd, (bfd_vma) t2a6_bx_insn, |
252b5132 | 1485 | s->contents + my_offset + 12); |
d70910e8 | 1486 | |
252b5132 RH |
1487 | /* Store the address of the function in the last word of the stub. */ |
1488 | bfd_put_32 (output_bfd, h_val, | |
1489 | s->contents + my_offset + 16); | |
fa0e42e4 | 1490 | |
07d6d2b8 | 1491 | if (info->base_file |
b1657152 AM |
1492 | && !arm_emit_base_file_entry (info, |
1493 | output_bfd, s, | |
1494 | my_offset + 16)) | |
1495 | return FALSE; | |
252b5132 RH |
1496 | } |
1497 | else | |
1498 | { | |
dc810e39 | 1499 | bfd_put_16 (output_bfd, (bfd_vma) t2a1_bx_pc_insn, |
252b5132 | 1500 | s->contents + my_offset); |
d70910e8 | 1501 | |
dc810e39 | 1502 | bfd_put_16 (output_bfd, (bfd_vma) t2a2_noop_insn, |
252b5132 | 1503 | s->contents + my_offset + 2); |
d70910e8 | 1504 | |
252b5132 | 1505 | ret_offset = |
c8e7bf0d NC |
1506 | /* Address of destination of the stub. */ |
1507 | ((bfd_signed_vma) h_val) | |
252b5132 | 1508 | - ((bfd_signed_vma) |
c8e7bf0d NC |
1509 | /* Offset from the start of the current section to the start of the stubs. */ |
1510 | (s->output_offset | |
1511 | /* Offset of the start of this stub from the start of the stubs. */ | |
1512 | + my_offset | |
1513 | /* Address of the start of the current section. */ | |
1514 | + s->output_section->vma) | |
1515 | /* The branch instruction is 4 bytes into the stub. */ | |
1516 | + 4 | |
1517 | /* ARM branches work from the pc of the instruction + 8. */ | |
1518 | + 8); | |
d70910e8 | 1519 | |
252b5132 | 1520 | bfd_put_32 (output_bfd, |
dc810e39 | 1521 | (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), |
252b5132 RH |
1522 | s->contents + my_offset + 4); |
1523 | ||
252b5132 RH |
1524 | } |
1525 | } | |
1526 | ||
1527 | BFD_ASSERT (my_offset <= globals->thumb_glue_size); | |
1528 | ||
1529 | /* Now go back and fix up the original BL insn to point | |
1530 | to here. */ | |
1531 | ret_offset = | |
1532 | s->output_offset | |
1533 | + my_offset | |
1534 | - (input_section->output_offset | |
1535 | + rel->r_vaddr) | |
1536 | -4; | |
d70910e8 | 1537 | |
252b5132 RH |
1538 | tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr |
1539 | - input_section->vma); | |
1540 | ||
1541 | bfd_put_32 (output_bfd, | |
dc810e39 AM |
1542 | (bfd_vma) insert_thumb_branch (tmp, |
1543 | ret_offset), | |
1544 | contents + rel->r_vaddr - input_section->vma); | |
d70910e8 | 1545 | |
252b5132 | 1546 | done = 1; |
07d6d2b8 AM |
1547 | } |
1548 | } | |
17505c5c | 1549 | #endif |
07d6d2b8 | 1550 | } |
d70910e8 | 1551 | |
07d6d2b8 AM |
1552 | /* If the relocation type and destination symbol does not |
1553 | fall into one of the above categories, then we can just | |
1554 | perform a direct link. */ | |
252b5132 RH |
1555 | |
1556 | if (done) | |
1557 | rstat = bfd_reloc_ok; | |
d70910e8 | 1558 | else |
252b5132 RH |
1559 | if ( h->root.type == bfd_link_hash_defined |
1560 | || h->root.type == bfd_link_hash_defweak) | |
1561 | { | |
1562 | asection *sec; | |
1563 | ||
1564 | sec = h->root.u.def.section; | |
1565 | val = (h->root.u.def.value | |
1566 | + sec->output_section->vma | |
1567 | + sec->output_offset); | |
1568 | } | |
1569 | ||
0e1862bb | 1570 | else if (! bfd_link_relocatable (info)) |
1a72702b AM |
1571 | (*info->callbacks->undefined_symbol) |
1572 | (info, h->root.root.string, input_bfd, input_section, | |
1573 | rel->r_vaddr - input_section->vma, TRUE); | |
252b5132 RH |
1574 | } |
1575 | ||
b1657152 AM |
1576 | /* Emit a reloc if the backend thinks it needs it. */ |
1577 | if (info->base_file | |
1578 | && sym | |
1579 | && pe_data(output_bfd)->in_reloc_p(output_bfd, howto) | |
1580 | && !arm_emit_base_file_entry (info, output_bfd, input_section, | |
1581 | rel->r_vaddr)) | |
1582 | return FALSE; | |
d70910e8 | 1583 | |
252b5132 RH |
1584 | if (done) |
1585 | rstat = bfd_reloc_ok; | |
17505c5c | 1586 | #ifndef ARM_WINCE |
c8e7bf0d | 1587 | /* Only perform this fix during the final link, not a relocatable link. */ |
0e1862bb | 1588 | else if (! bfd_link_relocatable (info) |
252b5132 | 1589 | && howto->type == ARM_THUMB23) |
07d6d2b8 AM |
1590 | { |
1591 | /* This is pretty much a copy of what the default | |
1592 | _bfd_final_link_relocate and _bfd_relocate_contents | |
1593 | routines do to perform a relocation, with special | |
1594 | processing for the split addressing of the Thumb BL | |
1595 | instruction. Again, it would probably be simpler adding a | |
1596 | ThumbBRANCH23 specific macro expansion into the default | |
1597 | code. */ | |
d70910e8 | 1598 | |
07d6d2b8 | 1599 | bfd_vma address = rel->r_vaddr - input_section->vma; |
d70910e8 | 1600 | |
07515404 | 1601 | if (address > high_address) |
252b5132 | 1602 | rstat = bfd_reloc_outofrange; |
07d6d2b8 AM |
1603 | else |
1604 | { | |
1605 | bfd_vma relocation = val + addend; | |
b34976b6 AM |
1606 | int size = bfd_get_reloc_size (howto); |
1607 | bfd_boolean overflow = FALSE; | |
1608 | bfd_byte *location = contents + address; | |
1609 | bfd_vma x = bfd_get_32 (input_bfd, location); | |
1610 | bfd_vma src_mask = 0x007FFFFE; | |
1611 | bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; | |
1612 | bfd_signed_vma reloc_signed_min = ~reloc_signed_max; | |
1613 | bfd_vma check; | |
1614 | bfd_signed_vma signed_check; | |
1615 | bfd_vma add; | |
1616 | bfd_signed_vma signed_add; | |
252b5132 RH |
1617 | |
1618 | BFD_ASSERT (size == 4); | |
d70910e8 | 1619 | |
07d6d2b8 AM |
1620 | /* howto->pc_relative should be TRUE for type 14 BRANCH23. */ |
1621 | relocation -= (input_section->output_section->vma | |
1622 | + input_section->output_offset); | |
d70910e8 | 1623 | |
07d6d2b8 AM |
1624 | /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */ |
1625 | relocation -= address; | |
d70910e8 KH |
1626 | |
1627 | /* No need to negate the relocation with BRANCH23. */ | |
252b5132 RH |
1628 | /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */ |
1629 | /* howto->rightshift == 1 */ | |
d70910e8 | 1630 | |
4f3c3dbb | 1631 | /* Drop unwanted bits from the value we are relocating to. */ |
252b5132 | 1632 | check = relocation >> howto->rightshift; |
d70910e8 | 1633 | |
252b5132 RH |
1634 | /* If this is a signed value, the rightshift just dropped |
1635 | leading 1 bits (assuming twos complement). */ | |
1636 | if ((bfd_signed_vma) relocation >= 0) | |
1637 | signed_check = check; | |
1638 | else | |
1639 | signed_check = (check | |
1640 | | ((bfd_vma) - 1 | |
1641 | & ~((bfd_vma) - 1 >> howto->rightshift))); | |
d70910e8 | 1642 | |
252b5132 RH |
1643 | /* Get the value from the object file. */ |
1644 | if (bfd_big_endian (input_bfd)) | |
4f3c3dbb | 1645 | add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1); |
252b5132 | 1646 | else |
4f3c3dbb | 1647 | add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15)); |
252b5132 RH |
1648 | |
1649 | /* Get the value from the object file with an appropriate sign. | |
1650 | The expression involving howto->src_mask isolates the upper | |
1651 | bit of src_mask. If that bit is set in the value we are | |
1652 | adding, it is negative, and we subtract out that number times | |
1653 | two. If src_mask includes the highest possible bit, then we | |
1654 | can not get the upper bit, but that does not matter since | |
1655 | signed_add needs no adjustment to become negative in that | |
1656 | case. */ | |
252b5132 | 1657 | signed_add = add; |
d70910e8 | 1658 | |
252b5132 RH |
1659 | if ((add & (((~ src_mask) >> 1) & src_mask)) != 0) |
1660 | signed_add -= (((~ src_mask) >> 1) & src_mask) << 1; | |
d70910e8 | 1661 | |
4f3c3dbb | 1662 | /* howto->bitpos == 0 */ |
252b5132 RH |
1663 | /* Add the value from the object file, shifted so that it is a |
1664 | straight number. */ | |
252b5132 | 1665 | signed_check += signed_add; |
4f3c3dbb | 1666 | relocation += signed_add; |
252b5132 RH |
1667 | |
1668 | BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed); | |
1669 | ||
1670 | /* Assumes two's complement. */ | |
1671 | if ( signed_check > reloc_signed_max | |
1672 | || signed_check < reloc_signed_min) | |
b34976b6 | 1673 | overflow = TRUE; |
d70910e8 | 1674 | |
c62e1cc3 NC |
1675 | /* Put the relocation into the correct bits. |
1676 | For a BLX instruction, make sure that the relocation is rounded up | |
1677 | to a word boundary. This follows the semantics of the instruction | |
1678 | which specifies that bit 1 of the target address will come from bit | |
1679 | 1 of the base address. */ | |
252b5132 | 1680 | if (bfd_big_endian (input_bfd)) |
07d6d2b8 | 1681 | { |
c62e1cc3 NC |
1682 | if ((x & 0x1800) == 0x0800 && (relocation & 0x02)) |
1683 | relocation += 2; | |
1684 | relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000)); | |
1685 | } | |
252b5132 | 1686 | else |
07d6d2b8 | 1687 | { |
c62e1cc3 NC |
1688 | if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02)) |
1689 | relocation += 2; | |
1690 | relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff)); | |
1691 | } | |
d70910e8 | 1692 | |
4f3c3dbb | 1693 | /* Add the relocation to the correct bits of X. */ |
252b5132 RH |
1694 | x = ((x & ~howto->dst_mask) | relocation); |
1695 | ||
4f3c3dbb | 1696 | /* Put the relocated value back in the object file. */ |
252b5132 RH |
1697 | bfd_put_32 (input_bfd, x, location); |
1698 | ||
1699 | rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok; | |
07d6d2b8 AM |
1700 | } |
1701 | } | |
17505c5c | 1702 | #endif |
252b5132 | 1703 | else |
07d6d2b8 AM |
1704 | if (bfd_link_relocatable (info) && ! howto->partial_inplace) |
1705 | rstat = bfd_reloc_ok; | |
1706 | else | |
1e7fef1d NC |
1707 | rstat = _bfd_final_link_relocate (howto, input_bfd, input_section, |
1708 | contents, | |
1709 | rel->r_vaddr - input_section->vma, | |
1710 | val, addend); | |
c8e7bf0d | 1711 | /* Only perform this fix during the final link, not a relocatable link. */ |
0e1862bb | 1712 | if (! bfd_link_relocatable (info) |
b44267fd | 1713 | && (rel->r_type == ARM_32 || rel->r_type == ARM_RVA32)) |
252b5132 RH |
1714 | { |
1715 | /* Determine if we need to set the bottom bit of a relocated address | |
1716 | because the address is the address of a Thumb code symbol. */ | |
b34976b6 | 1717 | int patchit = FALSE; |
d70910e8 | 1718 | |
252b5132 | 1719 | if (h != NULL |
96d56e9f NC |
1720 | && ( h->symbol_class == C_THUMBSTATFUNC |
1721 | || h->symbol_class == C_THUMBEXTFUNC)) | |
252b5132 | 1722 | { |
b34976b6 | 1723 | patchit = TRUE; |
252b5132 RH |
1724 | } |
1725 | else if (sym != NULL | |
1726 | && sym->n_scnum > N_UNDEF) | |
1727 | { | |
1728 | /* No hash entry - use the symbol instead. */ | |
252b5132 RH |
1729 | if ( sym->n_sclass == C_THUMBSTATFUNC |
1730 | || sym->n_sclass == C_THUMBEXTFUNC) | |
b34976b6 | 1731 | patchit = TRUE; |
252b5132 RH |
1732 | } |
1733 | ||
1734 | if (patchit) | |
1735 | { | |
1736 | bfd_byte * location = contents + rel->r_vaddr - input_section->vma; | |
07d6d2b8 | 1737 | bfd_vma x = bfd_get_32 (input_bfd, location); |
252b5132 RH |
1738 | |
1739 | bfd_put_32 (input_bfd, x | 1, location); | |
1740 | } | |
1741 | } | |
d70910e8 | 1742 | |
252b5132 RH |
1743 | switch (rstat) |
1744 | { | |
1745 | default: | |
1746 | abort (); | |
1747 | case bfd_reloc_ok: | |
1748 | break; | |
1749 | case bfd_reloc_outofrange: | |
4eca0228 | 1750 | _bfd_error_handler |
695344c0 | 1751 | /* xgettext:c-format */ |
2dcf00ce AM |
1752 | (_("%pB: bad reloc address %#" PRIx64 " in section `%pA'"), |
1753 | input_bfd, (uint64_t) rel->r_vaddr, input_section); | |
b34976b6 | 1754 | return FALSE; |
252b5132 RH |
1755 | case bfd_reloc_overflow: |
1756 | { | |
1757 | const char *name; | |
1758 | char buf[SYMNMLEN + 1]; | |
1759 | ||
1760 | if (symndx == -1) | |
1761 | name = "*ABS*"; | |
1762 | else if (h != NULL) | |
dfeffb9f | 1763 | name = NULL; |
252b5132 RH |
1764 | else |
1765 | { | |
1766 | name = _bfd_coff_internal_syment_name (input_bfd, sym, buf); | |
1767 | if (name == NULL) | |
b34976b6 | 1768 | return FALSE; |
252b5132 RH |
1769 | } |
1770 | ||
1a72702b AM |
1771 | (*info->callbacks->reloc_overflow) |
1772 | (info, (h ? &h->root : NULL), name, howto->name, | |
1773 | (bfd_vma) 0, input_bfd, input_section, | |
1774 | rel->r_vaddr - input_section->vma); | |
252b5132 RH |
1775 | } |
1776 | } | |
1777 | } | |
1778 | ||
b34976b6 | 1779 | return TRUE; |
252b5132 RH |
1780 | } |
1781 | ||
e049a0de ILT |
1782 | #ifndef COFF_IMAGE_WITH_PE |
1783 | ||
b34976b6 | 1784 | bfd_boolean |
c8e7bf0d | 1785 | bfd_arm_allocate_interworking_sections (struct bfd_link_info * info) |
252b5132 | 1786 | { |
07d6d2b8 AM |
1787 | asection * s; |
1788 | bfd_byte * foo; | |
252b5132 | 1789 | struct coff_arm_link_hash_table * globals; |
252b5132 RH |
1790 | |
1791 | globals = coff_arm_hash_table (info); | |
d70910e8 | 1792 | |
252b5132 RH |
1793 | BFD_ASSERT (globals != NULL); |
1794 | ||
1795 | if (globals->arm_glue_size != 0) | |
1796 | { | |
1797 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1798 | |
252b5132 RH |
1799 | s = bfd_get_section_by_name |
1800 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
1801 | ||
1802 | BFD_ASSERT (s != NULL); | |
d70910e8 | 1803 | |
c8e7bf0d | 1804 | foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size); |
d70910e8 | 1805 | |
eea6121a | 1806 | s->size = globals->arm_glue_size; |
252b5132 RH |
1807 | s->contents = foo; |
1808 | } | |
1809 | ||
1810 | if (globals->thumb_glue_size != 0) | |
1811 | { | |
1812 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
d70910e8 | 1813 | |
252b5132 RH |
1814 | s = bfd_get_section_by_name |
1815 | (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); | |
1816 | ||
1817 | BFD_ASSERT (s != NULL); | |
d70910e8 | 1818 | |
c8e7bf0d | 1819 | foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size); |
d70910e8 | 1820 | |
eea6121a | 1821 | s->size = globals->thumb_glue_size; |
252b5132 RH |
1822 | s->contents = foo; |
1823 | } | |
1824 | ||
b34976b6 | 1825 | return TRUE; |
252b5132 RH |
1826 | } |
1827 | ||
1828 | static void | |
07d6d2b8 | 1829 | record_arm_to_thumb_glue (struct bfd_link_info * info, |
c8e7bf0d | 1830 | struct coff_link_hash_entry * h) |
252b5132 | 1831 | { |
07d6d2b8 AM |
1832 | const char * name = h->root.root.string; |
1833 | register asection * s; | |
1834 | char * tmp_name; | |
1835 | struct coff_link_hash_entry * myh; | |
1836 | struct bfd_link_hash_entry * bh; | |
252b5132 | 1837 | struct coff_arm_link_hash_table * globals; |
dc810e39 AM |
1838 | bfd_vma val; |
1839 | bfd_size_type amt; | |
252b5132 RH |
1840 | |
1841 | globals = coff_arm_hash_table (info); | |
1842 | ||
1843 | BFD_ASSERT (globals != NULL); | |
1844 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1845 | ||
1846 | s = bfd_get_section_by_name | |
1847 | (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); | |
1848 | ||
1849 | BFD_ASSERT (s != NULL); | |
1850 | ||
dc810e39 | 1851 | amt = strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1; |
c8e7bf0d | 1852 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1853 | |
1854 | BFD_ASSERT (tmp_name); | |
1855 | ||
1856 | sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); | |
d70910e8 | 1857 | |
252b5132 | 1858 | myh = coff_link_hash_lookup |
b34976b6 | 1859 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 1860 | |
252b5132 RH |
1861 | if (myh != NULL) |
1862 | { | |
1863 | free (tmp_name); | |
c8e7bf0d NC |
1864 | /* We've already seen this guy. */ |
1865 | return; | |
252b5132 RH |
1866 | } |
1867 | ||
1868 | /* The only trick here is using globals->arm_glue_size as the value. Even | |
1869 | though the section isn't allocated yet, this is where we will be putting | |
1870 | it. */ | |
14a793b2 | 1871 | bh = NULL; |
dc810e39 | 1872 | val = globals->arm_glue_size + 1; |
252b5132 | 1873 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1874 | BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); |
d70910e8 | 1875 | |
252b5132 | 1876 | free (tmp_name); |
d70910e8 | 1877 | |
252b5132 RH |
1878 | globals->arm_glue_size += ARM2THUMB_GLUE_SIZE; |
1879 | ||
1880 | return; | |
1881 | } | |
1882 | ||
7831a775 | 1883 | #ifndef ARM_WINCE |
252b5132 | 1884 | static void |
07d6d2b8 | 1885 | record_thumb_to_arm_glue (struct bfd_link_info * info, |
c8e7bf0d | 1886 | struct coff_link_hash_entry * h) |
252b5132 | 1887 | { |
07d6d2b8 AM |
1888 | const char * name = h->root.root.string; |
1889 | asection * s; | |
1890 | char * tmp_name; | |
1891 | struct coff_link_hash_entry * myh; | |
1892 | struct bfd_link_hash_entry * bh; | |
252b5132 | 1893 | struct coff_arm_link_hash_table * globals; |
dc810e39 AM |
1894 | bfd_vma val; |
1895 | bfd_size_type amt; | |
252b5132 | 1896 | |
252b5132 | 1897 | globals = coff_arm_hash_table (info); |
d70910e8 | 1898 | |
252b5132 RH |
1899 | BFD_ASSERT (globals != NULL); |
1900 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
1901 | ||
1902 | s = bfd_get_section_by_name | |
1903 | (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME); | |
1904 | ||
1905 | BFD_ASSERT (s != NULL); | |
1906 | ||
dc810e39 | 1907 | amt = strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1; |
c8e7bf0d | 1908 | tmp_name = bfd_malloc (amt); |
252b5132 RH |
1909 | |
1910 | BFD_ASSERT (tmp_name); | |
1911 | ||
1912 | sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); | |
1913 | ||
1914 | myh = coff_link_hash_lookup | |
b34976b6 | 1915 | (coff_hash_table (info), tmp_name, FALSE, FALSE, TRUE); |
d70910e8 | 1916 | |
252b5132 RH |
1917 | if (myh != NULL) |
1918 | { | |
1919 | free (tmp_name); | |
c8e7bf0d NC |
1920 | /* We've already seen this guy. */ |
1921 | return; | |
252b5132 RH |
1922 | } |
1923 | ||
14a793b2 | 1924 | bh = NULL; |
dc810e39 | 1925 | val = globals->thumb_glue_size + 1; |
252b5132 | 1926 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1927 | BSF_GLOBAL, s, val, NULL, TRUE, FALSE, &bh); |
d70910e8 | 1928 | |
252b5132 | 1929 | /* If we mark it 'thumb', the disassembler will do a better job. */ |
14a793b2 | 1930 | myh = (struct coff_link_hash_entry *) bh; |
96d56e9f | 1931 | myh->symbol_class = C_THUMBEXTFUNC; |
252b5132 RH |
1932 | |
1933 | free (tmp_name); | |
1934 | ||
1935 | /* Allocate another symbol to mark where we switch to arm mode. */ | |
d70910e8 | 1936 | |
252b5132 RH |
1937 | #define CHANGE_TO_ARM "__%s_change_to_arm" |
1938 | #define BACK_FROM_ARM "__%s_back_from_arm" | |
d70910e8 | 1939 | |
dc810e39 | 1940 | amt = strlen (name) + strlen (CHANGE_TO_ARM) + 1; |
c8e7bf0d | 1941 | tmp_name = bfd_malloc (amt); |
d70910e8 | 1942 | |
252b5132 | 1943 | BFD_ASSERT (tmp_name); |
d70910e8 | 1944 | |
252b5132 RH |
1945 | sprintf (tmp_name, globals->support_old_code ? BACK_FROM_ARM : CHANGE_TO_ARM, name); |
1946 | ||
14a793b2 | 1947 | bh = NULL; |
dc810e39 | 1948 | val = globals->thumb_glue_size + (globals->support_old_code ? 8 : 4); |
252b5132 | 1949 | bfd_coff_link_add_one_symbol (info, globals->bfd_of_glue_owner, tmp_name, |
b34976b6 | 1950 | BSF_LOCAL, s, val, NULL, TRUE, FALSE, &bh); |
252b5132 | 1951 | |
d70910e8 KH |
1952 | free (tmp_name); |
1953 | ||
252b5132 RH |
1954 | globals->thumb_glue_size += THUMB2ARM_GLUE_SIZE; |
1955 | ||
1956 | return; | |
1957 | } | |
7831a775 | 1958 | #endif /* not ARM_WINCE */ |
252b5132 RH |
1959 | |
1960 | /* Select a BFD to be used to hold the sections used by the glue code. | |
1961 | This function is called from the linker scripts in ld/emultempl/ | |
1962 | {armcoff/pe}.em */ | |
e049a0de | 1963 | |
b34976b6 | 1964 | bfd_boolean |
07d6d2b8 | 1965 | bfd_arm_get_bfd_for_interworking (bfd * abfd, |
c8e7bf0d | 1966 | struct bfd_link_info * info) |
252b5132 RH |
1967 | { |
1968 | struct coff_arm_link_hash_table * globals; | |
07d6d2b8 AM |
1969 | flagword flags; |
1970 | asection * sec; | |
d70910e8 | 1971 | |
252b5132 RH |
1972 | /* If we are only performing a partial link do not bother |
1973 | getting a bfd to hold the glue. */ | |
0e1862bb | 1974 | if (bfd_link_relocatable (info)) |
b34976b6 | 1975 | return TRUE; |
d70910e8 | 1976 | |
252b5132 | 1977 | globals = coff_arm_hash_table (info); |
d70910e8 | 1978 | |
252b5132 RH |
1979 | BFD_ASSERT (globals != NULL); |
1980 | ||
1981 | if (globals->bfd_of_glue_owner != NULL) | |
b34976b6 | 1982 | return TRUE; |
d70910e8 | 1983 | |
252b5132 | 1984 | sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME); |
d70910e8 KH |
1985 | |
1986 | if (sec == NULL) | |
252b5132 | 1987 | { |
117ed4f8 AM |
1988 | flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY |
1989 | | SEC_CODE | SEC_READONLY); | |
1990 | sec = bfd_make_section_with_flags (abfd, ARM2THUMB_GLUE_SECTION_NAME, | |
1991 | flags); | |
252b5132 | 1992 | if (sec == NULL |
252b5132 | 1993 | || ! bfd_set_section_alignment (abfd, sec, 2)) |
b34976b6 | 1994 | return FALSE; |
252b5132 RH |
1995 | } |
1996 | ||
1997 | sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME); | |
1998 | ||
d70910e8 | 1999 | if (sec == NULL) |
252b5132 | 2000 | { |
117ed4f8 AM |
2001 | flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY |
2002 | | SEC_CODE | SEC_READONLY); | |
2003 | sec = bfd_make_section_with_flags (abfd, THUMB2ARM_GLUE_SECTION_NAME, | |
2004 | flags); | |
d70910e8 | 2005 | |
252b5132 | 2006 | if (sec == NULL |
252b5132 | 2007 | || ! bfd_set_section_alignment (abfd, sec, 2)) |
b34976b6 | 2008 | return FALSE; |
252b5132 | 2009 | } |
d70910e8 | 2010 | |
252b5132 RH |
2011 | /* Save the bfd for later use. */ |
2012 | globals->bfd_of_glue_owner = abfd; | |
d70910e8 | 2013 | |
b34976b6 | 2014 | return TRUE; |
252b5132 RH |
2015 | } |
2016 | ||
b34976b6 | 2017 | bfd_boolean |
07d6d2b8 | 2018 | bfd_arm_process_before_allocation (bfd * abfd, |
c8e7bf0d | 2019 | struct bfd_link_info * info, |
07d6d2b8 | 2020 | int support_old_code) |
252b5132 RH |
2021 | { |
2022 | asection * sec; | |
2023 | struct coff_arm_link_hash_table * globals; | |
2024 | ||
2025 | /* If we are only performing a partial link do not bother | |
2026 | to construct any glue. */ | |
0e1862bb | 2027 | if (bfd_link_relocatable (info)) |
b34976b6 | 2028 | return TRUE; |
d70910e8 | 2029 | |
252b5132 RH |
2030 | /* Here we have a bfd that is to be included on the link. We have a hook |
2031 | to do reloc rummaging, before section sizes are nailed down. */ | |
252b5132 RH |
2032 | _bfd_coff_get_external_symbols (abfd); |
2033 | ||
2034 | globals = coff_arm_hash_table (info); | |
d70910e8 | 2035 | |
252b5132 RH |
2036 | BFD_ASSERT (globals != NULL); |
2037 | BFD_ASSERT (globals->bfd_of_glue_owner != NULL); | |
2038 | ||
2039 | globals->support_old_code = support_old_code; | |
d70910e8 | 2040 | |
252b5132 RH |
2041 | /* Rummage around all the relocs and map the glue vectors. */ |
2042 | sec = abfd->sections; | |
2043 | ||
2044 | if (sec == NULL) | |
b34976b6 | 2045 | return TRUE; |
252b5132 RH |
2046 | |
2047 | for (; sec != NULL; sec = sec->next) | |
2048 | { | |
2049 | struct internal_reloc * i; | |
2050 | struct internal_reloc * rel; | |
2051 | ||
d70910e8 | 2052 | if (sec->reloc_count == 0) |
252b5132 RH |
2053 | continue; |
2054 | ||
2055 | /* Load the relocs. */ | |
d70910e8 | 2056 | /* FIXME: there may be a storage leak here. */ |
252b5132 | 2057 | i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0); |
d70910e8 | 2058 | |
252b5132 RH |
2059 | BFD_ASSERT (i != 0); |
2060 | ||
d70910e8 | 2061 | for (rel = i; rel < i + sec->reloc_count; ++rel) |
252b5132 | 2062 | { |
07d6d2b8 AM |
2063 | unsigned short r_type = rel->r_type; |
2064 | long symndx; | |
2065 | struct coff_link_hash_entry * h; | |
252b5132 RH |
2066 | |
2067 | symndx = rel->r_symndx; | |
2068 | ||
d70910e8 | 2069 | /* If the relocation is not against a symbol it cannot concern us. */ |
252b5132 RH |
2070 | if (symndx == -1) |
2071 | continue; | |
2072 | ||
17505c5c | 2073 | /* If the index is outside of the range of our table, something has gone wrong. */ |
af74ae99 NC |
2074 | if (symndx >= obj_conv_table_size (abfd)) |
2075 | { | |
695344c0 | 2076 | /* xgettext:c-format */ |
871b3ab2 | 2077 | _bfd_error_handler (_("%pB: illegal symbol index in reloc: %ld"), |
d003868e | 2078 | abfd, symndx); |
af74ae99 NC |
2079 | continue; |
2080 | } | |
d70910e8 | 2081 | |
252b5132 RH |
2082 | h = obj_coff_sym_hashes (abfd)[symndx]; |
2083 | ||
2084 | /* If the relocation is against a static symbol it must be within | |
2085 | the current section and so cannot be a cross ARM/Thumb relocation. */ | |
2086 | if (h == NULL) | |
2087 | continue; | |
2088 | ||
2089 | switch (r_type) | |
2090 | { | |
2091 | case ARM_26: | |
2092 | /* This one is a call from arm code. We need to look up | |
2093 | the target of the call. If it is a thumb target, we | |
2094 | insert glue. */ | |
d70910e8 | 2095 | |
96d56e9f | 2096 | if (h->symbol_class == C_THUMBEXTFUNC) |
252b5132 RH |
2097 | record_arm_to_thumb_glue (info, h); |
2098 | break; | |
d70910e8 | 2099 | |
17505c5c | 2100 | #ifndef ARM_WINCE |
252b5132 RH |
2101 | case ARM_THUMB23: |
2102 | /* This one is a call from thumb code. We used to look | |
2103 | for ARM_THUMB9 and ARM_THUMB12 as well. We need to look | |
2104 | up the target of the call. If it is an arm target, we | |
2105 | insert glue. If the symbol does not exist it will be | |
2106 | given a class of C_EXT and so we will generate a stub | |
2107 | for it. This is not really a problem, since the link | |
2108 | is doomed anyway. */ | |
2109 | ||
96d56e9f | 2110 | switch (h->symbol_class) |
252b5132 RH |
2111 | { |
2112 | case C_EXT: | |
2113 | case C_STAT: | |
2114 | case C_LABEL: | |
2115 | record_thumb_to_arm_glue (info, h); | |
2116 | break; | |
2117 | default: | |
2118 | ; | |
2119 | } | |
2120 | break; | |
17505c5c | 2121 | #endif |
d70910e8 | 2122 | |
252b5132 RH |
2123 | default: |
2124 | break; | |
2125 | } | |
2126 | } | |
2127 | } | |
2128 | ||
b34976b6 | 2129 | return TRUE; |
252b5132 RH |
2130 | } |
2131 | ||
e049a0de ILT |
2132 | #endif /* ! defined (COFF_IMAGE_WITH_PE) */ |
2133 | ||
07d6d2b8 AM |
2134 | #define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup |
2135 | #define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup | |
2136 | #define coff_relocate_section coff_arm_relocate_section | |
2137 | #define coff_bfd_is_local_label_name coff_arm_is_local_label_name | |
252b5132 | 2138 | #define coff_adjust_symndx coff_arm_adjust_symndx |
07d6d2b8 | 2139 | #define coff_link_output_has_begun coff_arm_link_output_has_begun |
252b5132 RH |
2140 | #define coff_final_link_postscript coff_arm_final_link_postscript |
2141 | #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data | |
2142 | #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data | |
07d6d2b8 AM |
2143 | #define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags |
2144 | #define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data | |
252b5132 RH |
2145 | #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create |
2146 | ||
d21356d8 NC |
2147 | /* When doing a relocatable link, we want to convert ARM_26 relocs |
2148 | into ARM_26D relocs. */ | |
252b5132 | 2149 | |
b34976b6 | 2150 | static bfd_boolean |
c8e7bf0d NC |
2151 | coff_arm_adjust_symndx (bfd *obfd ATTRIBUTE_UNUSED, |
2152 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
2153 | bfd *ibfd, | |
2154 | asection *sec, | |
2155 | struct internal_reloc *irel, | |
2156 | bfd_boolean *adjustedp) | |
252b5132 | 2157 | { |
d21356d8 | 2158 | if (irel->r_type == ARM_26) |
252b5132 RH |
2159 | { |
2160 | struct coff_link_hash_entry *h; | |
2161 | ||
2162 | h = obj_coff_sym_hashes (ibfd)[irel->r_symndx]; | |
2163 | if (h != NULL | |
2164 | && (h->root.type == bfd_link_hash_defined | |
2165 | || h->root.type == bfd_link_hash_defweak) | |
2166 | && h->root.u.def.section->output_section == sec->output_section) | |
d21356d8 | 2167 | irel->r_type = ARM_26D; |
252b5132 | 2168 | } |
b34976b6 AM |
2169 | *adjustedp = FALSE; |
2170 | return TRUE; | |
252b5132 RH |
2171 | } |
2172 | ||
2173 | /* Called when merging the private data areas of two BFDs. | |
2174 | This is important as it allows us to detect if we are | |
2175 | attempting to merge binaries compiled for different ARM | |
5c4491d3 | 2176 | targets, eg different CPUs or different APCS's. */ |
252b5132 | 2177 | |
b34976b6 | 2178 | static bfd_boolean |
50e03d47 | 2179 | coff_arm_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info) |
252b5132 | 2180 | { |
50e03d47 | 2181 | bfd *obfd = info->output_bfd; |
252b5132 RH |
2182 | BFD_ASSERT (ibfd != NULL && obfd != NULL); |
2183 | ||
2184 | if (ibfd == obfd) | |
b34976b6 | 2185 | return TRUE; |
252b5132 RH |
2186 | |
2187 | /* If the two formats are different we cannot merge anything. | |
2188 | This is not an error, since it is permissable to change the | |
2189 | input and output formats. */ | |
2190 | if ( ibfd->xvec->flavour != bfd_target_coff_flavour | |
2191 | || obfd->xvec->flavour != bfd_target_coff_flavour) | |
b34976b6 | 2192 | return TRUE; |
252b5132 | 2193 | |
5a6c6817 NC |
2194 | /* Determine what should happen if the input ARM architecture |
2195 | does not match the output ARM architecture. */ | |
2196 | if (! bfd_arm_merge_machines (ibfd, obfd)) | |
2197 | return FALSE; | |
2198 | ||
2199 | /* Verify that the APCS is the same for the two BFDs. */ | |
252b5132 RH |
2200 | if (APCS_SET (ibfd)) |
2201 | { | |
2202 | if (APCS_SET (obfd)) | |
2203 | { | |
2204 | /* If the src and dest have different APCS flag bits set, fail. */ | |
2205 | if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd)) | |
2206 | { | |
2207 | _bfd_error_handler | |
2208 | /* xgettext: c-format */ | |
871b3ab2 | 2209 | (_("error: %pB is compiled for APCS-%d, whereas %pB is compiled for APCS-%d"), |
c08bb8dd AM |
2210 | ibfd, APCS_26_FLAG (ibfd) ? 26 : 32, |
2211 | obfd, APCS_26_FLAG (obfd) ? 26 : 32 | |
252b5132 RH |
2212 | ); |
2213 | ||
2214 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2215 | return FALSE; |
252b5132 | 2216 | } |
d70910e8 | 2217 | |
252b5132 RH |
2218 | if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd)) |
2219 | { | |
252b5132 RH |
2220 | if (APCS_FLOAT_FLAG (ibfd)) |
2221 | /* xgettext: c-format */ | |
695344c0 | 2222 | _bfd_error_handler (_("\ |
871b3ab2 | 2223 | error: %pB passes floats in float registers, whereas %pB passes them in integer registers"), |
695344c0 | 2224 | ibfd, obfd); |
252b5132 RH |
2225 | else |
2226 | /* xgettext: c-format */ | |
695344c0 | 2227 | _bfd_error_handler (_("\ |
871b3ab2 | 2228 | error: %pB passes floats in integer registers, whereas %pB passes them in float registers"), |
695344c0 | 2229 | ibfd, obfd); |
252b5132 RH |
2230 | |
2231 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2232 | return FALSE; |
252b5132 | 2233 | } |
d70910e8 | 2234 | |
252b5132 RH |
2235 | if (PIC_FLAG (obfd) != PIC_FLAG (ibfd)) |
2236 | { | |
252b5132 RH |
2237 | if (PIC_FLAG (ibfd)) |
2238 | /* xgettext: c-format */ | |
695344c0 | 2239 | _bfd_error_handler (_("\ |
871b3ab2 | 2240 | error: %pB is compiled as position independent code, whereas target %pB is absolute position"), |
07d6d2b8 | 2241 | ibfd, obfd); |
252b5132 RH |
2242 | else |
2243 | /* xgettext: c-format */ | |
695344c0 | 2244 | _bfd_error_handler (_("\ |
871b3ab2 | 2245 | error: %pB is compiled as absolute position code, whereas target %pB is position independent"), |
07d6d2b8 | 2246 | ibfd, obfd); |
252b5132 RH |
2247 | |
2248 | bfd_set_error (bfd_error_wrong_format); | |
b34976b6 | 2249 | return FALSE; |
252b5132 RH |
2250 | } |
2251 | } | |
2252 | else | |
2253 | { | |
2254 | SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd)); | |
d70910e8 | 2255 | |
252b5132 RH |
2256 | /* Set up the arch and fields as well as these are probably wrong. */ |
2257 | bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); | |
2258 | } | |
2259 | } | |
2260 | ||
2261 | /* Check the interworking support. */ | |
2262 | if (INTERWORK_SET (ibfd)) | |
2263 | { | |
2264 | if (INTERWORK_SET (obfd)) | |
2265 | { | |
2266 | /* If the src and dest differ in their interworking issue a warning. */ | |
2267 | if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd)) | |
2268 | { | |
252b5132 RH |
2269 | if (INTERWORK_FLAG (ibfd)) |
2270 | /* xgettext: c-format */ | |
695344c0 | 2271 | _bfd_error_handler (_("\ |
59d08d6c | 2272 | warning: %pB supports interworking, whereas %pB does not"), |
695344c0 | 2273 | ibfd, obfd); |
252b5132 RH |
2274 | else |
2275 | /* xgettext: c-format */ | |
695344c0 | 2276 | _bfd_error_handler (_("\ |
59d08d6c | 2277 | warning: %pB does not support interworking, whereas %pB does"), |
695344c0 | 2278 | ibfd, obfd); |
252b5132 RH |
2279 | } |
2280 | } | |
2281 | else | |
2282 | { | |
2283 | SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd)); | |
2284 | } | |
2285 | } | |
2286 | ||
b34976b6 | 2287 | return TRUE; |
252b5132 RH |
2288 | } |
2289 | ||
252b5132 RH |
2290 | /* Display the flags field. */ |
2291 | ||
b34976b6 | 2292 | static bfd_boolean |
c8e7bf0d | 2293 | coff_arm_print_private_bfd_data (bfd * abfd, void * ptr) |
252b5132 RH |
2294 | { |
2295 | FILE * file = (FILE *) ptr; | |
d70910e8 | 2296 | |
252b5132 | 2297 | BFD_ASSERT (abfd != NULL && ptr != NULL); |
d70910e8 | 2298 | |
252b5132 | 2299 | fprintf (file, _("private flags = %x:"), coff_data (abfd)->flags); |
d70910e8 | 2300 | |
252b5132 RH |
2301 | if (APCS_SET (abfd)) |
2302 | { | |
5c4491d3 | 2303 | /* xgettext: APCS is ARM Procedure Call Standard, it should not be translated. */ |
252b5132 RH |
2304 | fprintf (file, " [APCS-%d]", APCS_26_FLAG (abfd) ? 26 : 32); |
2305 | ||
2306 | if (APCS_FLOAT_FLAG (abfd)) | |
2307 | fprintf (file, _(" [floats passed in float registers]")); | |
2308 | else | |
2309 | fprintf (file, _(" [floats passed in integer registers]")); | |
2310 | ||
2311 | if (PIC_FLAG (abfd)) | |
2312 | fprintf (file, _(" [position independent]")); | |
2313 | else | |
2314 | fprintf (file, _(" [absolute position]")); | |
2315 | } | |
d70910e8 | 2316 | |
252b5132 RH |
2317 | if (! INTERWORK_SET (abfd)) |
2318 | fprintf (file, _(" [interworking flag not initialised]")); | |
2319 | else if (INTERWORK_FLAG (abfd)) | |
2320 | fprintf (file, _(" [interworking supported]")); | |
2321 | else | |
2322 | fprintf (file, _(" [interworking not supported]")); | |
d70910e8 | 2323 | |
252b5132 | 2324 | fputc ('\n', file); |
d70910e8 | 2325 | |
b34976b6 | 2326 | return TRUE; |
252b5132 RH |
2327 | } |
2328 | ||
252b5132 RH |
2329 | /* Copies the given flags into the coff_tdata.flags field. |
2330 | Typically these flags come from the f_flags[] field of | |
2331 | the COFF filehdr structure, which contains important, | |
2332 | target specific information. | |
2333 | Note: Although this function is static, it is explicitly | |
2334 | called from both coffcode.h and peicode.h. */ | |
2335 | ||
b34976b6 | 2336 | static bfd_boolean |
c8e7bf0d | 2337 | _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags) |
252b5132 RH |
2338 | { |
2339 | flagword flag; | |
2340 | ||
2341 | BFD_ASSERT (abfd != NULL); | |
2342 | ||
2343 | flag = (flags & F_APCS26) ? F_APCS_26 : 0; | |
d70910e8 | 2344 | |
252b5132 RH |
2345 | /* Make sure that the APCS field has not been initialised to the opposite |
2346 | value. */ | |
2347 | if (APCS_SET (abfd) | |
2348 | && ( (APCS_26_FLAG (abfd) != flag) | |
2349 | || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT)) | |
07d6d2b8 | 2350 | || (PIC_FLAG (abfd) != (flags & F_PIC)) |
252b5132 | 2351 | )) |
b34976b6 | 2352 | return FALSE; |
252b5132 RH |
2353 | |
2354 | flag |= (flags & (F_APCS_FLOAT | F_PIC)); | |
d70910e8 | 2355 | |
252b5132 RH |
2356 | SET_APCS_FLAGS (abfd, flag); |
2357 | ||
2358 | flag = (flags & F_INTERWORK); | |
d70910e8 | 2359 | |
252b5132 RH |
2360 | /* If the BFD has already had its interworking flag set, but it |
2361 | is different from the value that we have been asked to set, | |
2362 | then assume that that merged code will not support interworking | |
2363 | and set the flag accordingly. */ | |
2364 | if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag)) | |
2365 | { | |
2366 | if (flag) | |
59d08d6c | 2367 | _bfd_error_handler (_("warning: not setting interworking flag of %pB since it has already been specified as non-interworking"), |
d003868e | 2368 | abfd); |
252b5132 | 2369 | else |
59d08d6c | 2370 | _bfd_error_handler (_("warning: clearing the interworking flag of %pB due to outside request"), |
d003868e | 2371 | abfd); |
252b5132 RH |
2372 | flag = 0; |
2373 | } | |
2374 | ||
2375 | SET_INTERWORK_FLAG (abfd, flag); | |
2376 | ||
b34976b6 | 2377 | return TRUE; |
252b5132 RH |
2378 | } |
2379 | ||
252b5132 RH |
2380 | /* Copy the important parts of the target specific data |
2381 | from one instance of a BFD to another. */ | |
2382 | ||
b34976b6 | 2383 | static bfd_boolean |
c8e7bf0d | 2384 | coff_arm_copy_private_bfd_data (bfd * src, bfd * dest) |
252b5132 RH |
2385 | { |
2386 | BFD_ASSERT (src != NULL && dest != NULL); | |
d70910e8 | 2387 | |
252b5132 | 2388 | if (src == dest) |
b34976b6 | 2389 | return TRUE; |
252b5132 RH |
2390 | |
2391 | /* If the destination is not in the same format as the source, do not do | |
2392 | the copy. */ | |
2393 | if (src->xvec != dest->xvec) | |
b34976b6 | 2394 | return TRUE; |
252b5132 | 2395 | |
c8e7bf0d | 2396 | /* Copy the flags field. */ |
252b5132 RH |
2397 | if (APCS_SET (src)) |
2398 | { | |
2399 | if (APCS_SET (dest)) | |
2400 | { | |
2401 | /* If the src and dest have different APCS flag bits set, fail. */ | |
2402 | if (APCS_26_FLAG (dest) != APCS_26_FLAG (src)) | |
b34976b6 | 2403 | return FALSE; |
d70910e8 | 2404 | |
252b5132 | 2405 | if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src)) |
b34976b6 | 2406 | return FALSE; |
d70910e8 | 2407 | |
252b5132 | 2408 | if (PIC_FLAG (dest) != PIC_FLAG (src)) |
b34976b6 | 2409 | return FALSE; |
252b5132 RH |
2410 | } |
2411 | else | |
2412 | SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src) | |
2413 | | PIC_FLAG (src)); | |
2414 | } | |
2415 | ||
2416 | if (INTERWORK_SET (src)) | |
2417 | { | |
2418 | if (INTERWORK_SET (dest)) | |
2419 | { | |
2420 | /* If the src and dest have different interworking flags then turn | |
2421 | off the interworking bit. */ | |
2422 | if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src)) | |
2423 | { | |
2424 | if (INTERWORK_FLAG (dest)) | |
2425 | { | |
2426 | /* xgettext:c-format */ | |
695344c0 | 2427 | _bfd_error_handler (_("\ |
59d08d6c | 2428 | warning: clearing the interworking flag of %pB because non-interworking code in %pB has been linked with it"), |
d003868e | 2429 | dest, src); |
252b5132 | 2430 | } |
d70910e8 | 2431 | |
252b5132 RH |
2432 | SET_INTERWORK_FLAG (dest, 0); |
2433 | } | |
2434 | } | |
2435 | else | |
2436 | { | |
2437 | SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src)); | |
2438 | } | |
2439 | } | |
2440 | ||
b34976b6 | 2441 | return TRUE; |
252b5132 RH |
2442 | } |
2443 | ||
2444 | /* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX | |
c31c1f70 | 2445 | *must* match the definitions in gcc/config/arm/{coff|semi|aout}.h. */ |
d66dff94 | 2446 | #ifndef LOCAL_LABEL_PREFIX |
c31c1f70 | 2447 | #define LOCAL_LABEL_PREFIX "" |
d66dff94 | 2448 | #endif |
252b5132 RH |
2449 | #ifndef USER_LABEL_PREFIX |
2450 | #define USER_LABEL_PREFIX "_" | |
2451 | #endif | |
2452 | ||
f8111282 NC |
2453 | /* Like _bfd_coff_is_local_label_name, but |
2454 | a) test against USER_LABEL_PREFIX, to avoid stripping labels known to be | |
2455 | non-local. | |
2456 | b) Allow other prefixes than ".", e.g. an empty prefix would cause all | |
2457 | labels of the form Lxxx to be stripped. */ | |
c8e7bf0d | 2458 | |
b34976b6 | 2459 | static bfd_boolean |
07d6d2b8 | 2460 | coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED, |
c8e7bf0d | 2461 | const char * name) |
252b5132 | 2462 | { |
252b5132 RH |
2463 | #ifdef USER_LABEL_PREFIX |
2464 | if (USER_LABEL_PREFIX[0] != 0) | |
2465 | { | |
5ff625e9 AM |
2466 | size_t len = strlen (USER_LABEL_PREFIX); |
2467 | ||
2468 | if (strncmp (name, USER_LABEL_PREFIX, len) == 0) | |
b34976b6 | 2469 | return FALSE; |
252b5132 RH |
2470 | } |
2471 | #endif | |
f8111282 NC |
2472 | |
2473 | #ifdef LOCAL_LABEL_PREFIX | |
2474 | /* If there is a prefix for local labels then look for this. | |
d70910e8 KH |
2475 | If the prefix exists, but it is empty, then ignore the test. */ |
2476 | ||
f8111282 | 2477 | if (LOCAL_LABEL_PREFIX[0] != 0) |
252b5132 | 2478 | { |
dc810e39 | 2479 | size_t len = strlen (LOCAL_LABEL_PREFIX); |
d70910e8 | 2480 | |
f8111282 | 2481 | if (strncmp (name, LOCAL_LABEL_PREFIX, len) != 0) |
b34976b6 | 2482 | return FALSE; |
d70910e8 | 2483 | |
f8111282 NC |
2484 | /* Perform the checks below for the rest of the name. */ |
2485 | name += len; | |
252b5132 | 2486 | } |
f8111282 | 2487 | #endif |
d70910e8 | 2488 | |
f8111282 | 2489 | return name[0] == 'L'; |
252b5132 RH |
2490 | } |
2491 | ||
2492 | /* This piece of machinery exists only to guarantee that the bfd that holds | |
d70910e8 | 2493 | the glue section is written last. |
252b5132 RH |
2494 | |
2495 | This does depend on bfd_make_section attaching a new section to the | |
c8e7bf0d | 2496 | end of the section list for the bfd. */ |
252b5132 | 2497 | |
b34976b6 | 2498 | static bfd_boolean |
c8e7bf0d | 2499 | coff_arm_link_output_has_begun (bfd * sub, struct coff_final_link_info * info) |
252b5132 RH |
2500 | { |
2501 | return (sub->output_has_begun | |
2502 | || sub == coff_arm_hash_table (info->info)->bfd_of_glue_owner); | |
2503 | } | |
2504 | ||
b34976b6 | 2505 | static bfd_boolean |
c8e7bf0d NC |
2506 | coff_arm_final_link_postscript (bfd * abfd ATTRIBUTE_UNUSED, |
2507 | struct coff_final_link_info * pfinfo) | |
252b5132 RH |
2508 | { |
2509 | struct coff_arm_link_hash_table * globals; | |
2510 | ||
2511 | globals = coff_arm_hash_table (pfinfo->info); | |
d70910e8 | 2512 | |
252b5132 | 2513 | BFD_ASSERT (globals != NULL); |
d70910e8 | 2514 | |
252b5132 RH |
2515 | if (globals->bfd_of_glue_owner != NULL) |
2516 | { | |
2517 | if (! _bfd_coff_link_input_bfd (pfinfo, globals->bfd_of_glue_owner)) | |
b34976b6 | 2518 | return FALSE; |
d70910e8 | 2519 | |
b34976b6 | 2520 | globals->bfd_of_glue_owner->output_has_begun = TRUE; |
252b5132 | 2521 | } |
d70910e8 | 2522 | |
5a6c6817 | 2523 | return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); |
252b5132 RH |
2524 | } |
2525 | ||
2b5c217d NC |
2526 | #ifndef bfd_pe_print_pdata |
2527 | #define bfd_pe_print_pdata NULL | |
2528 | #endif | |
2529 | ||
252b5132 RH |
2530 | #include "coffcode.h" |
2531 | ||
c3c89269 | 2532 | #ifndef TARGET_LITTLE_SYM |
6d00b590 | 2533 | #define TARGET_LITTLE_SYM arm_coff_le_vec |
252b5132 | 2534 | #endif |
c3c89269 NC |
2535 | #ifndef TARGET_LITTLE_NAME |
2536 | #define TARGET_LITTLE_NAME "coff-arm-little" | |
252b5132 | 2537 | #endif |
c3c89269 | 2538 | #ifndef TARGET_BIG_SYM |
6d00b590 | 2539 | #define TARGET_BIG_SYM arm_coff_be_vec |
252b5132 | 2540 | #endif |
c3c89269 NC |
2541 | #ifndef TARGET_BIG_NAME |
2542 | #define TARGET_BIG_NAME "coff-arm-big" | |
252b5132 | 2543 | #endif |
252b5132 | 2544 | |
c3c89269 NC |
2545 | #ifndef TARGET_UNDERSCORE |
2546 | #define TARGET_UNDERSCORE 0 | |
252b5132 | 2547 | #endif |
c3c89269 | 2548 | |
f78c5281 | 2549 | #ifndef EXTRA_S_FLAGS |
c3c89269 | 2550 | #ifdef COFF_WITH_PE |
20650579 | 2551 | #define EXTRA_S_FLAGS (SEC_CODE | SEC_LINK_ONCE | SEC_LINK_DUPLICATES) |
252b5132 | 2552 | #else |
20650579 | 2553 | #define EXTRA_S_FLAGS SEC_CODE |
252b5132 | 2554 | #endif |
f78c5281 | 2555 | #endif |
252b5132 | 2556 | |
c3c89269 NC |
2557 | /* Forward declaration for use initialising alternative_target field. */ |
2558 | extern const bfd_target TARGET_BIG_SYM ; | |
252b5132 | 2559 | |
c3c89269 | 2560 | /* Target vectors. */ |
3fa78519 SS |
2561 | CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM, COFF_SWAP_TABLE) |
2562 | CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM, COFF_SWAP_TABLE) |