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sky-gs.c: initial drop of GS control registers (outstanding questions)
[deliverable/binutils-gdb.git] / bfd / coff-arm.c
CommitLineData
177b1932 1/* BFD back-end for ARM COFF files.
46686c78 2 Copyright 1990, 91, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
943fbd5b
KR		 3 Written by Cygnus Support.
4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libbfd.h"
943fbd5b
KR		 24
25#include "coff/arm.h"
26
27#include "coff/internal.h"
28
29#ifdef COFF_WITH_PE
30#include "coff/pe.h"
31#endif
32
33#include "libcoff.h"
34
e1aeb285
NC		 35#define APCS_26_FLAG( abfd ) (coff_data (abfd)->flags & F_APCS_26)
36#define APCS_FLOAT_FLAG( abfd ) (coff_data (abfd)->flags & F_APCS_FLOAT)
37#define PIC_FLAG( abfd ) (coff_data (abfd)->flags & F_PIC)
38#define APCS_SET( abfd ) (coff_data (abfd)->flags & F_APCS_SET)
39#define SET_APCS_FLAGS( abfd, flgs) (coff_data (abfd)->flags = \
40 (coff_data (abfd)->flags & ~ (F_APCS_26 | F_APCS_FLOAT | F_PIC)) \
41 | (flgs | F_APCS_SET))
42#define INTERWORK_FLAG( abfd ) (coff_data (abfd)->flags & F_INTERWORK)
43#define INTERWORK_SET( abfd ) (coff_data (abfd)->flags & F_INTERWORK_SET)
44#define SET_INTERWORK_FLAG( abfd, flg ) (coff_data (abfd)->flags = \
45 (coff_data (abfd)->flags & ~ F_INTERWORK) \
46 | (flg | F_INTERWORK_SET))
47
48
49static boolean coff_arm_relocate_section
50 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
51 struct internal_reloc *, struct internal_syment *, asection **));
52
943fbd5b
KR		 53static bfd_reloc_status_type
54aoutarm_fix_pcrel_26_done PARAMS ((bfd *, arelent *, asymbol *, PTR,
55 asection *, bfd *, char **));
56
57static bfd_reloc_status_type
58aoutarm_fix_pcrel_26 PARAMS ((bfd *, arelent *, asymbol *, PTR,
59 asection *, bfd *, char **));
60
e1aeb285
NC		 61static bfd_reloc_status_type
62coff_thumb_pcrel_23 PARAMS ((bfd *, arelent *, asymbol *, PTR,
63 asection *, bfd *, char **));
64
65static bfd_reloc_status_type
66coff_thumb_pcrel_12 PARAMS ((bfd *, arelent *, asymbol *, PTR,
67 asection *, bfd *, char **));
68
69static bfd_reloc_status_type
70coff_thumb_pcrel_9 PARAMS ((bfd *, arelent *, asymbol *, PTR,
71 asection *, bfd *, char **));
72
73static bfd_reloc_status_type
74coff_arm_reloc PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *,
75 char **));
943fbd5b 76
e1aeb285
NC		 77static boolean
78coff_arm_adjust_symndx PARAMS ((bfd *, struct bfd_link_info *, bfd *,
79 asection *, struct internal_reloc *,
80 boolean *));
81
82/* The linker script knows the section names for placement.
83 The entry_names are used to do simple name mangling on the stubs.
84 Given a function name, and its type, the stub can be found. The
85 name can be changed. The only requirement is the %s be present.
86 */
87
88#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
89#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
90
91#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
92#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
275143eb
SC		 93
94/* Used by the assembler. */
943fbd5b
KR		 95static bfd_reloc_status_type
96coff_arm_reloc (abfd, reloc_entry, symbol, data, input_section, output_bfd,
97 error_message)
98 bfd *abfd;
99 arelent *reloc_entry;
100 asymbol *symbol;
101 PTR data;
102 asection *input_section;
103 bfd *output_bfd;
104 char **error_message;
105{
106 symvalue diff;
943fbd5b
KR		 107 if (output_bfd == (bfd *) NULL)
108 return bfd_reloc_continue;
109
da7afe3b 110 diff = reloc_entry->addend;
943fbd5b
KR		 111
112#define DOIT(x) \
113 x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask))
114
da7afe3b
SC		 115 if (diff != 0)
116 {
117 reloc_howto_type *howto = reloc_entry->howto;
118 unsigned char *addr = (unsigned char *) data + reloc_entry->address;
943fbd5b 119
da7afe3b 120 switch (howto->size)
943fbd5b 121 {
da7afe3b
SC		 122 case 0:
123 {
124 char x = bfd_get_8 (abfd, addr);
125 DOIT (x);
126 bfd_put_8 (abfd, x, addr);
127 }
128 break;
129
130 case 1:
131 {
132 short x = bfd_get_16 (abfd, addr);
133 DOIT (x);
134 bfd_put_16 (abfd, x, addr);
135 }
136 break;
137
138 case 2:
139 {
140 long x = bfd_get_32 (abfd, addr);
141 DOIT (x);
142 bfd_put_32 (abfd, x, addr);
143 }
144 break;
145
146 default:
147 abort ();
943fbd5b 148 }
da7afe3b 149 }
943fbd5b
KR		 150
151 /* Now let bfd_perform_relocation finish everything up. */
152 return bfd_reloc_continue;
153}
154
09888f15 155#define TARGET_UNDERSCORE '_'
e1aeb285 156
3ea928f5
SC		 157#ifndef PCRELOFFSET
158#define PCRELOFFSET true
159#endif
160
e1aeb285
NC		 161/* These most certainly belong somewhere else. Just had to get rid of
162 the manifest constants in the code. */
163
164#define ARM_8 0
165#define ARM_16 1
166#define ARM_32 2
167#define ARM_26 3
168#define ARM_DISP8 4
169#define ARM_DISP16 5
170#define ARM_DISP32 6
171#define ARM_26D 7
172/* 8 is unused */
173#define ARM_NEG16 9
174#define ARM_NEG32 10
175#define ARM_RVA32 11
176#define ARM_THUMB9 12
177#define ARM_THUMB12 13
178#define ARM_THUMB23 14
179
943fbd5b
KR		 180static reloc_howto_type aoutarm_std_reloc_howto[] =
181{
182 /* type rs size bsz pcrel bitpos ovrf sf name part_inpl readmask setmask pcdone */
e1aeb285
NC		 183 HOWTO(ARM_8, /* type */
184 0, /* rightshift */
943fbd5b 185 0, /* size */
e1aeb285
NC		 186 8, /* bitsize */
187 false, /* pc_relative */
943fbd5b 188 0, /* bitpos */
e1aeb285
NC		 189 complain_overflow_bitfield, /* complain_on_overflow */
190 coff_arm_reloc, /* special_function */
191 "ARM_8", /* name */
192 true, /* partial_inplace */
193 0x000000ff, /* src_mask */
194 0x000000ff, /* dst_mask */
195 PCRELOFFSET /* pcrel_offset */),
196 HOWTO(ARM_16,
943fbd5b
KR		 197 0,
198 1,
199 16,
200 false,
201 0,
202 complain_overflow_bitfield,
203 coff_arm_reloc,
e1aeb285 204 "ARM_16",
943fbd5b
KR		 205 true,
206 0x0000ffff,
207 0x0000ffff,
208 PCRELOFFSET),
e1aeb285 209 HOWTO(ARM_32,
943fbd5b
KR		 210 0,
211 2,
212 32,
213 false,
214 0,
215 complain_overflow_bitfield,
216 coff_arm_reloc,
e1aeb285 217 "ARM_32",
943fbd5b
KR		 218 true,
219 0xffffffff,
220 0xffffffff,
221 PCRELOFFSET),
e1aeb285 222 HOWTO(ARM_26,
943fbd5b 223 2,
3ea928f5 224 2,
454515c0 225 24,
943fbd5b
KR		 226 true,
227 0,
228 complain_overflow_signed,
229 aoutarm_fix_pcrel_26 ,
e1aeb285 230 "ARM_26",
275143eb 231 false,
943fbd5b
KR		 232 0x00ffffff,
233 0x00ffffff,
234 PCRELOFFSET),
e1aeb285 235 HOWTO(ARM_DISP8,
943fbd5b
KR		 236 0,
237 0,
238 8,
239 true,
240 0,
241 complain_overflow_signed,
242 coff_arm_reloc,
e1aeb285 243 "ARM_DISP8",
943fbd5b
KR		 244 true,
245 0x000000ff,
246 0x000000ff,
247 true),
e1aeb285 248 HOWTO( ARM_DISP16,
943fbd5b
KR		 249 0,
250 1,
251 16,
252 true,
253 0,
254 complain_overflow_signed,
255 coff_arm_reloc,
e1aeb285 256 "ARM_DISP16",
943fbd5b
KR		 257 true,
258 0x0000ffff,
259 0x0000ffff,
260 true),
e1aeb285 261 HOWTO( ARM_DISP32,
943fbd5b
KR		 262 0,
263 2,
264 32,
265 true,
266 0,
267 complain_overflow_signed,
268 coff_arm_reloc,
e1aeb285 269 "ARM_DISP32",
943fbd5b
KR		 270 true,
271 0xffffffff,
272 0xffffffff,
273 true),
e1aeb285 274 HOWTO( ARM_26D,
943fbd5b 275 2,
3ea928f5 276 2,
454515c0 277 24,
943fbd5b
KR		 278 false,
279 0,
280 complain_overflow_signed,
281 aoutarm_fix_pcrel_26_done,
e1aeb285 282 "ARM_26D",
943fbd5b
KR		 283 true,
284 0x00ffffff,
46686c78 285 0x0,
943fbd5b 286 false),
e1aeb285 287 /* 8 is unused */
943fbd5b 288 {-1},
e1aeb285 289 HOWTO( ARM_NEG16,
943fbd5b
KR		 290 0,
291 -1,
292 16,
293 false,
294 0,
295 complain_overflow_bitfield,
296 coff_arm_reloc,
e1aeb285 297 "ARM_NEG16",
943fbd5b
KR		 298 true,
299 0x0000ffff,
300 0x0000ffff,
301 false),
e1aeb285 302 HOWTO( ARM_NEG32,
943fbd5b
KR		 303 0,
304 -2,
305 32,
306 false,
307 0,
308 complain_overflow_bitfield,
309 coff_arm_reloc,
e1aeb285 310 "ARM_NEG32",
943fbd5b
KR		 311 true,
312 0xffffffff,
313 0xffffffff,
3ea928f5 314 false),
e1aeb285 315 HOWTO( ARM_RVA32,
3ea928f5
SC		 316 0,
317 2,
318 32,
319 false,
320 0,
321 complain_overflow_bitfield,
322 coff_arm_reloc,
e1aeb285 323 "ARM_RVA32",
3ea928f5
SC		 324 true,
325 0xffffffff,
326 0xffffffff,
327 PCRELOFFSET),
e1aeb285
NC		 328 HOWTO( ARM_THUMB9,
329 1,
330 1,
454515c0 331 8,
e1aeb285
NC		 332 true,
333 0,
334 complain_overflow_signed,
335 coff_thumb_pcrel_9 ,
336 "ARM_THUMB9",
337 false,
338 0x000000ff,
339 0x000000ff,
340 PCRELOFFSET),
341 HOWTO( ARM_THUMB12,
342 1,
343 1,
454515c0 344 11,
e1aeb285
NC		 345 true,
346 0,
347 complain_overflow_signed,
348 coff_thumb_pcrel_12 ,
349 "ARM_THUMB12",
350 false,
351 0x000007ff,
352 0x000007ff,
353 PCRELOFFSET),
354 HOWTO( ARM_THUMB23,
355 1,
356 2,
454515c0 357 22,
e1aeb285
NC		 358 true,
359 0,
360 complain_overflow_signed,
361 coff_thumb_pcrel_23 ,
362 "ARM_THUMB23",
363 false,
364 0x07ff07ff,
365 0x07ff07ff,
366 PCRELOFFSET),
943fbd5b 367};
177b1932
DE		 368#ifdef COFF_WITH_PE
369/* Return true if this relocation should
370 appear in the output .reloc section. */
371
372static boolean in_reloc_p (abfd, howto)
373 bfd * abfd;
374 reloc_howto_type *howto;
375{
376 return !howto->pc_relative && howto->type != 11;
377}
378#endif
943fbd5b
KR		 379
380
943fbd5b
KR		 381#define RTYPE2HOWTO(cache_ptr, dst) \
382 (cache_ptr)->howto = aoutarm_std_reloc_howto + (dst)->r_type;
383
275143eb 384#define coff_rtype_to_howto coff_arm_rtype_to_howto
a5655244 385
275143eb
SC		 386static reloc_howto_type *
387coff_arm_rtype_to_howto (abfd, sec, rel, h, sym, addendp)
388 bfd *abfd;
389 asection *sec;
390 struct internal_reloc *rel;
391 struct coff_link_hash_entry *h;
392 struct internal_syment *sym;
393 bfd_vma *addendp;
394{
395 reloc_howto_type *howto;
396
397 howto = aoutarm_std_reloc_howto + rel->r_type;
398
e1aeb285 399 if (rel->r_type == ARM_RVA32)
275143eb 400 {
a5655244 401 *addendp -= pe_data(sec->output_section->owner)->pe_opthdr.ImageBase;
275143eb 402 }
46686c78
NC		 403
404 /* The relocation_section function will skip pcrel_offset relocs
405 when doing a relocateable link. However, we want to convert
406 ARM26 to ARM26D relocs if possible. We return a fake howto in
407 this case without pcrel_offset set, and adjust the addend to
408 compensate. */
e1aeb285 409 if (rel->r_type == ARM_26
46686c78
NC		 410 && h != NULL
411 && (h->root.type == bfd_link_hash_defined
412 || h->root.type == bfd_link_hash_defweak)
413 && h->root.u.def.section->output_section == sec->output_section)
414 {
415 static reloc_howto_type fake_arm26_reloc =
e1aeb285 416 HOWTO (ARM_26,
46686c78
NC		 417 2,
418 2,
454515c0 419 24,
46686c78
NC		 420 true,
421 0,
422 complain_overflow_signed,
423 aoutarm_fix_pcrel_26 ,
e1aeb285 424 "ARM_26",
46686c78
NC		 425 false,
426 0x00ffffff,
427 0x00ffffff,
428 false);
429
430 *addendp -= rel->r_vaddr - sec->vma;
e1aeb285 431 return & fake_arm26_reloc;
46686c78
NC		 432 }
433
275143eb
SC		 434 return howto;
435
436}
437/* Used by the assembler. */
438
943fbd5b
KR		 439static bfd_reloc_status_type
440aoutarm_fix_pcrel_26_done (abfd, reloc_entry, symbol, data, input_section,
441 output_bfd, error_message)
442 bfd *abfd;
443 arelent *reloc_entry;
444 asymbol *symbol;
445 PTR data;
446 asection *input_section;
447 bfd *output_bfd;
448 char **error_message;
449{
450 /* This is dead simple at present. */
451 return bfd_reloc_ok;
452}
453
275143eb
SC		 454/* Used by the assembler. */
455
943fbd5b
KR		 456static bfd_reloc_status_type
457aoutarm_fix_pcrel_26 (abfd, reloc_entry, symbol, data, input_section,
458 output_bfd, error_message)
459 bfd *abfd;
460 arelent *reloc_entry;
461 asymbol *symbol;
462 PTR data;
463 asection *input_section;
464 bfd *output_bfd;
465 char **error_message;
466{
467 bfd_vma relocation;
468 bfd_size_type addr = reloc_entry->address;
469 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
470 bfd_reloc_status_type flag = bfd_reloc_ok;
471
472 /* If this is an undefined symbol, return error */
473 if (symbol->section == &bfd_und_section
474 && (symbol->flags & BSF_WEAK) == 0)
475 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
476
477 /* If the sections are different, and we are doing a partial relocation,
478 just ignore it for now. */
479 if (symbol->section->name != input_section->name
480 && output_bfd != (bfd *)NULL)
481 return bfd_reloc_continue;
482
483 relocation = (target & 0x00ffffff) << 2;
484 relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend */
485 relocation += symbol->value;
486 relocation += symbol->section->output_section->vma;
487 relocation += symbol->section->output_offset;
488 relocation += reloc_entry->addend;
489 relocation -= input_section->output_section->vma;
490 relocation -= input_section->output_offset;
491 relocation -= addr;
e1aeb285 492
943fbd5b
KR		 493 if (relocation & 3)
494 return bfd_reloc_overflow;
495
496 /* Check for overflow */
497 if (relocation & 0x02000000)
498 {
499 if ((relocation & ~0x03ffffff) != ~0x03ffffff)
500 flag = bfd_reloc_overflow;
501 }
502 else if (relocation & ~0x03ffffff)
503 flag = bfd_reloc_overflow;
504
505 target &= ~0x00ffffff;
506 target |= (relocation >> 2) & 0x00ffffff;
507 bfd_put_32 (abfd, target, (bfd_byte *) data + addr);
508
509 /* Now the ARM magic... Change the reloc type so that it is marked as done.
510 Strictly this is only necessary if we are doing a partial relocation. */
e1aeb285
NC		 511 reloc_entry->howto = &aoutarm_std_reloc_howto[ARM_26D];
512
513 return flag;
514}
515
516typedef enum {bunknown, b9, b12, b23} thumb_pcrel_branchtype;
517
518static bfd_reloc_status_type
519coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, input_section,
520 output_bfd, error_message, btype)
521 bfd *abfd;
522 arelent *reloc_entry;
523 asymbol *symbol;
524 PTR data;
525 asection *input_section;
526 bfd *output_bfd;
527 char **error_message;
528 thumb_pcrel_branchtype btype;
529{
530 bfd_vma relocation;
531 bfd_size_type addr = reloc_entry->address;
532 long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
533 bfd_reloc_status_type flag = bfd_reloc_ok;
534 bfd_vma dstmsk;
535 bfd_vma offmsk;
536 bfd_vma signbit;
537
538 /* NOTE: This routine is currently used by GAS, but not by the link
539 phase. */
540
541 switch (btype)
542 {
543 case b9:
544 dstmsk = 0x000000ff;
545 offmsk = 0x000001fe;
546 signbit = 0x00000100;
547 break;
548
549 case b12:
550 dstmsk = 0x000007ff;
551 offmsk = 0x00000ffe;
552 signbit = 0x00000800;
553 break;
554
555 case b23:
556 dstmsk = 0x07ff07ff;
557 offmsk = 0x007fffff;
558 signbit = 0x00400000;
559 break;
560
561 default:
562 abort ();
563 }
564
565 /* If this is an undefined symbol, return error */
566 if (symbol->section == &bfd_und_section
567 && (symbol->flags & BSF_WEAK) == 0)
568 return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
569
570 /* If the sections are different, and we are doing a partial relocation,
571 just ignore it for now. */
572 if (symbol->section->name != input_section->name
573 && output_bfd != (bfd *)NULL)
574 return bfd_reloc_continue;
575
576 switch (btype)
577 {
578 case b9:
579 case b12:
580 relocation = ((target & dstmsk) << 1);
581 break;
582
583 case b23:
584 if (bfd_big_endian (abfd))
585 relocation = ((target & 0x7ff) << 1) | ((target & 0x07ff0000) >> 4);
586 else
587 relocation = ((target & 0x7ff) << 12) | ((target & 0x07ff0000) >> 15);
588 break;
589 }
590
591 relocation = (relocation ^ signbit) - signbit; /* Sign extend */
592 relocation += symbol->value;
593 relocation += symbol->section->output_section->vma;
594 relocation += symbol->section->output_offset;
595 relocation += reloc_entry->addend;
596 relocation -= input_section->output_section->vma;
597 relocation -= input_section->output_offset;
598 relocation -= addr;
599
600 if (relocation & 1)
601 return bfd_reloc_overflow;
602
603 /* Check for overflow */
604 if (relocation & signbit)
605 {
606 if ((relocation & ~offmsk) != ~offmsk)
607 flag = bfd_reloc_overflow;
608 }
609 else if (relocation & ~offmsk)
610 flag = bfd_reloc_overflow;
611
612 target &= ~dstmsk;
613 switch (btype)
614 {
615 case b9:
616 case b12:
617 target |= (relocation >> 1);
618 break;
619
620 case b23:
621 if (bfd_big_endian (abfd))
622 target |= ((relocation & 0xfff) >> 1) | ((relocation << 4) & 0x07ff0000);
623 else
624 target |= ((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff);
625 break;
626 }
275143eb 627
e1aeb285
NC		 628 bfd_put_32 (abfd, target, (bfd_byte *) data + addr);
629
630 /* Now the ARM magic... Change the reloc type so that it is marked as done.
631 Strictly this is only necessary if we are doing a partial relocation. */
632 reloc_entry->howto = & aoutarm_std_reloc_howto [ARM_26D];
633
634 /* TODO: We should possibly have DONE entries for the THUMB PCREL relocations */
943fbd5b
KR		 635 return flag;
636}
637
e1aeb285
NC		 638static bfd_reloc_status_type
639coff_thumb_pcrel_23 (abfd, reloc_entry, symbol, data, input_section,
640 output_bfd, error_message)
641 bfd *abfd;
642 arelent *reloc_entry;
643 asymbol *symbol;
644 PTR data;
645 asection *input_section;
646 bfd *output_bfd;
647 char **error_message;
648{
649 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
650 input_section, output_bfd, error_message, b23);
651}
652
653static bfd_reloc_status_type
654coff_thumb_pcrel_12 (abfd, reloc_entry, symbol, data, input_section,
655 output_bfd, error_message)
656 bfd *abfd;
657 arelent *reloc_entry;
658 asymbol *symbol;
659 PTR data;
660 asection *input_section;
661 bfd *output_bfd;
662 char **error_message;
663{
664 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
665 input_section, output_bfd, error_message, b12);
666}
667
668static bfd_reloc_status_type
669coff_thumb_pcrel_9 (abfd, reloc_entry, symbol, data, input_section,
670 output_bfd, error_message)
671 bfd *abfd;
672 arelent *reloc_entry;
673 asymbol *symbol;
674 PTR data;
675 asection *input_section;
676 bfd *output_bfd;
677 char **error_message;
678{
679 return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data,
680 input_section, output_bfd, error_message, b9);
681}
682
275143eb 683
943fbd5b
KR		 684static CONST struct reloc_howto_struct *
685arm_reloc_type_lookup(abfd,code)
686 bfd *abfd;
687 bfd_reloc_code_real_type code;
688{
689#define ASTD(i,j) case i: return &aoutarm_std_reloc_howto[j]
690 if (code == BFD_RELOC_CTOR)
691 switch (bfd_get_arch_info (abfd)->bits_per_address)
692 {
693 case 32:
694 code = BFD_RELOC_32;
695 break;
696 default: return (CONST struct reloc_howto_struct *) 0;
697 }
698
699 switch (code)
700 {
e1aeb285
NC		 701 ASTD (BFD_RELOC_8, ARM_8);
702 ASTD (BFD_RELOC_16, ARM_16);
703 ASTD (BFD_RELOC_32, ARM_32);
704 ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26);
705 ASTD (BFD_RELOC_8_PCREL, ARM_DISP8);
706 ASTD (BFD_RELOC_16_PCREL, ARM_DISP16);
707 ASTD (BFD_RELOC_32_PCREL, ARM_DISP32);
708 ASTD (BFD_RELOC_RVA, ARM_RVA32);
709 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9);
710 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12);
711 ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23);
943fbd5b
KR		 712 default: return (CONST struct reloc_howto_struct *) 0;
713 }
714}
715
716
717#define coff_bfd_reloc_type_lookup arm_reloc_type_lookup
718
943fbd5b 719#define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (2)
943fbd5b 720#define COFF_PAGE_SIZE 0x1000
943fbd5b
KR		 721/* Turn a howto into a reloc nunmber */
722
723#define SELECT_RELOC(x,howto) { x.r_type = howto->type; }
724#define BADMAG(x) ARMBADMAG(x)
725#define ARM 1 /* Customize coffcode.h */
726
e1aeb285 727/* The set of global variables that mark the total size of each kind
38c574bb
NC		 728 of glue required, plus a BFD to hang the glue sections onto.
729 Note: These variable should not be made static, since in a *-pe
730 build there are two versions of this file compiled, one for pe
731 objects and one for pei objects, and they want to share these
732 variables. */
733#if defined COFF_IMAGE_WITH_PE
734extern long int global_thumb_glue_size;
735#else
736long int global_thumb_glue_size = 0;
737#endif
738
739#if defined COFF_IMAGE_WITH_PE
740extern long int global_arm_glue_size;
741#else
742long int global_arm_glue_size = 0;
743#endif
e1aeb285 744
38c574bb
NC		 745#if defined COFF_IMAGE_WITH_PE
746extern bfd * bfd_of_glue_owner;
747#else
748bfd * bfd_of_glue_owner = NULL;
749#endif
e1aeb285
NC		 750
751/* some typedefs for holding instructions */
752typedef unsigned long int insn32;
753typedef unsigned short int insn16;
754
755\f
756/* The thumb form of a long branch is a bit finicky, because the offset
757 encoding is split over two fields, each in it's own instruction. They
758 can occur in any order. So given a thumb form of long branch, and an
759 offset, insert the offset into the thumb branch and return finished
760 instruction.
761
762 It takes two thumb instructions to encode the target address. Each has
763 11 bits to invest. The upper 11 bits are stored in one (identifed by
764 H-0.. see below), the lower 11 bits are stored in the other (identified
765 by H-1).
766
767 Combine together and shifted left by 1 (it's a half word address) and
768 there you have it.
769
770 Op: 1111 = F,
771 H-0, upper address-0 = 000
772 Op: 1111 = F,
773 H-1, lower address-0 = 800
774
775 They can be ordered either way, but the arm tools I've seen always put
776 the lower one first. It probably doesn't matter. krk@cygnus.com
777
778 XXX: Actually the order does matter. The second instruction (H-1)
779 moves the computed address into the PC, so it must be the second one
780 in the sequence. The problem, however is that whilst little endian code
781 stores the instructions in HI then LOW order, big endian code does the
782 reverse. nickc@cygnus.com */
783
784#define LOW_HI_ORDER 0xF800F000
785#define HI_LOW_ORDER 0xF000F800
786
787static insn32
788insert_thumb_branch (br_insn, rel_off)
789 insn32 br_insn;
790 int rel_off;
791{
792 unsigned int low_bits;
793 unsigned int high_bits;
943fbd5b 794
46686c78 795
e1aeb285 796 BFD_ASSERT((rel_off & 1) != 1);
46686c78 797
e1aeb285
NC		 798 rel_off >>= 1; /* half word aligned address */
799 low_bits = rel_off & 0x000007FF; /* the bottom 11 bits */
800 high_bits = ( rel_off >> 11 ) & 0x000007FF; /* the top 11 bits */
46686c78 801
e1aeb285
NC		 802 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
803 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
804 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
805 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
806 else
807 abort(); /* error - not a valid branch instruction form */
46686c78 808
e1aeb285 809 /* FIXME: abort is probably not the right call. krk@cygnus.com */
46686c78 810
e1aeb285
NC		 811 return br_insn;
812}
46686c78 813
e1aeb285
NC		 814\f
815static struct coff_link_hash_entry *
816find_thumb_glue (info, name, input_bfd)
817 struct bfd_link_info * info;
818 char * name;
819 bfd * input_bfd;
46686c78 820{
8e2eebc8
ILT		 821 char * tmp_name = 0;
822 struct coff_link_hash_entry * myh = 0;
46686c78 823
e1aeb285
NC		 824 tmp_name = ((char *)
825 bfd_malloc (strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME)));
46686c78 826
e1aeb285 827 BFD_ASSERT (tmp_name);
46686c78 828
e1aeb285
NC		 829 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
830
831 myh = coff_link_hash_lookup (coff_hash_table (info),
832 tmp_name,
833 false, false, true);
834 if (myh == NULL)
835 {
836 _bfd_error_handler ("%s: unable to find THUMB glue '%s' for `%s'",
837 bfd_get_filename (input_bfd), tmp_name, name);
46686c78
NC		 838 }
839
e1aeb285 840 free (tmp_name);
46686c78 841
e1aeb285 842 return myh;
46686c78
NC		 843}
844
e1aeb285
NC		 845static struct coff_link_hash_entry *
846find_arm_glue (info, name, input_bfd)
847 struct bfd_link_info * info;
848 char * name;
849 bfd * input_bfd;
46686c78 850{
e1aeb285
NC		 851 char *tmp_name = 0;
852 struct coff_link_hash_entry *myh = 0;
315dc1f4 853
e1aeb285
NC		 854 tmp_name = ((char *)
855 bfd_malloc (strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME)));
46686c78 856
e1aeb285 857 BFD_ASSERT (tmp_name);
46686c78 858
e1aeb285
NC		 859 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
860
861 myh = coff_link_hash_lookup (coff_hash_table (info),
862 tmp_name,
863 false, false, true);
46686c78 864
e1aeb285
NC		 865 if (myh == NULL)
866 {
867 _bfd_error_handler ("%s: unable to find ARM glue '%s' for `%s'",
868 bfd_get_filename (input_bfd), tmp_name, name);
869 }
46686c78 870
e1aeb285 871 free (tmp_name);
46686c78 872
e1aeb285
NC		 873 return myh;
874}
46686c78 875
e1aeb285
NC		 876/*
877 ARM->Thumb glue:
878
879 .arm
880 __func_from_arm:
881 ldr r12, __func_addr
882 bx r12
883 __func_addr:
884 .word func @ behave as if you saw a ARM_32 reloc
885
886 ldr ip,8 <__func_addr> e59fc000
887 bx ip e12fff1c
888 .word func 00000001
889
890*/
891
892#define ARM2THUMB_GLUE_SIZE 12
454515c0 893static const insn32
e1aeb285
NC		 894 a2t1_ldr_insn = 0xe59fc000,
895 a2t2_bx_r12_insn = 0xe12fff1c,
896 a2t3_func_addr_insn = 0x00000001;
897
898/*
899 Thumb->ARM:
900
901 .thumb
902 .align 2
903 __func_from_thumb:
904 bx pc
905 nop
906 .arm
907 __func_change_to_arm:
908 b func
909
910
911 bx pc 4778
912 nop 0000
913 b func eafffffe
914
915*/
916
917#define THUMB2ARM_GLUE_SIZE 8
454515c0 918static const insn16
e1aeb285
NC		 919 t2a1_bx_pc_insn = 0x4778,
920 t2a2_noop_insn = 0x46c0;
454515c0 921static const insn32
e1aeb285
NC		 922 t2a3_b_insn = 0xea000000;
923
924/* TODO:
925 We should really create new local (static) symbols in destination
926 object for each stub we create. We should also create local
927 (static) symbols within the stubs when switching between ARM and
928 Thumb code. This will ensure that the debugger and disassembler
929 can present a better view of stubs.
930
931 We can treat stubs like literal sections, and for the THUMB9 ones
932 (short addressing range) we should be able to insert the stubs
933 between sections. i.e. the simplest approach (since relocations
934 are done on a section basis) is to dump the stubs at the end of
935 processing a section. That way we can always try and minimise the
936 offset to and from a stub. However, this does not map well onto
937 the way that the linker/BFD does its work: mapping all input
938 sections to output sections via the linker script before doing
939 all the processing.
940
941 Unfortunately it may be easier to just to disallow short range
942 Thumb->ARM stubs (i.e. no conditional inter-working branches,
943 only branch-and-link (BL) calls. This will simplify the processing
944 since we can then put all of the stubs into their own section.
945
946 TODO:
947 On a different subject, rather than complaining when a
948 branch cannot fit in the number of bits available for the
949 instruction we should generate a trampoline stub (needed to
950 address the complete 32bit address space). */
951
952/* The standard COFF backend linker does not cope with the special
953 Thumb BRANCH23 relocation. The alternative would be to split the
954 BRANCH23 into seperate HI23 and LO23 relocations. However, it is a
955 bit simpler simply providing our own relocation driver. */
956
957/* The reloc processing routine for the ARM/Thumb COFF linker. NOTE:
958 This code is a very slightly modified copy of
959 _bfd_coff_generic_relocate_section. It would be a much more
960 maintainable solution to have a MACRO that could be expanded within
961 _bfd_coff_generic_relocate_section that would only be provided for
962 ARM/Thumb builds. It is only the code marked THUMBEXTENSION that
963 is different from the original. */
46686c78 964
315dc1f4 965static boolean
e1aeb285
NC		 966coff_arm_relocate_section (output_bfd, info, input_bfd, input_section,
967 contents, relocs, syms, sections)
968 bfd *output_bfd;
969 struct bfd_link_info *info;
970 bfd *input_bfd;
971 asection *input_section;
972 bfd_byte *contents;
973 struct internal_reloc *relocs;
974 struct internal_syment *syms;
975 asection **sections;
46686c78 976{
8e2eebc8
ILT		 977 struct internal_reloc * rel;
978 struct internal_reloc * relend;
46686c78 979
e1aeb285
NC		 980 rel = relocs;
981 relend = rel + input_section->reloc_count;
46686c78 982
e1aeb285 983 for (; rel < relend; rel++)
46686c78 984 {
e1aeb285
NC		 985 int done = 0;
986 long symndx;
987 struct coff_link_hash_entry *h;
988 struct internal_syment *sym;
989 bfd_vma addend;
990 bfd_vma val;
991 reloc_howto_type *howto;
992 bfd_reloc_status_type rstat;
993 bfd_vma h_val;
994
995 symndx = rel->r_symndx;
996
997 if (symndx == -1)
46686c78 998 {
e1aeb285
NC		 999 h = NULL;
1000 sym = NULL;
46686c78
NC		 1001 }
1002 else
e1aeb285
NC		 1003 {
1004 h = obj_coff_sym_hashes (input_bfd)[symndx];
1005 sym = syms + symndx;
1006 }
46686c78 1007
e1aeb285
NC		 1008 /* COFF treats common symbols in one of two ways. Either the
1009 size of the symbol is included in the section contents, or it
1010 is not. We assume that the size is not included, and force
1011 the rtype_to_howto function to adjust the addend as needed. */
46686c78 1012
e1aeb285
NC		 1013 if (sym != NULL && sym->n_scnum != 0)
1014 addend = - sym->n_value;
1015 else
1016 addend = 0;
1017
1018
1019 howto = bfd_coff_rtype_to_howto (input_bfd, input_section, rel, h,
1020 sym, &addend);
1021 if (howto == NULL)
1022 return false;
1023
1024 /* If we are doing a relocateable link, then we can just ignore
1025 a PC relative reloc that is pcrel_offset. It will already
1026 have the correct value. If this is not a relocateable link,
1027 then we should ignore the symbol value. */
1028 if (howto->pc_relative && howto->pcrel_offset)
1029 {
1030 if (info->relocateable)
1031 continue;
1032 if (sym != NULL && sym->n_scnum != 0)
1033 addend += sym->n_value;
1034 }
1035
1036 /* If we are doing a relocateable link, then we can just ignore
1037 a PC relative reloc that is pcrel_offset. It will already
1038 have the correct value. */
1039 if (info->relocateable
1040 && howto->pc_relative
1041 && howto->pcrel_offset)
1042 continue;
1043
1044 val = 0;
1045
1046 if (h == NULL)
1047 {
1048 asection *sec;
46686c78 1049
e1aeb285
NC		 1050 if (symndx == -1)
1051 {
1052 sec = bfd_abs_section_ptr;
1053 val = 0;
1054 }
1055 else
1056 {
1057 sec = sections[symndx];
1058 val = (sec->output_section->vma
1059 + sec->output_offset
1060 + sym->n_value
1061 - sec->vma);
1062 }
1063 }
1064 else
1065 {
1066#if 1 /* THUMBEXTENSION */
1067 /* We don't output the stubs if we are generating a
1068 relocatable output file, since we may as well leave the
1069 stub generation to the final linker pass. If we fail to
1070 verify that the name is defined, we'll try to build stubs
1071 for an undefined name... */
1072 if (! info->relocateable
1073 && ( h->root.type == bfd_link_hash_defined
1074 || h->root.type == bfd_link_hash_defweak))
1075 {
1076 asection * sec;
1077 asection * h_sec = h->root.u.def.section;
1078 const char * name = h->root.root.string;
1079
1080 /* h locates the symbol referenced in the reloc. */
1081 h_val = (h->root.u.def.value
1082 + h_sec->output_section->vma
1083 + h_sec->output_offset);
1084
1085 if (howto->type == ARM_26)
1086 {
1087 if ( h->class == C_THUMBSTATFUNC
1088 || h->class == C_THUMBEXTFUNC)
1089 {
1090 /* Arm code calling a Thumb function */
1091 signed long int final_disp;
1092 unsigned long int tmp;
1093 long int my_offset;
1094 long int offset;
1095 asection * s = 0;
1096 unsigned long int return_address;
1097 long int ret_offset;
1098 long int disp;
1099 struct coff_link_hash_entry * myh;
1100
1101 myh = find_arm_glue (info, name, input_bfd);
1102 if (myh == NULL)
1103 return false;
1104
1105 my_offset = myh->root.u.def.value;
1106
1107 s = bfd_get_section_by_name (bfd_of_glue_owner,
1108 ARM2THUMB_GLUE_SECTION_NAME);
1109 BFD_ASSERT (s != NULL);
1110 BFD_ASSERT (s->contents != NULL);
1111
1112 if ((my_offset & 0x01) == 0x01)
1113 {
8e2eebc8
ILT		 1114 if (h_sec->owner != NULL
1115 && INTERWORK_SET (h_sec->owner)
1116 && ! INTERWORK_FLAG (h_sec->owner))
454515c0
NC		 1117 {
1118 _bfd_error_handler
1119 ("%s(%s): warning: interworking not enabled.",
1120 bfd_get_filename (h_sec->owner), name);
1121 _bfd_error_handler
1122 (" first occurrence: %s: arm call to thumb",
1123 bfd_get_filename (input_bfd));
1124 }
38c574bb 1125
e1aeb285
NC		 1126 --my_offset;
1127 myh->root.u.def.value = my_offset;
1128
1129 bfd_put_32 (output_bfd, a2t1_ldr_insn, s->contents + my_offset);
1130
1131 bfd_put_32 (output_bfd, a2t2_bx_r12_insn, s->contents + my_offset + 4);
1132
1133 /* It's a thumb address. Add the low order bit. */
1134 bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn, s->contents + my_offset + 8);
1135 }
1136
1137 BFD_ASSERT (my_offset <= global_arm_glue_size);
1138
1139 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr - input_section->vma);
1140
1141 tmp = tmp & 0xFF000000;
1142
1143 /* Somehow these are both 4 too far, so subtract 8. */
1144 ret_offset =
1145 s->output_offset
1146 + my_offset
1147 + s->output_section->vma
1148 - (input_section->output_offset
1149 + input_section->output_section->vma
1150 + rel->r_vaddr)
1151 - 8;
1152
1153 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
1154
1155 bfd_put_32 (output_bfd, tmp, contents + rel->r_vaddr - input_section->vma);
1156
1157 done = 1;
1158 }
1159 }
1160
1161 /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12 */
1162 else if (howto->type == ARM_THUMB23)
1163 {
1164 if ( h->class == C_EXT
1165 || h->class == C_STAT
1166 || h->class == C_LABEL)
1167 {
1168 /* Thumb code calling an ARM function */
1169 unsigned long int return_address;
1170 signed long int final_disp;
1171 asection * s = 0;
1172 long int my_offset;
1173 unsigned long int tmp;
1174 long int ret_offset;
1175 struct coff_link_hash_entry * myh;
1176
1177 myh = find_thumb_glue (info, name, input_bfd);
1178 if (myh == NULL)
1179 return false;
1180
1181 my_offset = myh->root.u.def.value;
1182
1183 s = bfd_get_section_by_name (bfd_of_glue_owner,
1184 THUMB2ARM_GLUE_SECTION_NAME);
1185
1186 BFD_ASSERT (s != NULL);
1187 BFD_ASSERT (s->contents != NULL);
1188
1189 if ((my_offset & 0x01) == 0x01)
1190 {
0f3003ef 1191 if (h_sec->owner != NULL
8e2eebc8
ILT		 1192 && INTERWORK_SET (h_sec->owner)
1193 && ! INTERWORK_FLAG (h_sec->owner))
454515c0
NC		 1194 {
1195 _bfd_error_handler
1196 ("%s(%s): warning: interworking not enabled.",
1197 bfd_get_filename (h_sec->owner), name);
1198 _bfd_error_handler
1199 (" first occurrence: %s: thumb call to arm",
1200 bfd_get_filename (input_bfd));
1201 }
38c574bb 1202
e1aeb285
NC		 1203 -- my_offset;
1204 myh->root.u.def.value = my_offset;
1205
1206 bfd_put_16 (output_bfd, t2a1_bx_pc_insn,
1207 s->contents + my_offset);
1208
1209 bfd_put_16 (output_bfd, t2a2_noop_insn,
1210 s->contents + my_offset + 2);
1211
1212 ret_offset =
454515c0
NC		 1213 ((signed)h_val) - /* Address of destination of the stub */
1214 ((signed)(s->output_offset /* Offset from the start of the current section to the start of the stubs. */
1215 + my_offset /* Offset of the start of this stub from the start of the stubs. */
1216 + s->output_section->vma) /* Address of the start of the current section. */
1217 + 4 /* The branch instruction is 4 bytes into the stub. */
1218 + 8); /* ARM branches work from the pc of the instruction + 8. */
1219
1220 bfd_put_32 (output_bfd,
1221 t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
1222 s->contents + my_offset + 4);
e1aeb285
NC		 1223 }
1224
1225 BFD_ASSERT (my_offset <= global_thumb_glue_size);
1226
1227 /* Now go back and fix up the original bl insn to point here. */
1228 ret_offset =
1229 s->output_offset
1230 + my_offset
1231 - (input_section->output_offset
1232 + rel->r_vaddr)
1233 -4;
1234
1235 tmp = bfd_get_32 (input_bfd, contents + rel->r_vaddr - input_section->vma);
8e2eebc8 1236
e1aeb285
NC		 1237 bfd_put_32 (output_bfd,
1238 insert_thumb_branch (tmp, ret_offset),
1239 contents + rel->r_vaddr - input_section->vma);
1240
1241 done = 1;
1242 }
1243 }
1244 }
1245
1246 /* If the relocation type and destination symbol does not
1247 fall into one of the above categories, then we can just
1248 perform a direct link. */
1249
1250 if (done)
1251 rstat = bfd_reloc_ok;
1252 else
1253#endif /* THUMBEXTENSION */
1254 if ( h->root.type == bfd_link_hash_defined
1255 || h->root.type == bfd_link_hash_defweak)
1256 {
1257 asection *sec;
1258
1259 sec = h->root.u.def.section;
1260 val = (h->root.u.def.value
1261 + sec->output_section->vma
1262 + sec->output_offset);
1263 }
1264
1265 else if (! info->relocateable)
1266 {
1267 if (! ((*info->callbacks->undefined_symbol)
1268 (info, h->root.root.string, input_bfd, input_section,
1269 rel->r_vaddr - input_section->vma)))
1270 return false;
1271 }
1272 }
1273
1274 if (info->base_file)
1275 {
1276 /* Emit a reloc if the backend thinks it needs it. */
1277 if (sym && pe_data(output_bfd)->in_reloc_p(output_bfd, howto))
1278 {
1279 /* relocation to a symbol in a section which
1280 isn't absolute - we output the address here
1281 to a file */
1282 bfd_vma addr = rel->r_vaddr
1283 - input_section->vma
1284 + input_section->output_offset
1285 + input_section->output_section->vma;
1286 if (coff_data(output_bfd)->pe)
1287 addr -= pe_data(output_bfd)->pe_opthdr.ImageBase;
1288 /* FIXME: Shouldn't 4 be sizeof (addr)? */
1289 fwrite (&addr, 1,4, (FILE *) info->base_file);
1290 }
1291 }
1292
1293#if 1 /* THUMBEXTENSION */
1294 if (done)
1295 ;
1296 /* Only perform this fix during the final link, not a relocatable link. nickc@cygnus.com */
1297 else if (! info->relocateable
1298 && howto->type == ARM_THUMB23)
1299 {
1300 /* This is pretty much a copy of what the default
1301 _bfd_final_link_relocate and _bfd_relocate_contents
1302 routines do to perform a relocation, with special
1303 processing for the split addressing of the Thumb BL
1304 instruction. Again, it would probably be simpler adding a
1305 ThumbBRANCH23 specific macro expansion into the default
1306 code. */
1307
1308 bfd_vma address = rel->r_vaddr - input_section->vma;
1309
1310 if (address > input_section->_raw_size)
1311 rstat = bfd_reloc_outofrange;
1312 else
1313 {
1314 bfd_vma relocation = val + addend;
1315 int size = bfd_get_reloc_size (howto);
1316 boolean overflow = false;
1317 bfd_byte * location = contents + address;
1318 bfd_vma x = bfd_get_32 (input_bfd, location);
1319 bfd_vma src_mask = 0x007FFFFE;
1320 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
1321 bfd_signed_vma reloc_signed_min = ~reloc_signed_max;
1322 bfd_vma check;
1323 bfd_signed_vma signed_check;
1324 bfd_vma add;
1325 bfd_signed_vma signed_add;
1326
1327 BFD_ASSERT (size == 4);
1328
1329 /* howto->pc_relative should be TRUE for type 14 BRANCH23 */
1330 relocation -= (input_section->output_section->vma
1331 + input_section->output_offset);
1332
1333 /* howto->pcrel_offset should be TRUE for type 14 BRANCH23 */
1334 relocation -= address;
1335
1336 /* No need to negate the relocation with BRANCH23. */
1337 /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */
1338 /* howto->rightshift == 1 */
1339 /* Drop unwanted bits from the value we are relocating to. */
1340
1341 check = relocation >> howto->rightshift;
1342
1343 /* If this is a signed value, the rightshift just dropped
1344 leading 1 bits (assuming twos complement). */
1345 if ((bfd_signed_vma) relocation >= 0)
1346 signed_check = check;
1347 else
1348 signed_check = (check
1349 | ((bfd_vma) - 1
1350 & ~((bfd_vma) - 1 >> howto->rightshift)));
1351
1352 /* Get the value from the object file. */
1353 if (bfd_big_endian (input_bfd))
1354 {
1355 add = (((x) & 0x07ff0000) >> 4) | (((x) & 0x7ff) << 1);
1356 }
1357 else
1358 {
1359 add = ((((x) & 0x7ff) << 12) | (((x) & 0x07ff0000) >> 15));
1360 }
1361
1362 /* Get the value from the object file with an appropriate sign.
1363 The expression involving howto->src_mask isolates the upper
1364 bit of src_mask. If that bit is set in the value we are
1365 adding, it is negative, and we subtract out that number times
1366 two. If src_mask includes the highest possible bit, then we
1367 can not get the upper bit, but that does not matter since
1368 signed_add needs no adjustment to become negative in that
1369 case. */
1370
1371 signed_add = add;
1372
1373 if ((add & (((~ src_mask) >> 1) & src_mask)) != 0)
1374 signed_add -= (((~ src_mask) >> 1) & src_mask) << 1;
1375
1376 /* Add the value from the object file, shifted so that it is a
1377 straight number. */
1378 /* howto->bitpos == 0 */
1379
1380 signed_check += signed_add;
1381 relocation += signed_add;
1382
1383 BFD_ASSERT (howto->complain_on_overflow == complain_overflow_signed);
1384
1385 /* Assumes two's complement. */
1386 if ( signed_check > reloc_signed_max
1387 || signed_check < reloc_signed_min)
1388 overflow = true;
1389
1390 /* Put RELOCATION into the correct bits: */
1391
1392 if (bfd_big_endian (input_bfd))
1393 {
1394 relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000));
1395 }
1396 else
1397 {
1398 relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff));
1399 }
1400
1401 /* Add RELOCATION to the correct bits of X: */
1402 x = ((x & ~howto->dst_mask) | relocation);
1403
1404 /* Put the relocated value back in the object file: */
1405 bfd_put_32 (input_bfd, x, location);
1406
1407 rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok;
1408 }
1409 }
1410 else
1411#endif /* THUMBEXTENSION */
1412 rstat = _bfd_final_link_relocate (howto, input_bfd, input_section,
1413 contents,
1414 rel->r_vaddr - input_section->vma,
1415 val, addend);
1416#if 1 /* THUMBEXTENSION */
1417 /* FIXME:
1418 Is this the best way to fix up thumb addresses? krk@cygnus.com
1419 Probably not, but it works, and if it works it don't need fixing! nickc@cygnus.com */
1420 /* Only perform this fix during the final link, not a relocatable link. nickc@cygnus.com */
1421 if (! info->relocateable
1422 && rel->r_type == ARM_32)
1423 {
1424 /* Determine if we need to set the bottom bit of a relocated address
1425 because the address is the address of a Thumb code symbol. */
1426
1427 int patchit = false;
1428
1429 if (h != NULL
1430 && ( h->class == C_THUMBSTATFUNC
1431 || h->class == C_THUMBEXTFUNC))
1432 {
1433 patchit = true;
1434 }
1435 else if (sym != NULL
1436 && sym->n_scnum > N_UNDEF)
1437 {
1438 /* No hash entry - use the symbol instead. */
1439
1440 if ( sym->n_sclass == C_THUMBSTATFUNC
1441 || sym->n_sclass == C_THUMBEXTFUNC)
1442 patchit = true;
1443 }
454515c0 1444
e1aeb285
NC		 1445 if (patchit)
1446 {
1447 bfd_byte * location = contents + rel->r_vaddr - input_section->vma;
1448 bfd_vma x = bfd_get_32 (input_bfd, location);
1449
1450 bfd_put_32 (input_bfd, x | 1, location);
1451 }
1452 }
1453#endif /* THUMBEXTENSION */
1454
1455 switch (rstat)
1456 {
1457 default:
1458 abort ();
1459 case bfd_reloc_ok:
1460 break;
1461 case bfd_reloc_outofrange:
1462 (*_bfd_error_handler)
1463 ("%s: bad reloc address 0x%lx in section `%s'",
1464 bfd_get_filename (input_bfd),
1465 (unsigned long) rel->r_vaddr,
1466 bfd_get_section_name (input_bfd, input_section));
1467 return false;
1468 case bfd_reloc_overflow:
1469 {
1470 const char *name;
1471 char buf[SYMNMLEN + 1];
1472
1473 if (symndx == -1)
1474 name = "*ABS*";
1475 else if (h != NULL)
1476 name = h->root.root.string;
1477 else
1478 {
1479 name = _bfd_coff_internal_syment_name (input_bfd, sym, buf);
1480 if (name == NULL)
1481 return false;
1482 }
1483
1484 if (! ((*info->callbacks->reloc_overflow)
1485 (info, name, howto->name, (bfd_vma) 0, input_bfd,
1486 input_section, rel->r_vaddr - input_section->vma)))
1487 return false;
1488 }
1489 }
1490 }
1491
1492 return true;
1493}
1494
454515c0 1495#if defined COFF_IMAGE_WITH_PE || ! defined COFF_WITH_PE
33d5d351 1496boolean
e1aeb285
NC		 1497arm_allocate_interworking_sections (info)
1498 struct bfd_link_info *info;
1499{
8e2eebc8
ILT		 1500 asection * s;
1501 bfd_byte * foo;
1502#if 0
e1aeb285 1503 static char test_char = '1';
8e2eebc8 1504#endif
454515c0 1505
8e2eebc8 1506 if (global_arm_glue_size != 0)
e1aeb285
NC		 1507 {
1508 BFD_ASSERT (bfd_of_glue_owner != NULL);
1509
1510 s = bfd_get_section_by_name (bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
1511
1512 BFD_ASSERT (s != NULL);
1513
8e2eebc8 1514 foo = (bfd_byte *) bfd_alloc (bfd_of_glue_owner, global_arm_glue_size);
454515c0 1515#if 0
8e2eebc8
ILT		 1516 memset (foo, test_char, global_arm_glue_size);
1517#endif
e1aeb285
NC		 1518
1519 s->_raw_size = s->_cooked_size = global_arm_glue_size;
1520 s->contents = foo;
1521 }
1522
1523 if (global_thumb_glue_size != 0)
1524 {
1525 BFD_ASSERT (bfd_of_glue_owner != NULL);
1526
1527 s = bfd_get_section_by_name (bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1528
1529 BFD_ASSERT (s != NULL);
1530
8e2eebc8
ILT		 1531 foo = (bfd_byte *) bfd_alloc (bfd_of_glue_owner, global_thumb_glue_size);
1532#if 0
1533 memset (foo, test_char, global_thumb_glue_size);
1534#endif
e1aeb285
NC		 1535
1536 s->_raw_size = s->_cooked_size = global_thumb_glue_size;
1537 s->contents = foo;
1538 }
1539
1540 return true;
1541}
1542
1543static void
1544record_arm_to_thumb_glue (info, h)
1545 struct bfd_link_info * info;
1546 struct coff_link_hash_entry * h;
1547{
1548 const char * name = h->root.root.string;
1549 register asection * s;
1550 char * tmp_name;
1551 struct coff_link_hash_entry * myh;
1552
454515c0 1553
e1aeb285
NC		 1554 BFD_ASSERT (bfd_of_glue_owner != NULL);
1555
1556 s = bfd_get_section_by_name (bfd_of_glue_owner,
1557 ARM2THUMB_GLUE_SECTION_NAME);
1558
1559 BFD_ASSERT (s != NULL);
1560
1561 tmp_name = ((char *)
1562 bfd_malloc (strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME)));
1563
1564 BFD_ASSERT (tmp_name);
1565
1566 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
1567
1568 myh = coff_link_hash_lookup (coff_hash_table (info),
1569 tmp_name,
1570 false, false, true);
1571
1572 if (myh != NULL)
1573 {
1574 free (tmp_name);
1575 return; /* we've already seen this guy */
1576 }
1577
1578
1579 /* The only trick here is using global_arm_glue_size as the value. Even
1580 though the section isn't allocated yet, this is where we will be putting
1581 it. */
1582
1583 bfd_coff_link_add_one_symbol (info, bfd_of_glue_owner, tmp_name,
1584 BSF_EXPORT | BSF_GLOBAL,
1585 s, global_arm_glue_size + 1,
1586 NULL, true, false,
1587 (struct bfd_link_hash_entry **) & myh);
1588
1589 global_arm_glue_size += ARM2THUMB_GLUE_SIZE;
1590
1591 free (tmp_name);
1592
1593 return;
1594}
1595
1596static void
1597record_thumb_to_arm_glue (info, h)
1598 struct bfd_link_info * info;
1599 struct coff_link_hash_entry * h;
1600{
1601 const char * name = h->root.root.string;
1602 register asection * s;
1603 char * tmp_name;
1604 struct coff_link_hash_entry * myh;
1605
e1aeb285
NC		 1606 BFD_ASSERT (bfd_of_glue_owner != NULL);
1607
1608 s = bfd_get_section_by_name (bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
1609
1610 BFD_ASSERT (s != NULL);
1611
1612 tmp_name = (char *) bfd_malloc (strlen (name) + strlen (THUMB2ARM_GLUE_ENTRY_NAME));
1613
1614 BFD_ASSERT (tmp_name);
1615
1616 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
1617
1618 myh = coff_link_hash_lookup (coff_hash_table (info),
1619 tmp_name,
1620 false, false, true);
1621
1622 if (myh != NULL)
1623 {
1624 free (tmp_name);
1625 return; /* we've already seen this guy */
1626 }
1627
1628 bfd_coff_link_add_one_symbol (info, bfd_of_glue_owner, tmp_name,
1629 BSF_LOCAL, s, global_thumb_glue_size + 1,
1630 NULL, true, false,
1631 (struct bfd_link_hash_entry **) & myh);
1632
454515c0 1633 /* If we mark it 'thumb', the disassembler will do a better job. */
e1aeb285
NC		 1634 myh->class = C_THUMBEXTFUNC;
1635
1636 free (tmp_name);
1637
1638#define CHANGE_TO_ARM "__%s_change_to_arm"
1639
1640 tmp_name = ((char *)
1641 bfd_malloc (strlen (name) + strlen (CHANGE_TO_ARM)));
1642
1643 BFD_ASSERT (tmp_name);
1644
1645 sprintf (tmp_name, CHANGE_TO_ARM, name);
1646
1647 myh = NULL;
1648
454515c0 1649 /* Now allocate another symbol to switch back to arm mode. */
e1aeb285
NC		 1650 bfd_coff_link_add_one_symbol (info, bfd_of_glue_owner, tmp_name,
1651 BSF_LOCAL, s, global_thumb_glue_size + 4,
1652 NULL, true, false,
1653 (struct bfd_link_hash_entry **) & myh);
1654
1655 free (tmp_name);
1656
1657 global_thumb_glue_size += THUMB2ARM_GLUE_SIZE;
1658
1659 return;
1660}
1661
33d5d351 1662boolean
e1aeb285
NC		 1663arm_process_before_allocation (abfd, info)
1664 bfd * abfd;
1665 struct bfd_link_info * info;
1666{
1667 asection * sec;
1668
1669 /* If we are only performing a partial link do not bother
1670 to construct any glue. */
1671 if (info->relocateable)
1672 return true;
1673
1674 /* Here we have a bfd that is to be included on the link. We have a hook
1675 to do reloc rummaging, before section sizes are nailed down. */
1676
1677 _bfd_coff_get_external_symbols (abfd);
1678
38c574bb
NC		 1679 BFD_ASSERT (bfd_of_glue_owner != NULL);
1680
e1aeb285
NC		 1681 /* Rummage around all the relocs and map the glue vectors. */
1682 sec = abfd->sections;
1683
1684 if (sec == NULL)
1685 return true;
1686
1687 for (; sec != NULL; sec = sec->next)
1688 {
1689 struct internal_reloc * i;
1690 struct internal_reloc * rel;
454515c0 1691
e1aeb285
NC		 1692 if (sec->reloc_count == 0)
1693 continue;
1694
1695 /* Load the relocs. */
1696 /* FIXME: there may be a storage leak here. */
1697
1698 i = _bfd_coff_read_internal_relocs (abfd, sec, 1, 0, 0, 0);
1699
1700 BFD_ASSERT (i != 0);
1701
1702 for (rel = i; rel < i + sec->reloc_count; ++rel)
1703 {
1704 unsigned short r_type = rel->r_type;
1705 long symndx;
1706 struct coff_link_hash_entry * h;
1707
1708 symndx = rel->r_symndx;
1709
1710 /* If the relocation is not against a symbol it cannot concern us. */
1711 if (symndx == -1)
1712 continue;
1713
1714 h = obj_coff_sym_hashes (abfd)[symndx];
1715
1716 /* If the relocation is against a static symbol it must be within
454515c0 1717 the current section and so cannot be a cross ARM/Thumb relocation. */
e1aeb285
NC		 1718 if (h == NULL)
1719 continue;
1720
1721 switch (r_type)
1722 {
1723 case ARM_26:
1724 /* This one is a call from arm code. We need to look up
1725 the target of the call. If it is a thumb target, we
1726 insert glue. */
1727
1728 if (h->class == C_THUMBEXTFUNC)
454515c0 1729 record_arm_to_thumb_glue (info, h);
e1aeb285
NC		 1730 break;
1731
1732 case ARM_THUMB23:
1733 /* This one is a call from thumb code. We used to look
1734 for ARM_THUMB9 and ARM_THUMB12 as well. We need to look
1735 up the target of the call. If it is an arm target, we
454515c0
NC		 1736 insert glue. If the symbol does not exist it will be
1737 given a class of C_EXT and so we will generate a stub
1738 for it. This is not really a problem, since the link
1739 is doomed anyway. */
1740
e1aeb285
NC		 1741 switch (h->class)
1742 {
1743 case C_EXT:
1744 case C_STAT:
1745 case C_LABEL:
1746 record_thumb_to_arm_glue (info, h);
1747 break;
1748 default:
1749 ;
1750 }
1751 break;
1752
1753 default:
1754 break;
1755 }
1756 }
1757 }
1758
1759 return true;
1760}
454515c0 1761#endif /* COFF_IMAGE_WITH_PE or not COFF_WITH_PE */
e1aeb285
NC		 1762
1763#define coff_relocate_section coff_arm_relocate_section
1764
1765/* When doing a relocateable link, we want to convert ARM26 relocs
1766 into ARM26D relocs. */
1767
1768static boolean
1769coff_arm_adjust_symndx (obfd, info, ibfd, sec, irel, adjustedp)
1770 bfd *obfd;
1771 struct bfd_link_info *info;
1772 bfd *ibfd;
1773 asection *sec;
1774 struct internal_reloc *irel;
1775 boolean *adjustedp;
1776{
1777 if (irel->r_type == 3)
1778 {
1779 struct coff_link_hash_entry *h;
1780
1781 h = obj_coff_sym_hashes (ibfd)[irel->r_symndx];
1782 if (h != NULL
1783 && (h->root.type == bfd_link_hash_defined
1784 || h->root.type == bfd_link_hash_defweak)
1785 && h->root.u.def.section->output_section == sec->output_section)
1786 irel->r_type = 7;
1787 }
1788 *adjustedp = false;
1789 return true;
1790}
1791
454515c0 1792#if defined COFF_IMAGE_WITH_PE || ! defined COFF_WITH_PE
e1aeb285
NC		 1793/* Called when merging the private data areas of two BFDs.
1794 This is important as it allows us to detect if we are
1795 attempting to merge binaries compiled for different ARM
1796 targets, eg different CPUs or differents APCS's. */
1797
454515c0 1798boolean
e1aeb285
NC		 1799coff_arm_bfd_merge_private_bfd_data (ibfd, obfd)
1800 bfd * ibfd;
1801 bfd * obfd;
1802{
1803 BFD_ASSERT (ibfd != NULL && obfd != NULL);
1804
1805 if (ibfd == obfd)
1806 return true;
1807
f5ddda0f
NC		 1808 /* If the two formats are different we cannot merge anything.
1809 This is not an error, since it is permissable to change the
1810 input and output formats. */
38c574bb
NC		 1811 if ( ibfd->xvec->flavour != bfd_target_coff_flavour
1812 || obfd->xvec->flavour != bfd_target_coff_flavour)
f5ddda0f 1813 return true;
38c574bb 1814
e1aeb285
NC		 1815 /* Verify that the APCS is the same for the two BFDs */
1816 if (APCS_SET (ibfd))
1817 {
1818 if (APCS_SET (obfd))
1819 {
1820 /* If the src and dest have different APCS flag bits set, fail. */
1821 if (APCS_26_FLAG (obfd) != APCS_26_FLAG (ibfd))
1822 {
1823 _bfd_error_handler
1824 ("%s: ERROR: compiled for APCS-%d whereas target %s uses APCS-%d",
1825 bfd_get_filename (ibfd), APCS_26_FLAG (ibfd) ? 26 : 32,
1826 bfd_get_filename (obfd), APCS_26_FLAG (obfd) ? 26 : 32
1827 );
1828
1829 bfd_set_error (bfd_error_wrong_format);
1830 return false;
1831 }
1832
1833 if (APCS_FLOAT_FLAG (obfd) != APCS_FLOAT_FLAG (ibfd))
1834 {
1835 _bfd_error_handler
1836 ("%s: ERROR: passes floats in %s registers whereas target %s uses %s registers",
1837 bfd_get_filename (ibfd), APCS_FLOAT_FLAG (ibfd) ? "float" : "integer",
1838 bfd_get_filename (obfd), APCS_FLOAT_FLAG (obfd) ? "float" : "integer"
1839 );
1840
1841 bfd_set_error (bfd_error_wrong_format);
1842 return false;
1843 }
1844
1845 if (PIC_FLAG (obfd) != PIC_FLAG (ibfd))
1846 {
1847 _bfd_error_handler
1848 ("%s: ERROR: compiled as %s code, whereas target %s is %s",
1849 bfd_get_filename (ibfd), PIC_FLAG (ibfd) ? "position independent" : "absoluste position",
1850 bfd_get_filename (obfd), PIC_FLAG (obfd) ? "position independent" : "absoluste position"
1851 );
1852
1853 bfd_set_error (bfd_error_wrong_format);
1854 return false;
1855 }
1856 }
1857 else
1858 {
1859 SET_APCS_FLAGS (obfd, APCS_26_FLAG (ibfd) | APCS_FLOAT_FLAG (ibfd) | PIC_FLAG (ibfd));
1860
1861 /* Set up the arch and fields as well as these are probably wrong. */
1862 bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
1863 }
1864 }
38c574bb 1865
e1aeb285
NC		 1866 /* Check the interworking support. */
1867 if (INTERWORK_SET (ibfd))
1868 {
1869 if (INTERWORK_SET (obfd))
1870 {
1871 /* If the src and dest differ in their interworking issue a warning. */
1872 if (INTERWORK_FLAG (obfd) != INTERWORK_FLAG (ibfd))
1873 {
1874 _bfd_error_handler
1875 ("Warning: input file %s %s interworking, whereas %s does%s",
1876 bfd_get_filename (ibfd),
1877 INTERWORK_FLAG (ibfd) ? "supports" : "does not support",
1878 bfd_get_filename (obfd),
1879 INTERWORK_FLAG (obfd) ? "." : " not."
1880 );
1881 }
1882 }
1883 else
1884 {
1885 SET_INTERWORK_FLAG (obfd, INTERWORK_FLAG (ibfd));
1886 }
1887 }
1888
1889 return true;
1890}
1891
1892
8e2eebc8 1893/* Display the flags field. */
e1aeb285 1894
38c574bb 1895boolean
e1aeb285
NC		 1896coff_arm_bfd_print_private_bfd_data (abfd, ptr)
1897 bfd * abfd;
1898 PTR ptr;
1899{
1900 FILE * file = (FILE *) ptr;
1901
1902 BFD_ASSERT (abfd != NULL && ptr != NULL)
1903
f5ddda0f 1904 fprintf (file, "private flags = %x", coff_data (abfd)->flags);
e1aeb285
NC		 1905
1906 if (APCS_SET (abfd))
1907 fprintf (file, ": [APCS-%d] [floats passed in %s registers] [%s]",
1908 APCS_26_FLAG (abfd) ? 26 : 32,
1909 APCS_FLOAT_FLAG (abfd) ? "float" : "integer",
1910 PIC_FLAG (abfd) ? "position independent" : "absolute position"
1911 );
1912
1913 if (INTERWORK_SET (abfd))
38c574bb 1914 fprintf (file, " [interworking %ssupported]",
e1aeb285 1915 INTERWORK_FLAG (abfd) ? "" : "not " );
38c574bb
NC		 1916 else
1917 fprintf (file, " [interworking flag not initialised]");
e1aeb285
NC		 1918
1919 fputc ('\n', file);
1920
1921 return true;
1922}
1923
1924
1925/* Copies the given flags into the coff_tdata.flags field.
1926 Typically these flags come from the f_flags[] field of
1927 the COFF filehdr structure, which contains important,
1928 target specific information. */
1929
454515c0 1930boolean
e1aeb285
NC		 1931coff_arm_bfd_set_private_flags (abfd, flags)
1932 bfd * abfd;
1933 flagword flags;
1934{
1935 int flag;
1936
1937 BFD_ASSERT (abfd != NULL);
1938
1939 flag = (flags & F_APCS26) ? F_APCS_26 : 0;
1940
1941 /* Make sure that the APCS field has not been initialised to the opposite value. */
1942 if (APCS_SET (abfd)
1943 && ( (APCS_26_FLAG (abfd) != flag)
1944 || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT))
1945 || (PIC_FLAG (abfd) != (flags & F_PIC))
1946 ))
1947 return false;
1948
1949 flag |= (flags & (F_APCS_FLOAT | F_PIC));
1950
1951 SET_APCS_FLAGS (abfd, flag);
1952
1953 flag = (flags & F_INTERWORK);
1954
1955 /* If either the flags or the BFD do support interworking then do not set the interworking flag. */
1956 if (INTERWORK_SET (abfd) && (INTERWORK_FLAG (abfd) != flag))
1957 flag = 0;
1958
1959 SET_INTERWORK_FLAG (abfd, flag);
1960
1961 return true;
1962}
1963
1964
1965/* Copy the important parts of the target specific data
1966 from one instance of a BFD to another. */
1967
38c574bb 1968boolean
e1aeb285
NC		 1969coff_arm_bfd_copy_private_bfd_data (src, dest)
1970 bfd * src;
1971 bfd * dest;
1972{
1973 BFD_ASSERT (src != NULL && dest != NULL);
38c574bb 1974
e1aeb285
NC		 1975 if (src == dest)
1976 return true;
1977
1978 /* If the destination is not in the same format as the source, do not do the copy. */
1979 if (src->xvec != dest->xvec)
1980 return true;
1981
1982 /* copy the flags field */
1983 if (APCS_SET (src))
1984 {
1985 if (APCS_SET (dest))
1986 {
1987 /* If the src and dest have different APCS flag bits set, fail. */
1988 if (APCS_26_FLAG (dest) != APCS_26_FLAG (src))
1989 return false;
1990
1991 if (APCS_FLOAT_FLAG (dest) != APCS_FLOAT_FLAG (src))
1992 return false;
1993
1994 if (PIC_FLAG (dest) != PIC_FLAG (src))
1995 return false;
1996 }
1997 else
1998 SET_APCS_FLAGS (dest, APCS_26_FLAG (src) | APCS_FLOAT_FLAG (src) | PIC_FLAG (src));
1999 }
2000
2001 if (INTERWORK_SET (src))
2002 {
2003 if (INTERWORK_SET (dest))
2004 {
2005 /* If the src and dest have different interworking flags then turn off the interworking bit. */
2006 if (INTERWORK_FLAG (dest) != INTERWORK_FLAG (src))
2007 SET_INTERWORK_FLAG (dest, 0);
2008 }
2009 else
2010 {
2011 SET_INTERWORK_FLAG (dest, INTERWORK_FLAG (src));
2012 }
2013 }
2014
2015 return true;
2016}
2017
2018/* Note: the definitions here of LOCAL_LABEL_PREFIX and USER_LABEL_PREIFX
2019 *must* match the definitions on gcc/config/arm/semi.h. */
2020#define LOCAL_LABEL_PREFIX "."
09888f15 2021#define USER_LABEL_PREFIX "_"
e1aeb285 2022
38c574bb 2023boolean
e1aeb285
NC		 2024coff_arm_is_local_label_name (abfd, name)
2025 bfd * abfd;
2026 const char * name;
2027{
2028#ifdef LOCAL_LABEL_PREFIX
2029 /* If there is a prefix for local labels then look for this.
2030 If the prefix exists, but it is empty, then ignore the test. */
2031
2032 if (LOCAL_LABEL_PREFIX[0] != 0)
2033 {
2034 if (strncmp (name, LOCAL_LABEL_PREFIX, strlen (LOCAL_LABEL_PREFIX)) == 0)
2035 return true;
2036 }
2037#endif
2038#ifdef USER_LABEL_PREFIX
2039 if (USER_LABEL_PREFIX[0] != 0)
2040 {
2041 if (strncmp (name, USER_LABEL_PREFIX, strlen (USER_LABEL_PREFIX)) == 0)
2042 return false;
2043 }
2044#endif
2045
2046 /* devo/gcc/config/dbxcoff.h defines ASM_OUTPUT_SOURCE_LINE to generate local line numbers as .LM<number>, so treat these as local. */
2047
2048 switch (name[0])
2049 {
2050 case 'L': return true;
2051 case '.': return (name[1] == 'L' && name[2] == 'M') ? true : false;
2052 default: return false; /* Cannot make our minds up - default to false so that it will not be stripped by accident. */
2053 }
2054}
38c574bb 2055#endif /* COFF_IMAGE_WITH_PE or not COFF_WITH_PE */
e1aeb285
NC		 2056
2057#define coff_bfd_is_local_label_name coff_arm_is_local_label_name
2058#define coff_adjust_symndx coff_arm_adjust_symndx
8e2eebc8 2059
454515c0
NC		 2060#define coff_link_output_has_begun coff_arm_link_output_has_begun
2061#define coff_final_link_postscript coff_arm_final_link_postscript
46686c78
NC		 2062#define coff_bfd_merge_private_bfd_data coff_arm_bfd_merge_private_bfd_data
2063#define coff_bfd_print_private_bfd_data coff_arm_bfd_print_private_bfd_data
2064#define coff_bfd_set_private_flags coff_arm_bfd_set_private_flags
2065#define coff_bfd_copy_private_bfd_data coff_arm_bfd_copy_private_bfd_data
e1aeb285 2066
454515c0
NC		 2067extern boolean coff_arm_final_link_postscript ();
2068extern boolean coff_arm_bfd_set_private_flags ();
2069extern boolean coff_arm_bfd_merge_private_bfd_data ();
2070extern boolean coff_arm_link_output_has_begun ();
38c574bb 2071extern boolean coff_arm_is_local_label_name ();
454515c0
NC		 2072
2073#if defined COFF_IMAGE_WITH_PE || ! defined COFF_WITH_PE
e1aeb285
NC		 2074/* This piece of machinery exists only to guarantee that the bfd that holds
2075 the glue section is written last.
2076
2077 This does depend on bfd_make_section attaching a new section to the
2078 end of the section list for the bfd.
2079
8e2eebc8 2080 krk@cygnus.com */
e1aeb285 2081
8e2eebc8
ILT		 2082boolean
2083coff_arm_link_output_has_begun (sub)
2084 bfd * sub;
e1aeb285 2085{
8e2eebc8
ILT		 2086 return (sub->output_has_begun || sub == bfd_of_glue_owner);
2087}
e1aeb285 2088
8e2eebc8
ILT		 2089boolean
2090coff_arm_final_link_postscript (abfd, pfinfo)
2091 bfd * abfd;
2092 struct coff_final_link_info * pfinfo;
2093{
2094 if (bfd_of_glue_owner != NULL)
e1aeb285 2095 {
8e2eebc8 2096 if (! _bfd_coff_link_input_bfd (pfinfo, bfd_of_glue_owner))
e1aeb285 2097 return false;
8e2eebc8 2098 bfd_of_glue_owner->output_has_begun = true;
e1aeb285 2099 }
e1aeb285 2100 return true;
8e2eebc8 2101}
454515c0 2102#endif /* COFF_IMAGE_WITH_PE or not COFF_WITH_PE */
e1aeb285 2103
8e2eebc8 2104#define coff_SWAP_sym_in arm_bfd_coff_swap_sym_in
e1aeb285 2105
8e2eebc8 2106static void coff_swap_sym_in PARAMS ((bfd *, PTR, PTR));
e1aeb285 2107
8e2eebc8
ILT		 2108/* Sepcial version of symbol swapper, used to grab a bfd
2109 onto which the glue sections can be attached. */
e1aeb285
NC		 2110static void
2111arm_bfd_coff_swap_sym_in (abfd, ext1, in1)
8e2eebc8
ILT		 2112 bfd * abfd;
2113 PTR ext1;
2114 PTR in1;
e1aeb285 2115{
e1aeb285 2116 flagword flags;
8e2eebc8
ILT		 2117 register asection * s;
2118
2119 /* Do the normal swap in. */
2120 coff_swap_sym_in (abfd, ext1, in1);
2121
2122 if (bfd_of_glue_owner != NULL) /* we already have a toc, so go home */
e1aeb285
NC		 2123 return;
2124
8e2eebc8 2125 /* Save the bfd for later allocation. */
e1aeb285
NC		 2126 bfd_of_glue_owner = abfd;
2127
2128 s = bfd_get_section_by_name (bfd_of_glue_owner ,
2129 ARM2THUMB_GLUE_SECTION_NAME);
2130
2131 if (s == NULL)
2132 {
2133 flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY ;
2134
454515c0 2135 s = bfd_make_section (bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
e1aeb285
NC		 2136
2137 if (s == NULL
2138 || !bfd_set_section_flags (bfd_of_glue_owner, s, flags)
2139 || !bfd_set_section_alignment (bfd_of_glue_owner, s, 2))
2140 {
2141 /* FIXME: set appropriate bfd error */
2142 abort();
2143 }
2144 }
2145
454515c0 2146 s = bfd_get_section_by_name (bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
e1aeb285
NC		 2147
2148 if (s == NULL)
2149 {
2150 flags = SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY ;
2151
454515c0 2152 s = bfd_make_section (bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
e1aeb285
NC		 2153
2154 if (s == NULL
2155 || !bfd_set_section_flags (bfd_of_glue_owner, s, flags)
2156 || !bfd_set_section_alignment (bfd_of_glue_owner, s, 2))
2157 {
2158 /* FIXME: set appropriate bfd error krk@cygnus.com */
2159 abort();
2160 }
2161 }
2162
2163 return;
2164}
2165
8e2eebc8 2166#include "coffcode.h"
e1aeb285 2167
177b1932 2168const bfd_target
3ea928f5 2169#ifdef TARGET_LITTLE_SYM
177b1932
DE		 2170TARGET_LITTLE_SYM =
2171#else
2172armcoff_little_vec =
2173#endif
943fbd5b 2174{
177b1932
DE		 2175#ifdef TARGET_LITTLE_NAME
2176 TARGET_LITTLE_NAME,
2177#else
2178 "coff-arm-little",
2179#endif
943fbd5b 2180 bfd_target_coff_flavour,
46686c78
NC		 2181 BFD_ENDIAN_LITTLE, /* data byte order is little */
2182 BFD_ENDIAN_LITTLE, /* header byte order is little */
943fbd5b
KR		 2183
2184 (HAS_RELOC | EXEC_P | /* object flags */
2185 HAS_LINENO | HAS_DEBUG |
2186 HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED),
2187
46686c78 2188#ifndef COFF_WITH_PE
943fbd5b 2189 (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
46686c78
NC		 2190#else
2191 (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC /* section flags */
2192 | SEC_LINK_ONCE | SEC_LINK_DUPLICATES),
2193#endif
2194
943fbd5b
KR		 2195#ifdef TARGET_UNDERSCORE
2196 TARGET_UNDERSCORE, /* leading underscore */
2197#else
2198 0, /* leading underscore */
2199#endif
2200 '/', /* ar_pad_char */
2201 15, /* ar_max_namelen */
2202
943fbd5b
KR		 2203 bfd_getl64, bfd_getl_signed_64, bfd_putl64,
2204 bfd_getl32, bfd_getl_signed_32, bfd_putl32,
2205 bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* data */
2206 bfd_getl64, bfd_getl_signed_64, bfd_putl64,
2207 bfd_getl32, bfd_getl_signed_32, bfd_putl32,
2208 bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* hdrs */
2209
2210/* Note that we allow an object file to be treated as a core file as well. */
da7afe3b
SC		 2211 {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
2212 bfd_generic_archive_p, coff_object_p},
943fbd5b
KR		 2213 {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
2214 bfd_false},
2215 {bfd_false, coff_write_object_contents, /* bfd_write_contents */
2216 _bfd_write_archive_contents, bfd_false},
2217
2218 BFD_JUMP_TABLE_GENERIC (coff),
2219 BFD_JUMP_TABLE_COPY (coff),
2220 BFD_JUMP_TABLE_CORE (_bfd_nocore),
2221 BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
2222 BFD_JUMP_TABLE_SYMBOLS (coff),
2223 BFD_JUMP_TABLE_RELOCS (coff),
2224 BFD_JUMP_TABLE_WRITE (coff),
2225 BFD_JUMP_TABLE_LINK (coff),
2226 BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
2227
8e2eebc8 2228 (PTR) & bfd_coff_std_swap_table,
943fbd5b 2229};
3ea928f5 2230
177b1932 2231const bfd_target
3ea928f5 2232#ifdef TARGET_BIG_SYM
177b1932
DE		 2233TARGET_BIG_SYM =
2234#else
2235armcoff_big_vec =
2236#endif
3ea928f5 2237{
177b1932
DE		 2238#ifdef TARGET_BIG_NAME
2239 TARGET_BIG_NAME,
2240#else
2241 "coff-arm-big",
2242#endif
3ea928f5 2243 bfd_target_coff_flavour,
46686c78
NC		 2244 BFD_ENDIAN_BIG, /* data byte order is big */
2245 BFD_ENDIAN_BIG, /* header byte order is big */
3ea928f5
SC		 2246
2247 (HAS_RELOC | EXEC_P | /* object flags */
2248 HAS_LINENO | HAS_DEBUG |
2249 HAS_SYMS | HAS_LOCALS | WP_TEXT | D_PAGED),
2250
46686c78 2251#ifndef COFF_WITH_PE
3ea928f5 2252 (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */
46686c78
NC		 2253#else
2254 (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC /* section flags */
2255 | SEC_LINK_ONCE | SEC_LINK_DUPLICATES),
2256#endif
2257
3ea928f5
SC		 2258#ifdef TARGET_UNDERSCORE
2259 TARGET_UNDERSCORE, /* leading underscore */
2260#else
2261 0, /* leading underscore */
2262#endif
2263 '/', /* ar_pad_char */
2264 15, /* ar_max_namelen */
2265
3ea928f5
SC		 2266 bfd_getb64, bfd_getb_signed_64, bfd_putb64,
2267 bfd_getb32, bfd_getb_signed_32, bfd_putb32,
2268 bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */
2269 bfd_getb64, bfd_getb_signed_64, bfd_putb64,
2270 bfd_getb32, bfd_getb_signed_32, bfd_putb32,
2271 bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */
2272
2273/* Note that we allow an object file to be treated as a core file as well. */
da7afe3b
SC		 2274 {_bfd_dummy_target, coff_object_p, /* bfd_check_format */
2275 bfd_generic_archive_p, coff_object_p},
3ea928f5
SC		 2276 {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */
2277 bfd_false},
2278 {bfd_false, coff_write_object_contents, /* bfd_write_contents */
2279 _bfd_write_archive_contents, bfd_false},
2280
2281 BFD_JUMP_TABLE_GENERIC (coff),
2282 BFD_JUMP_TABLE_COPY (coff),
2283 BFD_JUMP_TABLE_CORE (_bfd_nocore),
2284 BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
2285 BFD_JUMP_TABLE_SYMBOLS (coff),
2286 BFD_JUMP_TABLE_RELOCS (coff),
2287 BFD_JUMP_TABLE_WRITE (coff),
2288 BFD_JUMP_TABLE_LINK (coff),
2289 BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic),
2290
8e2eebc8 2291 (PTR) & bfd_coff_std_swap_table,
3ea928f5 2292};
GDB Binutils - Deliverables
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