Commit | Line | Data |
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c2dcd04e | 1 | /* BFD back-end for Renesas H8/300 COFF binaries. |
7898deda | 2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
ca9a79a1 | 3 | 2000, 2001, 2002, 2003, 2004 |
5f771d47 | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | Written by Steve Chamberlain, <sac@cygnus.com>. |
6 | ||
e514ac71 | 7 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 8 | |
e514ac71 NC |
9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
252b5132 | 13 | |
e514ac71 NC |
14 | This program is distributed in the hope that it will be useful, |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
252b5132 | 18 | |
e514ac71 NC |
19 | You should have received a copy of the GNU General Public License |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
252b5132 RH |
22 | |
23 | #include "bfd.h" | |
24 | #include "sysdep.h" | |
25 | #include "libbfd.h" | |
26 | #include "bfdlink.h" | |
27 | #include "genlink.h" | |
28 | #include "coff/h8300.h" | |
29 | #include "coff/internal.h" | |
30 | #include "libcoff.h" | |
0171ee92 | 31 | #include "libiberty.h" |
252b5132 RH |
32 | |
33 | #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1) | |
34 | ||
35 | /* We derive a hash table from the basic BFD hash table to | |
5fcfd273 | 36 | hold entries in the function vector. Aside from the |
252b5132 RH |
37 | info stored by the basic hash table, we need the offset |
38 | of a particular entry within the hash table as well as | |
39 | the offset where we'll add the next entry. */ | |
40 | ||
41 | struct funcvec_hash_entry | |
f4ffd778 NC |
42 | { |
43 | /* The basic hash table entry. */ | |
44 | struct bfd_hash_entry root; | |
252b5132 | 45 | |
f4ffd778 NC |
46 | /* The offset within the vectors section where |
47 | this entry lives. */ | |
48 | bfd_vma offset; | |
49 | }; | |
252b5132 RH |
50 | |
51 | struct funcvec_hash_table | |
f4ffd778 NC |
52 | { |
53 | /* The basic hash table. */ | |
54 | struct bfd_hash_table root; | |
252b5132 | 55 | |
f4ffd778 | 56 | bfd *abfd; |
252b5132 | 57 | |
f4ffd778 NC |
58 | /* Offset at which we'll add the next entry. */ |
59 | unsigned int offset; | |
60 | }; | |
252b5132 RH |
61 | |
62 | static struct bfd_hash_entry * | |
63 | funcvec_hash_newfunc | |
c6baf75e | 64 | (struct bfd_hash_entry *, struct bfd_hash_table *, const char *); |
252b5132 | 65 | |
b34976b6 | 66 | static bfd_boolean |
252b5132 | 67 | funcvec_hash_table_init |
c6baf75e RS |
68 | (struct funcvec_hash_table *, bfd *, |
69 | struct bfd_hash_entry *(*) (struct bfd_hash_entry *, | |
70 | struct bfd_hash_table *, | |
71 | const char *)); | |
b34976b6 AM |
72 | |
73 | static bfd_reloc_status_type special | |
c6baf75e | 74 | (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **); |
b34976b6 | 75 | static int select_reloc |
c6baf75e | 76 | (reloc_howto_type *); |
b34976b6 | 77 | static void rtype2howto |
c6baf75e | 78 | (arelent *, struct internal_reloc *); |
b34976b6 | 79 | static void reloc_processing |
c6baf75e | 80 | (arelent *, struct internal_reloc *, asymbol **, bfd *, asection *); |
b34976b6 | 81 | static bfd_boolean h8300_symbol_address_p |
c6baf75e | 82 | (bfd *, asection *, bfd_vma); |
b34976b6 | 83 | static int h8300_reloc16_estimate |
c6baf75e RS |
84 | (bfd *, asection *, arelent *, unsigned int, |
85 | struct bfd_link_info *); | |
b34976b6 | 86 | static void h8300_reloc16_extra_cases |
c6baf75e RS |
87 | (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *, |
88 | bfd_byte *, unsigned int *, unsigned int *); | |
b34976b6 | 89 | static bfd_boolean h8300_bfd_link_add_symbols |
c6baf75e | 90 | (bfd *, struct bfd_link_info *); |
f4ffd778 | 91 | |
252b5132 RH |
92 | /* To lookup a value in the function vector hash table. */ |
93 | #define funcvec_hash_lookup(table, string, create, copy) \ | |
94 | ((struct funcvec_hash_entry *) \ | |
95 | bfd_hash_lookup (&(table)->root, (string), (create), (copy))) | |
96 | ||
97 | /* The derived h8300 COFF linker table. Note it's derived from | |
98 | the generic linker hash table, not the COFF backend linker hash | |
99 | table! We use this to attach additional data structures we | |
100 | need while linking on the h8300. */ | |
bc7eab72 | 101 | struct h8300_coff_link_hash_table { |
252b5132 RH |
102 | /* The main hash table. */ |
103 | struct generic_link_hash_table root; | |
104 | ||
105 | /* Section for the vectors table. This gets attached to a | |
106 | random input bfd, we keep it here for easy access. */ | |
107 | asection *vectors_sec; | |
108 | ||
109 | /* Hash table of the functions we need to enter into the function | |
110 | vector. */ | |
111 | struct funcvec_hash_table *funcvec_hash_table; | |
112 | }; | |
113 | ||
c6baf75e | 114 | static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *); |
252b5132 RH |
115 | |
116 | /* Get the H8/300 COFF linker hash table from a link_info structure. */ | |
117 | ||
118 | #define h8300_coff_hash_table(p) \ | |
119 | ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p)))) | |
120 | ||
121 | /* Initialize fields within a funcvec hash table entry. Called whenever | |
122 | a new entry is added to the funcvec hash table. */ | |
123 | ||
124 | static struct bfd_hash_entry * | |
c6baf75e RS |
125 | funcvec_hash_newfunc (struct bfd_hash_entry *entry, |
126 | struct bfd_hash_table *gen_table, | |
127 | const char *string) | |
252b5132 RH |
128 | { |
129 | struct funcvec_hash_entry *ret; | |
130 | struct funcvec_hash_table *table; | |
131 | ||
132 | ret = (struct funcvec_hash_entry *) entry; | |
133 | table = (struct funcvec_hash_table *) gen_table; | |
134 | ||
135 | /* Allocate the structure if it has not already been allocated by a | |
136 | subclass. */ | |
137 | if (ret == NULL) | |
138 | ret = ((struct funcvec_hash_entry *) | |
0171ee92 AM |
139 | bfd_hash_allocate (gen_table, |
140 | sizeof (struct funcvec_hash_entry))); | |
252b5132 RH |
141 | if (ret == NULL) |
142 | return NULL; | |
143 | ||
144 | /* Call the allocation method of the superclass. */ | |
145 | ret = ((struct funcvec_hash_entry *) | |
bc7eab72 | 146 | bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string)); |
252b5132 RH |
147 | |
148 | if (ret == NULL) | |
149 | return NULL; | |
150 | ||
151 | /* Note where this entry will reside in the function vector table. */ | |
152 | ret->offset = table->offset; | |
153 | ||
154 | /* Bump the offset at which we store entries in the function | |
155 | vector. We'd like to bump up the size of the vectors section, | |
156 | but it's not easily available here. */ | |
d4e2de6b NC |
157 | switch (bfd_get_mach (table->abfd)) |
158 | { | |
159 | case bfd_mach_h8300: | |
160 | case bfd_mach_h8300hn: | |
161 | case bfd_mach_h8300sn: | |
162 | table->offset += 2; | |
163 | break; | |
164 | case bfd_mach_h8300h: | |
165 | case bfd_mach_h8300s: | |
166 | table->offset += 4; | |
167 | break; | |
168 | default: | |
169 | return NULL; | |
170 | } | |
252b5132 RH |
171 | |
172 | /* Everything went OK. */ | |
173 | return (struct bfd_hash_entry *) ret; | |
174 | } | |
175 | ||
176 | /* Initialize the function vector hash table. */ | |
177 | ||
b34976b6 | 178 | static bfd_boolean |
c6baf75e RS |
179 | funcvec_hash_table_init (struct funcvec_hash_table *table, |
180 | bfd *abfd, | |
181 | struct bfd_hash_entry *(*newfunc) | |
182 | (struct bfd_hash_entry *, | |
183 | struct bfd_hash_table *, | |
184 | const char *)) | |
252b5132 RH |
185 | { |
186 | /* Initialize our local fields, then call the generic initialization | |
187 | routine. */ | |
188 | table->offset = 0; | |
189 | table->abfd = abfd; | |
190 | return (bfd_hash_table_init (&table->root, newfunc)); | |
191 | } | |
192 | ||
193 | /* Create the derived linker hash table. We use a derived hash table | |
19852a2a | 194 | basically to hold "static" information during an H8/300 coff link |
252b5132 RH |
195 | without using static variables. */ |
196 | ||
197 | static struct bfd_link_hash_table * | |
c6baf75e | 198 | h8300_coff_link_hash_table_create (bfd *abfd) |
252b5132 RH |
199 | { |
200 | struct h8300_coff_link_hash_table *ret; | |
dc810e39 AM |
201 | bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table); |
202 | ||
e2d34d7d | 203 | ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt); |
252b5132 RH |
204 | if (ret == NULL) |
205 | return NULL; | |
dc810e39 AM |
206 | if (!_bfd_link_hash_table_init (&ret->root.root, abfd, |
207 | _bfd_generic_link_hash_newfunc)) | |
252b5132 | 208 | { |
e2d34d7d | 209 | free (ret); |
252b5132 RH |
210 | return NULL; |
211 | } | |
212 | ||
213 | /* Initialize our data. */ | |
214 | ret->vectors_sec = NULL; | |
215 | ret->funcvec_hash_table = NULL; | |
216 | ||
2ab1486e | 217 | /* OK. Everything's initialized, return the base pointer. */ |
252b5132 RH |
218 | return &ret->root.root; |
219 | } | |
220 | ||
cc040812 | 221 | /* Special handling for H8/300 relocs. |
252b5132 RH |
222 | We only come here for pcrel stuff and return normally if not an -r link. |
223 | When doing -r, we can't do any arithmetic for the pcrel stuff, because | |
224 | the code in reloc.c assumes that we can manipulate the targets of | |
5fcfd273 | 225 | the pcrel branches. This isn't so, since the H8/300 can do relaxing, |
252b5132 | 226 | which means that the gap after the instruction may not be enough to |
d562d2fb | 227 | contain the offset required for the branch, so we have to use only |
cc040812 | 228 | the addend until the final link. */ |
252b5132 RH |
229 | |
230 | static bfd_reloc_status_type | |
c6baf75e RS |
231 | special (bfd *abfd ATTRIBUTE_UNUSED, |
232 | arelent *reloc_entry ATTRIBUTE_UNUSED, | |
233 | asymbol *symbol ATTRIBUTE_UNUSED, | |
234 | PTR data ATTRIBUTE_UNUSED, | |
235 | asection *input_section ATTRIBUTE_UNUSED, | |
236 | bfd *output_bfd, | |
237 | char **error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
238 | { |
239 | if (output_bfd == (bfd *) NULL) | |
240 | return bfd_reloc_continue; | |
241 | ||
d562d2fb AM |
242 | /* Adjust the reloc address to that in the output section. */ |
243 | reloc_entry->address += input_section->output_offset; | |
252b5132 RH |
244 | return bfd_reloc_ok; |
245 | } | |
246 | ||
bc7eab72 | 247 | static reloc_howto_type howto_table[] = { |
b34976b6 AM |
248 | HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE), |
249 | HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
250 | HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE), | |
251 | HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE), | |
252 | HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE), | |
253 | HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE), | |
254 | HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
255 | HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE), | |
256 | HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
257 | HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE), | |
258 | HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE), | |
259 | HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE), | |
260 | HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE), | |
261 | HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
252b5132 RH |
262 | |
263 | /* An indirect reference to a function. This causes the function's address | |
264 | to be added to the function vector in lo-mem and puts the address of | |
265 | the function vector's entry in the jsr instruction. */ | |
b34976b6 | 266 | HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE), |
252b5132 | 267 | |
e804e836 KH |
268 | /* Internal reloc for relaxing. This is created when a 16-bit pc-relative |
269 | branch is turned into an 8-bit pc-relative branch. */ | |
b34976b6 | 270 | HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE), |
252b5132 | 271 | |
b34976b6 | 272 | HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE), |
252b5132 | 273 | |
b34976b6 | 274 | HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE), |
252b5132 | 275 | |
b34976b6 | 276 | HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE), |
252b5132 | 277 | |
b34976b6 | 278 | HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE), |
252b5132 RH |
279 | }; |
280 | ||
cc040812 | 281 | /* Turn a howto into a reloc number. */ |
252b5132 RH |
282 | |
283 | #define SELECT_RELOC(x,howto) \ | |
bc7eab72 | 284 | { x.r_type = select_reloc (howto); } |
252b5132 | 285 | |
8d9cd6b1 NC |
286 | #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \ |
287 | && H8300HNBADMAG(x) && H8300SNBADMAG(x)) | |
288 | #define H8300 1 /* Customize coffcode.h */ | |
252b5132 RH |
289 | #define __A_MAGIC_SET__ |
290 | ||
cc040812 | 291 | /* Code to swap in the reloc. */ |
dc810e39 AM |
292 | #define SWAP_IN_RELOC_OFFSET H_GET_32 |
293 | #define SWAP_OUT_RELOC_OFFSET H_PUT_32 | |
252b5132 RH |
294 | #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ |
295 | dst->r_stuff[0] = 'S'; \ | |
296 | dst->r_stuff[1] = 'C'; | |
297 | ||
252b5132 | 298 | static int |
c6baf75e | 299 | select_reloc (reloc_howto_type *howto) |
252b5132 RH |
300 | { |
301 | return howto->type; | |
302 | } | |
303 | ||
cc040812 | 304 | /* Code to turn a r_type into a howto ptr, uses the above howto table. */ |
252b5132 RH |
305 | |
306 | static void | |
c6baf75e | 307 | rtype2howto (arelent *internal, struct internal_reloc *dst) |
252b5132 RH |
308 | { |
309 | switch (dst->r_type) | |
310 | { | |
311 | case R_RELBYTE: | |
312 | internal->howto = howto_table + 0; | |
313 | break; | |
314 | case R_RELWORD: | |
315 | internal->howto = howto_table + 1; | |
316 | break; | |
317 | case R_RELLONG: | |
318 | internal->howto = howto_table + 2; | |
319 | break; | |
320 | case R_PCRBYTE: | |
321 | internal->howto = howto_table + 3; | |
322 | break; | |
323 | case R_PCRWORD: | |
324 | internal->howto = howto_table + 4; | |
325 | break; | |
326 | case R_PCRLONG: | |
327 | internal->howto = howto_table + 5; | |
328 | break; | |
329 | case R_MOV16B1: | |
330 | internal->howto = howto_table + 6; | |
331 | break; | |
332 | case R_MOV16B2: | |
333 | internal->howto = howto_table + 7; | |
334 | break; | |
335 | case R_JMP1: | |
336 | internal->howto = howto_table + 8; | |
337 | break; | |
338 | case R_JMP2: | |
339 | internal->howto = howto_table + 9; | |
340 | break; | |
341 | case R_JMPL1: | |
342 | internal->howto = howto_table + 10; | |
343 | break; | |
344 | case R_JMPL2: | |
345 | internal->howto = howto_table + 11; | |
346 | break; | |
347 | case R_MOV24B1: | |
348 | internal->howto = howto_table + 12; | |
349 | break; | |
350 | case R_MOV24B2: | |
351 | internal->howto = howto_table + 13; | |
352 | break; | |
353 | case R_MEM_INDIRECT: | |
354 | internal->howto = howto_table + 14; | |
355 | break; | |
356 | case R_PCRWORD_B: | |
357 | internal->howto = howto_table + 15; | |
358 | break; | |
359 | case R_MOVL1: | |
360 | internal->howto = howto_table + 16; | |
361 | break; | |
362 | case R_MOVL2: | |
363 | internal->howto = howto_table + 17; | |
364 | break; | |
365 | case R_BCC_INV: | |
366 | internal->howto = howto_table + 18; | |
367 | break; | |
368 | case R_JMP_DEL: | |
369 | internal->howto = howto_table + 19; | |
370 | break; | |
371 | default: | |
372 | abort (); | |
373 | break; | |
374 | } | |
375 | } | |
376 | ||
bc7eab72 | 377 | #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry) |
252b5132 | 378 | |
cc040812 | 379 | /* Perform any necessary magic to the addend in a reloc entry. */ |
252b5132 RH |
380 | |
381 | #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \ | |
bc7eab72 | 382 | cache_ptr->addend = ext_reloc.r_offset; |
252b5132 | 383 | |
252b5132 | 384 | #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \ |
bc7eab72 | 385 | reloc_processing (relent, reloc, symbols, abfd, section) |
252b5132 RH |
386 | |
387 | static void | |
c6baf75e RS |
388 | reloc_processing (arelent *relent, struct internal_reloc *reloc, |
389 | asymbol **symbols, bfd *abfd, asection *section) | |
252b5132 RH |
390 | { |
391 | relent->address = reloc->r_vaddr; | |
392 | rtype2howto (relent, reloc); | |
393 | ||
394 | if (((int) reloc->r_symndx) > 0) | |
2ab1486e | 395 | relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx]; |
252b5132 | 396 | else |
2ab1486e | 397 | relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; |
252b5132 | 398 | |
252b5132 RH |
399 | relent->addend = reloc->r_offset; |
400 | ||
401 | relent->address -= section->vma; | |
cc040812 NC |
402 | #if 0 |
403 | relent->section = 0; | |
404 | #endif | |
252b5132 RH |
405 | } |
406 | ||
b34976b6 | 407 | static bfd_boolean |
c6baf75e | 408 | h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address) |
252b5132 RH |
409 | { |
410 | asymbol **s; | |
411 | ||
412 | s = _bfd_generic_link_get_symbols (abfd); | |
413 | BFD_ASSERT (s != (asymbol **) NULL); | |
414 | ||
415 | /* Search all the symbols for one in INPUT_SECTION with | |
416 | address ADDRESS. */ | |
cc040812 | 417 | while (*s) |
252b5132 RH |
418 | { |
419 | asymbol *p = *s; | |
2ab1486e | 420 | |
252b5132 RH |
421 | if (p->section == input_section |
422 | && (input_section->output_section->vma | |
423 | + input_section->output_offset | |
424 | + p->value) == address) | |
b34976b6 | 425 | return TRUE; |
252b5132 | 426 | s++; |
cc040812 | 427 | } |
b34976b6 | 428 | return FALSE; |
252b5132 RH |
429 | } |
430 | ||
252b5132 RH |
431 | /* If RELOC represents a relaxable instruction/reloc, change it into |
432 | the relaxed reloc, notify the linker that symbol addresses | |
433 | have changed (bfd_perform_slip) and return how much the current | |
434 | section has shrunk by. | |
435 | ||
436 | FIXME: Much of this code has knowledge of the ordering of entries | |
437 | in the howto table. This needs to be fixed. */ | |
438 | ||
439 | static int | |
c6baf75e RS |
440 | h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc, |
441 | unsigned int shrink, struct bfd_link_info *link_info) | |
252b5132 | 442 | { |
cc040812 | 443 | bfd_vma value; |
252b5132 RH |
444 | bfd_vma dot; |
445 | bfd_vma gap; | |
446 | static asection *last_input_section = NULL; | |
447 | static arelent *last_reloc = NULL; | |
448 | ||
5fcfd273 | 449 | /* The address of the thing to be relocated will have moved back by |
252b5132 RH |
450 | the size of the shrink - but we don't change reloc->address here, |
451 | since we need it to know where the relocation lives in the source | |
452 | uncooked section. */ | |
453 | bfd_vma address = reloc->address - shrink; | |
454 | ||
455 | if (input_section != last_input_section) | |
456 | last_reloc = NULL; | |
457 | ||
458 | /* Only examine the relocs which might be relaxable. */ | |
459 | switch (reloc->howto->type) | |
5fcfd273 | 460 | { |
e804e836 KH |
461 | /* This is the 16-/24-bit absolute branch which could become an |
462 | 8-bit pc-relative branch. */ | |
252b5132 RH |
463 | case R_JMP1: |
464 | case R_JMPL1: | |
465 | /* Get the address of the target of this branch. */ | |
cc040812 | 466 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
467 | |
468 | /* Get the address of the next instruction (not the reloc). */ | |
469 | dot = (input_section->output_section->vma | |
470 | + input_section->output_offset + address); | |
471 | ||
472 | /* Adjust for R_JMP1 vs R_JMPL1. */ | |
473 | dot += (reloc->howto->type == R_JMP1 ? 1 : 2); | |
474 | ||
475 | /* Compute the distance from this insn to the branch target. */ | |
476 | gap = value - dot; | |
cc040812 | 477 | |
252b5132 RH |
478 | /* If the distance is within -128..+128 inclusive, then we can relax |
479 | this jump. +128 is valid since the target will move two bytes | |
480 | closer if we do relax this branch. */ | |
bc7eab72 | 481 | if ((int) gap >= -128 && (int) gap <= 128) |
5fcfd273 | 482 | { |
e514ac71 NC |
483 | bfd_byte code; |
484 | ||
485 | if (!bfd_get_section_contents (abfd, input_section, & code, | |
486 | reloc->address, 1)) | |
487 | break; | |
488 | code = bfd_get_8 (abfd, & code); | |
489 | ||
252b5132 RH |
490 | /* It's possible we may be able to eliminate this branch entirely; |
491 | if the previous instruction is a branch around this instruction, | |
492 | and there's no label at this instruction, then we can reverse | |
493 | the condition on the previous branch and eliminate this jump. | |
494 | ||
495 | original: new: | |
496 | bCC lab1 bCC' lab2 | |
497 | jmp lab2 | |
498 | lab1: lab1: | |
5fcfd273 | 499 | |
252b5132 | 500 | This saves 4 bytes instead of two, and should be relatively |
e514ac71 NC |
501 | common. |
502 | ||
503 | Only perform this optimisation for jumps (code 0x5a) not | |
504 | subroutine calls, as otherwise it could transform: | |
b34976b6 | 505 | |
0171ee92 AM |
506 | mov.w r0,r0 |
507 | beq .L1 | |
508 | jsr @_bar | |
509 | .L1: rts | |
510 | _bar: rts | |
e514ac71 | 511 | into: |
0171ee92 AM |
512 | mov.w r0,r0 |
513 | bne _bar | |
514 | rts | |
515 | _bar: rts | |
b34976b6 | 516 | |
e514ac71 NC |
517 | which changes the call (jsr) into a branch (bne). */ |
518 | if (code == 0x5a | |
519 | && gap <= 126 | |
252b5132 RH |
520 | && last_reloc |
521 | && last_reloc->howto->type == R_PCRBYTE) | |
522 | { | |
523 | bfd_vma last_value; | |
524 | last_value = bfd_coff_reloc16_get_value (last_reloc, link_info, | |
525 | input_section) + 1; | |
526 | ||
527 | if (last_value == dot + 2 | |
528 | && last_reloc->address + 1 == reloc->address | |
cc040812 | 529 | && !h8300_symbol_address_p (abfd, input_section, dot - 2)) |
252b5132 RH |
530 | { |
531 | reloc->howto = howto_table + 19; | |
532 | last_reloc->howto = howto_table + 18; | |
533 | last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr; | |
534 | last_reloc->addend = reloc->addend; | |
535 | shrink += 4; | |
536 | bfd_perform_slip (abfd, 4, input_section, address); | |
537 | break; | |
538 | } | |
539 | } | |
540 | ||
541 | /* Change the reloc type. */ | |
cc040812 | 542 | reloc->howto = reloc->howto + 1; |
252b5132 RH |
543 | |
544 | /* This shrinks this section by two bytes. */ | |
545 | shrink += 2; | |
cc040812 | 546 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
547 | } |
548 | break; | |
549 | ||
e804e836 | 550 | /* This is the 16-bit pc-relative branch which could become an 8-bit |
252b5132 RH |
551 | pc-relative branch. */ |
552 | case R_PCRWORD: | |
553 | /* Get the address of the target of this branch, add one to the value | |
0171ee92 | 554 | because the addend field in PCrel jumps is off by -1. */ |
cc040812 NC |
555 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1; |
556 | ||
252b5132 RH |
557 | /* Get the address of the next instruction if we were to relax. */ |
558 | dot = input_section->output_section->vma + | |
559 | input_section->output_offset + address; | |
cc040812 | 560 | |
252b5132 RH |
561 | /* Compute the distance from this insn to the branch target. */ |
562 | gap = value - dot; | |
563 | ||
564 | /* If the distance is within -128..+128 inclusive, then we can relax | |
565 | this jump. +128 is valid since the target will move two bytes | |
566 | closer if we do relax this branch. */ | |
bc7eab72 | 567 | if ((int) gap >= -128 && (int) gap <= 128) |
5fcfd273 | 568 | { |
252b5132 RH |
569 | /* Change the reloc type. */ |
570 | reloc->howto = howto_table + 15; | |
571 | ||
572 | /* This shrinks this section by two bytes. */ | |
573 | shrink += 2; | |
cc040812 | 574 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
575 | } |
576 | break; | |
577 | ||
e804e836 KH |
578 | /* This is a 16-bit absolute address in a mov.b insn, which can |
579 | become an 8-bit absolute address if it's in the right range. */ | |
252b5132 RH |
580 | case R_MOV16B1: |
581 | /* Get the address of the data referenced by this mov.b insn. */ | |
cc040812 | 582 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
7a9823f1 | 583 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 | 584 | |
7a9823f1 RS |
585 | /* If the address is in the top 256 bytes of the address space |
586 | then we can relax this instruction. */ | |
587 | if (value >= 0xffffff00u) | |
252b5132 RH |
588 | { |
589 | /* Change the reloc type. */ | |
590 | reloc->howto = reloc->howto + 1; | |
591 | ||
592 | /* This shrinks this section by two bytes. */ | |
593 | shrink += 2; | |
cc040812 | 594 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
595 | } |
596 | break; | |
597 | ||
e804e836 KH |
598 | /* Similarly for a 24-bit absolute address in a mov.b. Note that |
599 | if we can't relax this into an 8-bit absolute, we'll fall through | |
600 | and try to relax it into a 16-bit absolute. */ | |
252b5132 RH |
601 | case R_MOV24B1: |
602 | /* Get the address of the data referenced by this mov.b insn. */ | |
cc040812 | 603 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
7a9823f1 | 604 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 | 605 | |
7a9823f1 | 606 | if (value >= 0xffffff00u) |
252b5132 RH |
607 | { |
608 | /* Change the reloc type. */ | |
609 | reloc->howto = reloc->howto + 1; | |
610 | ||
611 | /* This shrinks this section by four bytes. */ | |
612 | shrink += 4; | |
cc040812 | 613 | bfd_perform_slip (abfd, 4, input_section, address); |
252b5132 RH |
614 | |
615 | /* Done with this reloc. */ | |
616 | break; | |
617 | } | |
618 | ||
e804e836 | 619 | /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit |
252b5132 RH |
620 | reloc. */ |
621 | ||
e804e836 KH |
622 | /* This is a 24-/32-bit absolute address in a mov insn, which can |
623 | become an 16-bit absolute address if it's in the right range. */ | |
252b5132 RH |
624 | case R_MOVL1: |
625 | /* Get the address of the data referenced by this mov insn. */ | |
cc040812 | 626 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
7a9823f1 | 627 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 | 628 | |
7a9823f1 RS |
629 | /* If the address is a sign-extended 16-bit value then we can |
630 | relax this instruction. */ | |
631 | if (value <= 0x7fff || value >= 0xffff8000u) | |
252b5132 RH |
632 | { |
633 | /* Change the reloc type. */ | |
634 | reloc->howto = howto_table + 17; | |
635 | ||
636 | /* This shrinks this section by two bytes. */ | |
637 | shrink += 2; | |
cc040812 | 638 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
639 | } |
640 | break; | |
641 | ||
642 | /* No other reloc types represent relaxing opportunities. */ | |
cc040812 NC |
643 | default: |
644 | break; | |
252b5132 RH |
645 | } |
646 | ||
647 | last_reloc = reloc; | |
648 | last_input_section = input_section; | |
649 | return shrink; | |
650 | } | |
651 | ||
252b5132 RH |
652 | /* Handle relocations for the H8/300, including relocs for relaxed |
653 | instructions. | |
654 | ||
655 | FIXME: Not all relocations check for overflow! */ | |
656 | ||
657 | static void | |
c6baf75e RS |
658 | h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info, |
659 | struct bfd_link_order *link_order, arelent *reloc, | |
660 | bfd_byte *data, unsigned int *src_ptr, | |
661 | unsigned int *dst_ptr) | |
252b5132 RH |
662 | { |
663 | unsigned int src_address = *src_ptr; | |
664 | unsigned int dst_address = *dst_ptr; | |
665 | asection *input_section = link_order->u.indirect.section; | |
666 | bfd_vma value; | |
667 | bfd_vma dot; | |
cc040812 | 668 | int gap, tmp; |
ca9a79a1 | 669 | unsigned char temp_code; |
252b5132 RH |
670 | |
671 | switch (reloc->howto->type) | |
672 | { | |
e804e836 | 673 | /* Generic 8-bit pc-relative relocation. */ |
252b5132 RH |
674 | case R_PCRBYTE: |
675 | /* Get the address of the target of this branch. */ | |
cc040812 | 676 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 | 677 | |
cc040812 NC |
678 | dot = (link_order->offset |
679 | + dst_address | |
252b5132 RH |
680 | + link_order->u.indirect.section->output_section->vma); |
681 | ||
682 | gap = value - dot; | |
683 | ||
684 | /* Sanity check. */ | |
685 | if (gap < -128 || gap > 126) | |
686 | { | |
687 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
688 | (link_info, NULL, |
689 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
690 | reloc->howto->name, reloc->addend, input_section->owner, |
691 | input_section, reloc->address))) | |
692 | abort (); | |
693 | } | |
694 | ||
695 | /* Everything looks OK. Apply the relocation and update the | |
696 | src/dst address appropriately. */ | |
252b5132 RH |
697 | bfd_put_8 (abfd, gap, data + dst_address); |
698 | dst_address++; | |
699 | src_address++; | |
700 | ||
701 | /* All done. */ | |
702 | break; | |
703 | ||
e804e836 | 704 | /* Generic 16-bit pc-relative relocation. */ |
252b5132 RH |
705 | case R_PCRWORD: |
706 | /* Get the address of the target of this branch. */ | |
cc040812 | 707 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
708 | |
709 | /* Get the address of the instruction (not the reloc). */ | |
5fcfd273 KH |
710 | dot = (link_order->offset |
711 | + dst_address | |
252b5132 RH |
712 | + link_order->u.indirect.section->output_section->vma + 1); |
713 | ||
714 | gap = value - dot; | |
715 | ||
716 | /* Sanity check. */ | |
717 | if (gap > 32766 || gap < -32768) | |
718 | { | |
719 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
720 | (link_info, NULL, |
721 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
722 | reloc->howto->name, reloc->addend, input_section->owner, |
723 | input_section, reloc->address))) | |
724 | abort (); | |
725 | } | |
726 | ||
727 | /* Everything looks OK. Apply the relocation and update the | |
728 | src/dst address appropriately. */ | |
dc810e39 | 729 | bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address); |
252b5132 RH |
730 | dst_address += 2; |
731 | src_address += 2; | |
732 | ||
733 | /* All done. */ | |
734 | break; | |
735 | ||
e804e836 | 736 | /* Generic 8-bit absolute relocation. */ |
252b5132 RH |
737 | case R_RELBYTE: |
738 | /* Get the address of the object referenced by this insn. */ | |
739 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
740 | ||
7a9823f1 RS |
741 | bfd_put_8 (abfd, value & 0xff, data + dst_address); |
742 | dst_address += 1; | |
743 | src_address += 1; | |
252b5132 RH |
744 | |
745 | /* All done. */ | |
746 | break; | |
747 | ||
e804e836 | 748 | /* Various simple 16-bit absolute relocations. */ |
252b5132 RH |
749 | case R_MOV16B1: |
750 | case R_JMP1: | |
751 | case R_RELWORD: | |
cc040812 | 752 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
753 | bfd_put_16 (abfd, value, data + dst_address); |
754 | dst_address += 2; | |
755 | src_address += 2; | |
756 | break; | |
757 | ||
e804e836 | 758 | /* Various simple 24-/32-bit absolute relocations. */ |
252b5132 RH |
759 | case R_MOV24B1: |
760 | case R_MOVL1: | |
761 | case R_RELLONG: | |
762 | /* Get the address of the target of this branch. */ | |
cc040812 | 763 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
764 | bfd_put_32 (abfd, value, data + dst_address); |
765 | dst_address += 4; | |
766 | src_address += 4; | |
767 | break; | |
768 | ||
e804e836 | 769 | /* Another 24-/32-bit absolute relocation. */ |
252b5132 RH |
770 | case R_JMPL1: |
771 | /* Get the address of the target of this branch. */ | |
772 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
773 | ||
774 | value = ((value & 0x00ffffff) | |
775 | | (bfd_get_32 (abfd, data + src_address) & 0xff000000)); | |
776 | bfd_put_32 (abfd, value, data + dst_address); | |
777 | dst_address += 4; | |
778 | src_address += 4; | |
779 | break; | |
780 | ||
7e89635a KH |
781 | /* This is a 24-/32-bit absolute address in one of the following |
782 | instructions: | |
783 | ||
784 | "band", "bclr", "biand", "bild", "bior", "bist", "bixor", | |
3255318a NC |
785 | "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w", |
786 | "stc.w" and "mov.[bwl]" | |
7e89635a KH |
787 | |
788 | We may relax this into an 16-bit absolute address if it's in | |
789 | the right range. */ | |
252b5132 RH |
790 | case R_MOVL2: |
791 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
7a9823f1 | 792 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 RH |
793 | |
794 | /* Sanity check. */ | |
7a9823f1 | 795 | if (value <= 0x7fff || value >= 0xffff8000u) |
252b5132 | 796 | { |
e804e836 | 797 | /* Insert the 16-bit value into the proper location. */ |
252b5132 RH |
798 | bfd_put_16 (abfd, value, data + dst_address); |
799 | ||
7e89635a KH |
800 | /* Fix the opcode. For all the instructions that belong to |
801 | this relaxation, we simply need to turn off bit 0x20 in | |
802 | the previous byte. */ | |
bc7eab72 | 803 | data[dst_address - 1] &= ~0x20; |
252b5132 RH |
804 | dst_address += 2; |
805 | src_address += 4; | |
806 | } | |
807 | else | |
808 | { | |
809 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
810 | (link_info, NULL, |
811 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
812 | reloc->howto->name, reloc->addend, input_section->owner, |
813 | input_section, reloc->address))) | |
814 | abort (); | |
bc7eab72 | 815 | } |
252b5132 RH |
816 | break; |
817 | ||
e804e836 | 818 | /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */ |
252b5132 RH |
819 | case R_JMP2: |
820 | /* Get the address of the target of this branch. */ | |
821 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
822 | ||
823 | /* Get the address of the next instruction. */ | |
824 | dot = (link_order->offset | |
825 | + dst_address | |
826 | + link_order->u.indirect.section->output_section->vma + 1); | |
827 | ||
828 | gap = value - dot; | |
829 | ||
830 | /* Sanity check. */ | |
831 | if (gap < -128 || gap > 126) | |
832 | { | |
833 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
834 | (link_info, NULL, |
835 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
836 | reloc->howto->name, reloc->addend, input_section->owner, |
837 | input_section, reloc->address))) | |
838 | abort (); | |
839 | } | |
840 | ||
841 | /* Now fix the instruction itself. */ | |
842 | switch (data[dst_address - 1]) | |
843 | { | |
844 | case 0x5e: | |
845 | /* jsr -> bsr */ | |
846 | bfd_put_8 (abfd, 0x55, data + dst_address - 1); | |
847 | break; | |
848 | case 0x5a: | |
7e89635a | 849 | /* jmp -> bra */ |
252b5132 RH |
850 | bfd_put_8 (abfd, 0x40, data + dst_address - 1); |
851 | break; | |
852 | ||
853 | default: | |
854 | abort (); | |
855 | } | |
856 | ||
e804e836 | 857 | /* Write out the 8-bit value. */ |
252b5132 RH |
858 | bfd_put_8 (abfd, gap, data + dst_address); |
859 | ||
860 | dst_address += 1; | |
861 | src_address += 3; | |
862 | ||
863 | break; | |
864 | ||
e804e836 | 865 | /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */ |
252b5132 RH |
866 | case R_PCRWORD_B: |
867 | /* Get the address of the target of this branch. */ | |
868 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
869 | ||
870 | /* Get the address of the instruction (not the reloc). */ | |
871 | dot = (link_order->offset | |
872 | + dst_address | |
873 | + link_order->u.indirect.section->output_section->vma - 1); | |
874 | ||
875 | gap = value - dot; | |
876 | ||
877 | /* Sanity check. */ | |
878 | if (gap < -128 || gap > 126) | |
879 | { | |
880 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
881 | (link_info, NULL, |
882 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
883 | reloc->howto->name, reloc->addend, input_section->owner, |
884 | input_section, reloc->address))) | |
885 | abort (); | |
886 | } | |
887 | ||
888 | /* Now fix the instruction. */ | |
889 | switch (data[dst_address - 2]) | |
890 | { | |
891 | case 0x58: | |
892 | /* bCC:16 -> bCC:8 */ | |
7e89635a KH |
893 | /* Get the second byte of the original insn, which contains |
894 | the condition code. */ | |
252b5132 | 895 | tmp = data[dst_address - 1]; |
7e89635a KH |
896 | |
897 | /* Compute the fisrt byte of the relaxed instruction. The | |
898 | original sequence 0x58 0xX0 is relaxed to 0x4X, where X | |
899 | represents the condition code. */ | |
252b5132 RH |
900 | tmp &= 0xf0; |
901 | tmp >>= 4; | |
252b5132 RH |
902 | tmp |= 0x40; |
903 | ||
904 | /* Write it. */ | |
905 | bfd_put_8 (abfd, tmp, data + dst_address - 2); | |
906 | break; | |
d562d2fb | 907 | |
4259e8b6 JL |
908 | case 0x5c: |
909 | /* bsr:16 -> bsr:8 */ | |
910 | bfd_put_8 (abfd, 0x55, data + dst_address - 2); | |
911 | break; | |
252b5132 RH |
912 | |
913 | default: | |
914 | abort (); | |
915 | } | |
916 | ||
bc7eab72 KH |
917 | /* Output the target. */ |
918 | bfd_put_8 (abfd, gap, data + dst_address - 1); | |
252b5132 | 919 | |
e804e836 | 920 | /* We don't advance dst_address -- the 8-bit reloc is applied at |
bc7eab72 KH |
921 | dst_address - 1, so the next insn should begin at dst_address. */ |
922 | src_address += 2; | |
252b5132 | 923 | |
bc7eab72 | 924 | break; |
5fcfd273 | 925 | |
e804e836 | 926 | /* Similarly for a 24-bit absolute that is now 8 bits. */ |
252b5132 RH |
927 | case R_JMPL2: |
928 | /* Get the address of the target of this branch. */ | |
929 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
930 | ||
931 | /* Get the address of the instruction (not the reloc). */ | |
932 | dot = (link_order->offset | |
933 | + dst_address | |
934 | + link_order->u.indirect.section->output_section->vma + 2); | |
935 | ||
936 | gap = value - dot; | |
937 | ||
938 | /* Fix the instruction. */ | |
939 | switch (data[src_address]) | |
940 | { | |
941 | case 0x5e: | |
942 | /* jsr -> bsr */ | |
943 | bfd_put_8 (abfd, 0x55, data + dst_address); | |
944 | break; | |
945 | case 0x5a: | |
946 | /* jmp ->bra */ | |
947 | bfd_put_8 (abfd, 0x40, data + dst_address); | |
948 | break; | |
949 | default: | |
950 | abort (); | |
951 | } | |
952 | ||
953 | bfd_put_8 (abfd, gap, data + dst_address + 1); | |
954 | dst_address += 2; | |
955 | src_address += 4; | |
956 | ||
957 | break; | |
958 | ||
630a7b0a KH |
959 | /* This is a 16-bit absolute address in one of the following |
960 | instructions: | |
961 | ||
962 | "band", "bclr", "biand", "bild", "bior", "bist", "bixor", | |
963 | "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and | |
964 | "mov.b" | |
965 | ||
966 | We may relax this into an 8-bit absolute address if it's in | |
967 | the right range. */ | |
252b5132 RH |
968 | case R_MOV16B2: |
969 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
970 | ||
630a7b0a | 971 | /* All instructions with R_H8_DIR16B2 start with 0x6a. */ |
252b5132 RH |
972 | if (data[dst_address - 2] != 0x6a) |
973 | abort (); | |
974 | ||
ca9a79a1 | 975 | temp_code = data[src_address - 1]; |
630a7b0a KH |
976 | |
977 | /* If this is a mov.b instruction, clear the lower nibble, which | |
978 | contains the source/destination register number. */ | |
ca9a79a1 NC |
979 | if ((temp_code & 0x10) != 0x10) |
980 | temp_code &= 0xf0; | |
981 | ||
252b5132 | 982 | /* Fix up the opcode. */ |
ca9a79a1 | 983 | switch (temp_code) |
252b5132 RH |
984 | { |
985 | case 0x00: | |
630a7b0a | 986 | /* This is mov.b @aa:16,Rd. */ |
cc040812 | 987 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; |
252b5132 RH |
988 | break; |
989 | case 0x80: | |
630a7b0a | 990 | /* This is mov.b Rs,@aa:16. */ |
cc040812 | 991 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; |
252b5132 | 992 | break; |
ca9a79a1 | 993 | case 0x18: |
630a7b0a KH |
994 | /* This is a bit-maniputation instruction that stores one |
995 | bit into memory, one of "bclr", "bist", "bnot", "bset", | |
996 | and "bst". */ | |
ca9a79a1 NC |
997 | data[dst_address - 2] = 0x7f; |
998 | break; | |
999 | case 0x10: | |
630a7b0a KH |
1000 | /* This is a bit-maniputation instruction that loads one bit |
1001 | from memory, one of "band", "biand", "bild", "bior", | |
1002 | "bixor", "bld", "bor", "btst", and "bxor". */ | |
ca9a79a1 NC |
1003 | data[dst_address - 2] = 0x7e; |
1004 | break; | |
252b5132 RH |
1005 | default: |
1006 | abort (); | |
1007 | } | |
1008 | ||
1009 | bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); | |
1010 | src_address += 2; | |
1011 | break; | |
1012 | ||
630a7b0a KH |
1013 | /* This is a 24-bit absolute address in one of the following |
1014 | instructions: | |
1015 | ||
1016 | "band", "bclr", "biand", "bild", "bior", "bist", "bixor", | |
1017 | "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and | |
1018 | "mov.b" | |
1019 | ||
1020 | We may relax this into an 8-bit absolute address if it's in | |
1021 | the right range. */ | |
252b5132 RH |
1022 | case R_MOV24B2: |
1023 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
1024 | ||
630a7b0a | 1025 | /* All instructions with R_MOV24B2 start with 0x6a. */ |
252b5132 RH |
1026 | if (data[dst_address - 2] != 0x6a) |
1027 | abort (); | |
1028 | ||
ca9a79a1 | 1029 | temp_code = data[src_address - 1]; |
630a7b0a KH |
1030 | |
1031 | /* If this is a mov.b instruction, clear the lower nibble, which | |
1032 | contains the source/destination register number. */ | |
ca9a79a1 NC |
1033 | if ((temp_code & 0x30) != 0x30) |
1034 | temp_code &= 0xf0; | |
1035 | ||
252b5132 | 1036 | /* Fix up the opcode. */ |
ca9a79a1 | 1037 | switch (temp_code) |
252b5132 RH |
1038 | { |
1039 | case 0x20: | |
630a7b0a | 1040 | /* This is mov.b @aa:24/32,Rd. */ |
cc040812 | 1041 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; |
252b5132 RH |
1042 | break; |
1043 | case 0xa0: | |
630a7b0a | 1044 | /* This is mov.b Rs,@aa:24/32. */ |
cc040812 | 1045 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; |
252b5132 | 1046 | break; |
ca9a79a1 | 1047 | case 0x38: |
630a7b0a KH |
1048 | /* This is a bit-maniputation instruction that stores one |
1049 | bit into memory, one of "bclr", "bist", "bnot", "bset", | |
1050 | and "bst". */ | |
ca9a79a1 NC |
1051 | data[dst_address - 2] = 0x7f; |
1052 | break; | |
1053 | case 0x30: | |
630a7b0a KH |
1054 | /* This is a bit-maniputation instruction that loads one bit |
1055 | from memory, one of "band", "biand", "bild", "bior", | |
1056 | "bixor", "bld", "bor", "btst", and "bxor". */ | |
ca9a79a1 NC |
1057 | data[dst_address - 2] = 0x7e; |
1058 | break; | |
252b5132 RH |
1059 | default: |
1060 | abort (); | |
1061 | } | |
1062 | ||
1063 | bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); | |
1064 | src_address += 4; | |
1065 | break; | |
1066 | ||
1067 | case R_BCC_INV: | |
1068 | /* Get the address of the target of this branch. */ | |
cc040812 | 1069 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 | 1070 | |
cc040812 NC |
1071 | dot = (link_order->offset |
1072 | + dst_address | |
252b5132 RH |
1073 | + link_order->u.indirect.section->output_section->vma) + 1; |
1074 | ||
1075 | gap = value - dot; | |
1076 | ||
1077 | /* Sanity check. */ | |
1078 | if (gap < -128 || gap > 126) | |
1079 | { | |
1080 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
1081 | (link_info, NULL, |
1082 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
1083 | reloc->howto->name, reloc->addend, input_section->owner, |
1084 | input_section, reloc->address))) | |
1085 | abort (); | |
1086 | } | |
1087 | ||
1088 | /* Everything looks OK. Fix the condition in the instruction, apply | |
1089 | the relocation, and update the src/dst address appropriately. */ | |
1090 | ||
1091 | bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1, | |
1092 | data + dst_address - 1); | |
1093 | bfd_put_8 (abfd, gap, data + dst_address); | |
1094 | dst_address++; | |
1095 | src_address++; | |
1096 | ||
1097 | /* All done. */ | |
1098 | break; | |
1099 | ||
1100 | case R_JMP_DEL: | |
1101 | src_address += 4; | |
1102 | break; | |
1103 | ||
e804e836 | 1104 | /* An 8-bit memory indirect instruction (jmp/jsr). |
252b5132 RH |
1105 | |
1106 | There's several things that need to be done to handle | |
1107 | this relocation. | |
1108 | ||
1109 | If this is a reloc against the absolute symbol, then | |
1110 | we should handle it just R_RELBYTE. Likewise if it's | |
1111 | for a symbol with a value ge 0 and le 0xff. | |
1112 | ||
1113 | Otherwise it's a jump/call through the function vector, | |
1114 | and the linker is expected to set up the function vector | |
1115 | and put the right value into the jump/call instruction. */ | |
1116 | case R_MEM_INDIRECT: | |
1117 | { | |
1118 | /* We need to find the symbol so we can determine it's | |
1119 | address in the function vector table. */ | |
1120 | asymbol *symbol; | |
252b5132 | 1121 | const char *name; |
dc810e39 | 1122 | struct funcvec_hash_table *ftab; |
252b5132 | 1123 | struct funcvec_hash_entry *h; |
0171ee92 AM |
1124 | struct h8300_coff_link_hash_table *htab; |
1125 | asection *vectors_sec; | |
1126 | ||
1127 | if (link_info->hash->creator != abfd->xvec) | |
1128 | { | |
1129 | (*_bfd_error_handler) | |
1130 | (_("cannot handle R_MEM_INDIRECT reloc when using %s output"), | |
1131 | link_info->hash->creator->name); | |
1132 | ||
1133 | /* What else can we do? This function doesn't allow return | |
1134 | of an error, and we don't want to call abort as that | |
1135 | indicates an internal error. */ | |
1136 | #ifndef EXIT_FAILURE | |
1137 | #define EXIT_FAILURE 1 | |
1138 | #endif | |
1139 | xexit (EXIT_FAILURE); | |
1140 | } | |
1141 | htab = h8300_coff_hash_table (link_info); | |
1142 | vectors_sec = htab->vectors_sec; | |
252b5132 RH |
1143 | |
1144 | /* First see if this is a reloc against the absolute symbol | |
1145 | or against a symbol with a nonnegative value <= 0xff. */ | |
1146 | symbol = *(reloc->sym_ptr_ptr); | |
1147 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
1148 | if (symbol == bfd_abs_section_ptr->symbol | |
5f771d47 | 1149 | || value <= 0xff) |
252b5132 RH |
1150 | { |
1151 | /* This should be handled in a manner very similar to | |
1152 | R_RELBYTES. If the value is in range, then just slam | |
1153 | the value into the right location. Else trigger a | |
1154 | reloc overflow callback. */ | |
5f771d47 | 1155 | if (value <= 0xff) |
252b5132 RH |
1156 | { |
1157 | bfd_put_8 (abfd, value, data + dst_address); | |
1158 | dst_address += 1; | |
1159 | src_address += 1; | |
1160 | } | |
1161 | else | |
1162 | { | |
1163 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
1164 | (link_info, NULL, |
1165 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
1166 | reloc->howto->name, reloc->addend, input_section->owner, |
1167 | input_section, reloc->address))) | |
1168 | abort (); | |
1169 | } | |
1170 | break; | |
1171 | } | |
1172 | ||
1173 | /* This is a jump/call through a function vector, and we're | |
5fcfd273 | 1174 | expected to create the function vector ourselves. |
252b5132 RH |
1175 | |
1176 | First look up this symbol in the linker hash table -- we need | |
1177 | the derived linker symbol which holds this symbol's index | |
1178 | in the function vector. */ | |
1179 | name = symbol->name; | |
1180 | if (symbol->flags & BSF_LOCAL) | |
1181 | { | |
dc810e39 | 1182 | char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9); |
d4e2de6b | 1183 | |
252b5132 RH |
1184 | if (new_name == NULL) |
1185 | abort (); | |
1186 | ||
1187 | strcpy (new_name, name); | |
1188 | sprintf (new_name + strlen (name), "_%08x", | |
cc040812 | 1189 | (int) symbol->section); |
252b5132 RH |
1190 | name = new_name; |
1191 | } | |
1192 | ||
0171ee92 | 1193 | ftab = htab->funcvec_hash_table; |
b34976b6 | 1194 | h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); |
252b5132 RH |
1195 | |
1196 | /* This shouldn't ever happen. If it does that means we've got | |
1197 | data corruption of some kind. Aborting seems like a reasonable | |
0171ee92 | 1198 | thing to do here. */ |
252b5132 RH |
1199 | if (h == NULL || vectors_sec == NULL) |
1200 | abort (); | |
1201 | ||
1202 | /* Place the address of the function vector entry into the | |
1203 | reloc's address. */ | |
1204 | bfd_put_8 (abfd, | |
1205 | vectors_sec->output_offset + h->offset, | |
1206 | data + dst_address); | |
1207 | ||
1208 | dst_address++; | |
1209 | src_address++; | |
1210 | ||
1211 | /* Now create an entry in the function vector itself. */ | |
d4e2de6b NC |
1212 | switch (bfd_get_mach (input_section->owner)) |
1213 | { | |
1214 | case bfd_mach_h8300: | |
1215 | case bfd_mach_h8300hn: | |
1216 | case bfd_mach_h8300sn: | |
1217 | bfd_put_16 (abfd, | |
1218 | bfd_coff_reloc16_get_value (reloc, | |
1219 | link_info, | |
1220 | input_section), | |
1221 | vectors_sec->contents + h->offset); | |
1222 | break; | |
1223 | case bfd_mach_h8300h: | |
1224 | case bfd_mach_h8300s: | |
1225 | bfd_put_32 (abfd, | |
1226 | bfd_coff_reloc16_get_value (reloc, | |
1227 | link_info, | |
1228 | input_section), | |
1229 | vectors_sec->contents + h->offset); | |
1230 | break; | |
1231 | default: | |
1232 | abort (); | |
1233 | } | |
252b5132 RH |
1234 | |
1235 | /* Gross. We've already written the contents of the vector section | |
1236 | before we get here... So we write it again with the new data. */ | |
1237 | bfd_set_section_contents (vectors_sec->output_section->owner, | |
1238 | vectors_sec->output_section, | |
1239 | vectors_sec->contents, | |
dc810e39 | 1240 | (file_ptr) vectors_sec->output_offset, |
eea6121a | 1241 | vectors_sec->size); |
252b5132 RH |
1242 | break; |
1243 | } | |
1244 | ||
1245 | default: | |
1246 | abort (); | |
1247 | break; | |
1248 | ||
1249 | } | |
1250 | ||
1251 | *src_ptr = src_address; | |
1252 | *dst_ptr = dst_address; | |
1253 | } | |
1254 | ||
252b5132 RH |
1255 | /* Routine for the h8300 linker. |
1256 | ||
1257 | This routine is necessary to handle the special R_MEM_INDIRECT | |
1258 | relocs on the h8300. It's responsible for generating a vectors | |
1259 | section and attaching it to an input bfd as well as sizing | |
1260 | the vectors section. It also creates our vectors hash table. | |
1261 | ||
1262 | It uses the generic linker routines to actually add the symbols. | |
1263 | from this BFD to the bfd linker hash table. It may add a few | |
1264 | selected static symbols to the bfd linker hash table. */ | |
1265 | ||
b34976b6 | 1266 | static bfd_boolean |
c6baf75e | 1267 | h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info) |
252b5132 RH |
1268 | { |
1269 | asection *sec; | |
1270 | struct funcvec_hash_table *funcvec_hash_table; | |
dc810e39 | 1271 | bfd_size_type amt; |
0171ee92 AM |
1272 | struct h8300_coff_link_hash_table *htab; |
1273 | ||
1274 | /* Add the symbols using the generic code. */ | |
1275 | _bfd_generic_link_add_symbols (abfd, info); | |
1276 | ||
1277 | if (info->hash->creator != abfd->xvec) | |
1278 | return TRUE; | |
1279 | ||
1280 | htab = h8300_coff_hash_table (info); | |
252b5132 RH |
1281 | |
1282 | /* If we haven't created a vectors section, do so now. */ | |
0171ee92 | 1283 | if (!htab->vectors_sec) |
252b5132 RH |
1284 | { |
1285 | flagword flags; | |
1286 | ||
1287 | /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */ | |
1288 | flags = (SEC_ALLOC | SEC_LOAD | |
1289 | | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY); | |
0171ee92 | 1290 | htab->vectors_sec = bfd_make_section (abfd, ".vectors"); |
252b5132 RH |
1291 | |
1292 | /* If the section wasn't created, or we couldn't set the flags, | |
0171ee92 AM |
1293 | quit quickly now, rather than dying a painful death later. */ |
1294 | if (!htab->vectors_sec | |
1295 | || !bfd_set_section_flags (abfd, htab->vectors_sec, flags)) | |
b34976b6 | 1296 | return FALSE; |
252b5132 RH |
1297 | |
1298 | /* Also create the vector hash table. */ | |
dc810e39 AM |
1299 | amt = sizeof (struct funcvec_hash_table); |
1300 | funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt); | |
252b5132 RH |
1301 | |
1302 | if (!funcvec_hash_table) | |
b34976b6 | 1303 | return FALSE; |
252b5132 RH |
1304 | |
1305 | /* And initialize the funcvec hash table. */ | |
1306 | if (!funcvec_hash_table_init (funcvec_hash_table, abfd, | |
1307 | funcvec_hash_newfunc)) | |
1308 | { | |
1309 | bfd_release (abfd, funcvec_hash_table); | |
b34976b6 | 1310 | return FALSE; |
252b5132 RH |
1311 | } |
1312 | ||
1313 | /* Store away a pointer to the funcvec hash table. */ | |
0171ee92 | 1314 | htab->funcvec_hash_table = funcvec_hash_table; |
252b5132 RH |
1315 | } |
1316 | ||
1317 | /* Load up the function vector hash table. */ | |
0171ee92 | 1318 | funcvec_hash_table = htab->funcvec_hash_table; |
252b5132 RH |
1319 | |
1320 | /* Now scan the relocs for all the sections in this bfd; create | |
1321 | additional space in the .vectors section as needed. */ | |
1322 | for (sec = abfd->sections; sec; sec = sec->next) | |
1323 | { | |
1324 | long reloc_size, reloc_count, i; | |
1325 | asymbol **symbols; | |
1326 | arelent **relocs; | |
1327 | ||
1328 | /* Suck in the relocs, symbols & canonicalize them. */ | |
1329 | reloc_size = bfd_get_reloc_upper_bound (abfd, sec); | |
1330 | if (reloc_size <= 0) | |
1331 | continue; | |
1332 | ||
dc810e39 | 1333 | relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size); |
252b5132 | 1334 | if (!relocs) |
b34976b6 | 1335 | return FALSE; |
252b5132 RH |
1336 | |
1337 | /* The symbols should have been read in by _bfd_generic link_add_symbols | |
1338 | call abovec, so we can cheat and use the pointer to them that was | |
1339 | saved in the above call. */ | |
1340 | symbols = _bfd_generic_link_get_symbols(abfd); | |
1341 | reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols); | |
1342 | if (reloc_count <= 0) | |
1343 | { | |
1344 | free (relocs); | |
1345 | continue; | |
1346 | } | |
1347 | ||
1348 | /* Now walk through all the relocations in this section. */ | |
1349 | for (i = 0; i < reloc_count; i++) | |
1350 | { | |
1351 | arelent *reloc = relocs[i]; | |
1352 | asymbol *symbol = *(reloc->sym_ptr_ptr); | |
1353 | const char *name; | |
1354 | ||
1355 | /* We've got an indirect reloc. See if we need to add it | |
1356 | to the function vector table. At this point, we have | |
1357 | to add a new entry for each unique symbol referenced | |
1358 | by an R_MEM_INDIRECT relocation except for a reloc | |
1359 | against the absolute section symbol. */ | |
1360 | if (reloc->howto->type == R_MEM_INDIRECT | |
1361 | && symbol != bfd_abs_section_ptr->symbol) | |
1362 | ||
1363 | { | |
dc810e39 | 1364 | struct funcvec_hash_table *ftab; |
252b5132 RH |
1365 | struct funcvec_hash_entry *h; |
1366 | ||
1367 | name = symbol->name; | |
1368 | if (symbol->flags & BSF_LOCAL) | |
1369 | { | |
dc810e39 | 1370 | char *new_name; |
252b5132 | 1371 | |
dc810e39 | 1372 | new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9); |
252b5132 RH |
1373 | if (new_name == NULL) |
1374 | abort (); | |
1375 | ||
1376 | strcpy (new_name, name); | |
1377 | sprintf (new_name + strlen (name), "_%08x", | |
cc040812 | 1378 | (int) symbol->section); |
252b5132 RH |
1379 | name = new_name; |
1380 | } | |
1381 | ||
1382 | /* Look this symbol up in the function vector hash table. */ | |
0171ee92 | 1383 | ftab = htab->funcvec_hash_table; |
b34976b6 | 1384 | h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); |
252b5132 | 1385 | |
252b5132 RH |
1386 | /* If this symbol isn't already in the hash table, add |
1387 | it and bump up the size of the hash table. */ | |
1388 | if (h == NULL) | |
1389 | { | |
b34976b6 | 1390 | h = funcvec_hash_lookup (ftab, name, TRUE, TRUE); |
252b5132 RH |
1391 | if (h == NULL) |
1392 | { | |
1393 | free (relocs); | |
b34976b6 | 1394 | return FALSE; |
252b5132 RH |
1395 | } |
1396 | ||
1397 | /* Bump the size of the vectors section. Each vector | |
1398 | takes 2 bytes on the h8300 and 4 bytes on the h8300h. */ | |
d4e2de6b NC |
1399 | switch (bfd_get_mach (abfd)) |
1400 | { | |
1401 | case bfd_mach_h8300: | |
1402 | case bfd_mach_h8300hn: | |
1403 | case bfd_mach_h8300sn: | |
eea6121a | 1404 | htab->vectors_sec->size += 2; |
d4e2de6b NC |
1405 | break; |
1406 | case bfd_mach_h8300h: | |
1407 | case bfd_mach_h8300s: | |
eea6121a | 1408 | htab->vectors_sec->size += 4; |
d4e2de6b NC |
1409 | break; |
1410 | default: | |
1411 | abort (); | |
1412 | } | |
252b5132 RH |
1413 | } |
1414 | } | |
1415 | } | |
1416 | ||
1417 | /* We're done with the relocations, release them. */ | |
1418 | free (relocs); | |
1419 | } | |
1420 | ||
1421 | /* Now actually allocate some space for the function vector. It's | |
1422 | wasteful to do this more than once, but this is easier. */ | |
0171ee92 | 1423 | sec = htab->vectors_sec; |
eea6121a | 1424 | if (sec->size != 0) |
252b5132 RH |
1425 | { |
1426 | /* Free the old contents. */ | |
dc810e39 AM |
1427 | if (sec->contents) |
1428 | free (sec->contents); | |
252b5132 RH |
1429 | |
1430 | /* Allocate new contents. */ | |
eea6121a | 1431 | sec->contents = bfd_malloc (sec->size); |
252b5132 RH |
1432 | } |
1433 | ||
b34976b6 | 1434 | return TRUE; |
252b5132 RH |
1435 | } |
1436 | ||
1437 | #define coff_reloc16_extra_cases h8300_reloc16_extra_cases | |
1438 | #define coff_reloc16_estimate h8300_reloc16_estimate | |
1439 | #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols | |
1440 | #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create | |
1441 | ||
1442 | #define COFF_LONG_FILENAMES | |
1443 | #include "coffcode.h" | |
1444 | ||
252b5132 RH |
1445 | #undef coff_bfd_get_relocated_section_contents |
1446 | #undef coff_bfd_relax_section | |
1447 | #define coff_bfd_get_relocated_section_contents \ | |
1448 | bfd_coff_reloc16_get_relocated_section_contents | |
1449 | #define coff_bfd_relax_section bfd_coff_reloc16_relax_section | |
1450 | ||
3fa78519 | 1451 | CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE) |