Commit | Line | Data |
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c2dcd04e | 1 | /* BFD back-end for Renesas H8/300 COFF binaries. |
7898deda | 2 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
2c3fc389 | 3 | 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2012 |
5f771d47 | 4 | Free Software Foundation, Inc. |
252b5132 RH |
5 | Written by Steve Chamberlain, <sac@cygnus.com>. |
6 | ||
e514ac71 | 7 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 8 | |
e514ac71 NC |
9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
cd123cb7 | 11 | the Free Software Foundation; either version 3 of the License, or |
e514ac71 | 12 | (at your option) any later version. |
252b5132 | 13 | |
e514ac71 NC |
14 | This program is distributed in the hope that it will be useful, |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
252b5132 | 18 | |
e514ac71 NC |
19 | You should have received a copy of the GNU General Public License |
20 | along with this program; if not, write to the Free Software | |
cd123cb7 NC |
21 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
22 | MA 02110-1301, USA. */ | |
252b5132 | 23 | |
252b5132 | 24 | #include "sysdep.h" |
3db64b00 | 25 | #include "bfd.h" |
252b5132 RH |
26 | #include "libbfd.h" |
27 | #include "bfdlink.h" | |
28 | #include "genlink.h" | |
29 | #include "coff/h8300.h" | |
30 | #include "coff/internal.h" | |
31 | #include "libcoff.h" | |
0171ee92 | 32 | #include "libiberty.h" |
252b5132 RH |
33 | |
34 | #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1) | |
35 | ||
36 | /* We derive a hash table from the basic BFD hash table to | |
5fcfd273 | 37 | hold entries in the function vector. Aside from the |
252b5132 RH |
38 | info stored by the basic hash table, we need the offset |
39 | of a particular entry within the hash table as well as | |
40 | the offset where we'll add the next entry. */ | |
41 | ||
42 | struct funcvec_hash_entry | |
f4ffd778 NC |
43 | { |
44 | /* The basic hash table entry. */ | |
45 | struct bfd_hash_entry root; | |
252b5132 | 46 | |
f4ffd778 NC |
47 | /* The offset within the vectors section where |
48 | this entry lives. */ | |
49 | bfd_vma offset; | |
50 | }; | |
252b5132 RH |
51 | |
52 | struct funcvec_hash_table | |
f4ffd778 NC |
53 | { |
54 | /* The basic hash table. */ | |
55 | struct bfd_hash_table root; | |
252b5132 | 56 | |
f4ffd778 | 57 | bfd *abfd; |
252b5132 | 58 | |
f4ffd778 NC |
59 | /* Offset at which we'll add the next entry. */ |
60 | unsigned int offset; | |
61 | }; | |
252b5132 | 62 | |
f4ffd778 | 63 | |
252b5132 RH |
64 | /* To lookup a value in the function vector hash table. */ |
65 | #define funcvec_hash_lookup(table, string, create, copy) \ | |
66 | ((struct funcvec_hash_entry *) \ | |
67 | bfd_hash_lookup (&(table)->root, (string), (create), (copy))) | |
68 | ||
69 | /* The derived h8300 COFF linker table. Note it's derived from | |
70 | the generic linker hash table, not the COFF backend linker hash | |
71 | table! We use this to attach additional data structures we | |
72 | need while linking on the h8300. */ | |
bc7eab72 | 73 | struct h8300_coff_link_hash_table { |
252b5132 RH |
74 | /* The main hash table. */ |
75 | struct generic_link_hash_table root; | |
76 | ||
77 | /* Section for the vectors table. This gets attached to a | |
78 | random input bfd, we keep it here for easy access. */ | |
79 | asection *vectors_sec; | |
80 | ||
81 | /* Hash table of the functions we need to enter into the function | |
82 | vector. */ | |
83 | struct funcvec_hash_table *funcvec_hash_table; | |
84 | }; | |
85 | ||
c6baf75e | 86 | static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *); |
252b5132 RH |
87 | |
88 | /* Get the H8/300 COFF linker hash table from a link_info structure. */ | |
89 | ||
90 | #define h8300_coff_hash_table(p) \ | |
91 | ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p)))) | |
92 | ||
93 | /* Initialize fields within a funcvec hash table entry. Called whenever | |
94 | a new entry is added to the funcvec hash table. */ | |
95 | ||
96 | static struct bfd_hash_entry * | |
c6baf75e RS |
97 | funcvec_hash_newfunc (struct bfd_hash_entry *entry, |
98 | struct bfd_hash_table *gen_table, | |
99 | const char *string) | |
252b5132 RH |
100 | { |
101 | struct funcvec_hash_entry *ret; | |
102 | struct funcvec_hash_table *table; | |
103 | ||
104 | ret = (struct funcvec_hash_entry *) entry; | |
105 | table = (struct funcvec_hash_table *) gen_table; | |
106 | ||
107 | /* Allocate the structure if it has not already been allocated by a | |
108 | subclass. */ | |
109 | if (ret == NULL) | |
110 | ret = ((struct funcvec_hash_entry *) | |
0171ee92 AM |
111 | bfd_hash_allocate (gen_table, |
112 | sizeof (struct funcvec_hash_entry))); | |
252b5132 RH |
113 | if (ret == NULL) |
114 | return NULL; | |
115 | ||
116 | /* Call the allocation method of the superclass. */ | |
117 | ret = ((struct funcvec_hash_entry *) | |
bc7eab72 | 118 | bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string)); |
252b5132 RH |
119 | |
120 | if (ret == NULL) | |
121 | return NULL; | |
122 | ||
123 | /* Note where this entry will reside in the function vector table. */ | |
124 | ret->offset = table->offset; | |
125 | ||
126 | /* Bump the offset at which we store entries in the function | |
127 | vector. We'd like to bump up the size of the vectors section, | |
128 | but it's not easily available here. */ | |
d4e2de6b NC |
129 | switch (bfd_get_mach (table->abfd)) |
130 | { | |
131 | case bfd_mach_h8300: | |
132 | case bfd_mach_h8300hn: | |
133 | case bfd_mach_h8300sn: | |
134 | table->offset += 2; | |
135 | break; | |
136 | case bfd_mach_h8300h: | |
137 | case bfd_mach_h8300s: | |
138 | table->offset += 4; | |
139 | break; | |
140 | default: | |
141 | return NULL; | |
142 | } | |
252b5132 RH |
143 | |
144 | /* Everything went OK. */ | |
145 | return (struct bfd_hash_entry *) ret; | |
146 | } | |
147 | ||
148 | /* Initialize the function vector hash table. */ | |
149 | ||
b34976b6 | 150 | static bfd_boolean |
c6baf75e RS |
151 | funcvec_hash_table_init (struct funcvec_hash_table *table, |
152 | bfd *abfd, | |
153 | struct bfd_hash_entry *(*newfunc) | |
154 | (struct bfd_hash_entry *, | |
155 | struct bfd_hash_table *, | |
66eb6687 AM |
156 | const char *), |
157 | unsigned int entsize) | |
252b5132 RH |
158 | { |
159 | /* Initialize our local fields, then call the generic initialization | |
160 | routine. */ | |
161 | table->offset = 0; | |
162 | table->abfd = abfd; | |
66eb6687 | 163 | return (bfd_hash_table_init (&table->root, newfunc, entsize)); |
252b5132 RH |
164 | } |
165 | ||
166 | /* Create the derived linker hash table. We use a derived hash table | |
19852a2a | 167 | basically to hold "static" information during an H8/300 coff link |
252b5132 RH |
168 | without using static variables. */ |
169 | ||
170 | static struct bfd_link_hash_table * | |
c6baf75e | 171 | h8300_coff_link_hash_table_create (bfd *abfd) |
252b5132 RH |
172 | { |
173 | struct h8300_coff_link_hash_table *ret; | |
dc810e39 AM |
174 | bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table); |
175 | ||
e2d34d7d | 176 | ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt); |
252b5132 RH |
177 | if (ret == NULL) |
178 | return NULL; | |
dc810e39 | 179 | if (!_bfd_link_hash_table_init (&ret->root.root, abfd, |
66eb6687 AM |
180 | _bfd_generic_link_hash_newfunc, |
181 | sizeof (struct generic_link_hash_entry))) | |
252b5132 | 182 | { |
e2d34d7d | 183 | free (ret); |
252b5132 RH |
184 | return NULL; |
185 | } | |
186 | ||
187 | /* Initialize our data. */ | |
188 | ret->vectors_sec = NULL; | |
189 | ret->funcvec_hash_table = NULL; | |
190 | ||
2ab1486e | 191 | /* OK. Everything's initialized, return the base pointer. */ |
252b5132 RH |
192 | return &ret->root.root; |
193 | } | |
194 | ||
cc040812 | 195 | /* Special handling for H8/300 relocs. |
252b5132 RH |
196 | We only come here for pcrel stuff and return normally if not an -r link. |
197 | When doing -r, we can't do any arithmetic for the pcrel stuff, because | |
198 | the code in reloc.c assumes that we can manipulate the targets of | |
5fcfd273 | 199 | the pcrel branches. This isn't so, since the H8/300 can do relaxing, |
252b5132 | 200 | which means that the gap after the instruction may not be enough to |
d562d2fb | 201 | contain the offset required for the branch, so we have to use only |
cc040812 | 202 | the addend until the final link. */ |
252b5132 RH |
203 | |
204 | static bfd_reloc_status_type | |
2c3fc389 NC |
205 | special (bfd * abfd ATTRIBUTE_UNUSED, |
206 | arelent * reloc_entry ATTRIBUTE_UNUSED, | |
207 | asymbol * symbol ATTRIBUTE_UNUSED, | |
208 | void * data ATTRIBUTE_UNUSED, | |
209 | asection * input_section ATTRIBUTE_UNUSED, | |
210 | bfd * output_bfd, | |
211 | char ** error_message ATTRIBUTE_UNUSED) | |
252b5132 RH |
212 | { |
213 | if (output_bfd == (bfd *) NULL) | |
214 | return bfd_reloc_continue; | |
215 | ||
d562d2fb AM |
216 | /* Adjust the reloc address to that in the output section. */ |
217 | reloc_entry->address += input_section->output_offset; | |
252b5132 RH |
218 | return bfd_reloc_ok; |
219 | } | |
220 | ||
2c3fc389 NC |
221 | static reloc_howto_type howto_table[] = |
222 | { | |
b34976b6 AM |
223 | HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE), |
224 | HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
225 | HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE), | |
226 | HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE), | |
227 | HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE), | |
228 | HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE), | |
229 | HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
230 | HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE), | |
231 | HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
232 | HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE), | |
233 | HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE), | |
234 | HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE), | |
235 | HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE), | |
236 | HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE), | |
252b5132 RH |
237 | |
238 | /* An indirect reference to a function. This causes the function's address | |
239 | to be added to the function vector in lo-mem and puts the address of | |
240 | the function vector's entry in the jsr instruction. */ | |
b34976b6 | 241 | HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE), |
252b5132 | 242 | |
e804e836 KH |
243 | /* Internal reloc for relaxing. This is created when a 16-bit pc-relative |
244 | branch is turned into an 8-bit pc-relative branch. */ | |
b34976b6 | 245 | HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE), |
252b5132 | 246 | |
b34976b6 | 247 | HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE), |
252b5132 | 248 | |
b34976b6 | 249 | HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE), |
252b5132 | 250 | |
b34976b6 | 251 | HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE), |
252b5132 | 252 | |
b34976b6 | 253 | HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE), |
252b5132 RH |
254 | }; |
255 | ||
cc040812 | 256 | /* Turn a howto into a reloc number. */ |
252b5132 RH |
257 | |
258 | #define SELECT_RELOC(x,howto) \ | |
bc7eab72 | 259 | { x.r_type = select_reloc (howto); } |
252b5132 | 260 | |
8d9cd6b1 NC |
261 | #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \ |
262 | && H8300HNBADMAG(x) && H8300SNBADMAG(x)) | |
263 | #define H8300 1 /* Customize coffcode.h */ | |
252b5132 RH |
264 | #define __A_MAGIC_SET__ |
265 | ||
cc040812 | 266 | /* Code to swap in the reloc. */ |
dc810e39 AM |
267 | #define SWAP_IN_RELOC_OFFSET H_GET_32 |
268 | #define SWAP_OUT_RELOC_OFFSET H_PUT_32 | |
252b5132 RH |
269 | #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ |
270 | dst->r_stuff[0] = 'S'; \ | |
271 | dst->r_stuff[1] = 'C'; | |
272 | ||
252b5132 | 273 | static int |
c6baf75e | 274 | select_reloc (reloc_howto_type *howto) |
252b5132 RH |
275 | { |
276 | return howto->type; | |
277 | } | |
278 | ||
cc040812 | 279 | /* Code to turn a r_type into a howto ptr, uses the above howto table. */ |
252b5132 RH |
280 | |
281 | static void | |
c6baf75e | 282 | rtype2howto (arelent *internal, struct internal_reloc *dst) |
252b5132 RH |
283 | { |
284 | switch (dst->r_type) | |
285 | { | |
286 | case R_RELBYTE: | |
287 | internal->howto = howto_table + 0; | |
288 | break; | |
289 | case R_RELWORD: | |
290 | internal->howto = howto_table + 1; | |
291 | break; | |
292 | case R_RELLONG: | |
293 | internal->howto = howto_table + 2; | |
294 | break; | |
295 | case R_PCRBYTE: | |
296 | internal->howto = howto_table + 3; | |
297 | break; | |
298 | case R_PCRWORD: | |
299 | internal->howto = howto_table + 4; | |
300 | break; | |
301 | case R_PCRLONG: | |
302 | internal->howto = howto_table + 5; | |
303 | break; | |
304 | case R_MOV16B1: | |
305 | internal->howto = howto_table + 6; | |
306 | break; | |
307 | case R_MOV16B2: | |
308 | internal->howto = howto_table + 7; | |
309 | break; | |
310 | case R_JMP1: | |
311 | internal->howto = howto_table + 8; | |
312 | break; | |
313 | case R_JMP2: | |
314 | internal->howto = howto_table + 9; | |
315 | break; | |
316 | case R_JMPL1: | |
317 | internal->howto = howto_table + 10; | |
318 | break; | |
319 | case R_JMPL2: | |
320 | internal->howto = howto_table + 11; | |
321 | break; | |
322 | case R_MOV24B1: | |
323 | internal->howto = howto_table + 12; | |
324 | break; | |
325 | case R_MOV24B2: | |
326 | internal->howto = howto_table + 13; | |
327 | break; | |
328 | case R_MEM_INDIRECT: | |
329 | internal->howto = howto_table + 14; | |
330 | break; | |
331 | case R_PCRWORD_B: | |
332 | internal->howto = howto_table + 15; | |
333 | break; | |
334 | case R_MOVL1: | |
335 | internal->howto = howto_table + 16; | |
336 | break; | |
337 | case R_MOVL2: | |
338 | internal->howto = howto_table + 17; | |
339 | break; | |
340 | case R_BCC_INV: | |
341 | internal->howto = howto_table + 18; | |
342 | break; | |
343 | case R_JMP_DEL: | |
344 | internal->howto = howto_table + 19; | |
345 | break; | |
346 | default: | |
347 | abort (); | |
348 | break; | |
349 | } | |
350 | } | |
351 | ||
bc7eab72 | 352 | #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry) |
252b5132 | 353 | |
cc040812 | 354 | /* Perform any necessary magic to the addend in a reloc entry. */ |
252b5132 RH |
355 | |
356 | #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \ | |
bc7eab72 | 357 | cache_ptr->addend = ext_reloc.r_offset; |
252b5132 | 358 | |
252b5132 | 359 | #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \ |
bc7eab72 | 360 | reloc_processing (relent, reloc, symbols, abfd, section) |
252b5132 RH |
361 | |
362 | static void | |
c6baf75e RS |
363 | reloc_processing (arelent *relent, struct internal_reloc *reloc, |
364 | asymbol **symbols, bfd *abfd, asection *section) | |
252b5132 RH |
365 | { |
366 | relent->address = reloc->r_vaddr; | |
367 | rtype2howto (relent, reloc); | |
368 | ||
369 | if (((int) reloc->r_symndx) > 0) | |
2ab1486e | 370 | relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx]; |
252b5132 | 371 | else |
2ab1486e | 372 | relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; |
252b5132 | 373 | |
252b5132 | 374 | relent->addend = reloc->r_offset; |
252b5132 | 375 | relent->address -= section->vma; |
252b5132 RH |
376 | } |
377 | ||
b34976b6 | 378 | static bfd_boolean |
c6baf75e | 379 | h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address) |
252b5132 RH |
380 | { |
381 | asymbol **s; | |
382 | ||
383 | s = _bfd_generic_link_get_symbols (abfd); | |
384 | BFD_ASSERT (s != (asymbol **) NULL); | |
385 | ||
386 | /* Search all the symbols for one in INPUT_SECTION with | |
387 | address ADDRESS. */ | |
cc040812 | 388 | while (*s) |
252b5132 RH |
389 | { |
390 | asymbol *p = *s; | |
2ab1486e | 391 | |
252b5132 RH |
392 | if (p->section == input_section |
393 | && (input_section->output_section->vma | |
394 | + input_section->output_offset | |
395 | + p->value) == address) | |
b34976b6 | 396 | return TRUE; |
252b5132 | 397 | s++; |
cc040812 | 398 | } |
b34976b6 | 399 | return FALSE; |
252b5132 RH |
400 | } |
401 | ||
252b5132 RH |
402 | /* If RELOC represents a relaxable instruction/reloc, change it into |
403 | the relaxed reloc, notify the linker that symbol addresses | |
404 | have changed (bfd_perform_slip) and return how much the current | |
405 | section has shrunk by. | |
406 | ||
407 | FIXME: Much of this code has knowledge of the ordering of entries | |
408 | in the howto table. This needs to be fixed. */ | |
409 | ||
410 | static int | |
c6baf75e RS |
411 | h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc, |
412 | unsigned int shrink, struct bfd_link_info *link_info) | |
252b5132 | 413 | { |
cc040812 | 414 | bfd_vma value; |
252b5132 RH |
415 | bfd_vma dot; |
416 | bfd_vma gap; | |
417 | static asection *last_input_section = NULL; | |
418 | static arelent *last_reloc = NULL; | |
419 | ||
5fcfd273 | 420 | /* The address of the thing to be relocated will have moved back by |
252b5132 RH |
421 | the size of the shrink - but we don't change reloc->address here, |
422 | since we need it to know where the relocation lives in the source | |
423 | uncooked section. */ | |
424 | bfd_vma address = reloc->address - shrink; | |
425 | ||
426 | if (input_section != last_input_section) | |
427 | last_reloc = NULL; | |
428 | ||
429 | /* Only examine the relocs which might be relaxable. */ | |
430 | switch (reloc->howto->type) | |
5fcfd273 | 431 | { |
e804e836 KH |
432 | /* This is the 16-/24-bit absolute branch which could become an |
433 | 8-bit pc-relative branch. */ | |
252b5132 RH |
434 | case R_JMP1: |
435 | case R_JMPL1: | |
436 | /* Get the address of the target of this branch. */ | |
cc040812 | 437 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
438 | |
439 | /* Get the address of the next instruction (not the reloc). */ | |
440 | dot = (input_section->output_section->vma | |
441 | + input_section->output_offset + address); | |
442 | ||
443 | /* Adjust for R_JMP1 vs R_JMPL1. */ | |
444 | dot += (reloc->howto->type == R_JMP1 ? 1 : 2); | |
445 | ||
446 | /* Compute the distance from this insn to the branch target. */ | |
447 | gap = value - dot; | |
cc040812 | 448 | |
252b5132 RH |
449 | /* If the distance is within -128..+128 inclusive, then we can relax |
450 | this jump. +128 is valid since the target will move two bytes | |
451 | closer if we do relax this branch. */ | |
bc7eab72 | 452 | if ((int) gap >= -128 && (int) gap <= 128) |
5fcfd273 | 453 | { |
e514ac71 NC |
454 | bfd_byte code; |
455 | ||
456 | if (!bfd_get_section_contents (abfd, input_section, & code, | |
457 | reloc->address, 1)) | |
458 | break; | |
459 | code = bfd_get_8 (abfd, & code); | |
460 | ||
252b5132 RH |
461 | /* It's possible we may be able to eliminate this branch entirely; |
462 | if the previous instruction is a branch around this instruction, | |
463 | and there's no label at this instruction, then we can reverse | |
464 | the condition on the previous branch and eliminate this jump. | |
465 | ||
466 | original: new: | |
467 | bCC lab1 bCC' lab2 | |
468 | jmp lab2 | |
469 | lab1: lab1: | |
5fcfd273 | 470 | |
252b5132 | 471 | This saves 4 bytes instead of two, and should be relatively |
e514ac71 NC |
472 | common. |
473 | ||
474 | Only perform this optimisation for jumps (code 0x5a) not | |
475 | subroutine calls, as otherwise it could transform: | |
b34976b6 | 476 | |
0171ee92 AM |
477 | mov.w r0,r0 |
478 | beq .L1 | |
479 | jsr @_bar | |
480 | .L1: rts | |
481 | _bar: rts | |
e514ac71 | 482 | into: |
0171ee92 AM |
483 | mov.w r0,r0 |
484 | bne _bar | |
485 | rts | |
486 | _bar: rts | |
b34976b6 | 487 | |
e514ac71 NC |
488 | which changes the call (jsr) into a branch (bne). */ |
489 | if (code == 0x5a | |
490 | && gap <= 126 | |
252b5132 RH |
491 | && last_reloc |
492 | && last_reloc->howto->type == R_PCRBYTE) | |
493 | { | |
494 | bfd_vma last_value; | |
495 | last_value = bfd_coff_reloc16_get_value (last_reloc, link_info, | |
496 | input_section) + 1; | |
497 | ||
498 | if (last_value == dot + 2 | |
499 | && last_reloc->address + 1 == reloc->address | |
cc040812 | 500 | && !h8300_symbol_address_p (abfd, input_section, dot - 2)) |
252b5132 RH |
501 | { |
502 | reloc->howto = howto_table + 19; | |
503 | last_reloc->howto = howto_table + 18; | |
504 | last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr; | |
505 | last_reloc->addend = reloc->addend; | |
506 | shrink += 4; | |
507 | bfd_perform_slip (abfd, 4, input_section, address); | |
508 | break; | |
509 | } | |
510 | } | |
511 | ||
512 | /* Change the reloc type. */ | |
cc040812 | 513 | reloc->howto = reloc->howto + 1; |
252b5132 RH |
514 | |
515 | /* This shrinks this section by two bytes. */ | |
516 | shrink += 2; | |
cc040812 | 517 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
518 | } |
519 | break; | |
520 | ||
e804e836 | 521 | /* This is the 16-bit pc-relative branch which could become an 8-bit |
252b5132 RH |
522 | pc-relative branch. */ |
523 | case R_PCRWORD: | |
524 | /* Get the address of the target of this branch, add one to the value | |
0171ee92 | 525 | because the addend field in PCrel jumps is off by -1. */ |
cc040812 NC |
526 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1; |
527 | ||
252b5132 RH |
528 | /* Get the address of the next instruction if we were to relax. */ |
529 | dot = input_section->output_section->vma + | |
530 | input_section->output_offset + address; | |
cc040812 | 531 | |
252b5132 RH |
532 | /* Compute the distance from this insn to the branch target. */ |
533 | gap = value - dot; | |
534 | ||
535 | /* If the distance is within -128..+128 inclusive, then we can relax | |
536 | this jump. +128 is valid since the target will move two bytes | |
537 | closer if we do relax this branch. */ | |
bc7eab72 | 538 | if ((int) gap >= -128 && (int) gap <= 128) |
5fcfd273 | 539 | { |
252b5132 RH |
540 | /* Change the reloc type. */ |
541 | reloc->howto = howto_table + 15; | |
542 | ||
543 | /* This shrinks this section by two bytes. */ | |
544 | shrink += 2; | |
cc040812 | 545 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
546 | } |
547 | break; | |
548 | ||
e804e836 KH |
549 | /* This is a 16-bit absolute address in a mov.b insn, which can |
550 | become an 8-bit absolute address if it's in the right range. */ | |
252b5132 RH |
551 | case R_MOV16B1: |
552 | /* Get the address of the data referenced by this mov.b insn. */ | |
cc040812 | 553 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
7a9823f1 | 554 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 | 555 | |
7a9823f1 RS |
556 | /* If the address is in the top 256 bytes of the address space |
557 | then we can relax this instruction. */ | |
558 | if (value >= 0xffffff00u) | |
252b5132 RH |
559 | { |
560 | /* Change the reloc type. */ | |
561 | reloc->howto = reloc->howto + 1; | |
562 | ||
563 | /* This shrinks this section by two bytes. */ | |
564 | shrink += 2; | |
cc040812 | 565 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
566 | } |
567 | break; | |
568 | ||
e804e836 KH |
569 | /* Similarly for a 24-bit absolute address in a mov.b. Note that |
570 | if we can't relax this into an 8-bit absolute, we'll fall through | |
571 | and try to relax it into a 16-bit absolute. */ | |
252b5132 RH |
572 | case R_MOV24B1: |
573 | /* Get the address of the data referenced by this mov.b insn. */ | |
cc040812 | 574 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
7a9823f1 | 575 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 | 576 | |
7a9823f1 | 577 | if (value >= 0xffffff00u) |
252b5132 RH |
578 | { |
579 | /* Change the reloc type. */ | |
580 | reloc->howto = reloc->howto + 1; | |
581 | ||
582 | /* This shrinks this section by four bytes. */ | |
583 | shrink += 4; | |
cc040812 | 584 | bfd_perform_slip (abfd, 4, input_section, address); |
252b5132 RH |
585 | |
586 | /* Done with this reloc. */ | |
587 | break; | |
588 | } | |
589 | ||
e804e836 | 590 | /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit |
252b5132 RH |
591 | reloc. */ |
592 | ||
e804e836 KH |
593 | /* This is a 24-/32-bit absolute address in a mov insn, which can |
594 | become an 16-bit absolute address if it's in the right range. */ | |
252b5132 RH |
595 | case R_MOVL1: |
596 | /* Get the address of the data referenced by this mov insn. */ | |
cc040812 | 597 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
7a9823f1 | 598 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 | 599 | |
7a9823f1 RS |
600 | /* If the address is a sign-extended 16-bit value then we can |
601 | relax this instruction. */ | |
602 | if (value <= 0x7fff || value >= 0xffff8000u) | |
252b5132 RH |
603 | { |
604 | /* Change the reloc type. */ | |
605 | reloc->howto = howto_table + 17; | |
606 | ||
607 | /* This shrinks this section by two bytes. */ | |
608 | shrink += 2; | |
cc040812 | 609 | bfd_perform_slip (abfd, 2, input_section, address); |
252b5132 RH |
610 | } |
611 | break; | |
612 | ||
613 | /* No other reloc types represent relaxing opportunities. */ | |
cc040812 NC |
614 | default: |
615 | break; | |
252b5132 RH |
616 | } |
617 | ||
618 | last_reloc = reloc; | |
619 | last_input_section = input_section; | |
620 | return shrink; | |
621 | } | |
622 | ||
252b5132 RH |
623 | /* Handle relocations for the H8/300, including relocs for relaxed |
624 | instructions. | |
625 | ||
626 | FIXME: Not all relocations check for overflow! */ | |
627 | ||
628 | static void | |
c6baf75e RS |
629 | h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info, |
630 | struct bfd_link_order *link_order, arelent *reloc, | |
631 | bfd_byte *data, unsigned int *src_ptr, | |
632 | unsigned int *dst_ptr) | |
252b5132 RH |
633 | { |
634 | unsigned int src_address = *src_ptr; | |
635 | unsigned int dst_address = *dst_ptr; | |
636 | asection *input_section = link_order->u.indirect.section; | |
637 | bfd_vma value; | |
638 | bfd_vma dot; | |
cc040812 | 639 | int gap, tmp; |
ca9a79a1 | 640 | unsigned char temp_code; |
252b5132 RH |
641 | |
642 | switch (reloc->howto->type) | |
643 | { | |
e804e836 | 644 | /* Generic 8-bit pc-relative relocation. */ |
252b5132 RH |
645 | case R_PCRBYTE: |
646 | /* Get the address of the target of this branch. */ | |
cc040812 | 647 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 | 648 | |
44da2da1 | 649 | dot = (input_section->output_offset |
cc040812 | 650 | + dst_address |
252b5132 RH |
651 | + link_order->u.indirect.section->output_section->vma); |
652 | ||
653 | gap = value - dot; | |
654 | ||
655 | /* Sanity check. */ | |
656 | if (gap < -128 || gap > 126) | |
657 | { | |
658 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
659 | (link_info, NULL, |
660 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
661 | reloc->howto->name, reloc->addend, input_section->owner, |
662 | input_section, reloc->address))) | |
663 | abort (); | |
664 | } | |
665 | ||
666 | /* Everything looks OK. Apply the relocation and update the | |
667 | src/dst address appropriately. */ | |
252b5132 RH |
668 | bfd_put_8 (abfd, gap, data + dst_address); |
669 | dst_address++; | |
670 | src_address++; | |
671 | ||
672 | /* All done. */ | |
673 | break; | |
674 | ||
e804e836 | 675 | /* Generic 16-bit pc-relative relocation. */ |
252b5132 RH |
676 | case R_PCRWORD: |
677 | /* Get the address of the target of this branch. */ | |
cc040812 | 678 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
679 | |
680 | /* Get the address of the instruction (not the reloc). */ | |
44da2da1 | 681 | dot = (input_section->output_offset |
5fcfd273 | 682 | + dst_address |
252b5132 RH |
683 | + link_order->u.indirect.section->output_section->vma + 1); |
684 | ||
685 | gap = value - dot; | |
686 | ||
687 | /* Sanity check. */ | |
688 | if (gap > 32766 || gap < -32768) | |
689 | { | |
690 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
691 | (link_info, NULL, |
692 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
693 | reloc->howto->name, reloc->addend, input_section->owner, |
694 | input_section, reloc->address))) | |
695 | abort (); | |
696 | } | |
697 | ||
698 | /* Everything looks OK. Apply the relocation and update the | |
699 | src/dst address appropriately. */ | |
dc810e39 | 700 | bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address); |
252b5132 RH |
701 | dst_address += 2; |
702 | src_address += 2; | |
703 | ||
704 | /* All done. */ | |
705 | break; | |
706 | ||
e804e836 | 707 | /* Generic 8-bit absolute relocation. */ |
252b5132 RH |
708 | case R_RELBYTE: |
709 | /* Get the address of the object referenced by this insn. */ | |
710 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
711 | ||
7a9823f1 RS |
712 | bfd_put_8 (abfd, value & 0xff, data + dst_address); |
713 | dst_address += 1; | |
714 | src_address += 1; | |
252b5132 RH |
715 | |
716 | /* All done. */ | |
717 | break; | |
718 | ||
e804e836 | 719 | /* Various simple 16-bit absolute relocations. */ |
252b5132 RH |
720 | case R_MOV16B1: |
721 | case R_JMP1: | |
722 | case R_RELWORD: | |
cc040812 | 723 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
724 | bfd_put_16 (abfd, value, data + dst_address); |
725 | dst_address += 2; | |
726 | src_address += 2; | |
727 | break; | |
728 | ||
e804e836 | 729 | /* Various simple 24-/32-bit absolute relocations. */ |
252b5132 RH |
730 | case R_MOV24B1: |
731 | case R_MOVL1: | |
732 | case R_RELLONG: | |
733 | /* Get the address of the target of this branch. */ | |
cc040812 | 734 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 RH |
735 | bfd_put_32 (abfd, value, data + dst_address); |
736 | dst_address += 4; | |
737 | src_address += 4; | |
738 | break; | |
739 | ||
e804e836 | 740 | /* Another 24-/32-bit absolute relocation. */ |
252b5132 RH |
741 | case R_JMPL1: |
742 | /* Get the address of the target of this branch. */ | |
743 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
744 | ||
745 | value = ((value & 0x00ffffff) | |
746 | | (bfd_get_32 (abfd, data + src_address) & 0xff000000)); | |
747 | bfd_put_32 (abfd, value, data + dst_address); | |
748 | dst_address += 4; | |
749 | src_address += 4; | |
750 | break; | |
751 | ||
7e89635a KH |
752 | /* This is a 24-/32-bit absolute address in one of the following |
753 | instructions: | |
754 | ||
755 | "band", "bclr", "biand", "bild", "bior", "bist", "bixor", | |
3255318a NC |
756 | "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w", |
757 | "stc.w" and "mov.[bwl]" | |
7e89635a KH |
758 | |
759 | We may relax this into an 16-bit absolute address if it's in | |
760 | the right range. */ | |
252b5132 RH |
761 | case R_MOVL2: |
762 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
7a9823f1 | 763 | value = bfd_h8300_pad_address (abfd, value); |
252b5132 RH |
764 | |
765 | /* Sanity check. */ | |
7a9823f1 | 766 | if (value <= 0x7fff || value >= 0xffff8000u) |
252b5132 | 767 | { |
e804e836 | 768 | /* Insert the 16-bit value into the proper location. */ |
252b5132 RH |
769 | bfd_put_16 (abfd, value, data + dst_address); |
770 | ||
7e89635a KH |
771 | /* Fix the opcode. For all the instructions that belong to |
772 | this relaxation, we simply need to turn off bit 0x20 in | |
773 | the previous byte. */ | |
bc7eab72 | 774 | data[dst_address - 1] &= ~0x20; |
252b5132 RH |
775 | dst_address += 2; |
776 | src_address += 4; | |
777 | } | |
778 | else | |
779 | { | |
780 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
781 | (link_info, NULL, |
782 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
783 | reloc->howto->name, reloc->addend, input_section->owner, |
784 | input_section, reloc->address))) | |
785 | abort (); | |
bc7eab72 | 786 | } |
252b5132 RH |
787 | break; |
788 | ||
e804e836 | 789 | /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */ |
252b5132 RH |
790 | case R_JMP2: |
791 | /* Get the address of the target of this branch. */ | |
792 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
793 | ||
794 | /* Get the address of the next instruction. */ | |
44da2da1 | 795 | dot = (input_section->output_offset |
252b5132 RH |
796 | + dst_address |
797 | + link_order->u.indirect.section->output_section->vma + 1); | |
798 | ||
799 | gap = value - dot; | |
800 | ||
801 | /* Sanity check. */ | |
802 | if (gap < -128 || gap > 126) | |
803 | { | |
804 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
805 | (link_info, NULL, |
806 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
807 | reloc->howto->name, reloc->addend, input_section->owner, |
808 | input_section, reloc->address))) | |
809 | abort (); | |
810 | } | |
811 | ||
812 | /* Now fix the instruction itself. */ | |
813 | switch (data[dst_address - 1]) | |
814 | { | |
815 | case 0x5e: | |
816 | /* jsr -> bsr */ | |
817 | bfd_put_8 (abfd, 0x55, data + dst_address - 1); | |
818 | break; | |
819 | case 0x5a: | |
7e89635a | 820 | /* jmp -> bra */ |
252b5132 RH |
821 | bfd_put_8 (abfd, 0x40, data + dst_address - 1); |
822 | break; | |
823 | ||
824 | default: | |
825 | abort (); | |
826 | } | |
827 | ||
e804e836 | 828 | /* Write out the 8-bit value. */ |
252b5132 RH |
829 | bfd_put_8 (abfd, gap, data + dst_address); |
830 | ||
831 | dst_address += 1; | |
832 | src_address += 3; | |
833 | ||
834 | break; | |
835 | ||
e804e836 | 836 | /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */ |
252b5132 RH |
837 | case R_PCRWORD_B: |
838 | /* Get the address of the target of this branch. */ | |
839 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
840 | ||
841 | /* Get the address of the instruction (not the reloc). */ | |
44da2da1 | 842 | dot = (input_section->output_offset |
252b5132 RH |
843 | + dst_address |
844 | + link_order->u.indirect.section->output_section->vma - 1); | |
845 | ||
846 | gap = value - dot; | |
847 | ||
848 | /* Sanity check. */ | |
849 | if (gap < -128 || gap > 126) | |
850 | { | |
851 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
852 | (link_info, NULL, |
853 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
854 | reloc->howto->name, reloc->addend, input_section->owner, |
855 | input_section, reloc->address))) | |
856 | abort (); | |
857 | } | |
858 | ||
859 | /* Now fix the instruction. */ | |
860 | switch (data[dst_address - 2]) | |
861 | { | |
862 | case 0x58: | |
863 | /* bCC:16 -> bCC:8 */ | |
7e89635a KH |
864 | /* Get the second byte of the original insn, which contains |
865 | the condition code. */ | |
252b5132 | 866 | tmp = data[dst_address - 1]; |
7e89635a KH |
867 | |
868 | /* Compute the fisrt byte of the relaxed instruction. The | |
869 | original sequence 0x58 0xX0 is relaxed to 0x4X, where X | |
870 | represents the condition code. */ | |
252b5132 RH |
871 | tmp &= 0xf0; |
872 | tmp >>= 4; | |
252b5132 RH |
873 | tmp |= 0x40; |
874 | ||
875 | /* Write it. */ | |
876 | bfd_put_8 (abfd, tmp, data + dst_address - 2); | |
877 | break; | |
d562d2fb | 878 | |
4259e8b6 JL |
879 | case 0x5c: |
880 | /* bsr:16 -> bsr:8 */ | |
881 | bfd_put_8 (abfd, 0x55, data + dst_address - 2); | |
882 | break; | |
252b5132 RH |
883 | |
884 | default: | |
885 | abort (); | |
886 | } | |
887 | ||
bc7eab72 KH |
888 | /* Output the target. */ |
889 | bfd_put_8 (abfd, gap, data + dst_address - 1); | |
252b5132 | 890 | |
e804e836 | 891 | /* We don't advance dst_address -- the 8-bit reloc is applied at |
bc7eab72 KH |
892 | dst_address - 1, so the next insn should begin at dst_address. */ |
893 | src_address += 2; | |
252b5132 | 894 | |
bc7eab72 | 895 | break; |
5fcfd273 | 896 | |
e804e836 | 897 | /* Similarly for a 24-bit absolute that is now 8 bits. */ |
252b5132 RH |
898 | case R_JMPL2: |
899 | /* Get the address of the target of this branch. */ | |
900 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
901 | ||
902 | /* Get the address of the instruction (not the reloc). */ | |
44da2da1 | 903 | dot = (input_section->output_offset |
252b5132 RH |
904 | + dst_address |
905 | + link_order->u.indirect.section->output_section->vma + 2); | |
906 | ||
907 | gap = value - dot; | |
908 | ||
909 | /* Fix the instruction. */ | |
910 | switch (data[src_address]) | |
911 | { | |
912 | case 0x5e: | |
913 | /* jsr -> bsr */ | |
914 | bfd_put_8 (abfd, 0x55, data + dst_address); | |
915 | break; | |
916 | case 0x5a: | |
917 | /* jmp ->bra */ | |
918 | bfd_put_8 (abfd, 0x40, data + dst_address); | |
919 | break; | |
920 | default: | |
921 | abort (); | |
922 | } | |
923 | ||
924 | bfd_put_8 (abfd, gap, data + dst_address + 1); | |
925 | dst_address += 2; | |
926 | src_address += 4; | |
927 | ||
928 | break; | |
929 | ||
630a7b0a KH |
930 | /* This is a 16-bit absolute address in one of the following |
931 | instructions: | |
932 | ||
933 | "band", "bclr", "biand", "bild", "bior", "bist", "bixor", | |
934 | "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and | |
935 | "mov.b" | |
936 | ||
937 | We may relax this into an 8-bit absolute address if it's in | |
938 | the right range. */ | |
252b5132 RH |
939 | case R_MOV16B2: |
940 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
941 | ||
630a7b0a | 942 | /* All instructions with R_H8_DIR16B2 start with 0x6a. */ |
252b5132 RH |
943 | if (data[dst_address - 2] != 0x6a) |
944 | abort (); | |
945 | ||
ca9a79a1 | 946 | temp_code = data[src_address - 1]; |
630a7b0a KH |
947 | |
948 | /* If this is a mov.b instruction, clear the lower nibble, which | |
949 | contains the source/destination register number. */ | |
ca9a79a1 NC |
950 | if ((temp_code & 0x10) != 0x10) |
951 | temp_code &= 0xf0; | |
952 | ||
252b5132 | 953 | /* Fix up the opcode. */ |
ca9a79a1 | 954 | switch (temp_code) |
252b5132 RH |
955 | { |
956 | case 0x00: | |
630a7b0a | 957 | /* This is mov.b @aa:16,Rd. */ |
cc040812 | 958 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; |
252b5132 RH |
959 | break; |
960 | case 0x80: | |
630a7b0a | 961 | /* This is mov.b Rs,@aa:16. */ |
cc040812 | 962 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; |
252b5132 | 963 | break; |
ca9a79a1 | 964 | case 0x18: |
630a7b0a KH |
965 | /* This is a bit-maniputation instruction that stores one |
966 | bit into memory, one of "bclr", "bist", "bnot", "bset", | |
967 | and "bst". */ | |
ca9a79a1 NC |
968 | data[dst_address - 2] = 0x7f; |
969 | break; | |
970 | case 0x10: | |
630a7b0a KH |
971 | /* This is a bit-maniputation instruction that loads one bit |
972 | from memory, one of "band", "biand", "bild", "bior", | |
973 | "bixor", "bld", "bor", "btst", and "bxor". */ | |
ca9a79a1 NC |
974 | data[dst_address - 2] = 0x7e; |
975 | break; | |
252b5132 RH |
976 | default: |
977 | abort (); | |
978 | } | |
979 | ||
980 | bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); | |
981 | src_address += 2; | |
982 | break; | |
983 | ||
630a7b0a KH |
984 | /* This is a 24-bit absolute address in one of the following |
985 | instructions: | |
986 | ||
987 | "band", "bclr", "biand", "bild", "bior", "bist", "bixor", | |
988 | "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and | |
989 | "mov.b" | |
990 | ||
991 | We may relax this into an 8-bit absolute address if it's in | |
992 | the right range. */ | |
252b5132 RH |
993 | case R_MOV24B2: |
994 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
995 | ||
630a7b0a | 996 | /* All instructions with R_MOV24B2 start with 0x6a. */ |
252b5132 RH |
997 | if (data[dst_address - 2] != 0x6a) |
998 | abort (); | |
999 | ||
ca9a79a1 | 1000 | temp_code = data[src_address - 1]; |
630a7b0a KH |
1001 | |
1002 | /* If this is a mov.b instruction, clear the lower nibble, which | |
1003 | contains the source/destination register number. */ | |
ca9a79a1 NC |
1004 | if ((temp_code & 0x30) != 0x30) |
1005 | temp_code &= 0xf0; | |
1006 | ||
252b5132 | 1007 | /* Fix up the opcode. */ |
ca9a79a1 | 1008 | switch (temp_code) |
252b5132 RH |
1009 | { |
1010 | case 0x20: | |
630a7b0a | 1011 | /* This is mov.b @aa:24/32,Rd. */ |
cc040812 | 1012 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20; |
252b5132 RH |
1013 | break; |
1014 | case 0xa0: | |
630a7b0a | 1015 | /* This is mov.b Rs,@aa:24/32. */ |
cc040812 | 1016 | data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30; |
252b5132 | 1017 | break; |
ca9a79a1 | 1018 | case 0x38: |
630a7b0a KH |
1019 | /* This is a bit-maniputation instruction that stores one |
1020 | bit into memory, one of "bclr", "bist", "bnot", "bset", | |
1021 | and "bst". */ | |
ca9a79a1 NC |
1022 | data[dst_address - 2] = 0x7f; |
1023 | break; | |
1024 | case 0x30: | |
630a7b0a KH |
1025 | /* This is a bit-maniputation instruction that loads one bit |
1026 | from memory, one of "band", "biand", "bild", "bior", | |
1027 | "bixor", "bld", "bor", "btst", and "bxor". */ | |
ca9a79a1 NC |
1028 | data[dst_address - 2] = 0x7e; |
1029 | break; | |
252b5132 RH |
1030 | default: |
1031 | abort (); | |
1032 | } | |
1033 | ||
1034 | bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); | |
1035 | src_address += 4; | |
1036 | break; | |
1037 | ||
1038 | case R_BCC_INV: | |
1039 | /* Get the address of the target of this branch. */ | |
cc040812 | 1040 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); |
252b5132 | 1041 | |
44da2da1 | 1042 | dot = (input_section->output_offset |
cc040812 | 1043 | + dst_address |
252b5132 RH |
1044 | + link_order->u.indirect.section->output_section->vma) + 1; |
1045 | ||
1046 | gap = value - dot; | |
1047 | ||
1048 | /* Sanity check. */ | |
1049 | if (gap < -128 || gap > 126) | |
1050 | { | |
1051 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
1052 | (link_info, NULL, |
1053 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
1054 | reloc->howto->name, reloc->addend, input_section->owner, |
1055 | input_section, reloc->address))) | |
1056 | abort (); | |
1057 | } | |
1058 | ||
1059 | /* Everything looks OK. Fix the condition in the instruction, apply | |
1060 | the relocation, and update the src/dst address appropriately. */ | |
1061 | ||
1062 | bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1, | |
1063 | data + dst_address - 1); | |
1064 | bfd_put_8 (abfd, gap, data + dst_address); | |
1065 | dst_address++; | |
1066 | src_address++; | |
1067 | ||
1068 | /* All done. */ | |
1069 | break; | |
1070 | ||
1071 | case R_JMP_DEL: | |
1072 | src_address += 4; | |
1073 | break; | |
1074 | ||
e804e836 | 1075 | /* An 8-bit memory indirect instruction (jmp/jsr). |
252b5132 RH |
1076 | |
1077 | There's several things that need to be done to handle | |
1078 | this relocation. | |
1079 | ||
1080 | If this is a reloc against the absolute symbol, then | |
1081 | we should handle it just R_RELBYTE. Likewise if it's | |
1082 | for a symbol with a value ge 0 and le 0xff. | |
1083 | ||
1084 | Otherwise it's a jump/call through the function vector, | |
1085 | and the linker is expected to set up the function vector | |
1086 | and put the right value into the jump/call instruction. */ | |
1087 | case R_MEM_INDIRECT: | |
1088 | { | |
1089 | /* We need to find the symbol so we can determine it's | |
1090 | address in the function vector table. */ | |
1091 | asymbol *symbol; | |
252b5132 | 1092 | const char *name; |
dc810e39 | 1093 | struct funcvec_hash_table *ftab; |
252b5132 | 1094 | struct funcvec_hash_entry *h; |
0171ee92 AM |
1095 | struct h8300_coff_link_hash_table *htab; |
1096 | asection *vectors_sec; | |
1097 | ||
f13a99db | 1098 | if (link_info->output_bfd->xvec != abfd->xvec) |
0171ee92 AM |
1099 | { |
1100 | (*_bfd_error_handler) | |
1101 | (_("cannot handle R_MEM_INDIRECT reloc when using %s output"), | |
f13a99db | 1102 | link_info->output_bfd->xvec->name); |
0171ee92 AM |
1103 | |
1104 | /* What else can we do? This function doesn't allow return | |
1105 | of an error, and we don't want to call abort as that | |
1106 | indicates an internal error. */ | |
1107 | #ifndef EXIT_FAILURE | |
1108 | #define EXIT_FAILURE 1 | |
1109 | #endif | |
1110 | xexit (EXIT_FAILURE); | |
1111 | } | |
1112 | htab = h8300_coff_hash_table (link_info); | |
1113 | vectors_sec = htab->vectors_sec; | |
252b5132 RH |
1114 | |
1115 | /* First see if this is a reloc against the absolute symbol | |
1116 | or against a symbol with a nonnegative value <= 0xff. */ | |
1117 | symbol = *(reloc->sym_ptr_ptr); | |
1118 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
1119 | if (symbol == bfd_abs_section_ptr->symbol | |
5f771d47 | 1120 | || value <= 0xff) |
252b5132 RH |
1121 | { |
1122 | /* This should be handled in a manner very similar to | |
1123 | R_RELBYTES. If the value is in range, then just slam | |
1124 | the value into the right location. Else trigger a | |
1125 | reloc overflow callback. */ | |
5f771d47 | 1126 | if (value <= 0xff) |
252b5132 RH |
1127 | { |
1128 | bfd_put_8 (abfd, value, data + dst_address); | |
1129 | dst_address += 1; | |
1130 | src_address += 1; | |
1131 | } | |
1132 | else | |
1133 | { | |
1134 | if (! ((*link_info->callbacks->reloc_overflow) | |
dfeffb9f L |
1135 | (link_info, NULL, |
1136 | bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
252b5132 RH |
1137 | reloc->howto->name, reloc->addend, input_section->owner, |
1138 | input_section, reloc->address))) | |
1139 | abort (); | |
1140 | } | |
1141 | break; | |
1142 | } | |
1143 | ||
1144 | /* This is a jump/call through a function vector, and we're | |
5fcfd273 | 1145 | expected to create the function vector ourselves. |
252b5132 RH |
1146 | |
1147 | First look up this symbol in the linker hash table -- we need | |
1148 | the derived linker symbol which holds this symbol's index | |
1149 | in the function vector. */ | |
1150 | name = symbol->name; | |
1151 | if (symbol->flags & BSF_LOCAL) | |
1152 | { | |
f60ca5e3 | 1153 | char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); |
d4e2de6b | 1154 | |
252b5132 RH |
1155 | if (new_name == NULL) |
1156 | abort (); | |
1157 | ||
f60ca5e3 | 1158 | sprintf (new_name, "%s_%08x", name, symbol->section->id); |
252b5132 RH |
1159 | name = new_name; |
1160 | } | |
1161 | ||
0171ee92 | 1162 | ftab = htab->funcvec_hash_table; |
b34976b6 | 1163 | h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); |
252b5132 RH |
1164 | |
1165 | /* This shouldn't ever happen. If it does that means we've got | |
1166 | data corruption of some kind. Aborting seems like a reasonable | |
0171ee92 | 1167 | thing to do here. */ |
252b5132 RH |
1168 | if (h == NULL || vectors_sec == NULL) |
1169 | abort (); | |
1170 | ||
1171 | /* Place the address of the function vector entry into the | |
1172 | reloc's address. */ | |
1173 | bfd_put_8 (abfd, | |
1174 | vectors_sec->output_offset + h->offset, | |
1175 | data + dst_address); | |
1176 | ||
1177 | dst_address++; | |
1178 | src_address++; | |
1179 | ||
1180 | /* Now create an entry in the function vector itself. */ | |
d4e2de6b NC |
1181 | switch (bfd_get_mach (input_section->owner)) |
1182 | { | |
1183 | case bfd_mach_h8300: | |
1184 | case bfd_mach_h8300hn: | |
1185 | case bfd_mach_h8300sn: | |
1186 | bfd_put_16 (abfd, | |
1187 | bfd_coff_reloc16_get_value (reloc, | |
1188 | link_info, | |
1189 | input_section), | |
1190 | vectors_sec->contents + h->offset); | |
1191 | break; | |
1192 | case bfd_mach_h8300h: | |
1193 | case bfd_mach_h8300s: | |
1194 | bfd_put_32 (abfd, | |
1195 | bfd_coff_reloc16_get_value (reloc, | |
1196 | link_info, | |
1197 | input_section), | |
1198 | vectors_sec->contents + h->offset); | |
1199 | break; | |
1200 | default: | |
1201 | abort (); | |
1202 | } | |
252b5132 RH |
1203 | |
1204 | /* Gross. We've already written the contents of the vector section | |
1205 | before we get here... So we write it again with the new data. */ | |
1206 | bfd_set_section_contents (vectors_sec->output_section->owner, | |
1207 | vectors_sec->output_section, | |
1208 | vectors_sec->contents, | |
dc810e39 | 1209 | (file_ptr) vectors_sec->output_offset, |
eea6121a | 1210 | vectors_sec->size); |
252b5132 RH |
1211 | break; |
1212 | } | |
1213 | ||
1214 | default: | |
1215 | abort (); | |
1216 | break; | |
1217 | ||
1218 | } | |
1219 | ||
1220 | *src_ptr = src_address; | |
1221 | *dst_ptr = dst_address; | |
1222 | } | |
1223 | ||
252b5132 RH |
1224 | /* Routine for the h8300 linker. |
1225 | ||
1226 | This routine is necessary to handle the special R_MEM_INDIRECT | |
1227 | relocs on the h8300. It's responsible for generating a vectors | |
1228 | section and attaching it to an input bfd as well as sizing | |
1229 | the vectors section. It also creates our vectors hash table. | |
1230 | ||
1231 | It uses the generic linker routines to actually add the symbols. | |
1232 | from this BFD to the bfd linker hash table. It may add a few | |
1233 | selected static symbols to the bfd linker hash table. */ | |
1234 | ||
b34976b6 | 1235 | static bfd_boolean |
c6baf75e | 1236 | h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info) |
252b5132 RH |
1237 | { |
1238 | asection *sec; | |
1239 | struct funcvec_hash_table *funcvec_hash_table; | |
dc810e39 | 1240 | bfd_size_type amt; |
0171ee92 AM |
1241 | struct h8300_coff_link_hash_table *htab; |
1242 | ||
1243 | /* Add the symbols using the generic code. */ | |
1244 | _bfd_generic_link_add_symbols (abfd, info); | |
1245 | ||
f13a99db | 1246 | if (info->output_bfd->xvec != abfd->xvec) |
0171ee92 AM |
1247 | return TRUE; |
1248 | ||
1249 | htab = h8300_coff_hash_table (info); | |
252b5132 RH |
1250 | |
1251 | /* If we haven't created a vectors section, do so now. */ | |
0171ee92 | 1252 | if (!htab->vectors_sec) |
252b5132 RH |
1253 | { |
1254 | flagword flags; | |
1255 | ||
1256 | /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */ | |
1257 | flags = (SEC_ALLOC | SEC_LOAD | |
1258 | | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY); | |
117ed4f8 AM |
1259 | htab->vectors_sec = bfd_make_section_with_flags (abfd, ".vectors", |
1260 | flags); | |
252b5132 RH |
1261 | |
1262 | /* If the section wasn't created, or we couldn't set the flags, | |
0171ee92 | 1263 | quit quickly now, rather than dying a painful death later. */ |
117ed4f8 | 1264 | if (!htab->vectors_sec) |
b34976b6 | 1265 | return FALSE; |
252b5132 RH |
1266 | |
1267 | /* Also create the vector hash table. */ | |
dc810e39 AM |
1268 | amt = sizeof (struct funcvec_hash_table); |
1269 | funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt); | |
252b5132 RH |
1270 | |
1271 | if (!funcvec_hash_table) | |
b34976b6 | 1272 | return FALSE; |
252b5132 RH |
1273 | |
1274 | /* And initialize the funcvec hash table. */ | |
1275 | if (!funcvec_hash_table_init (funcvec_hash_table, abfd, | |
66eb6687 AM |
1276 | funcvec_hash_newfunc, |
1277 | sizeof (struct funcvec_hash_entry))) | |
252b5132 RH |
1278 | { |
1279 | bfd_release (abfd, funcvec_hash_table); | |
b34976b6 | 1280 | return FALSE; |
252b5132 RH |
1281 | } |
1282 | ||
1283 | /* Store away a pointer to the funcvec hash table. */ | |
0171ee92 | 1284 | htab->funcvec_hash_table = funcvec_hash_table; |
252b5132 RH |
1285 | } |
1286 | ||
1287 | /* Load up the function vector hash table. */ | |
0171ee92 | 1288 | funcvec_hash_table = htab->funcvec_hash_table; |
252b5132 RH |
1289 | |
1290 | /* Now scan the relocs for all the sections in this bfd; create | |
1291 | additional space in the .vectors section as needed. */ | |
1292 | for (sec = abfd->sections; sec; sec = sec->next) | |
1293 | { | |
1294 | long reloc_size, reloc_count, i; | |
1295 | asymbol **symbols; | |
1296 | arelent **relocs; | |
1297 | ||
1298 | /* Suck in the relocs, symbols & canonicalize them. */ | |
1299 | reloc_size = bfd_get_reloc_upper_bound (abfd, sec); | |
1300 | if (reloc_size <= 0) | |
1301 | continue; | |
1302 | ||
dc810e39 | 1303 | relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size); |
252b5132 | 1304 | if (!relocs) |
b34976b6 | 1305 | return FALSE; |
252b5132 RH |
1306 | |
1307 | /* The symbols should have been read in by _bfd_generic link_add_symbols | |
1308 | call abovec, so we can cheat and use the pointer to them that was | |
1309 | saved in the above call. */ | |
1310 | symbols = _bfd_generic_link_get_symbols(abfd); | |
1311 | reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols); | |
1312 | if (reloc_count <= 0) | |
1313 | { | |
1314 | free (relocs); | |
1315 | continue; | |
1316 | } | |
1317 | ||
1318 | /* Now walk through all the relocations in this section. */ | |
1319 | for (i = 0; i < reloc_count; i++) | |
1320 | { | |
1321 | arelent *reloc = relocs[i]; | |
1322 | asymbol *symbol = *(reloc->sym_ptr_ptr); | |
1323 | const char *name; | |
1324 | ||
1325 | /* We've got an indirect reloc. See if we need to add it | |
1326 | to the function vector table. At this point, we have | |
1327 | to add a new entry for each unique symbol referenced | |
1328 | by an R_MEM_INDIRECT relocation except for a reloc | |
1329 | against the absolute section symbol. */ | |
1330 | if (reloc->howto->type == R_MEM_INDIRECT | |
1331 | && symbol != bfd_abs_section_ptr->symbol) | |
1332 | ||
1333 | { | |
dc810e39 | 1334 | struct funcvec_hash_table *ftab; |
252b5132 RH |
1335 | struct funcvec_hash_entry *h; |
1336 | ||
1337 | name = symbol->name; | |
1338 | if (symbol->flags & BSF_LOCAL) | |
1339 | { | |
dc810e39 | 1340 | char *new_name; |
252b5132 | 1341 | |
f60ca5e3 | 1342 | new_name = bfd_malloc ((bfd_size_type) strlen (name) + 10); |
252b5132 RH |
1343 | if (new_name == NULL) |
1344 | abort (); | |
1345 | ||
f60ca5e3 | 1346 | sprintf (new_name, "%s_%08x", name, symbol->section->id); |
252b5132 RH |
1347 | name = new_name; |
1348 | } | |
1349 | ||
1350 | /* Look this symbol up in the function vector hash table. */ | |
0171ee92 | 1351 | ftab = htab->funcvec_hash_table; |
b34976b6 | 1352 | h = funcvec_hash_lookup (ftab, name, FALSE, FALSE); |
252b5132 | 1353 | |
252b5132 RH |
1354 | /* If this symbol isn't already in the hash table, add |
1355 | it and bump up the size of the hash table. */ | |
1356 | if (h == NULL) | |
1357 | { | |
b34976b6 | 1358 | h = funcvec_hash_lookup (ftab, name, TRUE, TRUE); |
252b5132 RH |
1359 | if (h == NULL) |
1360 | { | |
1361 | free (relocs); | |
b34976b6 | 1362 | return FALSE; |
252b5132 RH |
1363 | } |
1364 | ||
1365 | /* Bump the size of the vectors section. Each vector | |
1366 | takes 2 bytes on the h8300 and 4 bytes on the h8300h. */ | |
d4e2de6b NC |
1367 | switch (bfd_get_mach (abfd)) |
1368 | { | |
1369 | case bfd_mach_h8300: | |
1370 | case bfd_mach_h8300hn: | |
1371 | case bfd_mach_h8300sn: | |
eea6121a | 1372 | htab->vectors_sec->size += 2; |
d4e2de6b NC |
1373 | break; |
1374 | case bfd_mach_h8300h: | |
1375 | case bfd_mach_h8300s: | |
eea6121a | 1376 | htab->vectors_sec->size += 4; |
d4e2de6b NC |
1377 | break; |
1378 | default: | |
1379 | abort (); | |
1380 | } | |
252b5132 RH |
1381 | } |
1382 | } | |
1383 | } | |
1384 | ||
1385 | /* We're done with the relocations, release them. */ | |
1386 | free (relocs); | |
1387 | } | |
1388 | ||
1389 | /* Now actually allocate some space for the function vector. It's | |
1390 | wasteful to do this more than once, but this is easier. */ | |
0171ee92 | 1391 | sec = htab->vectors_sec; |
eea6121a | 1392 | if (sec->size != 0) |
252b5132 RH |
1393 | { |
1394 | /* Free the old contents. */ | |
dc810e39 AM |
1395 | if (sec->contents) |
1396 | free (sec->contents); | |
252b5132 RH |
1397 | |
1398 | /* Allocate new contents. */ | |
eea6121a | 1399 | sec->contents = bfd_malloc (sec->size); |
252b5132 RH |
1400 | } |
1401 | ||
b34976b6 | 1402 | return TRUE; |
252b5132 RH |
1403 | } |
1404 | ||
1405 | #define coff_reloc16_extra_cases h8300_reloc16_extra_cases | |
1406 | #define coff_reloc16_estimate h8300_reloc16_estimate | |
1407 | #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols | |
1408 | #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create | |
1409 | ||
1410 | #define COFF_LONG_FILENAMES | |
2b5c217d NC |
1411 | |
1412 | #ifndef bfd_pe_print_pdata | |
1413 | #define bfd_pe_print_pdata NULL | |
1414 | #endif | |
1415 | ||
252b5132 RH |
1416 | #include "coffcode.h" |
1417 | ||
252b5132 RH |
1418 | #undef coff_bfd_get_relocated_section_contents |
1419 | #undef coff_bfd_relax_section | |
1420 | #define coff_bfd_get_relocated_section_contents \ | |
1421 | bfd_coff_reloc16_get_relocated_section_contents | |
1422 | #define coff_bfd_relax_section bfd_coff_reloc16_relax_section | |
1423 | ||
3fa78519 | 1424 | CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE) |