Commit | Line | Data |
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14aa9a78 | 1 | /* BFD back-end for Hitachi H8/300 COFF binaries. |
d3e572fe | 2 | Copyright 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc. |
14aa9a78 | 3 | Written by Steve Chamberlain, <sac@cygnus.com>. |
b4e42a64 SC |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
a5655244 | 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
b4e42a64 | 20 | |
b4e42a64 SC |
21 | #include "bfd.h" |
22 | #include "sysdep.h" | |
b4e42a64 | 23 | #include "obstack.h" |
4991ebb9 ILT |
24 | #include "libbfd.h" |
25 | #include "bfdlink.h" | |
d3e572fe | 26 | #include "genlink.h" |
e98e6ec1 SC |
27 | #include "coff/h8300.h" |
28 | #include "coff/internal.h" | |
b4e42a64 SC |
29 | #include "libcoff.h" |
30 | ||
e7d9ee90 SC |
31 | #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1) |
32 | ||
39f27966 JL |
33 | /* We derive a hash table from the basic BFD hash table to |
34 | hold entries in the function vector. Aside from the | |
35 | info stored by the basic hash table, we need the offset | |
36 | of a particular entry within the hash table as well as | |
37 | the offset where we'll add the next entry. */ | |
38 | ||
39 | struct funcvec_hash_entry | |
40 | { | |
41 | /* The basic hash table entry. */ | |
42 | struct bfd_hash_entry root; | |
43 | ||
44 | /* The offset within the vectors section where | |
45 | this entry lives. */ | |
46 | bfd_vma offset; | |
47 | }; | |
48 | ||
49 | struct funcvec_hash_table | |
50 | { | |
51 | /* The basic hash table. */ | |
52 | struct bfd_hash_table root; | |
53 | ||
54 | bfd *abfd; | |
55 | ||
56 | /* Offset at which we'll add the next entry. */ | |
57 | unsigned int offset; | |
58 | }; | |
59 | ||
60 | static struct bfd_hash_entry * | |
61 | funcvec_hash_newfunc | |
62 | PARAMS ((struct bfd_hash_entry *, struct bfd_hash_table *, const char *)); | |
63 | ||
64 | static boolean | |
65 | funcvec_hash_table_init | |
66 | PARAMS ((struct funcvec_hash_table *, bfd *, | |
67 | struct bfd_hash_entry *(*) PARAMS ((struct bfd_hash_entry *, | |
68 | struct bfd_hash_table *, | |
69 | const char *)))); | |
70 | ||
71 | /* To lookup a value in the function vector hash table. */ | |
72 | #define funcvec_hash_lookup(table, string, create, copy) \ | |
73 | ((struct funcvec_hash_entry *) \ | |
74 | bfd_hash_lookup (&(table)->root, (string), (create), (copy))) | |
75 | ||
76 | /* The derived h8300 COFF linker table. Note it's derived from | |
77 | the generic linker hash table, not the COFF backend linker hash | |
78 | table! We use this to attach additional data structures we | |
79 | need while linking on the h8300. */ | |
80 | struct h8300_coff_link_hash_table | |
81 | { | |
82 | /* The main hash table. */ | |
83 | struct generic_link_hash_table root; | |
84 | ||
85 | /* Section for the vectors table. This gets attached to a | |
86 | random input bfd, we keep it here for easy access. */ | |
87 | asection *vectors_sec; | |
88 | ||
89 | /* Hash table of the functions we need to enter into the function | |
90 | vector. */ | |
91 | struct funcvec_hash_table *funcvec_hash_table; | |
92 | }; | |
93 | ||
94 | static struct bfd_link_hash_table *h8300_coff_link_hash_table_create | |
95 | PARAMS ((bfd *)); | |
96 | ||
97 | /* Get the H8/300 COFF linker hash table from a link_info structure. */ | |
98 | ||
99 | #define h8300_coff_hash_table(p) \ | |
100 | ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p)))) | |
101 | ||
102 | /* Initialize fields within a funcvec hash table entry. Called whenever | |
103 | a new entry is added to the funcvec hash table. */ | |
104 | ||
105 | static struct bfd_hash_entry * | |
106 | funcvec_hash_newfunc (entry, gen_table, string) | |
107 | struct bfd_hash_entry *entry; | |
108 | struct bfd_hash_table *gen_table; | |
109 | const char *string; | |
110 | { | |
111 | struct funcvec_hash_entry *ret; | |
112 | struct funcvec_hash_table *table; | |
113 | ||
114 | ret = (struct funcvec_hash_entry *) entry; | |
115 | table = (struct funcvec_hash_table *) gen_table; | |
116 | ||
117 | /* Allocate the structure if it has not already been allocated by a | |
118 | subclass. */ | |
119 | if (ret == NULL) | |
120 | ret = ((struct funcvec_hash_entry *) | |
121 | bfd_hash_allocate (gen_table, | |
122 | sizeof (struct funcvec_hash_entry))); | |
123 | if (ret == NULL) | |
124 | return NULL; | |
125 | ||
126 | /* Call the allocation method of the superclass. */ | |
127 | ret = ((struct funcvec_hash_entry *) | |
128 | bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string)); | |
129 | ||
130 | if (ret == NULL) | |
131 | return NULL; | |
132 | ||
133 | /* Note where this entry will reside in the function vector table. */ | |
134 | ret->offset = table->offset; | |
135 | ||
136 | /* Bump the offset at which we store entries in the function | |
137 | vector. We'd like to bump up the size of the vectors section, | |
138 | but it's not easily available here. */ | |
139 | if (bfd_get_mach (table->abfd) == bfd_mach_h8300) | |
140 | table->offset += 2; | |
141 | else if (bfd_get_mach (table->abfd) == bfd_mach_h8300h) | |
142 | table->offset += 4; | |
143 | else | |
144 | return NULL; | |
145 | ||
146 | /* Everything went OK. */ | |
147 | return (struct bfd_hash_entry *) ret; | |
148 | } | |
149 | ||
150 | /* Initialize the function vector hash table. */ | |
151 | ||
152 | static boolean | |
153 | funcvec_hash_table_init (table, abfd, newfunc) | |
154 | struct funcvec_hash_table *table; | |
155 | bfd *abfd; | |
156 | struct bfd_hash_entry *(*newfunc) PARAMS ((struct bfd_hash_entry *, | |
157 | struct bfd_hash_table *, | |
158 | const char *)); | |
159 | { | |
160 | /* Initialize our local fields, then call the generic initialization | |
161 | routine. */ | |
162 | table->offset = 0; | |
163 | table->abfd = abfd; | |
164 | return (bfd_hash_table_init (&table->root, newfunc)); | |
165 | } | |
166 | ||
167 | /* Create the derived linker hash table. We use a derived hash table | |
168 | basically to hold "static" information during an h8/300 coff link | |
169 | without using static variables. */ | |
170 | ||
171 | static struct bfd_link_hash_table * | |
172 | h8300_coff_link_hash_table_create (abfd) | |
173 | bfd *abfd; | |
174 | { | |
175 | struct h8300_coff_link_hash_table *ret; | |
176 | ret = ((struct h8300_coff_link_hash_table *) | |
177 | bfd_alloc (abfd, sizeof (struct h8300_coff_link_hash_table))); | |
178 | if (ret == NULL) | |
179 | return NULL; | |
c9f5444e | 180 | if (!_bfd_link_hash_table_init (&ret->root.root, abfd, _bfd_generic_link_hash_newfunc)) |
39f27966 JL |
181 | { |
182 | bfd_release (abfd, ret); | |
183 | return NULL; | |
184 | } | |
185 | ||
186 | /* Initialize our data. */ | |
187 | ret->vectors_sec = NULL; | |
188 | ret->funcvec_hash_table = NULL; | |
189 | ||
190 | /* OK. Everything's intialized, return the base pointer. */ | |
191 | return &ret->root.root; | |
192 | } | |
e7d9ee90 SC |
193 | |
194 | /* special handling for H8/300 relocs. | |
195 | We only come here for pcrel stuff and return normally if not an -r link. | |
196 | When doing -r, we can't do any arithmetic for the pcrel stuff, because | |
197 | the code in reloc.c assumes that we can manipulate the targets of | |
198 | the pcrel branches. This isn't so, since the H8/300 can do relaxing, | |
199 | which means that the gap after the instruction may not be enough to | |
200 | contain the offset required for the branch, so we have to use the only | |
201 | the addend until the final link */ | |
202 | ||
203 | static bfd_reloc_status_type | |
204 | special (abfd, reloc_entry, symbol, data, input_section, output_bfd, | |
205 | error_message) | |
206 | bfd *abfd; | |
207 | arelent *reloc_entry; | |
208 | asymbol *symbol; | |
209 | PTR data; | |
210 | asection *input_section; | |
211 | bfd *output_bfd; | |
212 | char **error_message; | |
213 | { | |
e7d9ee90 SC |
214 | if (output_bfd == (bfd *) NULL) |
215 | return bfd_reloc_continue; | |
216 | ||
217 | return bfd_reloc_ok; | |
218 | } | |
219 | ||
14aa9a78 | 220 | static reloc_howto_type howto_table[] = |
b4e42a64 | 221 | { |
e7d9ee90 SC |
222 | HOWTO (R_RELBYTE, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8", false, 0x000000ff, 0x000000ff, false), |
223 | HOWTO (R_RELWORD, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16", false, 0x0000ffff, 0x0000ffff, false), | |
224 | HOWTO (R_RELLONG, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "32", false, 0xffffffff, 0xffffffff, false), | |
225 | HOWTO (R_PCRBYTE, 0, 0, 8, true, 0, complain_overflow_signed, special, "DISP8", false, 0x000000ff, 0x000000ff, true), | |
226 | HOWTO (R_PCRWORD, 0, 1, 16, true, 0, complain_overflow_signed, special, "DISP16", false, 0x0000ffff, 0x0000ffff, true), | |
227 | HOWTO (R_PCRLONG, 0, 2, 32, true, 0, complain_overflow_signed, special, "DISP32", false, 0xffffffff, 0xffffffff, true), | |
fd7c5d73 JL |
228 | HOWTO (R_MOV16B1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", false, 0x0000ffff, 0x0000ffff, false), |
229 | HOWTO (R_MOV16B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", false, 0x000000ff, 0x000000ff, false), | |
e7d9ee90 SC |
230 | HOWTO (R_JMP1, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "16/pcrel", false, 0x0000ffff, 0x0000ffff, false), |
231 | HOWTO (R_JMP2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pcrecl/16", false, 0x000000ff, 0x000000ff, false), | |
e7d9ee90 | 232 | HOWTO (R_JMPL1, 0, 2, 32, false, 0, complain_overflow_bitfield, special, "24/pcrell", false, 0x00ffffff, 0x00ffffff, false), |
fd7c5d73 JL |
233 | HOWTO (R_JMPL2, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "pc8/24", false, 0x000000ff, 0x000000ff, false), |
234 | HOWTO (R_MOV24B1, 0, 1, 32, false, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", false, 0xffffffff, 0xffffffff, false), | |
235 | HOWTO (R_MOV24B2, 0, 1, 8, false, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", false, 0x0000ffff, 0x0000ffff, false), | |
e98e6ec1 | 236 | |
d3e572fe ILT |
237 | /* An indirect reference to a function. This causes the function's address |
238 | to be added to the function vector in lo-mem and puts the address of | |
239 | the function vector's entry in the jsr instruction. */ | |
240 | HOWTO (R_MEM_INDIRECT, 0, 0, 8, false, 0, complain_overflow_bitfield, special, "8/indirect", false, 0x000000ff, 0x000000ff, false), | |
241 | ||
c9f5444e JL |
242 | /* Internal reloc for relaxing. This is created when a 16bit pc-relative |
243 | branch is turned into an 8bit pc-relative branch. */ | |
fd7c5d73 JL |
244 | HOWTO (R_PCRWORD_B, 0, 0, 8, true, 0, complain_overflow_bitfield, special, "relaxed bCC:16", false, 0x000000ff, 0x000000ff, false), |
245 | ||
246 | HOWTO (R_MOVL1, 0, 2, 32, false, 0, complain_overflow_bitfield,special, "32/24 relaxable move", false, 0xffffffff, 0xffffffff, false), | |
247 | ||
248 | HOWTO (R_MOVL2, 0, 1, 16, false, 0, complain_overflow_bitfield, special, "32/24 relaxed move", false, 0x0000ffff, 0x0000ffff, false), | |
249 | ||
b4e42a64 SC |
250 | }; |
251 | ||
252 | ||
253 | /* Turn a howto into a reloc number */ | |
254 | ||
e98e6ec1 | 255 | #define SELECT_RELOC(x,howto) \ |
47e70c54 | 256 | { x.r_type = select_reloc(howto); } |
e98e6ec1 | 257 | |
14aa9a78 ILT |
258 | #define BADMAG(x) (H8300BADMAG(x)&& H8300HBADMAG(x)) |
259 | #define H8300 1 /* Customize coffcode.h */ | |
b4e42a64 SC |
260 | #define __A_MAGIC_SET__ |
261 | ||
262 | ||
263 | ||
264 | /* Code to swap in the reloc */ | |
e98e6ec1 SC |
265 | #define SWAP_IN_RELOC_OFFSET bfd_h_get_32 |
266 | #define SWAP_OUT_RELOC_OFFSET bfd_h_put_32 | |
b4e42a64 SC |
267 | #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \ |
268 | dst->r_stuff[0] = 'S'; \ | |
14aa9a78 ILT |
269 | dst->r_stuff[1] = 'C'; |
270 | ||
271 | ||
272 | static int | |
273 | select_reloc (howto) | |
274 | reloc_howto_type *howto; | |
275 | { | |
276 | return howto->type; | |
277 | } | |
b4e42a64 SC |
278 | |
279 | /* Code to turn a r_type into a howto ptr, uses the above howto table | |
280 | */ | |
281 | ||
14aa9a78 ILT |
282 | static void |
283 | rtype2howto (internal, dst) | |
284 | arelent *internal; | |
285 | struct internal_reloc *dst; | |
e98e6ec1 | 286 | { |
14aa9a78 ILT |
287 | switch (dst->r_type) |
288 | { | |
e98e6ec1 | 289 | case R_RELBYTE: |
14aa9a78 | 290 | internal->howto = howto_table + 0; |
e98e6ec1 SC |
291 | break; |
292 | case R_RELWORD: | |
14aa9a78 ILT |
293 | internal->howto = howto_table + 1; |
294 | break; | |
295 | case R_RELLONG: | |
296 | internal->howto = howto_table + 2; | |
297 | break; | |
e98e6ec1 | 298 | case R_PCRBYTE: |
14aa9a78 | 299 | internal->howto = howto_table + 3; |
e98e6ec1 SC |
300 | break; |
301 | case R_PCRWORD: | |
14aa9a78 ILT |
302 | internal->howto = howto_table + 4; |
303 | break; | |
304 | case R_PCRLONG: | |
305 | internal->howto = howto_table + 5; | |
e98e6ec1 | 306 | break; |
fd7c5d73 | 307 | case R_MOV16B1: |
e98e6ec1 SC |
308 | internal->howto = howto_table + 6; |
309 | break; | |
fd7c5d73 | 310 | case R_MOV16B2: |
e98e6ec1 SC |
311 | internal->howto = howto_table + 7; |
312 | break; | |
313 | case R_JMP1: | |
14aa9a78 | 314 | internal->howto = howto_table + 8; |
e98e6ec1 | 315 | break; |
e98e6ec1 | 316 | case R_JMP2: |
14aa9a78 ILT |
317 | internal->howto = howto_table + 9; |
318 | break; | |
319 | case R_JMPL1: | |
320 | internal->howto = howto_table + 10; | |
321 | break; | |
fd7c5d73 | 322 | case R_JMPL2: |
14aa9a78 ILT |
323 | internal->howto = howto_table + 11; |
324 | break; | |
fd7c5d73 | 325 | case R_MOV24B1: |
14aa9a78 ILT |
326 | internal->howto = howto_table + 12; |
327 | break; | |
fd7c5d73 | 328 | case R_MOV24B2: |
14aa9a78 | 329 | internal->howto = howto_table + 13; |
e98e6ec1 | 330 | break; |
d3e572fe ILT |
331 | case R_MEM_INDIRECT: |
332 | internal->howto = howto_table + 14; | |
333 | break; | |
c9f5444e JL |
334 | case R_PCRWORD_B: |
335 | internal->howto = howto_table + 15; | |
336 | break; | |
fd7c5d73 JL |
337 | case R_MOVL1: |
338 | internal->howto = howto_table + 16; | |
339 | break; | |
340 | case R_MOVL2: | |
341 | internal->howto = howto_table + 17; | |
342 | break; | |
e98e6ec1 | 343 | default: |
d3e572fe | 344 | abort (); |
e98e6ec1 SC |
345 | break; |
346 | } | |
347 | } | |
348 | ||
349 | #define RTYPE2HOWTO(internal, relocentry) rtype2howto(internal,relocentry) | |
b4e42a64 SC |
350 | |
351 | ||
352 | /* Perform any necessaru magic to the addend in a reloc entry */ | |
353 | ||
354 | ||
355 | #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \ | |
356 | cache_ptr->addend = ext_reloc.r_offset; | |
357 | ||
14aa9a78 | 358 | |
e98e6ec1 SC |
359 | #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \ |
360 | reloc_processing(relent, reloc, symbols, abfd, section) | |
361 | ||
14aa9a78 | 362 | static void |
47e70c54 SC |
363 | reloc_processing (relent, reloc, symbols, abfd, section) |
364 | arelent * relent; | |
365 | struct internal_reloc *reloc; | |
366 | asymbol ** symbols; | |
367 | bfd * abfd; | |
368 | asection * section; | |
e98e6ec1 | 369 | { |
14aa9a78 ILT |
370 | relent->address = reloc->r_vaddr; |
371 | rtype2howto (relent, reloc); | |
372 | ||
373 | if (((int) reloc->r_symndx) > 0) | |
374 | { | |
375 | relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx]; | |
376 | } | |
377 | else | |
378 | { | |
e7d9ee90 | 379 | relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr; |
14aa9a78 ILT |
380 | } |
381 | ||
382 | ||
383 | ||
384 | relent->addend = reloc->r_offset; | |
385 | ||
386 | relent->address -= section->vma; | |
387 | /* relent->section = 0;*/ | |
388 | } | |
389 | ||
fd7c5d73 JL |
390 | /* If RELOC represents a relaxable instruction/reloc, change it into |
391 | the relaxed reloc, notify the linker that symbol addresses | |
392 | have changed (bfd_perform_slip) and return how much the current | |
393 | section has shrunk by. | |
394 | ||
395 | FIXME: Much of this code has knowledge of the ordering of entries | |
396 | in the howto table. This needs to be fixed. */ | |
14aa9a78 ILT |
397 | |
398 | static int | |
47e70c54 SC |
399 | h8300_reloc16_estimate(abfd, input_section, reloc, shrink, link_info) |
400 | bfd *abfd; | |
14aa9a78 | 401 | asection *input_section; |
14aa9a78 ILT |
402 | arelent *reloc; |
403 | unsigned int shrink; | |
4991ebb9 | 404 | struct bfd_link_info *link_info; |
14aa9a78 ILT |
405 | { |
406 | bfd_vma value; | |
407 | bfd_vma dot; | |
408 | bfd_vma gap; | |
409 | ||
410 | /* The address of the thing to be relocated will have moved back by | |
fd7c5d73 JL |
411 | the size of the shrink - but we don't change reloc->address here, |
412 | since we need it to know where the relocation lives in the source | |
413 | uncooked section. */ | |
14aa9a78 | 414 | bfd_vma address = reloc->address - shrink; |
e98e6ec1 | 415 | |
fd7c5d73 | 416 | /* Only examine the relocs which might be relaxable. */ |
14aa9a78 ILT |
417 | switch (reloc->howto->type) |
418 | { | |
14aa9a78 | 419 | |
fd7c5d73 JL |
420 | /* This is the 16/24 bit absolute branch which could become an 8 bit |
421 | pc-relative branch. */ | |
422 | case R_JMP1: | |
423 | case R_JMPL1: | |
424 | /* Get the address of the target of this branch. */ | |
4991ebb9 ILT |
425 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section); |
426 | ||
fd7c5d73 JL |
427 | /* Get the address of the next instruction (not the reloc). */ |
428 | dot = (input_section->output_section->vma | |
429 | + input_section->output_offset + address); | |
14aa9a78 | 430 | |
fd7c5d73 JL |
431 | /* Adjust for R_JMP1 vs R_JMPL1. */ |
432 | dot += (reloc->howto->type == R_JMP1 ? 1 : 2); | |
433 | ||
434 | /* Compute the distance from this insn to the branch target. */ | |
435 | gap = value - dot; | |
436 | ||
437 | /* If the distance is within -128..+128 inclusive, then we can relax | |
438 | this jump. +128 is valid since the target will move two bytes | |
439 | this jump. */ | |
440 | if ((int)gap >= -128 && (int)gap <= 128 ) | |
441 | { | |
442 | /* Change the reloc type. */ | |
14aa9a78 | 443 | reloc->howto = reloc->howto + 1; |
14aa9a78 | 444 | |
fd7c5d73 JL |
445 | /* This shrinks this section by two bytes. */ |
446 | shrink += 2; | |
447 | bfd_perform_slip(abfd, 2, input_section, address); | |
448 | } | |
14aa9a78 | 449 | break; |
14aa9a78 | 450 | |
fd7c5d73 JL |
451 | /* This is the 16 bit pc-relative branch which could become an 8 bit |
452 | pc-relative branch. */ | |
453 | case R_PCRWORD: | |
454 | /* Get the address of the target of this branch, add one to the value | |
455 | because the addend field in PCrel jumps is off by -1. */ | |
456 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section) + 1; | |
14aa9a78 | 457 | |
fd7c5d73 | 458 | /* Get the address of the next instruction if we were to relax. */ |
14aa9a78 ILT |
459 | dot = input_section->output_section->vma + |
460 | input_section->output_offset + address; | |
e98e6ec1 | 461 | |
fd7c5d73 JL |
462 | /* Compute the distance from this insn to the branch target. */ |
463 | gap = value - dot; | |
14aa9a78 | 464 | |
fd7c5d73 JL |
465 | /* If the distance is within -128..+128 inclusive, then we can relax |
466 | this jump. +128 is valid since the target will move two bytes | |
467 | closer if we do relax this branch. */ | |
468 | if ((int)gap >= -128 && (int)gap <= 128 ) | |
14aa9a78 | 469 | { |
fd7c5d73 JL |
470 | /* Change the reloc type. */ |
471 | reloc->howto = howto_table + 15; | |
14aa9a78 | 472 | |
fd7c5d73 JL |
473 | /* This shrinks this section by two bytes. */ |
474 | shrink += 2; | |
47e70c54 | 475 | bfd_perform_slip(abfd, 2, input_section, address); |
14aa9a78 ILT |
476 | } |
477 | break; | |
478 | ||
fd7c5d73 JL |
479 | /* This is a 16 bit absolute address in a mov.b insn, which can |
480 | become an 8 bit absolute address if it's in the right range. */ | |
481 | case R_MOV16B1: | |
482 | /* Get the address of the data referenced by this mov.b insn. */ | |
4991ebb9 | 483 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section); |
14aa9a78 | 484 | |
fd7c5d73 JL |
485 | /* The address is in 0xff00..0xffff inclusive on the h8300 or |
486 | 0xffff00..0xffffff inclusive on the h8300h, then we can | |
487 | relax this mov.b */ | |
488 | if ((bfd_get_mach (abfd) == bfd_mach_h8300 | |
489 | && value >= 0xff00 | |
490 | && value <= 0xffff) | |
491 | || (bfd_get_mach (abfd) == bfd_mach_h8300h | |
492 | && value >= 0xffff00 | |
493 | && value <= 0xffffff)) | |
494 | { | |
495 | /* Change the reloc type. */ | |
496 | reloc->howto = reloc->howto + 1; | |
14aa9a78 | 497 | |
fd7c5d73 JL |
498 | /* This shrinks this section by two bytes. */ |
499 | shrink += 2; | |
47e70c54 | 500 | bfd_perform_slip(abfd, 2, input_section, address); |
14aa9a78 ILT |
501 | } |
502 | break; | |
14aa9a78 | 503 | |
fd7c5d73 JL |
504 | /* Similarly for a 24 bit absolute address in a mov.b. Note that |
505 | if we can't relax this into an 8 bit absolute, we'll fall through | |
506 | and try to relax it into a 16bit absolute. */ | |
507 | case R_MOV24B1: | |
508 | /* Get the address of the data referenced by this mov.b insn. */ | |
c9f5444e | 509 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section); |
c9f5444e | 510 | |
fd7c5d73 JL |
511 | /* The address is in 0xffff00..0xffffff inclusive on the h8300h, |
512 | then we can relax this mov.b */ | |
513 | if (bfd_get_mach (abfd) == bfd_mach_h8300h | |
514 | && value >= 0xffff00 | |
515 | && value <= 0xffffff) | |
516 | { | |
517 | /* Change the reloc type. */ | |
518 | reloc->howto = reloc->howto + 1; | |
c9f5444e | 519 | |
fd7c5d73 JL |
520 | /* This shrinks this section by four bytes. */ |
521 | shrink += 4; | |
522 | bfd_perform_slip(abfd, 4, input_section, address); | |
c9f5444e | 523 | |
fd7c5d73 JL |
524 | /* Done with this reloc. */ |
525 | break; | |
526 | } | |
527 | ||
528 | /* FALLTHROUGH and try to turn the 32/24 bit reloc into a 16 bit | |
529 | reloc. */ | |
c9f5444e | 530 | |
fd7c5d73 JL |
531 | /* This is a 24/32 bit absolute address in a mov insn, which can |
532 | become an 16 bit absolute address if it's in the right range. */ | |
533 | case R_MOVL1: | |
534 | /* Get the address of the data referenced by this mov insn. */ | |
535 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section); | |
536 | ||
537 | /* If this address is in 0x0000..0x7fff inclusive or | |
538 | 0xff8000..0xffffff inclusive, then it can be relaxed. */ | |
539 | if (value <= 0x7fff || value >= 0xff8000) | |
540 | { | |
541 | /* Change the reloc type. */ | |
542 | reloc->howto = howto_table + 17; | |
543 | ||
544 | /* This shrinks this section by two bytes. */ | |
545 | shrink += 2; | |
c9f5444e JL |
546 | bfd_perform_slip(abfd, 2, input_section, address); |
547 | } | |
548 | break; | |
fd7c5d73 JL |
549 | |
550 | /* No other reloc types represent relaxing opportunities. */ | |
551 | default: | |
552 | break; | |
c9f5444e JL |
553 | } |
554 | ||
14aa9a78 | 555 | return shrink; |
e98e6ec1 SC |
556 | } |
557 | ||
14aa9a78 | 558 | |
fd7c5d73 JL |
559 | /* Handle relocations for the H8/300, including relocs for relaxed |
560 | instructions. | |
14aa9a78 | 561 | |
fd7c5d73 | 562 | FIXME: Not all relocations check for overflow! */ |
39f27966 | 563 | |
14aa9a78 | 564 | static void |
4991ebb9 ILT |
565 | h8300_reloc16_extra_cases (abfd, link_info, link_order, reloc, data, src_ptr, |
566 | dst_ptr) | |
14aa9a78 | 567 | bfd *abfd; |
4991ebb9 ILT |
568 | struct bfd_link_info *link_info; |
569 | struct bfd_link_order *link_order; | |
14aa9a78 ILT |
570 | arelent *reloc; |
571 | bfd_byte *data; | |
572 | unsigned int *src_ptr; | |
573 | unsigned int *dst_ptr; | |
574 | { | |
575 | unsigned int src_address = *src_ptr; | |
576 | unsigned int dst_address = *dst_ptr; | |
4991ebb9 | 577 | asection *input_section = link_order->u.indirect.section; |
fd7c5d73 JL |
578 | bfd_vma value; |
579 | bfd_vma dot; | |
580 | int gap,tmp; | |
14aa9a78 ILT |
581 | |
582 | switch (reloc->howto->type) | |
583 | { | |
fd7c5d73 JL |
584 | |
585 | /* Generic 8bit pc-relative relocation. */ | |
14aa9a78 | 586 | case R_PCRBYTE: |
fd7c5d73 JL |
587 | /* Get the address of the target of this branch. */ |
588 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section); | |
14aa9a78 | 589 | |
fd7c5d73 JL |
590 | dot = (link_order->offset |
591 | + dst_address | |
592 | + link_order->u.indirect.section->output_section->vma); | |
593 | ||
594 | gap = value - dot; | |
595 | ||
596 | /* Sanity check. */ | |
597 | if (gap < -128 || gap > 126) | |
598 | { | |
599 | if (! ((*link_info->callbacks->reloc_overflow) | |
600 | (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
601 | reloc->howto->name, reloc->addend, input_section->owner, | |
602 | input_section, reloc->address))) | |
603 | abort (); | |
604 | } | |
605 | ||
606 | /* Everything looks OK. Apply the relocation and update the | |
607 | src/dst address appropriately. */ | |
608 | ||
609 | bfd_put_8 (abfd, gap, data + dst_address); | |
610 | dst_address++; | |
611 | src_address++; | |
612 | ||
613 | /* All done. */ | |
614 | break; | |
615 | ||
616 | /* Generic 16bit pc-relative relocation. */ | |
47e70c54 | 617 | case R_PCRWORD: |
fd7c5d73 JL |
618 | /* Get the address of the target of this branch. */ |
619 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section); | |
47e70c54 | 620 | |
fd7c5d73 JL |
621 | /* Get the address of the instruction (not the reloc). */ |
622 | dot = (link_order->offset | |
623 | + dst_address | |
624 | + link_order->u.indirect.section->output_section->vma + 1); | |
625 | ||
626 | gap = value - dot; | |
627 | ||
628 | /* Sanity check. */ | |
629 | if (gap > 32766 || gap < -32768) | |
630 | { | |
631 | if (! ((*link_info->callbacks->reloc_overflow) | |
632 | (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
633 | reloc->howto->name, reloc->addend, input_section->owner, | |
634 | input_section, reloc->address))) | |
635 | abort (); | |
636 | } | |
637 | ||
638 | /* Everything looks OK. Apply the relocation and update the | |
639 | src/dst address appropriately. */ | |
14aa9a78 | 640 | |
fd7c5d73 JL |
641 | bfd_put_16 (abfd, gap, data + dst_address); |
642 | dst_address += 2; | |
643 | src_address += 2; | |
644 | ||
645 | /* All done. */ | |
646 | break; | |
647 | ||
648 | /* Generic 8bit absolute relocation. */ | |
14aa9a78 | 649 | case R_RELBYTE: |
fd7c5d73 JL |
650 | /* Get the address of the object referenced by this insn. */ |
651 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
652 | ||
653 | /* Sanity check. */ | |
654 | if (value < 0xff | |
655 | || (value >= 0x0000ff00 && value <= 0x0000ffff) | |
656 | || (value >= 0x00ffff00 && value <= 0x00ffffff) | |
657 | || (value >= 0xffffff00 && value <= 0xffffffff)) | |
658 | { | |
659 | /* Everything looks OK. Apply the relocation and update the | |
660 | src/dst address appropriately. */ | |
661 | ||
662 | bfd_put_8 (abfd, gap, data + dst_address); | |
663 | dst_address += 1; | |
664 | src_address += 1; | |
665 | } | |
666 | else | |
667 | { | |
668 | if (! ((*link_info->callbacks->reloc_overflow) | |
669 | (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
670 | reloc->howto->name, reloc->addend, input_section->owner, | |
671 | input_section, reloc->address))) | |
672 | abort (); | |
673 | } | |
674 | ||
675 | /* All done. */ | |
14aa9a78 | 676 | break; |
fd7c5d73 JL |
677 | |
678 | /* Various simple 16bit absolute relocations. */ | |
679 | case R_MOV16B1: | |
14aa9a78 | 680 | case R_JMP1: |
14aa9a78 | 681 | case R_RELWORD: |
fd7c5d73 JL |
682 | value = bfd_coff_reloc16_get_value(reloc, link_info, input_section); |
683 | bfd_put_16 (abfd, value, data + dst_address); | |
14aa9a78 ILT |
684 | dst_address += 2; |
685 | src_address += 2; | |
686 | break; | |
fd7c5d73 JL |
687 | |
688 | /* Various simple 24/32bit absolute relocations. */ | |
689 | case R_MOV24B1: | |
690 | case R_MOVL1: | |
14aa9a78 | 691 | case R_RELLONG: |
fd7c5d73 JL |
692 | /* Get the address of the target of this branch. */ |
693 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section), | |
694 | bfd_put_32 (abfd, value, data + dst_address); | |
14aa9a78 ILT |
695 | dst_address += 4; |
696 | src_address += 4; | |
697 | break; | |
698 | ||
fd7c5d73 JL |
699 | /* Another 24/32bit absolute relocation. */ |
700 | case R_JMPL1: | |
701 | /* Get the address of the target of this branch. */ | |
702 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
14aa9a78 | 703 | |
fd7c5d73 JL |
704 | value = ((value & 0x00ffffff) |
705 | | (bfd_get_32 (abfd, data + src_address) & 0xff000000)); | |
706 | bfd_put_32 (abfd, value, data + dst_address); | |
707 | dst_address += 4; | |
708 | src_address += 4; | |
709 | break; | |
14aa9a78 | 710 | |
fd7c5d73 JL |
711 | /* A 16bit abolute relocation that was formerlly a 24/32bit |
712 | absolute relocation. */ | |
713 | case R_MOVL2: | |
714 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
14aa9a78 | 715 | |
fd7c5d73 JL |
716 | /* Sanity check. */ |
717 | if (value < 0x8000 || value > 0xff8000) | |
718 | { | |
719 | /* Insert the 16bit value into the proper location. */ | |
720 | bfd_put_16 (abfd, value, data + dst_address); | |
721 | ||
722 | /* Fix the opcode. For all the move insns, we simply | |
723 | need to turn off bit 0x20 in the previous byte. */ | |
724 | data[dst_address - 1] &= ~0x20; | |
725 | dst_address += 2; | |
726 | src_address += 4; | |
727 | } | |
728 | else | |
729 | { | |
730 | if (! ((*link_info->callbacks->reloc_overflow) | |
731 | (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
732 | reloc->howto->name, reloc->addend, input_section->owner, | |
733 | input_section, reloc->address))) | |
734 | abort (); | |
735 | } | |
14aa9a78 ILT |
736 | break; |
737 | ||
fd7c5d73 | 738 | /* A 16bit absolute branch that is now an 8-bit pc-relative branch. */ |
14aa9a78 | 739 | case R_JMP2: |
fd7c5d73 JL |
740 | /* Get the address of the target of this branch. */ |
741 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
14aa9a78 | 742 | |
fd7c5d73 JL |
743 | /* Get the address of the next instruction. */ |
744 | dot = (link_order->offset | |
745 | + dst_address | |
746 | + link_order->u.indirect.section->output_section->vma + 1); | |
14aa9a78 | 747 | |
fd7c5d73 | 748 | gap = value - dot; |
14aa9a78 | 749 | |
fd7c5d73 JL |
750 | /* Sanity check. */ |
751 | if (gap < -128 || gap > 126) | |
752 | { | |
753 | if (! ((*link_info->callbacks->reloc_overflow) | |
754 | (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
755 | reloc->howto->name, reloc->addend, input_section->owner, | |
756 | input_section, reloc->address))) | |
14aa9a78 | 757 | abort (); |
fd7c5d73 | 758 | } |
14aa9a78 | 759 | |
fd7c5d73 JL |
760 | /* Now fix the instruction itself. */ |
761 | switch (data[dst_address - 1]) | |
762 | { | |
763 | case 0x5e: | |
764 | /* jsr -> bsr */ | |
765 | bfd_put_8 (abfd, 0x55, data + dst_address - 1); | |
766 | break; | |
767 | case 0x5a: | |
768 | /* jmp ->bra */ | |
769 | bfd_put_8 (abfd, 0x40, data + dst_address - 1); | |
770 | break; | |
c9f5444e | 771 | |
fd7c5d73 JL |
772 | default: |
773 | abort (); | |
774 | } | |
c9f5444e | 775 | |
fd7c5d73 JL |
776 | /* Write out the 8bit value. */ |
777 | bfd_put_8 (abfd, gap, data + dst_address); | |
c9f5444e | 778 | |
fd7c5d73 JL |
779 | dst_address += 1; |
780 | src_address += 3; | |
c9f5444e | 781 | |
fd7c5d73 | 782 | break; |
c9f5444e | 783 | |
fd7c5d73 JL |
784 | /* A 16bit pc-relative branch that is now an 8-bit pc-relative branch. */ |
785 | case R_PCRWORD_B: | |
786 | /* Get the address of the target of this branch. */ | |
787 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
c9f5444e | 788 | |
fd7c5d73 JL |
789 | /* Get the address of the instruction (not the reloc). */ |
790 | dot = (link_order->offset | |
791 | + dst_address | |
792 | + link_order->u.indirect.section->output_section->vma - 1); | |
c9f5444e | 793 | |
fd7c5d73 | 794 | gap = value - dot; |
c9f5444e | 795 | |
fd7c5d73 JL |
796 | /* Sanity check. */ |
797 | if (gap < -128 || gap > 126) | |
798 | { | |
799 | if (! ((*link_info->callbacks->reloc_overflow) | |
800 | (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
801 | reloc->howto->name, reloc->addend, input_section->owner, | |
802 | input_section, reloc->address))) | |
c9f5444e | 803 | abort (); |
fd7c5d73 JL |
804 | } |
805 | ||
806 | /* Now fix the instruction. */ | |
807 | switch (data[dst_address - 2]) | |
808 | { | |
809 | case 0x58: | |
810 | /* bCC:16 -> bCC:8 */ | |
811 | /* Get the condition code from the original insn. */ | |
812 | tmp = data[dst_address - 1]; | |
813 | tmp &= 0xf0; | |
814 | tmp >>= 4; | |
815 | ||
816 | /* Now or in the high nibble of the opcode. */ | |
817 | tmp |= 0x40; | |
818 | ||
819 | /* Write it. */ | |
820 | bfd_put_8 (abfd, tmp, data + dst_address - 2); | |
821 | break; | |
822 | ||
823 | default: | |
824 | abort (); | |
825 | } | |
c9f5444e JL |
826 | |
827 | /* Output the target. */ | |
828 | bfd_put_8 (abfd, gap, data + dst_address - 1); | |
829 | ||
830 | /* We don't advance dst_address -- the 8bit reloc is applied at | |
fd7c5d73 | 831 | dst_address - 1, so the next insn should begin at dst_address. */ |
c9f5444e JL |
832 | src_address += 2; |
833 | ||
834 | break; | |
14aa9a78 | 835 | |
fd7c5d73 JL |
836 | /* Similarly for a 24bit absolute that is now 8 bits. */ |
837 | case R_JMPL2: | |
838 | /* Get the address of the target of this branch. */ | |
839 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
840 | ||
841 | /* Get the address of the instruction (not the reloc). */ | |
842 | dot = (link_order->offset | |
843 | + dst_address | |
844 | + link_order->u.indirect.section->output_section->vma + 2); | |
14aa9a78 | 845 | |
fd7c5d73 | 846 | gap = value - dot; |
14aa9a78 | 847 | |
fd7c5d73 JL |
848 | /* Fix the instruction. */ |
849 | switch (data[src_address]) | |
850 | { | |
851 | case 0x5e: | |
852 | /* jsr -> bsr */ | |
853 | bfd_put_8 (abfd, 0x55, data + dst_address); | |
854 | break; | |
855 | case 0x5a: | |
856 | /* jmp ->bra */ | |
857 | bfd_put_8 (abfd, 0x40, data + dst_address); | |
858 | break; | |
859 | default: | |
14aa9a78 | 860 | abort (); |
fd7c5d73 JL |
861 | } |
862 | ||
863 | bfd_put_8 (abfd, gap, data + dst_address + 1); | |
864 | dst_address += 2; | |
865 | src_address += 4; | |
14aa9a78 | 866 | |
fd7c5d73 | 867 | break; |
14aa9a78 | 868 | |
fd7c5d73 JL |
869 | /* A 16bit absolute mov.b that is now an 8bit absolute mov.b. */ |
870 | case R_MOV16B2: | |
871 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
14aa9a78 | 872 | |
fd7c5d73 JL |
873 | /* Sanity check. */ |
874 | if (data[dst_address - 2] != 0x6a) | |
875 | abort (); | |
14aa9a78 | 876 | |
fd7c5d73 JL |
877 | /* Fix up the opcode. */ |
878 | switch (data[src_address-1] & 0xf0) | |
879 | { | |
880 | case 0x00: | |
881 | data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x20; | |
882 | break; | |
883 | case 0x80: | |
884 | data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x30; | |
885 | break; | |
886 | default: | |
887 | abort (); | |
888 | } | |
889 | ||
890 | bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); | |
891 | src_address += 2; | |
892 | break; | |
893 | ||
894 | /* Similarly for a 24bit mov.b */ | |
895 | case R_MOV24B2: | |
896 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
897 | ||
898 | /* Sanity check. */ | |
899 | if (data[dst_address - 2] != 0x6a) | |
900 | abort (); | |
901 | ||
902 | /* Fix up the opcode. */ | |
903 | switch (data[src_address-1] & 0xf0) | |
904 | { | |
905 | case 0x20: | |
906 | data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x20; | |
907 | break; | |
908 | case 0xa0: | |
909 | data[dst_address - 2] = (data[src_address-1] & 0xf) | 0x30; | |
910 | break; | |
911 | default: | |
912 | abort (); | |
913 | } | |
914 | ||
915 | bfd_put_8 (abfd, value & 0xff, data + dst_address - 1); | |
916 | src_address += 4; | |
14aa9a78 | 917 | break; |
14aa9a78 | 918 | |
39f27966 JL |
919 | /* An 8bit memory indirect instruction (jmp/jsr). |
920 | ||
921 | There's several things that need to be done to handle | |
922 | this relocation. | |
923 | ||
924 | If this is a reloc against the absolute symbol, then | |
925 | we should handle it just R_RELBYTE. Likewise if it's | |
926 | for a symbol with a value ge 0 and le 0xff. | |
927 | ||
928 | Otherwise it's a jump/call through the function vector, | |
929 | and the linker is expected to set up the function vector | |
930 | and put the right value into the jump/call instruction. */ | |
931 | case R_MEM_INDIRECT: | |
932 | { | |
933 | /* We need to find the symbol so we can determine it's | |
934 | address in the function vector table. */ | |
935 | asymbol *symbol; | |
936 | bfd_vma value; | |
937 | char *name; | |
938 | struct funcvec_hash_entry *h; | |
939 | asection *vectors_sec = h8300_coff_hash_table (link_info)->vectors_sec; | |
940 | ||
941 | /* First see if this is a reloc against the absolute symbol | |
942 | or against a symbol with a nonnegative value <= 0xff. */ | |
943 | symbol = *(reloc->sym_ptr_ptr); | |
944 | value = bfd_coff_reloc16_get_value (reloc, link_info, input_section); | |
945 | if (symbol == bfd_abs_section_ptr->symbol | |
946 | || (value >= 0 && value <= 0xff)) | |
947 | { | |
948 | /* This should be handled in a manner very similar to | |
949 | R_RELBYTES. If the value is in range, then just slam | |
950 | the value into the right location. Else trigger a | |
951 | reloc overflow callback. */ | |
952 | if (value >= 0 && value <= 0xff) | |
953 | { | |
954 | bfd_put_8 (abfd, value, data + dst_address); | |
955 | dst_address += 1; | |
956 | src_address += 1; | |
957 | } | |
958 | else | |
959 | { | |
960 | if (! ((*link_info->callbacks->reloc_overflow) | |
961 | (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr), | |
962 | reloc->howto->name, reloc->addend, input_section->owner, | |
963 | input_section, reloc->address))) | |
964 | abort (); | |
965 | } | |
966 | break; | |
967 | } | |
968 | ||
969 | /* This is a jump/call through a function vector, and we're | |
970 | expected to create the function vector ourselves. | |
971 | ||
972 | First look up this symbol in the linker hash table -- we need | |
973 | the derived linker symbol which holds this symbol's index | |
974 | in the function vector. */ | |
975 | name = symbol->name; | |
976 | if (symbol->flags & BSF_LOCAL) | |
977 | { | |
978 | char *new_name = bfd_malloc (strlen (name) + 9); | |
979 | if (new_name == NULL) | |
980 | abort (); | |
981 | ||
982 | strcpy (new_name, name); | |
983 | sprintf (new_name + strlen (name), "_%08x", | |
984 | (int)symbol->section); | |
985 | name = new_name; | |
986 | } | |
987 | ||
988 | h = funcvec_hash_lookup (h8300_coff_hash_table (link_info)->funcvec_hash_table, | |
989 | name, false, false); | |
990 | ||
991 | /* This shouldn't ever happen. If it does that means we've got | |
992 | data corruption of some kind. Aborting seems like a reasonable | |
993 | think to do here. */ | |
994 | if (h == NULL || vectors_sec == NULL) | |
995 | abort (); | |
996 | ||
997 | /* Place the address of the function vector entry into the | |
998 | reloc's address. */ | |
999 | bfd_put_8 (abfd, | |
1000 | vectors_sec->output_offset + h->offset, | |
1001 | data + dst_address); | |
1002 | ||
1003 | dst_address++; | |
1004 | src_address++; | |
1005 | ||
1006 | /* Now create an entry in the function vector itself. */ | |
1007 | if (bfd_get_mach (input_section->owner) == bfd_mach_h8300) | |
1008 | bfd_put_16 (abfd, | |
1009 | bfd_coff_reloc16_get_value (reloc, | |
1010 | link_info, | |
1011 | input_section), | |
1012 | vectors_sec->contents + h->offset); | |
1013 | else if (bfd_get_mach (input_section->owner) == bfd_mach_h8300h) | |
1014 | bfd_put_32 (abfd, | |
1015 | bfd_coff_reloc16_get_value (reloc, | |
1016 | link_info, | |
1017 | input_section), | |
1018 | vectors_sec->contents + h->offset); | |
1019 | else | |
1020 | abort (); | |
1021 | ||
1022 | /* Gross. We've already written the contents of the vector section | |
1023 | before we get here... So we write it again with the new data. */ | |
1024 | bfd_set_section_contents (vectors_sec->output_section->owner, | |
1025 | vectors_sec->output_section, | |
1026 | vectors_sec->contents, | |
1027 | vectors_sec->output_offset, | |
1028 | vectors_sec->_raw_size); | |
1029 | break; | |
1030 | } | |
1031 | ||
1032 | default: | |
14aa9a78 ILT |
1033 | abort (); |
1034 | break; | |
1035 | ||
1036 | } | |
39f27966 | 1037 | |
14aa9a78 ILT |
1038 | *src_ptr = src_address; |
1039 | *dst_ptr = dst_address; | |
39f27966 JL |
1040 | } |
1041 | ||
1042 | ||
1043 | /* Routine for the h8300 linker. | |
1044 | ||
1045 | This routine is necessary to handle the special R_MEM_INDIRECT | |
1046 | relocs on the h8300. It's responsible for generating a vectors | |
1047 | section and attaching it to an input bfd as well as sizing | |
1048 | the vectors section. It also creates our vectors hash table. | |
1049 | ||
1050 | It uses the generic linker routines to actually add the symbols. | |
1051 | from this BFD to the bfd linker hash table. It may add a few | |
1052 | selected static symbols to the bfd linker hash table. */ | |
1053 | ||
1054 | static boolean | |
1055 | h8300_bfd_link_add_symbols(abfd, info) | |
1056 | bfd *abfd; | |
1057 | struct bfd_link_info *info; | |
1058 | { | |
1059 | asection *sec; | |
1060 | struct funcvec_hash_table *funcvec_hash_table; | |
1061 | ||
1062 | /* If we haven't created a vectors section, do so now. */ | |
1063 | if (!h8300_coff_hash_table (info)->vectors_sec) | |
1064 | { | |
1065 | flagword flags; | |
1066 | ||
1067 | /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */ | |
1068 | flags = (SEC_ALLOC | SEC_LOAD | |
1069 | | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY); | |
1070 | h8300_coff_hash_table (info)->vectors_sec = bfd_make_section (abfd, | |
1071 | ".vectors"); | |
1072 | ||
1073 | /* If the section wasn't created, or we couldn't set the flags, | |
1074 | quit quickly now, rather than dieing a painful death later. */ | |
1075 | if (! h8300_coff_hash_table (info)->vectors_sec | |
1076 | || ! bfd_set_section_flags (abfd, | |
1077 | h8300_coff_hash_table(info)->vectors_sec, | |
1078 | flags)) | |
1079 | return false; | |
1080 | ||
1081 | /* Also create the vector hash table. */ | |
1082 | funcvec_hash_table = ((struct funcvec_hash_table *) | |
1083 | bfd_alloc (abfd, sizeof (struct funcvec_hash_table))); | |
1084 | ||
1085 | if (!funcvec_hash_table) | |
1086 | return false; | |
1087 | ||
1088 | /* And initialize the funcvec hash table. */ | |
1089 | if (!funcvec_hash_table_init (funcvec_hash_table, abfd, | |
1090 | funcvec_hash_newfunc)) | |
1091 | { | |
1092 | bfd_release (abfd, funcvec_hash_table); | |
1093 | return false; | |
1094 | } | |
1095 | ||
1096 | /* Store away a pointer to the funcvec hash table. */ | |
1097 | h8300_coff_hash_table (info)->funcvec_hash_table = funcvec_hash_table; | |
1098 | } | |
1099 | ||
1100 | /* Load up the function vector hash table. */ | |
1101 | funcvec_hash_table = h8300_coff_hash_table (info)->funcvec_hash_table; | |
1102 | ||
1103 | /* Add the symbols using the generic code. */ | |
1104 | _bfd_generic_link_add_symbols (abfd, info); | |
1105 | ||
1106 | /* Now scan the relocs for all the sections in this bfd; create | |
1107 | additional space in the .vectors section as needed. */ | |
1108 | for (sec = abfd->sections; sec; sec = sec->next) | |
1109 | { | |
1110 | unsigned long reloc_size, reloc_count, i; | |
1111 | asymbol **symbols; | |
1112 | arelent **relocs; | |
1113 | ||
1114 | /* Suck in the relocs, symbols & canonicalize them. */ | |
1115 | reloc_size = bfd_get_reloc_upper_bound (abfd, sec); | |
1116 | if (reloc_size <= 0) | |
1117 | continue; | |
1118 | ||
1119 | relocs = (arelent **)bfd_malloc ((size_t)reloc_size); | |
1120 | if (!relocs) | |
1121 | return false; | |
1122 | ||
1123 | /* The symbols should have been read in by _bfd_generic link_add_symbols | |
1124 | call abovec, so we can cheat and use the pointer to them that was | |
1125 | saved in the above call. */ | |
1126 | symbols = _bfd_generic_link_get_symbols(abfd); | |
1127 | reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols); | |
1128 | ||
1129 | /* Now walk through all the relocations in this section. */ | |
1130 | for (i = 0; i < reloc_count; i++) | |
1131 | { | |
1132 | arelent *reloc = relocs[i]; | |
1133 | asymbol *symbol = *(reloc->sym_ptr_ptr); | |
1134 | char *name; | |
1135 | ||
1136 | /* We've got an indirect reloc. See if we need to add it | |
1137 | to the function vector table. At this point, we have | |
1138 | to add a new entry for each unique symbol referenced | |
1139 | by an R_MEM_INDIRECT relocation except for a reloc | |
1140 | against the absolute section symbol. */ | |
1141 | if (reloc->howto->type == R_MEM_INDIRECT | |
1142 | && symbol != bfd_abs_section_ptr->symbol) | |
1143 | ||
1144 | { | |
1145 | struct funcvec_hash_entry *h; | |
1146 | ||
1147 | name = symbol->name; | |
1148 | if (symbol->flags & BSF_LOCAL) | |
1149 | { | |
1150 | char *new_name = bfd_malloc (strlen (name) + 9); | |
1151 | ||
1152 | if (new_name == NULL) | |
1153 | abort (); | |
1154 | ||
1155 | strcpy (new_name, name); | |
1156 | sprintf (new_name + strlen (name), "_%08x", | |
1157 | (int)symbol->section); | |
1158 | name = new_name; | |
1159 | } | |
1160 | ||
1161 | /* Look this symbol up in the function vector hash table. */ | |
1162 | h = funcvec_hash_lookup (h8300_coff_hash_table (info)->funcvec_hash_table, | |
1163 | name, false, false); | |
1164 | ||
1165 | ||
1166 | /* If this symbol isn't already in the hash table, add | |
1167 | it and bump up the size of the hash table. */ | |
1168 | if (h == NULL) | |
1169 | { | |
1170 | h = funcvec_hash_lookup (h8300_coff_hash_table (info)->funcvec_hash_table, | |
1171 | name, true, true); | |
1172 | if (h == NULL) | |
1173 | { | |
1174 | free (relocs); | |
1175 | return false; | |
1176 | } | |
1177 | ||
1178 | /* Bump the size of the vectors section. Each vector | |
1179 | takes 2 bytes on the h8300 and 4 bytes on the h8300h. */ | |
1180 | if (bfd_get_mach (abfd) == bfd_mach_h8300) | |
1181 | h8300_coff_hash_table (info)->vectors_sec->_raw_size += 2; | |
1182 | else if (bfd_get_mach (abfd) == bfd_mach_h8300h) | |
1183 | h8300_coff_hash_table (info)->vectors_sec->_raw_size += 4; | |
1184 | } | |
1185 | } | |
1186 | } | |
1187 | ||
1188 | /* We're done with the relocations, release them. */ | |
1189 | free (relocs); | |
1190 | } | |
1191 | ||
1192 | /* Now actually allocate some space for the function vector. It's | |
1193 | wasteful to do this more than once, but this is easier. */ | |
1194 | if (h8300_coff_hash_table (info)->vectors_sec->_raw_size != 0) | |
1195 | { | |
1196 | /* Free the old contents. */ | |
1197 | if (h8300_coff_hash_table (info)->vectors_sec->contents) | |
1198 | free (h8300_coff_hash_table (info)->vectors_sec->contents); | |
1199 | ||
1200 | /* Allocate new contents. */ | |
1201 | h8300_coff_hash_table (info)->vectors_sec->contents | |
1202 | = bfd_malloc (h8300_coff_hash_table (info)->vectors_sec->_raw_size); | |
1203 | } | |
14aa9a78 | 1204 | |
39f27966 | 1205 | return true; |
14aa9a78 ILT |
1206 | } |
1207 | ||
1208 | #define coff_reloc16_extra_cases h8300_reloc16_extra_cases | |
1209 | #define coff_reloc16_estimate h8300_reloc16_estimate | |
39f27966 JL |
1210 | #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols |
1211 | #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create | |
14aa9a78 | 1212 | |
69b799df | 1213 | #define COFF_LONG_FILENAMES |
b4e42a64 SC |
1214 | #include "coffcode.h" |
1215 | ||
1216 | ||
14aa9a78 | 1217 | #undef coff_bfd_get_relocated_section_contents |
294eaca4 | 1218 | #undef coff_bfd_relax_section |
4991ebb9 ILT |
1219 | #define coff_bfd_get_relocated_section_contents \ |
1220 | bfd_coff_reloc16_get_relocated_section_contents | |
14aa9a78 ILT |
1221 | #define coff_bfd_relax_section bfd_coff_reloc16_relax_section |
1222 | ||
1223 | ||
b4e42a64 | 1224 | |
2f3508ad | 1225 | const bfd_target h8300coff_vec = |
b4e42a64 | 1226 | { |
14aa9a78 | 1227 | "coff-h8300", /* name */ |
b4e42a64 | 1228 | bfd_target_coff_flavour, |
d3e572fe ILT |
1229 | BFD_ENDIAN_BIG, /* data byte order is big */ |
1230 | BFD_ENDIAN_BIG, /* header byte order is big */ | |
b4e42a64 SC |
1231 | |
1232 | (HAS_RELOC | EXEC_P | /* object flags */ | |
1233 | HAS_LINENO | HAS_DEBUG | | |
4991ebb9 | 1234 | HAS_SYMS | HAS_LOCALS | WP_TEXT | BFD_IS_RELAXABLE ), |
14aa9a78 ILT |
1235 | (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC), /* section flags */ |
1236 | '_', /* leading char */ | |
b4e42a64 SC |
1237 | '/', /* ar_pad_char */ |
1238 | 15, /* ar_max_namelen */ | |
14aa9a78 ILT |
1239 | bfd_getb64, bfd_getb_signed_64, bfd_putb64, |
1240 | bfd_getb32, bfd_getb_signed_32, bfd_putb32, | |
1241 | bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* data */ | |
1242 | bfd_getb64, bfd_getb_signed_64, bfd_putb64, | |
1243 | bfd_getb32, bfd_getb_signed_32, bfd_putb32, | |
1244 | bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* hdrs */ | |
1245 | ||
1246 | {_bfd_dummy_target, coff_object_p, /* bfd_check_format */ | |
1247 | bfd_generic_archive_p, _bfd_dummy_target}, | |
1248 | {bfd_false, coff_mkobject, _bfd_generic_mkarchive, /* bfd_set_format */ | |
1249 | bfd_false}, | |
b4e42a64 | 1250 | {bfd_false, coff_write_object_contents, /* bfd_write_contents */ |
14aa9a78 | 1251 | _bfd_write_archive_contents, bfd_false}, |
b4e42a64 | 1252 | |
6812b607 ILT |
1253 | BFD_JUMP_TABLE_GENERIC (coff), |
1254 | BFD_JUMP_TABLE_COPY (coff), | |
1255 | BFD_JUMP_TABLE_CORE (_bfd_nocore), | |
1256 | BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff), | |
1257 | BFD_JUMP_TABLE_SYMBOLS (coff), | |
1258 | BFD_JUMP_TABLE_RELOCS (coff), | |
1259 | BFD_JUMP_TABLE_WRITE (coff), | |
1260 | BFD_JUMP_TABLE_LINK (coff), | |
2f3508ad | 1261 | BFD_JUMP_TABLE_DYNAMIC (_bfd_nodynamic), |
6812b607 | 1262 | |
14aa9a78 | 1263 | COFF_SWAP_TABLE, |
b4e42a64 | 1264 | }; |