This patch adds support for Cortex-X1 for ARM.
[deliverable/binutils-gdb.git] / bfd / cpu-arm.c
CommitLineData
252b5132 1/* BFD support for the ARM processor
b3adc24a 2 Copyright (C) 1994-2020 Free Software Foundation, Inc.
252b5132
RH
3 Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
4
e2fd756b 5 This file is part of BFD, the Binary File Descriptor library.
252b5132 6
e2fd756b
NC
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
e2fd756b 10 (at your option) any later version.
252b5132 11
e2fd756b
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
e2fd756b
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
252b5132 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
252b5132 24#include "libbfd.h"
5a6c6817 25#include "libiberty.h"
f37164d7 26#include "cpu-arm.h"
252b5132 27
252b5132
RH
28/* This routine is provided two arch_infos and works out which ARM
29 machine which would be compatible with both and returns a pointer
e2fd756b 30 to its info structure. */
252b5132
RH
31
32static const bfd_arch_info_type *
f075ee0c 33compatible (const bfd_arch_info_type *a, const bfd_arch_info_type *b)
252b5132 34{
e2fd756b 35 /* If a & b are for different architecture we can do nothing. */
252b5132
RH
36 if (a->arch != b->arch)
37 return NULL;
38
e2fd756b 39 /* If a & b are for the same machine then all is well. */
252b5132
RH
40 if (a->mach == b->mach)
41 return a;
42
e2fd756b
NC
43 /* Otherwise if either a or b is the 'default' machine
44 then it can be polymorphed into the other. */
252b5132
RH
45 if (a->the_default)
46 return b;
71f6b586 47
252b5132
RH
48 if (b->the_default)
49 return a;
50
e2fd756b
NC
51 /* So far all newer ARM architecture cores are
52 supersets of previous cores. */
252b5132
RH
53 if (a->mach < b->mach)
54 return b;
55 else if (a->mach > b->mach)
56 return a;
57
e2fd756b 58 /* Never reached! */
252b5132
RH
59 return NULL;
60}
61
62static struct
63{
e2fd756b
NC
64 unsigned int mach;
65 char * name;
252b5132
RH
66}
67processors[] =
68{
b5ab3163
TP
69 { bfd_mach_arm_2, "arm2" },
70 { bfd_mach_arm_2a, "arm250" },
71 { bfd_mach_arm_2a, "arm3" },
72 { bfd_mach_arm_3, "arm6" },
73 { bfd_mach_arm_3, "arm60" },
74 { bfd_mach_arm_3, "arm600" },
75 { bfd_mach_arm_3, "arm610" },
76 { bfd_mach_arm_3, "arm620" },
77 { bfd_mach_arm_3, "arm7" },
78 { bfd_mach_arm_3, "arm70" },
79 { bfd_mach_arm_3, "arm700" },
80 { bfd_mach_arm_3, "arm700i" },
81 { bfd_mach_arm_3, "arm710" },
82 { bfd_mach_arm_3, "arm7100" },
83 { bfd_mach_arm_3, "arm710c" },
84 { bfd_mach_arm_4T, "arm710t" },
85 { bfd_mach_arm_3, "arm720" },
86 { bfd_mach_arm_4T, "arm720t" },
87 { bfd_mach_arm_4T, "arm740t" },
88 { bfd_mach_arm_3, "arm7500" },
89 { bfd_mach_arm_3, "arm7500fe" },
90 { bfd_mach_arm_3, "arm7d" },
91 { bfd_mach_arm_3, "arm7di" },
92 { bfd_mach_arm_3M, "arm7dm" },
93 { bfd_mach_arm_3M, "arm7dmi" },
94 { bfd_mach_arm_4T, "arm7t" },
95 { bfd_mach_arm_4T, "arm7tdmi" },
96 { bfd_mach_arm_4T, "arm7tdmi-s" },
97 { bfd_mach_arm_3M, "arm7m" },
98 { bfd_mach_arm_4, "arm8" },
99 { bfd_mach_arm_4, "arm810" },
100 { bfd_mach_arm_4, "arm9" },
101 { bfd_mach_arm_4T, "arm920" },
102 { bfd_mach_arm_4T, "arm920t" },
103 { bfd_mach_arm_4T, "arm922t" },
104 { bfd_mach_arm_5TEJ, "arm926ej" },
105 { bfd_mach_arm_5TEJ, "arm926ejs" },
106 { bfd_mach_arm_5TEJ, "arm926ej-s" },
107 { bfd_mach_arm_4T, "arm940t" },
108 { bfd_mach_arm_5TE, "arm946e" },
109 { bfd_mach_arm_5TE, "arm946e-r0" },
110 { bfd_mach_arm_5TE, "arm946e-s" },
111 { bfd_mach_arm_5TE, "arm966e" },
112 { bfd_mach_arm_5TE, "arm966e-r0" },
113 { bfd_mach_arm_5TE, "arm966e-s" },
114 { bfd_mach_arm_5TE, "arm968e-s" },
115 { bfd_mach_arm_5TE, "arm9e" },
116 { bfd_mach_arm_5TE, "arm9e-r0" },
117 { bfd_mach_arm_4T, "arm9tdmi" },
118 { bfd_mach_arm_5TE, "arm1020" },
119 { bfd_mach_arm_5T, "arm1020t" },
120 { bfd_mach_arm_5TE, "arm1020e" },
121 { bfd_mach_arm_5TE, "arm1022e" },
122 { bfd_mach_arm_5TEJ, "arm1026ejs" },
123 { bfd_mach_arm_5TEJ, "arm1026ej-s" },
124 { bfd_mach_arm_5TE, "arm10e" },
125 { bfd_mach_arm_5T, "arm10t" },
126 { bfd_mach_arm_5T, "arm10tdmi" },
127 { bfd_mach_arm_6, "arm1136j-s" },
128 { bfd_mach_arm_6, "arm1136js" },
129 { bfd_mach_arm_6, "arm1136jf-s" },
130 { bfd_mach_arm_6, "arm1136jfs" },
131 { bfd_mach_arm_6KZ, "arm1176jz-s" },
132 { bfd_mach_arm_6KZ, "arm1176jzf-s" },
133 { bfd_mach_arm_6T2, "arm1156t2-s" },
134 { bfd_mach_arm_6T2, "arm1156t2f-s" },
135 { bfd_mach_arm_7, "cortex-a5" },
136 { bfd_mach_arm_7, "cortex-a7" },
137 { bfd_mach_arm_7, "cortex-a8" },
138 { bfd_mach_arm_7, "cortex-a9" },
139 { bfd_mach_arm_7, "cortex-a12" },
140 { bfd_mach_arm_7, "cortex-a15" },
141 { bfd_mach_arm_7, "cortex-a17" },
142 { bfd_mach_arm_8, "cortex-a32" },
143 { bfd_mach_arm_8, "cortex-a35" },
144 { bfd_mach_arm_8, "cortex-a53" },
145 { bfd_mach_arm_8, "cortex-a55" },
146 { bfd_mach_arm_8, "cortex-a57" },
147 { bfd_mach_arm_8, "cortex-a72" },
148 { bfd_mach_arm_8, "cortex-a73" },
149 { bfd_mach_arm_8, "cortex-a75" },
150 { bfd_mach_arm_8, "cortex-a76" },
0535e5d7
DZ
151 { bfd_mach_arm_8, "cortex-a76ae" },
152 { bfd_mach_arm_8, "cortex-a77" },
b5ab3163
TP
153 { bfd_mach_arm_6SM, "cortex-m0" },
154 { bfd_mach_arm_6SM, "cortex-m0plus" },
155 { bfd_mach_arm_6SM, "cortex-m1" },
156 { bfd_mach_arm_8M_BASE, "cortex-m23" },
157 { bfd_mach_arm_7, "cortex-m3" },
158 { bfd_mach_arm_8M_MAIN, "cortex-m33" },
0535e5d7 159 { bfd_mach_arm_8M_MAIN, "cortex-m35p" },
b5ab3163
TP
160 { bfd_mach_arm_7EM, "cortex-m4" },
161 { bfd_mach_arm_7EM, "cortex-m7" },
162 { bfd_mach_arm_7, "cortex-r4" },
163 { bfd_mach_arm_7, "cortex-r4f" },
164 { bfd_mach_arm_7, "cortex-r5" },
165 { bfd_mach_arm_8R, "cortex-r52" },
166 { bfd_mach_arm_7, "cortex-r7" },
167 { bfd_mach_arm_7, "cortex-r8" },
394e9bf6 168 { bfd_mach_arm_8, "cortex-x1" },
b5ab3163
TP
169 { bfd_mach_arm_4T, "ep9312" },
170 { bfd_mach_arm_8, "exynos-m1" },
171 { bfd_mach_arm_4, "fa526" },
172 { bfd_mach_arm_5TE, "fa606te" },
173 { bfd_mach_arm_5TE, "fa616te" },
174 { bfd_mach_arm_4, "fa626" },
175 { bfd_mach_arm_5TE, "fa626te" },
176 { bfd_mach_arm_5TE, "fa726te" },
177 { bfd_mach_arm_5TE, "fmp626" },
178 { bfd_mach_arm_XScale, "i80200" },
179 { bfd_mach_arm_7, "marvell-pj4" },
180 { bfd_mach_arm_7, "marvell-whitney" },
181 { bfd_mach_arm_6K, "mpcore" },
182 { bfd_mach_arm_6K, "mpcorenovfp" },
183 { bfd_mach_arm_4, "sa1" },
184 { bfd_mach_arm_4, "strongarm" },
185 { bfd_mach_arm_4, "strongarm1" },
186 { bfd_mach_arm_4, "strongarm110" },
187 { bfd_mach_arm_4, "strongarm1100" },
188 { bfd_mach_arm_4, "strongarm1110" },
189 { bfd_mach_arm_XScale, "xscale" },
190 { bfd_mach_arm_8, "xgene1" },
191 { bfd_mach_arm_8, "xgene2" },
192 { bfd_mach_arm_ep9312, "ep9312" },
193 { bfd_mach_arm_iWMMXt, "iwmmxt" },
194 { bfd_mach_arm_iWMMXt2, "iwmmxt2" },
195 { bfd_mach_arm_unknown, "arm_any" }
252b5132
RH
196};
197
b34976b6 198static bfd_boolean
f075ee0c 199scan (const struct bfd_arch_info *info, const char *string)
252b5132
RH
200{
201 int i;
202
e2fd756b 203 /* First test for an exact match. */
252b5132 204 if (strcasecmp (string, info->printable_name) == 0)
b34976b6 205 return TRUE;
252b5132 206
e2fd756b 207 /* Next check for a processor name instead of an Architecture name. */
252b5132
RH
208 for (i = sizeof (processors) / sizeof (processors[0]); i--;)
209 {
e2fd756b 210 if (strcasecmp (string, processors [i].name) == 0)
252b5132
RH
211 break;
212 }
213
e2fd756b 214 if (i != -1 && info->mach == processors [i].mach)
b34976b6 215 return TRUE;
252b5132 216
e2fd756b 217 /* Finally check for the default architecture. */
252b5132
RH
218 if (strcasecmp (string, "arm") == 0)
219 return info->the_default;
71f6b586 220
b34976b6 221 return FALSE;
252b5132
RH
222}
223
252b5132 224#define N(number, print, default, next) \
b7761f11 225{ 32, 32, 8, bfd_arch_arm, number, "arm", print, 4, default, compatible, \
aebcfb76 226 scan, bfd_arch_default_fill, next, 0 }
252b5132
RH
227
228static const bfd_arch_info_type arch_info_struct[] =
71f6b586 229{
c0c468d5
TP
230 N (bfd_mach_arm_2, "armv2", FALSE, & arch_info_struct[1]),
231 N (bfd_mach_arm_2a, "armv2a", FALSE, & arch_info_struct[2]),
232 N (bfd_mach_arm_3, "armv3", FALSE, & arch_info_struct[3]),
233 N (bfd_mach_arm_3M, "armv3m", FALSE, & arch_info_struct[4]),
234 N (bfd_mach_arm_4, "armv4", FALSE, & arch_info_struct[5]),
235 N (bfd_mach_arm_4T, "armv4t", FALSE, & arch_info_struct[6]),
236 N (bfd_mach_arm_5, "armv5", FALSE, & arch_info_struct[7]),
237 N (bfd_mach_arm_5T, "armv5t", FALSE, & arch_info_struct[8]),
238 N (bfd_mach_arm_5TE, "armv5te", FALSE, & arch_info_struct[9]),
239 N (bfd_mach_arm_XScale, "xscale", FALSE, & arch_info_struct[10]),
240 N (bfd_mach_arm_ep9312, "ep9312", FALSE, & arch_info_struct[11]),
241 N (bfd_mach_arm_iWMMXt, "iwmmxt", FALSE, & arch_info_struct[12]),
242 N (bfd_mach_arm_iWMMXt2, "iwmmxt2", FALSE, & arch_info_struct[13]),
243 N (bfd_mach_arm_5TEJ, "armv5tej", FALSE, & arch_info_struct[14]),
244 N (bfd_mach_arm_6, "armv6", FALSE, & arch_info_struct[15]),
245 N (bfd_mach_arm_6KZ, "armv6kz", FALSE, & arch_info_struct[16]),
246 N (bfd_mach_arm_6T2, "armv6t2", FALSE, & arch_info_struct[17]),
247 N (bfd_mach_arm_6K, "armv6k", FALSE, & arch_info_struct[18]),
248 N (bfd_mach_arm_7, "armv7", FALSE, & arch_info_struct[19]),
249 N (bfd_mach_arm_6M, "armv6-m", FALSE, & arch_info_struct[20]),
250 N (bfd_mach_arm_6SM, "armv6s-m", FALSE, & arch_info_struct[21]),
251 N (bfd_mach_arm_7EM, "armv7e-m", FALSE, & arch_info_struct[22]),
252 N (bfd_mach_arm_8, "armv8-a", FALSE, & arch_info_struct[23]),
253 N (bfd_mach_arm_8R, "armv8-r", FALSE, & arch_info_struct[24]),
254 N (bfd_mach_arm_8M_BASE, "armv8-m.base", FALSE, & arch_info_struct[25]),
255 N (bfd_mach_arm_8M_MAIN, "armv8-m.main", FALSE, & arch_info_struct[26]),
031254f2 256 N (bfd_mach_arm_8_1M_MAIN, "armv8.1-m.main", FALSE, & arch_info_struct[27]),
c0c468d5 257 N (bfd_mach_arm_unknown, "arm_any", FALSE, NULL)
252b5132
RH
258};
259
260const bfd_arch_info_type bfd_arm_arch =
b34976b6 261 N (0, "arm", TRUE, & arch_info_struct[0]);
5a6c6817
NC
262
263/* Support functions used by both the COFF and ELF versions of the ARM port. */
264
5c4491d3 265/* Handle the merging of the 'machine' settings of input file IBFD
5a6c6817
NC
266 and an output file OBFD. These values actually represent the
267 different possible ARM architecture variants.
268 Returns TRUE if they were merged successfully or FALSE otherwise. */
269
270bfd_boolean
f075ee0c 271bfd_arm_merge_machines (bfd *ibfd, bfd *obfd)
5a6c6817
NC
272{
273 unsigned int in = bfd_get_mach (ibfd);
274 unsigned int out = bfd_get_mach (obfd);
275
276 /* If the output architecture is unknown, we now have a value to set. */
277 if (out == bfd_mach_arm_unknown)
278 bfd_set_arch_mach (obfd, bfd_arch_arm, in);
279
5c4491d3 280 /* If the input architecture is unknown,
5a6c6817
NC
281 then so must be the output architecture. */
282 else if (in == bfd_mach_arm_unknown)
283 /* FIXME: We ought to have some way to
284 override this on the command line. */
285 bfd_set_arch_mach (obfd, bfd_arch_arm, bfd_mach_arm_unknown);
286
287 /* If they are the same then nothing needs to be done. */
288 else if (out == in)
289 ;
290
291 /* Otherwise the general principle that a earlier architecture can be
5c4491d3 292 linked with a later architecture to produce a binary that will execute
5a6c6817
NC
293 on the later architecture.
294
295 We fail however if we attempt to link a Cirrus EP9312 binary with an
296 Intel XScale binary, since these architecture have co-processors which
297 will not both be present on the same physical hardware. */
298 else if (in == bfd_mach_arm_ep9312
2d447fca
JM
299 && (out == bfd_mach_arm_XScale
300 || out == bfd_mach_arm_iWMMXt
301 || out == bfd_mach_arm_iWMMXt2))
5a6c6817 302 {
695344c0 303 /* xgettext: c-format */
dc1e8a47
AM
304 _bfd_error_handler (_("error: %pB is compiled for the EP9312, "
305 "whereas %pB is compiled for XScale"),
d003868e 306 ibfd, obfd);
5a6c6817
NC
307 bfd_set_error (bfd_error_wrong_format);
308 return FALSE;
309 }
310 else if (out == bfd_mach_arm_ep9312
2d447fca
JM
311 && (in == bfd_mach_arm_XScale
312 || in == bfd_mach_arm_iWMMXt
313 || in == bfd_mach_arm_iWMMXt2))
5a6c6817 314 {
695344c0 315 /* xgettext: c-format */
dc1e8a47
AM
316 _bfd_error_handler (_("error: %pB is compiled for the EP9312, "
317 "whereas %pB is compiled for XScale"),
d003868e 318 obfd, ibfd);
5a6c6817
NC
319 bfd_set_error (bfd_error_wrong_format);
320 return FALSE;
321 }
322 else if (in > out)
323 bfd_set_arch_mach (obfd, bfd_arch_arm, in);
324 /* else
325 Nothing to do. */
326
327 return TRUE;
328}
329
330typedef struct
331{
332 unsigned char namesz[4]; /* Size of entry's owner string. */
333 unsigned char descsz[4]; /* Size of the note descriptor. */
334 unsigned char type[4]; /* Interpretation of the descriptor. */
335 char name[1]; /* Start of the name+desc data. */
336} arm_Note;
337
338static bfd_boolean
f075ee0c
AM
339arm_check_note (bfd *abfd,
340 bfd_byte *buffer,
341 bfd_size_type buffer_size,
342 const char *expected_name,
343 char **description_return)
5a6c6817
NC
344{
345 unsigned long namesz;
346 unsigned long descsz;
347 unsigned long type;
07d6d2b8 348 char * descr;
5a6c6817
NC
349
350 if (buffer_size < offsetof (arm_Note, name))
351 return FALSE;
352
353 /* We have to extract the values this way to allow for a
354 host whose endian-ness is different from the target. */
355 namesz = bfd_get_32 (abfd, buffer);
356 descsz = bfd_get_32 (abfd, buffer + offsetof (arm_Note, descsz));
357 type = bfd_get_32 (abfd, buffer + offsetof (arm_Note, type));
f075ee0c 358 descr = (char *) buffer + offsetof (arm_Note, name);
5a6c6817
NC
359
360 /* Check for buffer overflow. */
361 if (namesz + descsz + offsetof (arm_Note, name) > buffer_size)
362 return FALSE;
363
364 if (expected_name == NULL)
365 {
366 if (namesz != 0)
367 return FALSE;
368 }
369 else
68ffbac6 370 {
60d8b524 371 if (namesz != ((strlen (expected_name) + 1 + 3) & ~3))
5a6c6817 372 return FALSE;
68ffbac6 373
5a6c6817
NC
374 if (strcmp (descr, expected_name) != 0)
375 return FALSE;
376
377 descr += (namesz + 3) & ~3;
378 }
379
380 /* FIXME: We should probably check the type as well. */
c7e2358a 381 (void) type;
5a6c6817
NC
382
383 if (description_return != NULL)
384 * description_return = descr;
385
386 return TRUE;
387}
388
07d6d2b8 389#define NOTE_ARCH_STRING "arch: "
5a6c6817
NC
390
391bfd_boolean
f075ee0c 392bfd_arm_update_notes (bfd *abfd, const char *note_section)
5a6c6817 393{
07d6d2b8
AM
394 asection * arm_arch_section;
395 bfd_size_type buffer_size;
396 bfd_byte * buffer;
397 char * arch_string;
398 char * expected;
5a6c6817
NC
399
400 /* Look for a note section. If one is present check the architecture
401 string encoded in it, and set it to the current architecture if it is
402 different. */
403 arm_arch_section = bfd_get_section_by_name (abfd, note_section);
404
405 if (arm_arch_section == NULL)
406 return TRUE;
407
eea6121a 408 buffer_size = arm_arch_section->size;
5a6c6817
NC
409 if (buffer_size == 0)
410 return FALSE;
411
eea6121a 412 if (!bfd_malloc_and_get_section (abfd, arm_arch_section, &buffer))
5a6c6817
NC
413 goto FAIL;
414
415 /* Parse the note. */
416 if (! arm_check_note (abfd, buffer, buffer_size, NOTE_ARCH_STRING, & arch_string))
417 goto FAIL;
418
b5ab3163
TP
419 /* Check the architecture in the note against the architecture of the bfd.
420 Newer architectures versions should not be added here as build attribute
421 are a better mechanism to convey ISA used. */
5a6c6817
NC
422 switch (bfd_get_mach (abfd))
423 {
424 default:
425 case bfd_mach_arm_unknown: expected = "unknown"; break;
426 case bfd_mach_arm_2: expected = "armv2"; break;
427 case bfd_mach_arm_2a: expected = "armv2a"; break;
428 case bfd_mach_arm_3: expected = "armv3"; break;
429 case bfd_mach_arm_3M: expected = "armv3M"; break;
430 case bfd_mach_arm_4: expected = "armv4"; break;
431 case bfd_mach_arm_4T: expected = "armv4t"; break;
432 case bfd_mach_arm_5: expected = "armv5"; break;
433 case bfd_mach_arm_5T: expected = "armv5t"; break;
434 case bfd_mach_arm_5TE: expected = "armv5te"; break;
435 case bfd_mach_arm_XScale: expected = "XScale"; break;
436 case bfd_mach_arm_ep9312: expected = "ep9312"; break;
437 case bfd_mach_arm_iWMMXt: expected = "iWMMXt"; break;
2d447fca 438 case bfd_mach_arm_iWMMXt2: expected = "iWMMXt2"; break;
5a6c6817
NC
439 }
440
441 if (strcmp (arch_string, expected) != 0)
442 {
f075ee0c
AM
443 strcpy ((char *) buffer + (offsetof (arm_Note, name)
444 + ((strlen (NOTE_ARCH_STRING) + 3) & ~3)),
445 expected);
5a6c6817
NC
446
447 if (! bfd_set_section_contents (abfd, arm_arch_section, buffer,
448 (file_ptr) 0, buffer_size))
449 {
4eca0228 450 _bfd_error_handler
695344c0 451 /* xgettext: c-format */
871b3ab2 452 (_("warning: unable to update contents of %s section in %pB"),
dae82561 453 note_section, abfd);
5a6c6817
NC
454 goto FAIL;
455 }
456 }
457
458 free (buffer);
459 return TRUE;
460
461 FAIL:
c9594989 462 free (buffer);
5a6c6817
NC
463 return FALSE;
464}
465
466
467static struct
468{
469 const char * string;
470 unsigned int mach;
471}
b5ab3163
TP
472
473/* Newer architectures versions should not be added here as build attribute are
474 a better mechanism to convey ISA used. */
5a6c6817
NC
475architectures[] =
476{
477 { "armv2", bfd_mach_arm_2 },
478 { "armv2a", bfd_mach_arm_2a },
479 { "armv3", bfd_mach_arm_3 },
480 { "armv3M", bfd_mach_arm_3M },
481 { "armv4", bfd_mach_arm_4 },
482 { "armv4t", bfd_mach_arm_4T },
483 { "armv5", bfd_mach_arm_5 },
484 { "armv5t", bfd_mach_arm_5T },
485 { "armv5te", bfd_mach_arm_5TE },
486 { "XScale", bfd_mach_arm_XScale },
487 { "ep9312", bfd_mach_arm_ep9312 },
2d447fca 488 { "iWMMXt", bfd_mach_arm_iWMMXt },
99914dfd
NC
489 { "iWMMXt2", bfd_mach_arm_iWMMXt2 },
490 { "arm_any", bfd_mach_arm_unknown }
5a6c6817
NC
491};
492
493/* Extract the machine number stored in a note section. */
494unsigned int
f075ee0c 495bfd_arm_get_mach_from_notes (bfd *abfd, const char *note_section)
5a6c6817 496{
07d6d2b8
AM
497 asection * arm_arch_section;
498 bfd_size_type buffer_size;
499 bfd_byte * buffer;
500 char * arch_string;
501 int i;
5a6c6817
NC
502
503 /* Look for a note section. If one is present check the architecture
504 string encoded in it, and set it to the current architecture if it is
505 different. */
506 arm_arch_section = bfd_get_section_by_name (abfd, note_section);
507
508 if (arm_arch_section == NULL)
509 return bfd_mach_arm_unknown;
510
eea6121a 511 buffer_size = arm_arch_section->size;
5a6c6817
NC
512 if (buffer_size == 0)
513 return bfd_mach_arm_unknown;
514
eea6121a 515 if (!bfd_malloc_and_get_section (abfd, arm_arch_section, &buffer))
5a6c6817
NC
516 goto FAIL;
517
518 /* Parse the note. */
519 if (! arm_check_note (abfd, buffer, buffer_size, NOTE_ARCH_STRING, & arch_string))
520 goto FAIL;
521
522 /* Interpret the architecture string. */
523 for (i = ARRAY_SIZE (architectures); i--;)
524 if (strcmp (arch_string, architectures[i].string) == 0)
525 {
526 free (buffer);
527 return architectures[i].mach;
528 }
529
530 FAIL:
c9594989 531 free (buffer);
5a6c6817
NC
532 return bfd_mach_arm_unknown;
533}
9d2da7ca
JB
534
535bfd_boolean
b0796911 536bfd_is_arm_special_symbol_name (const char * name, int type)
9d2da7ca 537{
38406048 538 /* The ARM compiler outputs several obsolete forms. Recognize them
efacb0fb
DJ
539 in addition to the standard $a, $t and $d. We are somewhat loose
540 in what we accept here, since the full set is not documented. */
b0796911
PB
541 if (!name || name[0] != '$')
542 return FALSE;
543 if (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
544 type &= BFD_ARM_SPECIAL_SYM_TYPE_MAP;
545 else if (name[1] == 'm' || name[1] == 'f' || name[1] == 'p')
546 type &= BFD_ARM_SPECIAL_SYM_TYPE_TAG;
547 else if (name[1] >= 'a' && name[1] <= 'z')
548 type &= BFD_ARM_SPECIAL_SYM_TYPE_OTHER;
549 else
550 return FALSE;
551
552 return (type != 0 && (name[2] == 0 || name[2] == '.'));
9d2da7ca
JB
553}
554
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