Fix SH2A machine variants in order to correctly select instruction inheritance
[deliverable/binutils-gdb.git] / bfd / cpu-sh.c
CommitLineData
ef230218 1/* BFD library support routines for the Renesas / SuperH SH architecture.
e38bc3b5 2 Copyright 1993, 1994, 1997, 1998, 2000, 2001, 2002, 2003, 2004, 2005
dc810e39 3 Free Software Foundation, Inc.
252b5132
RH
4 Hacked by Steve Chamberlain of Cygnus Support.
5
5177500f 6 This file is part of BFD, the Binary File Descriptor library.
252b5132 7
5177500f
NC
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
252b5132 12
5177500f
NC
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
252b5132 17
5177500f
NC
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
252b5132
RH
21
22#include "bfd.h"
23#include "sysdep.h"
24#include "libbfd.h"
f6f9408f 25#include "../opcodes/sh-opc.h"
252b5132 26
e38bc3b5
NC
27#define SH_NEXT arch_info_struct + 0
28#define SH2_NEXT arch_info_struct + 1
29#define SH2E_NEXT arch_info_struct + 2
30#define SH_DSP_NEXT arch_info_struct + 3
31#define SH3_NEXT arch_info_struct + 4
32#define SH3_NOMMU_NEXT arch_info_struct + 5
33#define SH3_DSP_NEXT arch_info_struct + 6
34#define SH3E_NEXT arch_info_struct + 7
35#define SH4_NEXT arch_info_struct + 8
36#define SH4A_NEXT arch_info_struct + 9
37#define SH4AL_DSP_NEXT arch_info_struct + 10
38#define SH4_NOFPU_NEXT arch_info_struct + 11
39#define SH4_NOMMU_NOFPU_NEXT arch_info_struct + 12
40#define SH4A_NOFPU_NEXT arch_info_struct + 13
41#define SH2A_NEXT arch_info_struct + 14
42#define SH2A_NOFPU_NEXT arch_info_struct + 15
43#define SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT arch_info_struct + 16
44#define SH2A_NOFPU_OR_SH3_NOMMU_NEXT arch_info_struct + 17
45#define SH2A_OR_SH4_NEXT arch_info_struct + 18
46#define SH2A_OR_SH3E_NEXT arch_info_struct + 19
47#define SH64_NEXT NULL
252b5132 48
71f6b586 49static const bfd_arch_info_type arch_info_struct[] =
252b5132 50{
d4845d57 51 {
e38bc3b5
NC
52 32, /* 32 bits in a word. */
53 32, /* 32 bits in an address. */
54 8, /* 8 bits in a byte. */
d4845d57
JR
55 bfd_arch_sh,
56 bfd_mach_sh2,
e38bc3b5
NC
57 "sh", /* Architecture name. */
58 "sh2", /* Machine name. */
d4845d57 59 1,
e38bc3b5 60 FALSE, /* Not the default. */
d4845d57 61 bfd_default_compatible,
a44d7f9c 62 bfd_default_scan,
d4845d57
JR
63 SH2_NEXT
64 },
5177500f 65 {
e38bc3b5
NC
66 32, /* 32 bits in a word. */
67 32, /* 32 bits in an address. */
68 8, /* 8 bits in a byte. */
5177500f
NC
69 bfd_arch_sh,
70 bfd_mach_sh2e,
e38bc3b5
NC
71 "sh", /* Architecture name. */
72 "sh2e", /* Machine name. */
5177500f 73 1,
e38bc3b5 74 FALSE, /* Not the default. */
5177500f
NC
75 bfd_default_compatible,
76 bfd_default_scan,
77 SH2E_NEXT
78 },
d4845d57 79 {
e38bc3b5
NC
80 32, /* 32 bits in a word. */
81 32, /* 32 bits in an address. */
82 8, /* 8 bits in a byte. */
d4845d57
JR
83 bfd_arch_sh,
84 bfd_mach_sh_dsp,
e38bc3b5
NC
85 "sh", /* Architecture name. */
86 "sh-dsp", /* Machine name. */
d4845d57 87 1,
e38bc3b5 88 FALSE, /* Not the default. */
d4845d57 89 bfd_default_compatible,
a44d7f9c 90 bfd_default_scan,
d4845d57
JR
91 SH_DSP_NEXT
92 },
252b5132 93 {
e38bc3b5
NC
94 32, /* 32 bits in a word. */
95 32, /* 32 bits in an address. */
96 8, /* 8 bits in a byte. */
252b5132
RH
97 bfd_arch_sh,
98 bfd_mach_sh3,
e38bc3b5
NC
99 "sh", /* Architecture name. */
100 "sh3", /* Machine name. */
252b5132 101 1,
e38bc3b5 102 FALSE, /* Not the default. */
252b5132 103 bfd_default_compatible,
a44d7f9c 104 bfd_default_scan,
252b5132
RH
105 SH3_NEXT
106 },
f6f9408f 107 {
e38bc3b5
NC
108 32, /* 32 bits in a word. */
109 32, /* 32 bits in an address. */
110 8, /* 8 bits in a byte. */
f6f9408f
JR
111 bfd_arch_sh,
112 bfd_mach_sh3_nommu,
e38bc3b5
NC
113 "sh", /* Architecture name. */
114 "sh3-nommu", /* Machine name. */
f6f9408f 115 1,
e38bc3b5 116 FALSE, /* Not the default. */
f6f9408f
JR
117 bfd_default_compatible,
118 bfd_default_scan,
119 SH3_NOMMU_NEXT
120 },
d4845d57 121 {
e38bc3b5
NC
122 32, /* 32 bits in a word. */
123 32, /* 32 bits in an address. */
124 8, /* 8 bits in a byte. */
d4845d57
JR
125 bfd_arch_sh,
126 bfd_mach_sh3_dsp,
e38bc3b5
NC
127 "sh", /* Architecture name. */
128 "sh3-dsp", /* Machine name. */
d4845d57 129 1,
e38bc3b5 130 FALSE, /* Not the default. */
d4845d57 131 bfd_default_compatible,
a44d7f9c 132 bfd_default_scan,
d4845d57
JR
133 SH3_DSP_NEXT
134 },
252b5132 135 {
e38bc3b5
NC
136 32, /* 32 bits in a word. */
137 32, /* 32 bits in an address. */
138 8, /* 8 bits in a byte. */
252b5132
RH
139 bfd_arch_sh,
140 bfd_mach_sh3e,
e38bc3b5
NC
141 "sh", /* Architecture name. */
142 "sh3e", /* Machine name. */
252b5132 143 1,
e38bc3b5 144 FALSE, /* Not the default. */
252b5132 145 bfd_default_compatible,
a44d7f9c 146 bfd_default_scan,
252b5132
RH
147 SH3E_NEXT
148 },
d4845d57 149 {
e38bc3b5
NC
150 32, /* 32 bits in a word. */
151 32, /* 32 bits in an address. */
152 8, /* 8 bits in a byte. */
d4845d57
JR
153 bfd_arch_sh,
154 bfd_mach_sh4,
e38bc3b5
NC
155 "sh", /* Architecture name. */
156 "sh4", /* Machine name. */
d4845d57 157 1,
e38bc3b5 158 FALSE, /* Not the default. */
d4845d57 159 bfd_default_compatible,
a44d7f9c 160 bfd_default_scan,
d4845d57
JR
161 SH4_NEXT
162 },
af9ba621 163 {
e38bc3b5
NC
164 32, /* 32 bits in a word. */
165 32, /* 32 bits in an address. */
166 8, /* 8 bits in a byte. */
af9ba621
CV
167 bfd_arch_sh,
168 bfd_mach_sh4a,
e38bc3b5
NC
169 "sh", /* Architecture name. */
170 "sh4a", /* Machine name. */
af9ba621 171 1,
e38bc3b5 172 FALSE, /* Not the default. */
af9ba621
CV
173 bfd_default_compatible,
174 bfd_default_scan,
175 SH4A_NEXT
176 },
177 {
e38bc3b5
NC
178 32, /* 32 bits in a word. */
179 32, /* 32 bits in an address. */
180 8, /* 8 bits in a byte. */
af9ba621
CV
181 bfd_arch_sh,
182 bfd_mach_sh4al_dsp,
e38bc3b5
NC
183 "sh", /* Architecture name. */
184 "sh4al-dsp", /* Machine name. */
af9ba621 185 1,
e38bc3b5 186 FALSE, /* Not the default. */
af9ba621
CV
187 bfd_default_compatible,
188 bfd_default_scan,
189 SH4AL_DSP_NEXT
190 },
191 {
e38bc3b5
NC
192 32, /* 32 bits in a word. */
193 32, /* 32 bits in an address. */
194 8, /* 8 bits in a byte. */
af9ba621
CV
195 bfd_arch_sh,
196 bfd_mach_sh4_nofpu,
e38bc3b5
NC
197 "sh", /* Architecture name. */
198 "sh4-nofpu", /* Machine name. */
af9ba621 199 1,
e38bc3b5 200 FALSE, /* Not the default. */
af9ba621
CV
201 bfd_default_compatible,
202 bfd_default_scan,
203 SH4_NOFPU_NEXT
204 },
ae51a426 205 {
e38bc3b5
NC
206 32, /* 32 bits in a word. */
207 32, /* 32 bits in an address. */
208 8, /* 8 bits in a byte. */
ae51a426
JR
209 bfd_arch_sh,
210 bfd_mach_sh4_nommu_nofpu,
e38bc3b5
NC
211 "sh", /* Architecture name. */
212 "sh4-nommu-nofpu", /* Machine name. */
ae51a426 213 1,
e38bc3b5 214 FALSE, /* Not the default. */
ae51a426
JR
215 bfd_default_compatible,
216 bfd_default_scan,
217 SH4_NOMMU_NOFPU_NEXT
218 },
af9ba621 219 {
e38bc3b5
NC
220 32, /* 32 bits in a word. */
221 32, /* 32 bits in an address. */
222 8, /* 8 bits in a byte. */
af9ba621
CV
223 bfd_arch_sh,
224 bfd_mach_sh4a_nofpu,
e38bc3b5
NC
225 "sh", /* Architecture name. */
226 "sh4a-nofpu", /* Machine name. */
af9ba621 227 1,
e38bc3b5 228 FALSE, /* Not the default. */
af9ba621
CV
229 bfd_default_compatible,
230 bfd_default_scan,
231 SH4A_NOFPU_NEXT
232 },
1d70c7fb
AO
233 {
234 32, /* 32 bits in a word. */
235 32, /* 32 bits in an address. */
236 8, /* 8 bits in a byte. */
237 bfd_arch_sh,
238 bfd_mach_sh2a,
e38bc3b5
NC
239 "sh", /* Architecture name. */
240 "sh2a", /* Machine name. */
1d70c7fb
AO
241 1,
242 FALSE, /* Not the default. */
243 bfd_default_compatible,
244 bfd_default_scan,
245 SH2A_NEXT
246 },
247 {
248 32, /* 32 bits in a word. */
249 32, /* 32 bits in an address. */
250 8, /* 8 bits in a byte. */
251 bfd_arch_sh,
252 bfd_mach_sh2a_nofpu,
e38bc3b5
NC
253 "sh", /* Architecture name. */
254 "sh2a-nofpu", /* Machine name. */
1d70c7fb
AO
255 1,
256 FALSE, /* Not the default. */
257 bfd_default_compatible,
258 bfd_default_scan,
259 SH2A_NOFPU_NEXT
260 },
fbca6ad9 261 {
e38bc3b5
NC
262 32, /* 32 bits in a word. */
263 32, /* 32 bits in an address. */
264 8, /* 8 bits in a byte. */
265 bfd_arch_sh,
266 bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu,
267 "sh", /* Architecture name. */
268 "sh2a-nofpu-or-sh4-nommu-nofpu", /* Machine name. */
269 1,
270 FALSE, /* Not the default. */
271 bfd_default_compatible,
272 bfd_default_scan,
273 SH2A_NOFPU_OR_SH4_NOMMU_NOFPU_NEXT
274 },
275 {
276 32, /* 32 bits in a word. */
277 32, /* 32 bits in an address. */
278 8, /* 8 bits in a byte. */
279 bfd_arch_sh,
280 bfd_mach_sh2a_nofpu_or_sh3_nommu,
281 "sh", /* Architecture name. . */
282 "sh2a-nofpu-or-sh3-nommu", /* Machine name. */
283 1,
284 FALSE, /* Not the default. */
285 bfd_default_compatible,
286 bfd_default_scan,
287 SH2A_NOFPU_OR_SH3_NOMMU_NEXT
288 },
289 {
290 32, /* 32 bits in a word. */
291 32, /* 32 bits in an address. */
292 8, /* 8 bits in a byte. */
293 bfd_arch_sh,
294 bfd_mach_sh2a_or_sh4,
295 "sh", /* Architecture name. */
296 "sh2a-or-sh4", /* Machine name. */
297 1,
298 FALSE, /* Not the default. */
299 bfd_default_compatible,
300 bfd_default_scan,
301 SH2A_OR_SH4_NEXT
302 },
303 {
304 32, /* 32 bits in a word. */
305 32, /* 32 bits in an address. */
306 8, /* 8 bits in a byte. */
307 bfd_arch_sh,
308 bfd_mach_sh2a_or_sh3e,
309 "sh", /* Architecture name. */
310 "sh2a-or-sh3e", /* Machine name. */
311 1,
312 FALSE, /* Not the default. */
313 bfd_default_compatible,
314 bfd_default_scan,
315 SH2A_OR_SH3E_NEXT
316 },
317 {
318 64, /* 64 bits in a word. */
319 64, /* 64 bits in an address. */
320 8, /* 8 bits in a byte. */
fbca6ad9
AO
321 bfd_arch_sh,
322 bfd_mach_sh5,
e38bc3b5
NC
323 "sh", /* Architecture name. */
324 "sh5", /* Machine name. */
fbca6ad9 325 1,
e38bc3b5 326 FALSE, /* Not the default. */
fbca6ad9 327 bfd_default_compatible,
a44d7f9c 328 bfd_default_scan,
fbca6ad9
AO
329 SH64_NEXT
330 },
252b5132
RH
331};
332
333const bfd_arch_info_type bfd_sh_arch =
334{
e38bc3b5
NC
335 32, /* 32 bits in a word. */
336 32, /* 32 bits in an address. */
337 8, /* 8 bits in a byte. */
252b5132
RH
338 bfd_arch_sh,
339 bfd_mach_sh,
e38bc3b5
NC
340 "sh", /* Architecture name. */
341 "sh", /* Machine name. */
252b5132 342 1,
e38bc3b5 343 TRUE, /* The default machine. */
252b5132 344 bfd_default_compatible,
a44d7f9c 345 bfd_default_scan,
252b5132
RH
346 SH_NEXT
347};
f6f9408f
JR
348
349
350/* This table defines the mappings from the BFD internal numbering
351 system to the opcodes internal flags system.
352 It is used by the functions defined below.
353 The prototypes for these SH specific functions are found in
354 sh-opc.h . */
355
356static struct { unsigned long bfd_mach, arch, arch_up; } bfd_to_arch_table[] =
357{
e38bc3b5 358 { bfd_mach_sh, arch_sh1, arch_sh_up },
f6f9408f
JR
359 { bfd_mach_sh2, arch_sh2, arch_sh2_up },
360 { bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
361 { bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
1d70c7fb
AO
362 { bfd_mach_sh2a, arch_sh2a, arch_sh2a_up },
363 { bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up },
e38bc3b5
NC
364
365 { bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up },
366 { bfd_mach_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu_up },
367 { bfd_mach_sh2a_or_sh4, arch_sh2a_or_sh4, arch_sh2a_or_sh4_up },
368 { bfd_mach_sh2a_or_sh3e, arch_sh2a_or_sh3e, arch_sh2a_or_sh3e_up },
369
f6f9408f
JR
370 { bfd_mach_sh3, arch_sh3, arch_sh3_up },
371 { bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
372 { bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
373 { bfd_mach_sh3e, arch_sh3e, arch_sh3e_up },
374 { bfd_mach_sh4, arch_sh4, arch_sh4_up },
375 { bfd_mach_sh4a, arch_sh4a, arch_sh4a_up },
376 { bfd_mach_sh4al_dsp, arch_sh4al_dsp, arch_sh4al_dsp_up },
e38bc3b5 377 { bfd_mach_sh4_nofpu, arch_sh4_nofpu, arch_sh4_nofpu_up },
f6f9408f 378 { bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
e38bc3b5 379 { bfd_mach_sh4a_nofpu, arch_sh4a_nofpu, arch_sh4a_nofpu_up },
f6f9408f
JR
380 { 0, 0, 0 } /* Terminator. */
381};
382
383
384/* Convert a BFD mach number into the right opcodes arch flags
385 using the table above. */
386
387unsigned int
388sh_get_arch_from_bfd_mach (unsigned long mach)
389{
390 int i = 0;
e38bc3b5 391
f6f9408f
JR
392 while (bfd_to_arch_table[i].bfd_mach != 0)
393 if (bfd_to_arch_table[i].bfd_mach == mach)
394 return bfd_to_arch_table[i].arch;
395 else
396 i++;
397
e38bc3b5 398 /* Machine not found. */
f6f9408f
JR
399 BFD_FAIL();
400
401 return SH_ARCH_UNKNOWN_ARCH;
402}
403
404
405/* Convert a BFD mach number into a set of opcodes arch flags
406 describing all the compatible architectures (i.e. arch_up)
407 using the table above. */
408
409unsigned int
410sh_get_arch_up_from_bfd_mach (unsigned long mach)
411{
412 int i = 0;
e38bc3b5 413
f6f9408f
JR
414 while (bfd_to_arch_table[i].bfd_mach != 0)
415 if (bfd_to_arch_table[i].bfd_mach == mach)
416 return bfd_to_arch_table[i].arch_up;
417 else
418 i++;
419
e38bc3b5 420 /* Machine not found. */
f6f9408f
JR
421 BFD_FAIL();
422
423 return SH_ARCH_UNKNOWN_ARCH;
424}
425
426
427/* Convert an arbitary arch_set - not necessarily corresponding
428 directly to anything in the table above - to the most generic
429 architecture which supports all the required features, and
430 return the corresponding BFD mach. */
431
432unsigned long
433sh_get_bfd_mach_from_arch_set (unsigned int arch_set)
434{
435 unsigned long result = 0;
436 unsigned int best = ~arch_set;
437 unsigned int co_mask = ~0;
438 int i = 0;
439
440 /* If arch_set permits variants with no coprocessor then do not allow
441 the other irrelevant co-processor bits to influence the choice:
442 e.g. if dsp is disallowed by arch_set, then the algorithm would
443 prefer fpu variants over nofpu variants because they also disallow
444 dsp - even though the nofpu would be the most correct choice.
445 This assumes that EVERY fpu/dsp variant has a no-coprocessor
446 counter-part, or their non-fpu/dsp instructions do not have the
447 no co-processor bit set. */
448 if (arch_set & arch_sh_no_co)
449 co_mask = ~(arch_sh_sp_fpu | arch_sh_dp_fpu | arch_sh_has_dsp);
450
451 while (bfd_to_arch_table[i].bfd_mach != 0)
452 {
453 unsigned int try = bfd_to_arch_table[i].arch_up & co_mask;
454
455 /* Conceptually: Find the architecture with the least number
456 of extra features or, if they have the same number, then
457 the greatest number of required features. Disregard
458 architectures where the required features alone do
459 not describe a valid architecture. */
460 if (((try & ~arch_set) < (best & ~arch_set)
461 || ((try & ~arch_set) == (best & ~arch_set)
462 && (~try & arch_set) < (~best & arch_set)))
463 && SH_MERGE_ARCH_SET_VALID (try, arch_set))
464 {
465 result = bfd_to_arch_table[i].bfd_mach;
466 best = try;
467 }
468
469 i++;
470 }
471
472 /* This might happen if a new variant is added to sh-opc.h
473 but no corresponding entry is added to the table above. */
474 BFD_ASSERT (result != 0);
475
476 return result;
477}
478
479
480/* Merge the architecture type of two BFD files, such that the
481 resultant architecture supports all the features required
482 by the two input BFDs.
483 If the input BFDs are multually incompatible - i.e. one uses
484 DSP while the other uses FPU - or there is no known architecture
485 that fits the requirements then an error is emitted. */
486
487bfd_boolean
488sh_merge_bfd_arch (bfd *ibfd, bfd *obfd)
489{
490 unsigned int old_arch, new_arch, merged_arch;
491
492 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
493 return FALSE;
494
495 old_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (obfd));
496 new_arch = sh_get_arch_up_from_bfd_mach (bfd_get_mach (ibfd));
497
498 merged_arch = SH_MERGE_ARCH_SET (old_arch, new_arch);
499
500 if (!SH_VALID_CO_ARCH_SET (merged_arch))
501 {
502 (*_bfd_error_handler)
d003868e
AM
503 ("%B: uses %s instructions while previous modules use %s instructions",
504 ibfd,
f6f9408f
JR
505 SH_ARCH_SET_HAS_DSP (new_arch) ? "dsp" : "floating point",
506 SH_ARCH_SET_HAS_DSP (new_arch) ? "floating point" : "dsp");
507 bfd_set_error (bfd_error_bad_value);
508 return FALSE;
509 }
510 else if (!SH_VALID_ARCH_SET (merged_arch))
511 {
512 (*_bfd_error_handler)
513 ("internal error: merge of architecture '%s' with architecture '%s' produced unknown architecture\n",
514 bfd_printable_name (obfd),
515 bfd_printable_name (ibfd));
516 bfd_set_error (bfd_error_bad_value);
517 return FALSE;
518 }
519
520 bfd_default_set_arch_mach (obfd, bfd_arch_sh,
521 sh_get_bfd_mach_from_arch_set (merged_arch));
522
523 return TRUE;
524}
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