Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Matsushita 10200 specific support for 32-bit ELF |
b2a8e766 | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 |
7898deda | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "bfd.h" | |
22 | #include "sysdep.h" | |
23 | #include "libbfd.h" | |
24 | #include "elf-bfd.h" | |
25 | ||
26 | static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup | |
27 | PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); | |
28 | static void mn10200_info_to_howto | |
947216bf | 29 | PARAMS ((bfd *, arelent *, Elf_Internal_Rela *)); |
b34976b6 | 30 | static bfd_boolean mn10200_elf_relax_delete_bytes |
252b5132 | 31 | PARAMS ((bfd *, asection *, bfd_vma, int)); |
b34976b6 | 32 | static bfd_boolean mn10200_elf_symbol_address_p |
6cdc0ccc | 33 | PARAMS ((bfd *, asection *, Elf_Internal_Sym *, bfd_vma)); |
917583ad NC |
34 | static bfd_reloc_status_type mn10200_elf_final_link_relocate |
35 | PARAMS ((reloc_howto_type *, bfd *, bfd *, asection *, | |
36 | bfd_byte *, bfd_vma, bfd_vma, bfd_vma, | |
37 | struct bfd_link_info *, asection *, int)); | |
b34976b6 AM |
38 | static bfd_boolean mn10200_elf_relocate_section |
39 | PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, | |
40 | bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Sym *, | |
41 | asection **)); | |
42 | static bfd_boolean mn10200_elf_relax_section | |
43 | PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *)); | |
917583ad NC |
44 | static bfd_byte * mn10200_elf_get_relocated_section_contents |
45 | PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, | |
b34976b6 | 46 | bfd_byte *, bfd_boolean, asymbol **)); |
252b5132 | 47 | |
27def10f | 48 | enum reloc_type { |
252b5132 RH |
49 | R_MN10200_NONE = 0, |
50 | R_MN10200_32, | |
51 | R_MN10200_16, | |
52 | R_MN10200_8, | |
53 | R_MN10200_24, | |
54 | R_MN10200_PCREL8, | |
55 | R_MN10200_PCREL16, | |
56 | R_MN10200_PCREL24, | |
57 | R_MN10200_MAX | |
58 | }; | |
59 | ||
27def10f | 60 | static reloc_howto_type elf_mn10200_howto_table[] = { |
252b5132 RH |
61 | /* Dummy relocation. Does nothing. */ |
62 | HOWTO (R_MN10200_NONE, | |
63 | 0, | |
64 | 2, | |
65 | 16, | |
b34976b6 | 66 | FALSE, |
252b5132 RH |
67 | 0, |
68 | complain_overflow_bitfield, | |
69 | bfd_elf_generic_reloc, | |
70 | "R_MN10200_NONE", | |
b34976b6 | 71 | FALSE, |
252b5132 RH |
72 | 0, |
73 | 0, | |
b34976b6 | 74 | FALSE), |
252b5132 RH |
75 | /* Standard 32 bit reloc. */ |
76 | HOWTO (R_MN10200_32, | |
77 | 0, | |
78 | 2, | |
79 | 32, | |
b34976b6 | 80 | FALSE, |
252b5132 RH |
81 | 0, |
82 | complain_overflow_bitfield, | |
83 | bfd_elf_generic_reloc, | |
84 | "R_MN10200_32", | |
b34976b6 | 85 | FALSE, |
252b5132 RH |
86 | 0xffffffff, |
87 | 0xffffffff, | |
b34976b6 | 88 | FALSE), |
252b5132 RH |
89 | /* Standard 16 bit reloc. */ |
90 | HOWTO (R_MN10200_16, | |
91 | 0, | |
92 | 1, | |
93 | 16, | |
b34976b6 | 94 | FALSE, |
252b5132 RH |
95 | 0, |
96 | complain_overflow_bitfield, | |
97 | bfd_elf_generic_reloc, | |
98 | "R_MN10200_16", | |
b34976b6 | 99 | FALSE, |
252b5132 RH |
100 | 0xffff, |
101 | 0xffff, | |
b34976b6 | 102 | FALSE), |
252b5132 RH |
103 | /* Standard 8 bit reloc. */ |
104 | HOWTO (R_MN10200_8, | |
105 | 0, | |
106 | 0, | |
107 | 8, | |
b34976b6 | 108 | FALSE, |
252b5132 RH |
109 | 0, |
110 | complain_overflow_bitfield, | |
111 | bfd_elf_generic_reloc, | |
112 | "R_MN10200_8", | |
b34976b6 | 113 | FALSE, |
252b5132 RH |
114 | 0xff, |
115 | 0xff, | |
b34976b6 | 116 | FALSE), |
252b5132 RH |
117 | /* Standard 24 bit reloc. */ |
118 | HOWTO (R_MN10200_24, | |
119 | 0, | |
120 | 2, | |
121 | 24, | |
b34976b6 | 122 | FALSE, |
252b5132 RH |
123 | 0, |
124 | complain_overflow_bitfield, | |
125 | bfd_elf_generic_reloc, | |
126 | "R_MN10200_24", | |
b34976b6 | 127 | FALSE, |
252b5132 RH |
128 | 0xffffff, |
129 | 0xffffff, | |
b34976b6 | 130 | FALSE), |
252b5132 RH |
131 | /* Simple 8 pc-relative reloc. */ |
132 | HOWTO (R_MN10200_PCREL8, | |
133 | 0, | |
134 | 0, | |
135 | 8, | |
b34976b6 | 136 | TRUE, |
252b5132 RH |
137 | 0, |
138 | complain_overflow_bitfield, | |
139 | bfd_elf_generic_reloc, | |
140 | "R_MN10200_PCREL8", | |
b34976b6 | 141 | FALSE, |
252b5132 RH |
142 | 0xff, |
143 | 0xff, | |
b34976b6 | 144 | TRUE), |
252b5132 RH |
145 | /* Simple 16 pc-relative reloc. */ |
146 | HOWTO (R_MN10200_PCREL16, | |
147 | 0, | |
148 | 1, | |
149 | 16, | |
b34976b6 | 150 | TRUE, |
252b5132 RH |
151 | 0, |
152 | complain_overflow_bitfield, | |
153 | bfd_elf_generic_reloc, | |
154 | "R_MN10200_PCREL16", | |
b34976b6 | 155 | FALSE, |
252b5132 RH |
156 | 0xffff, |
157 | 0xffff, | |
b34976b6 | 158 | TRUE), |
252b5132 RH |
159 | /* Simple 32bit pc-relative reloc with a 1 byte adjustment |
160 | to get the pc-relative offset correct. */ | |
161 | HOWTO (R_MN10200_PCREL24, | |
162 | 0, | |
163 | 2, | |
164 | 24, | |
b34976b6 | 165 | TRUE, |
252b5132 RH |
166 | 0, |
167 | complain_overflow_bitfield, | |
168 | bfd_elf_generic_reloc, | |
169 | "R_MN10200_PCREL24", | |
b34976b6 | 170 | FALSE, |
252b5132 RH |
171 | 0xffffff, |
172 | 0xffffff, | |
b34976b6 | 173 | TRUE), |
252b5132 RH |
174 | }; |
175 | ||
27def10f | 176 | struct mn10200_reloc_map { |
252b5132 RH |
177 | bfd_reloc_code_real_type bfd_reloc_val; |
178 | unsigned char elf_reloc_val; | |
179 | }; | |
180 | ||
27def10f KH |
181 | static const struct mn10200_reloc_map mn10200_reloc_map[] = { |
182 | { BFD_RELOC_NONE , R_MN10200_NONE , }, | |
183 | { BFD_RELOC_32 , R_MN10200_32 , }, | |
184 | { BFD_RELOC_16 , R_MN10200_16 , }, | |
185 | { BFD_RELOC_8 , R_MN10200_8 , }, | |
186 | { BFD_RELOC_24 , R_MN10200_24 , }, | |
187 | { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , }, | |
252b5132 RH |
188 | { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, }, |
189 | { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, }, | |
190 | }; | |
191 | ||
192 | static reloc_howto_type * | |
193 | bfd_elf32_bfd_reloc_type_lookup (abfd, code) | |
5f771d47 | 194 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
195 | bfd_reloc_code_real_type code; |
196 | { | |
197 | unsigned int i; | |
198 | ||
199 | for (i = 0; | |
200 | i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map); | |
201 | i++) | |
202 | { | |
203 | if (mn10200_reloc_map[i].bfd_reloc_val == code) | |
204 | return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val]; | |
205 | } | |
206 | ||
207 | return NULL; | |
208 | } | |
209 | ||
210 | /* Set the howto pointer for an MN10200 ELF reloc. */ | |
211 | ||
212 | static void | |
213 | mn10200_info_to_howto (abfd, cache_ptr, dst) | |
5f771d47 | 214 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 215 | arelent *cache_ptr; |
947216bf | 216 | Elf_Internal_Rela *dst; |
252b5132 RH |
217 | { |
218 | unsigned int r_type; | |
219 | ||
220 | r_type = ELF32_R_TYPE (dst->r_info); | |
221 | BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX); | |
222 | cache_ptr->howto = &elf_mn10200_howto_table[r_type]; | |
223 | } | |
224 | ||
225 | /* Perform a relocation as part of a final link. */ | |
917583ad | 226 | |
252b5132 RH |
227 | static bfd_reloc_status_type |
228 | mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, | |
229 | input_section, contents, offset, value, | |
230 | addend, info, sym_sec, is_local) | |
231 | reloc_howto_type *howto; | |
232 | bfd *input_bfd; | |
5f771d47 | 233 | bfd *output_bfd ATTRIBUTE_UNUSED; |
252b5132 RH |
234 | asection *input_section; |
235 | bfd_byte *contents; | |
236 | bfd_vma offset; | |
237 | bfd_vma value; | |
238 | bfd_vma addend; | |
5f771d47 ILT |
239 | struct bfd_link_info *info ATTRIBUTE_UNUSED; |
240 | asection *sym_sec ATTRIBUTE_UNUSED; | |
241 | int is_local ATTRIBUTE_UNUSED; | |
252b5132 RH |
242 | { |
243 | unsigned long r_type = howto->type; | |
244 | bfd_byte *hit_data = contents + offset; | |
245 | ||
246 | switch (r_type) | |
247 | { | |
248 | ||
249 | case R_MN10200_NONE: | |
250 | return bfd_reloc_ok; | |
251 | ||
252 | case R_MN10200_32: | |
253 | value += addend; | |
254 | bfd_put_32 (input_bfd, value, hit_data); | |
255 | return bfd_reloc_ok; | |
256 | ||
257 | case R_MN10200_16: | |
258 | value += addend; | |
259 | ||
27def10f | 260 | if ((long) value > 0x7fff || (long) value < -0x8000) |
252b5132 RH |
261 | return bfd_reloc_overflow; |
262 | ||
263 | bfd_put_16 (input_bfd, value, hit_data); | |
264 | return bfd_reloc_ok; | |
265 | ||
266 | case R_MN10200_8: | |
267 | value += addend; | |
268 | ||
27def10f | 269 | if ((long) value > 0x7f || (long) value < -0x80) |
252b5132 RH |
270 | return bfd_reloc_overflow; |
271 | ||
272 | bfd_put_8 (input_bfd, value, hit_data); | |
273 | return bfd_reloc_ok; | |
274 | ||
275 | case R_MN10200_24: | |
276 | value += addend; | |
277 | ||
27def10f | 278 | if ((long) value > 0x7fffff || (long) value < -0x800000) |
252b5132 RH |
279 | return bfd_reloc_overflow; |
280 | ||
281 | value &= 0xffffff; | |
282 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
283 | bfd_put_32 (input_bfd, value, hit_data); | |
284 | return bfd_reloc_ok; | |
285 | ||
286 | case R_MN10200_PCREL8: | |
287 | value -= (input_section->output_section->vma | |
288 | + input_section->output_offset); | |
289 | value -= (offset + 1); | |
290 | value += addend; | |
291 | ||
27def10f KH |
292 | if ((long) value > 0xff || (long) value < -0x100) |
293 | return bfd_reloc_overflow; | |
252b5132 RH |
294 | |
295 | bfd_put_8 (input_bfd, value, hit_data); | |
296 | return bfd_reloc_ok; | |
297 | ||
298 | case R_MN10200_PCREL16: | |
299 | value -= (input_section->output_section->vma | |
300 | + input_section->output_offset); | |
301 | value -= (offset + 2); | |
302 | value += addend; | |
303 | ||
27def10f KH |
304 | if ((long) value > 0xffff || (long) value < -0x10000) |
305 | return bfd_reloc_overflow; | |
252b5132 RH |
306 | |
307 | bfd_put_16 (input_bfd, value, hit_data); | |
308 | return bfd_reloc_ok; | |
309 | ||
310 | case R_MN10200_PCREL24: | |
311 | value -= (input_section->output_section->vma | |
312 | + input_section->output_offset); | |
313 | value -= (offset + 3); | |
314 | value += addend; | |
315 | ||
27def10f KH |
316 | if ((long) value > 0xffffff || (long) value < -0x1000000) |
317 | return bfd_reloc_overflow; | |
252b5132 RH |
318 | |
319 | value &= 0xffffff; | |
320 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
321 | bfd_put_32 (input_bfd, value, hit_data); | |
322 | return bfd_reloc_ok; | |
323 | ||
324 | default: | |
325 | return bfd_reloc_notsupported; | |
326 | } | |
327 | } | |
252b5132 RH |
328 | \f |
329 | /* Relocate an MN10200 ELF section. */ | |
b34976b6 | 330 | static bfd_boolean |
252b5132 RH |
331 | mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section, |
332 | contents, relocs, local_syms, local_sections) | |
333 | bfd *output_bfd; | |
334 | struct bfd_link_info *info; | |
335 | bfd *input_bfd; | |
336 | asection *input_section; | |
337 | bfd_byte *contents; | |
338 | Elf_Internal_Rela *relocs; | |
339 | Elf_Internal_Sym *local_syms; | |
340 | asection **local_sections; | |
341 | { | |
342 | Elf_Internal_Shdr *symtab_hdr; | |
343 | struct elf_link_hash_entry **sym_hashes; | |
344 | Elf_Internal_Rela *rel, *relend; | |
345 | ||
1049f94e | 346 | if (info->relocatable) |
b34976b6 | 347 | return TRUE; |
b491616a | 348 | |
252b5132 RH |
349 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
350 | sym_hashes = elf_sym_hashes (input_bfd); | |
351 | ||
352 | rel = relocs; | |
353 | relend = relocs + input_section->reloc_count; | |
354 | for (; rel < relend; rel++) | |
355 | { | |
356 | int r_type; | |
357 | reloc_howto_type *howto; | |
358 | unsigned long r_symndx; | |
359 | Elf_Internal_Sym *sym; | |
360 | asection *sec; | |
361 | struct elf_link_hash_entry *h; | |
362 | bfd_vma relocation; | |
363 | bfd_reloc_status_type r; | |
364 | ||
365 | r_symndx = ELF32_R_SYM (rel->r_info); | |
366 | r_type = ELF32_R_TYPE (rel->r_info); | |
367 | howto = elf_mn10200_howto_table + r_type; | |
368 | ||
252b5132 RH |
369 | h = NULL; |
370 | sym = NULL; | |
371 | sec = NULL; | |
372 | if (r_symndx < symtab_hdr->sh_info) | |
373 | { | |
374 | sym = local_syms + r_symndx; | |
375 | sec = local_sections[r_symndx]; | |
8517fae7 | 376 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
252b5132 RH |
377 | } |
378 | else | |
379 | { | |
59c2e50f L |
380 | bfd_boolean unresolved_reloc, warned; |
381 | ||
b2a8e766 AM |
382 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
383 | r_symndx, symtab_hdr, sym_hashes, | |
384 | h, sec, relocation, | |
385 | unresolved_reloc, warned); | |
252b5132 RH |
386 | } |
387 | ||
388 | r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, | |
389 | input_section, | |
390 | contents, rel->r_offset, | |
391 | relocation, rel->r_addend, | |
392 | info, sec, h == NULL); | |
393 | ||
394 | if (r != bfd_reloc_ok) | |
395 | { | |
396 | const char *name; | |
27def10f | 397 | const char *msg = (const char *) 0; |
252b5132 RH |
398 | |
399 | if (h != NULL) | |
400 | name = h->root.root.string; | |
401 | else | |
402 | { | |
403 | name = (bfd_elf_string_from_elf_section | |
404 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
405 | if (name == NULL || *name == '\0') | |
406 | name = bfd_section_name (input_bfd, sec); | |
407 | } | |
408 | ||
409 | switch (r) | |
410 | { | |
411 | case bfd_reloc_overflow: | |
412 | if (! ((*info->callbacks->reloc_overflow) | |
413 | (info, name, howto->name, (bfd_vma) 0, | |
414 | input_bfd, input_section, rel->r_offset))) | |
b34976b6 | 415 | return FALSE; |
252b5132 RH |
416 | break; |
417 | ||
418 | case bfd_reloc_undefined: | |
419 | if (! ((*info->callbacks->undefined_symbol) | |
420 | (info, name, input_bfd, input_section, | |
b34976b6 AM |
421 | rel->r_offset, TRUE))) |
422 | return FALSE; | |
252b5132 RH |
423 | break; |
424 | ||
425 | case bfd_reloc_outofrange: | |
426 | msg = _("internal error: out of range error"); | |
427 | goto common_error; | |
428 | ||
429 | case bfd_reloc_notsupported: | |
430 | msg = _("internal error: unsupported relocation error"); | |
431 | goto common_error; | |
432 | ||
433 | case bfd_reloc_dangerous: | |
434 | msg = _("internal error: dangerous error"); | |
435 | goto common_error; | |
436 | ||
437 | default: | |
438 | msg = _("internal error: unknown error"); | |
439 | /* fall through */ | |
440 | ||
441 | common_error: | |
442 | if (!((*info->callbacks->warning) | |
443 | (info, msg, name, input_bfd, input_section, | |
444 | rel->r_offset))) | |
b34976b6 | 445 | return FALSE; |
252b5132 RH |
446 | break; |
447 | } | |
448 | } | |
449 | } | |
450 | ||
b34976b6 | 451 | return TRUE; |
252b5132 RH |
452 | } |
453 | ||
454 | /* This function handles relaxing for the mn10200. | |
455 | ||
4cc11e76 | 456 | There are quite a few relaxing opportunities available on the mn10200: |
252b5132 RH |
457 | |
458 | * jsr:24 -> jsr:16 2 bytes | |
459 | ||
460 | * jmp:24 -> jmp:16 2 bytes | |
461 | * jmp:16 -> bra:8 1 byte | |
462 | ||
463 | * If the previous instruction is a conditional branch | |
464 | around the jump/bra, we may be able to reverse its condition | |
465 | and change its target to the jump's target. The jump/bra | |
466 | can then be deleted. 2 bytes | |
467 | ||
468 | * mov abs24 -> mov abs16 2 byte savings | |
469 | ||
470 | * Most instructions which accept imm24 can relax to imm16 2 bytes | |
471 | - Most instructions which accept imm16 can relax to imm8 1 byte | |
472 | ||
473 | * Most instructions which accept d24 can relax to d16 2 bytes | |
474 | - Most instructions which accept d16 can relax to d8 1 byte | |
475 | ||
476 | abs24, imm24, d24 all look the same at the reloc level. It | |
477 | might make the code simpler if we had different relocs for | |
478 | the various relaxable operand types. | |
a7c10850 | 479 | |
252b5132 RH |
480 | We don't handle imm16->imm8 or d16->d8 as they're very rare |
481 | and somewhat more difficult to support. */ | |
482 | ||
b34976b6 | 483 | static bfd_boolean |
252b5132 RH |
484 | mn10200_elf_relax_section (abfd, sec, link_info, again) |
485 | bfd *abfd; | |
486 | asection *sec; | |
487 | struct bfd_link_info *link_info; | |
b34976b6 | 488 | bfd_boolean *again; |
252b5132 RH |
489 | { |
490 | Elf_Internal_Shdr *symtab_hdr; | |
491 | Elf_Internal_Rela *internal_relocs; | |
252b5132 RH |
492 | Elf_Internal_Rela *irel, *irelend; |
493 | bfd_byte *contents = NULL; | |
6cdc0ccc | 494 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
495 | |
496 | /* Assume nothing changes. */ | |
b34976b6 | 497 | *again = FALSE; |
252b5132 | 498 | |
1049f94e | 499 | /* We don't have to do anything for a relocatable link, if |
252b5132 RH |
500 | this section does not have relocs, or if this is not a |
501 | code section. */ | |
1049f94e | 502 | if (link_info->relocatable |
252b5132 RH |
503 | || (sec->flags & SEC_RELOC) == 0 |
504 | || sec->reloc_count == 0 | |
505 | || (sec->flags & SEC_CODE) == 0) | |
b34976b6 | 506 | return TRUE; |
252b5132 RH |
507 | |
508 | /* If this is the first time we have been called for this section, | |
509 | initialize the cooked size. */ | |
510 | if (sec->_cooked_size == 0) | |
511 | sec->_cooked_size = sec->_raw_size; | |
512 | ||
513 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
514 | ||
515 | /* Get a copy of the native relocations. */ | |
45d6a902 | 516 | internal_relocs = (_bfd_elf_link_read_relocs |
252b5132 RH |
517 | (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, |
518 | link_info->keep_memory)); | |
519 | if (internal_relocs == NULL) | |
520 | goto error_return; | |
252b5132 RH |
521 | |
522 | /* Walk through them looking for relaxing opportunities. */ | |
523 | irelend = internal_relocs + sec->reloc_count; | |
524 | for (irel = internal_relocs; irel < irelend; irel++) | |
525 | { | |
526 | bfd_vma symval; | |
527 | ||
528 | /* If this isn't something that can be relaxed, then ignore | |
529 | this reloc. */ | |
530 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE | |
531 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8 | |
532 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX) | |
533 | continue; | |
534 | ||
535 | /* Get the section contents if we haven't done so already. */ | |
536 | if (contents == NULL) | |
537 | { | |
538 | /* Get cached copy if it exists. */ | |
539 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
540 | contents = elf_section_data (sec)->this_hdr.contents; | |
541 | else | |
542 | { | |
543 | /* Go get them off disk. */ | |
544 | contents = (bfd_byte *) bfd_malloc (sec->_raw_size); | |
545 | if (contents == NULL) | |
546 | goto error_return; | |
252b5132 RH |
547 | |
548 | if (! bfd_get_section_contents (abfd, sec, contents, | |
549 | (file_ptr) 0, sec->_raw_size)) | |
550 | goto error_return; | |
551 | } | |
552 | } | |
553 | ||
6cdc0ccc AM |
554 | /* Read this BFD's local symbols if we haven't done so already. */ |
555 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
252b5132 | 556 | { |
6cdc0ccc AM |
557 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
558 | if (isymbuf == NULL) | |
559 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
560 | symtab_hdr->sh_info, 0, | |
561 | NULL, NULL, NULL); | |
562 | if (isymbuf == NULL) | |
563 | goto error_return; | |
252b5132 RH |
564 | } |
565 | ||
566 | /* Get the value of the symbol referred to by the reloc. */ | |
567 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
568 | { | |
9ad5cbcf | 569 | /* A local symbol. */ |
6cdc0ccc | 570 | Elf_Internal_Sym *isym; |
252b5132 RH |
571 | asection *sym_sec; |
572 | ||
6cdc0ccc AM |
573 | isym = isymbuf + ELF32_R_SYM (irel->r_info); |
574 | if (isym->st_shndx == SHN_UNDEF) | |
9ad5cbcf | 575 | sym_sec = bfd_und_section_ptr; |
6cdc0ccc | 576 | else if (isym->st_shndx == SHN_ABS) |
9ad5cbcf | 577 | sym_sec = bfd_abs_section_ptr; |
6cdc0ccc | 578 | else if (isym->st_shndx == SHN_COMMON) |
9ad5cbcf AM |
579 | sym_sec = bfd_com_section_ptr; |
580 | else | |
6cdc0ccc AM |
581 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
582 | symval = (isym->st_value | |
252b5132 RH |
583 | + sym_sec->output_section->vma |
584 | + sym_sec->output_offset); | |
585 | } | |
586 | else | |
587 | { | |
588 | unsigned long indx; | |
589 | struct elf_link_hash_entry *h; | |
590 | ||
591 | /* An external symbol. */ | |
592 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
593 | h = elf_sym_hashes (abfd)[indx]; | |
594 | BFD_ASSERT (h != NULL); | |
595 | if (h->root.type != bfd_link_hash_defined | |
596 | && h->root.type != bfd_link_hash_defweak) | |
597 | { | |
598 | /* This appears to be a reference to an undefined | |
599 | symbol. Just ignore it--it will be caught by the | |
600 | regular reloc processing. */ | |
601 | continue; | |
602 | } | |
603 | ||
604 | symval = (h->root.u.def.value | |
605 | + h->root.u.def.section->output_section->vma | |
606 | + h->root.u.def.section->output_offset); | |
607 | } | |
608 | ||
609 | /* For simplicity of coding, we are going to modify the section | |
610 | contents, the section relocs, and the BFD symbol table. We | |
611 | must tell the rest of the code not to free up this | |
612 | information. It would be possible to instead create a table | |
613 | of changes which have to be made, as is done in coff-mips.c; | |
614 | that would be more work, but would require less memory when | |
615 | the linker is run. */ | |
616 | ||
252b5132 RH |
617 | /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative |
618 | branch/call. */ | |
619 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24) | |
620 | { | |
621 | bfd_vma value = symval; | |
622 | ||
623 | /* Deal with pc-relative gunk. */ | |
624 | value -= (sec->output_section->vma + sec->output_offset); | |
625 | value -= (irel->r_offset + 3); | |
626 | value += irel->r_addend; | |
627 | ||
628 | /* See if the value will fit in 16 bits, note the high value is | |
629 | 0x7fff + 2 as the target will be two bytes closer if we are | |
630 | able to relax. */ | |
27def10f | 631 | if ((long) value < 0x8001 && (long) value > -0x8000) |
252b5132 RH |
632 | { |
633 | unsigned char code; | |
634 | ||
635 | /* Get the opcode. */ | |
636 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
637 | ||
638 | if (code != 0xe0 && code != 0xe1) | |
639 | continue; | |
640 | ||
641 | /* Note that we've changed the relocs, section contents, etc. */ | |
642 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 643 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 644 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
645 | |
646 | /* Fix the opcode. */ | |
647 | if (code == 0xe0) | |
648 | bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2); | |
649 | else if (code == 0xe1) | |
650 | bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2); | |
651 | ||
652 | /* Fix the relocation's type. */ | |
653 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
654 | R_MN10200_PCREL16); | |
655 | ||
656 | /* The opcode got shorter too, so we have to fix the offset. */ | |
657 | irel->r_offset -= 1; | |
658 | ||
659 | /* Delete two bytes of data. */ | |
660 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
661 | irel->r_offset + 1, 2)) | |
662 | goto error_return; | |
663 | ||
664 | /* That will change things, so, we should relax again. | |
665 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 666 | *again = TRUE; |
252b5132 RH |
667 | } |
668 | } | |
669 | ||
670 | /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative | |
671 | branch. */ | |
672 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16) | |
673 | { | |
674 | bfd_vma value = symval; | |
675 | ||
676 | /* Deal with pc-relative gunk. */ | |
677 | value -= (sec->output_section->vma + sec->output_offset); | |
678 | value -= (irel->r_offset + 2); | |
679 | value += irel->r_addend; | |
680 | ||
681 | /* See if the value will fit in 8 bits, note the high value is | |
682 | 0x7f + 1 as the target will be one bytes closer if we are | |
683 | able to relax. */ | |
27def10f | 684 | if ((long) value < 0x80 && (long) value > -0x80) |
252b5132 RH |
685 | { |
686 | unsigned char code; | |
687 | ||
688 | /* Get the opcode. */ | |
689 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
690 | ||
691 | if (code != 0xfc) | |
692 | continue; | |
693 | ||
694 | /* Note that we've changed the relocs, section contents, etc. */ | |
695 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 696 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 697 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
698 | |
699 | /* Fix the opcode. */ | |
700 | bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1); | |
701 | ||
702 | /* Fix the relocation's type. */ | |
703 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
704 | R_MN10200_PCREL8); | |
705 | ||
706 | /* Delete one byte of data. */ | |
707 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
708 | irel->r_offset + 1, 1)) | |
709 | goto error_return; | |
710 | ||
711 | /* That will change things, so, we should relax again. | |
712 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 713 | *again = TRUE; |
252b5132 RH |
714 | } |
715 | } | |
716 | ||
717 | /* Try to eliminate an unconditional 8 bit pc-relative branch | |
718 | which immediately follows a conditional 8 bit pc-relative | |
719 | branch around the unconditional branch. | |
720 | ||
721 | original: new: | |
722 | bCC lab1 bCC' lab2 | |
723 | bra lab2 | |
724 | lab1: lab1: | |
725 | ||
252b5132 RH |
726 | This happens when the bCC can't reach lab2 at assembly time, |
727 | but due to other relaxations it can reach at link time. */ | |
728 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8) | |
729 | { | |
730 | Elf_Internal_Rela *nrel; | |
731 | bfd_vma value = symval; | |
732 | unsigned char code; | |
733 | ||
734 | /* Deal with pc-relative gunk. */ | |
735 | value -= (sec->output_section->vma + sec->output_offset); | |
736 | value -= (irel->r_offset + 1); | |
737 | value += irel->r_addend; | |
738 | ||
739 | /* Do nothing if this reloc is the last byte in the section. */ | |
740 | if (irel->r_offset == sec->_cooked_size) | |
741 | continue; | |
742 | ||
743 | /* See if the next instruction is an unconditional pc-relative | |
744 | branch, more often than not this test will fail, so we | |
745 | test it first to speed things up. */ | |
746 | code = bfd_get_8 (abfd, contents + irel->r_offset + 1); | |
747 | if (code != 0xea) | |
748 | continue; | |
749 | ||
750 | /* Also make sure the next relocation applies to the next | |
751 | instruction and that it's a pc-relative 8 bit branch. */ | |
752 | nrel = irel + 1; | |
753 | if (nrel == irelend | |
754 | || irel->r_offset + 2 != nrel->r_offset | |
755 | || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8) | |
756 | continue; | |
757 | ||
758 | /* Make sure our destination immediately follows the | |
759 | unconditional branch. */ | |
760 | if (symval != (sec->output_section->vma + sec->output_offset | |
761 | + irel->r_offset + 3)) | |
762 | continue; | |
763 | ||
764 | /* Now make sure we are a conditional branch. This may not | |
a7c10850 | 765 | be necessary, but why take the chance. |
252b5132 RH |
766 | |
767 | Note these checks assume that R_MN10200_PCREL8 relocs | |
768 | only occur on bCC and bCCx insns. If they occured | |
769 | elsewhere, we'd need to know the start of this insn | |
770 | for this check to be accurate. */ | |
771 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
772 | if (code != 0xe0 && code != 0xe1 && code != 0xe2 | |
773 | && code != 0xe3 && code != 0xe4 && code != 0xe5 | |
774 | && code != 0xe6 && code != 0xe7 && code != 0xe8 | |
775 | && code != 0xe9 && code != 0xec && code != 0xed | |
776 | && code != 0xee && code != 0xef && code != 0xfc | |
777 | && code != 0xfd && code != 0xfe && code != 0xff) | |
778 | continue; | |
779 | ||
780 | /* We also have to be sure there is no symbol/label | |
781 | at the unconditional branch. */ | |
6cdc0ccc AM |
782 | if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf, |
783 | irel->r_offset + 1)) | |
252b5132 RH |
784 | continue; |
785 | ||
786 | /* Note that we've changed the relocs, section contents, etc. */ | |
787 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 788 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 789 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
790 | |
791 | /* Reverse the condition of the first branch. */ | |
792 | switch (code) | |
793 | { | |
27def10f KH |
794 | case 0xfc: |
795 | code = 0xfd; | |
796 | break; | |
797 | case 0xfd: | |
798 | code = 0xfc; | |
799 | break; | |
800 | case 0xfe: | |
801 | code = 0xff; | |
802 | break; | |
803 | case 0xff: | |
804 | code = 0xfe; | |
805 | break; | |
806 | case 0xe8: | |
807 | code = 0xe9; | |
808 | break; | |
809 | case 0xe9: | |
810 | code = 0xe8; | |
811 | break; | |
812 | case 0xe0: | |
813 | code = 0xe2; | |
814 | break; | |
815 | case 0xe2: | |
816 | code = 0xe0; | |
817 | break; | |
818 | case 0xe3: | |
819 | code = 0xe1; | |
820 | break; | |
821 | case 0xe1: | |
822 | code = 0xe3; | |
823 | break; | |
824 | case 0xe4: | |
825 | code = 0xe6; | |
826 | break; | |
827 | case 0xe6: | |
828 | code = 0xe4; | |
829 | break; | |
830 | case 0xe7: | |
831 | code = 0xe5; | |
832 | break; | |
833 | case 0xe5: | |
834 | code = 0xe7; | |
835 | break; | |
836 | case 0xec: | |
837 | code = 0xed; | |
838 | break; | |
839 | case 0xed: | |
840 | code = 0xec; | |
841 | break; | |
842 | case 0xee: | |
843 | code = 0xef; | |
844 | break; | |
845 | case 0xef: | |
846 | code = 0xee; | |
847 | break; | |
252b5132 RH |
848 | } |
849 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
a7c10850 | 850 | |
252b5132 RH |
851 | /* Set the reloc type and symbol for the first branch |
852 | from the second branch. */ | |
853 | irel->r_info = nrel->r_info; | |
854 | ||
855 | /* Make the reloc for the second branch a null reloc. */ | |
856 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
857 | R_MN10200_NONE); | |
858 | ||
859 | /* Delete two bytes of data. */ | |
860 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
861 | irel->r_offset + 1, 2)) | |
862 | goto error_return; | |
863 | ||
864 | /* That will change things, so, we should relax again. | |
865 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 866 | *again = TRUE; |
252b5132 RH |
867 | } |
868 | ||
869 | /* Try to turn a 24bit immediate, displacement or absolute address | |
870 | into a 16bit immediate, displacement or absolute address. */ | |
871 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24) | |
872 | { | |
873 | bfd_vma value = symval; | |
874 | ||
a7c10850 | 875 | /* See if the value will fit in 16 bits. |
252b5132 RH |
876 | We allow any 16bit match here. We prune those we can't |
877 | handle below. */ | |
27def10f | 878 | if ((long) value < 0x7fff && (long) value > -0x8000) |
252b5132 RH |
879 | { |
880 | unsigned char code; | |
881 | ||
882 | /* All insns which have 24bit operands are 5 bytes long, | |
883 | the first byte will always be 0xf4, but we double check | |
884 | it just in case. */ | |
885 | ||
886 | /* Get the first opcode. */ | |
887 | code = bfd_get_8 (abfd, contents + irel->r_offset - 2); | |
888 | ||
889 | if (code != 0xf4) | |
890 | continue; | |
891 | ||
892 | /* Get the second opcode. */ | |
893 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
894 | ||
895 | switch (code & 0xfc) | |
896 | { | |
897 | /* mov imm24,dn -> mov imm16,dn */ | |
898 | case 0x70: | |
899 | /* Not safe if the high bit is on as relaxing may | |
900 | move the value out of high mem and thus not fit | |
901 | in a signed 16bit value. */ | |
902 | if (value & 0x8000) | |
903 | continue; | |
904 | ||
4cc11e76 | 905 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 906 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 907 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 908 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
909 | |
910 | /* Fix the opcode. */ | |
911 | bfd_put_8 (abfd, 0xf8 + (code & 0x03), | |
912 | contents + irel->r_offset - 2); | |
913 | ||
914 | /* Fix the relocation's type. */ | |
915 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
916 | R_MN10200_16); | |
917 | ||
918 | /* The opcode got shorter too, so we have to fix the | |
919 | offset. */ | |
920 | irel->r_offset -= 1; | |
921 | ||
922 | /* Delete two bytes of data. */ | |
923 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
924 | irel->r_offset + 1, 2)) | |
925 | goto error_return; | |
926 | ||
927 | /* That will change things, so, we should relax again. | |
928 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 929 | *again = TRUE; |
252b5132 RH |
930 | break; |
931 | ||
a7c10850 | 932 | /* mov imm24,an -> mov imm16,an |
252b5132 RH |
933 | cmp imm24,an -> cmp imm16,an |
934 | mov (abs24),dn -> mov (abs16),dn | |
935 | mov dn,(abs24) -> mov dn,(abs16) | |
936 | movb dn,(abs24) -> movb dn,(abs16) | |
937 | movbu (abs24),dn -> movbu (abs16),dn */ | |
938 | case 0x74: | |
939 | case 0x7c: | |
940 | case 0xc0: | |
941 | case 0x40: | |
942 | case 0x44: | |
943 | case 0xc8: | |
4cc11e76 | 944 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 945 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 946 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 947 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
948 | |
949 | if ((code & 0xfc) == 0x74) | |
950 | code = 0xdc + (code & 0x03); | |
951 | else if ((code & 0xfc) == 0x7c) | |
952 | code = 0xec + (code & 0x03); | |
953 | else if ((code & 0xfc) == 0xc0) | |
954 | code = 0xc8 + (code & 0x03); | |
955 | else if ((code & 0xfc) == 0x40) | |
956 | code = 0xc0 + (code & 0x03); | |
957 | else if ((code & 0xfc) == 0x44) | |
958 | code = 0xc4 + (code & 0x03); | |
959 | else if ((code & 0xfc) == 0xc8) | |
960 | code = 0xcc + (code & 0x03); | |
961 | ||
962 | /* Fix the opcode. */ | |
963 | bfd_put_8 (abfd, code, contents + irel->r_offset - 2); | |
964 | ||
965 | /* Fix the relocation's type. */ | |
966 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
967 | R_MN10200_16); | |
968 | ||
969 | /* The opcode got shorter too, so we have to fix the | |
970 | offset. */ | |
971 | irel->r_offset -= 1; | |
972 | ||
973 | /* Delete two bytes of data. */ | |
974 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
975 | irel->r_offset + 1, 2)) | |
976 | goto error_return; | |
977 | ||
978 | /* That will change things, so, we should relax again. | |
979 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 980 | *again = TRUE; |
252b5132 RH |
981 | break; |
982 | ||
983 | /* cmp imm24,dn -> cmp imm16,dn | |
984 | mov (abs24),an -> mov (abs16),an | |
985 | mov an,(abs24) -> mov an,(abs16) | |
986 | add imm24,dn -> add imm16,dn | |
987 | add imm24,an -> add imm16,an | |
988 | sub imm24,dn -> sub imm16,dn | |
a7c10850 | 989 | sub imm24,an -> sub imm16,an |
252b5132 RH |
990 | And all d24->d16 in memory ops. */ |
991 | case 0x78: | |
992 | case 0xd0: | |
993 | case 0x50: | |
994 | case 0x60: | |
995 | case 0x64: | |
996 | case 0x68: | |
997 | case 0x6c: | |
998 | case 0x80: | |
999 | case 0xf0: | |
1000 | case 0x00: | |
1001 | case 0x10: | |
1002 | case 0xb0: | |
1003 | case 0x30: | |
1004 | case 0xa0: | |
1005 | case 0x20: | |
1006 | case 0x90: | |
1007 | /* Not safe if the high bit is on as relaxing may | |
1008 | move the value out of high mem and thus not fit | |
1009 | in a signed 16bit value. */ | |
1010 | if (((code & 0xfc) == 0x78 | |
27def10f KH |
1011 | || (code & 0xfc) == 0x60 |
1012 | || (code & 0xfc) == 0x64 | |
1013 | || (code & 0xfc) == 0x68 | |
1014 | || (code & 0xfc) == 0x6c | |
1015 | || (code & 0xfc) == 0x80 | |
1016 | || (code & 0xfc) == 0xf0 | |
1017 | || (code & 0xfc) == 0x00 | |
1018 | || (code & 0xfc) == 0x10 | |
1019 | || (code & 0xfc) == 0xb0 | |
1020 | || (code & 0xfc) == 0x30 | |
1021 | || (code & 0xfc) == 0xa0 | |
1022 | || (code & 0xfc) == 0x20 | |
1023 | || (code & 0xfc) == 0x90) | |
1024 | && (value & 0x8000) != 0) | |
252b5132 RH |
1025 | continue; |
1026 | ||
4cc11e76 | 1027 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1028 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1029 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1030 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1031 | |
1032 | /* Fix the opcode. */ | |
1033 | bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2); | |
1034 | ||
1035 | if ((code & 0xfc) == 0x78) | |
1036 | code = 0x48 + (code & 0x03); | |
1037 | else if ((code & 0xfc) == 0xd0) | |
1038 | code = 0x30 + (code & 0x03); | |
1039 | else if ((code & 0xfc) == 0x50) | |
1040 | code = 0x20 + (code & 0x03); | |
1041 | else if ((code & 0xfc) == 0x60) | |
1042 | code = 0x18 + (code & 0x03); | |
1043 | else if ((code & 0xfc) == 0x64) | |
1044 | code = 0x08 + (code & 0x03); | |
1045 | else if ((code & 0xfc) == 0x68) | |
1046 | code = 0x1c + (code & 0x03); | |
1047 | else if ((code & 0xfc) == 0x6c) | |
1048 | code = 0x0c + (code & 0x03); | |
1049 | else if ((code & 0xfc) == 0x80) | |
1050 | code = 0xc0 + (code & 0x07); | |
1051 | else if ((code & 0xfc) == 0xf0) | |
1052 | code = 0xb0 + (code & 0x07); | |
1053 | else if ((code & 0xfc) == 0x00) | |
1054 | code = 0x80 + (code & 0x07); | |
1055 | else if ((code & 0xfc) == 0x10) | |
1056 | code = 0xa0 + (code & 0x07); | |
1057 | else if ((code & 0xfc) == 0xb0) | |
1058 | code = 0x70 + (code & 0x07); | |
1059 | else if ((code & 0xfc) == 0x30) | |
1060 | code = 0x60 + (code & 0x07); | |
1061 | else if ((code & 0xfc) == 0xa0) | |
1062 | code = 0xd0 + (code & 0x07); | |
1063 | else if ((code & 0xfc) == 0x20) | |
1064 | code = 0x90 + (code & 0x07); | |
1065 | else if ((code & 0xfc) == 0x90) | |
1066 | code = 0x50 + (code & 0x07); | |
1067 | ||
1068 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
1069 | ||
1070 | /* Fix the relocation's type. */ | |
1071 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1072 | R_MN10200_16); | |
1073 | ||
1074 | /* Delete one bytes of data. */ | |
1075 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1076 | irel->r_offset + 2, 1)) | |
1077 | goto error_return; | |
1078 | ||
1079 | /* That will change things, so, we should relax again. | |
1080 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1081 | *again = TRUE; |
252b5132 RH |
1082 | break; |
1083 | ||
1084 | /* movb (abs24),dn ->movbu (abs16),dn extxb bn */ | |
1085 | case 0xc4: | |
1086 | /* Note that we've changed the reldection contents, etc. */ | |
1087 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 1088 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1089 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1090 | |
1091 | bfd_put_8 (abfd, 0xcc + (code & 0x03), | |
1092 | contents + irel->r_offset - 2); | |
1093 | ||
1094 | bfd_put_8 (abfd, 0xb8 + (code & 0x03), | |
1095 | contents + irel->r_offset - 1); | |
1096 | ||
1097 | /* Fix the relocation's type. */ | |
1098 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1099 | R_MN10200_16); | |
1100 | ||
1101 | /* The reloc will be applied one byte in front of its | |
1102 | current location. */ | |
1103 | irel->r_offset -= 1; | |
1104 | ||
1105 | /* Delete one bytes of data. */ | |
1106 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1107 | irel->r_offset + 2, 1)) | |
1108 | goto error_return; | |
1109 | ||
1110 | /* That will change things, so, we should relax again. | |
1111 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1112 | *again = TRUE; |
252b5132 RH |
1113 | break; |
1114 | } | |
1115 | } | |
1116 | } | |
1117 | } | |
1118 | ||
6cdc0ccc AM |
1119 | if (isymbuf != NULL |
1120 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
252b5132 RH |
1121 | { |
1122 | if (! link_info->keep_memory) | |
6cdc0ccc | 1123 | free (isymbuf); |
252b5132 RH |
1124 | else |
1125 | { | |
6cdc0ccc AM |
1126 | /* Cache the symbols for elf_link_input_bfd. */ |
1127 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
252b5132 | 1128 | } |
9ad5cbcf AM |
1129 | } |
1130 | ||
6cdc0ccc AM |
1131 | if (contents != NULL |
1132 | && elf_section_data (sec)->this_hdr.contents != contents) | |
252b5132 RH |
1133 | { |
1134 | if (! link_info->keep_memory) | |
6cdc0ccc AM |
1135 | free (contents); |
1136 | else | |
252b5132 | 1137 | { |
6cdc0ccc AM |
1138 | /* Cache the section contents for elf_link_input_bfd. */ |
1139 | elf_section_data (sec)->this_hdr.contents = contents; | |
252b5132 | 1140 | } |
252b5132 RH |
1141 | } |
1142 | ||
6cdc0ccc AM |
1143 | if (internal_relocs != NULL |
1144 | && elf_section_data (sec)->relocs != internal_relocs) | |
1145 | free (internal_relocs); | |
1146 | ||
b34976b6 | 1147 | return TRUE; |
252b5132 RH |
1148 | |
1149 | error_return: | |
6cdc0ccc AM |
1150 | if (isymbuf != NULL |
1151 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1152 | free (isymbuf); | |
1153 | if (contents != NULL | |
1154 | && elf_section_data (sec)->this_hdr.contents != contents) | |
1155 | free (contents); | |
1156 | if (internal_relocs != NULL | |
1157 | && elf_section_data (sec)->relocs != internal_relocs) | |
1158 | free (internal_relocs); | |
9ad5cbcf | 1159 | |
b34976b6 | 1160 | return FALSE; |
252b5132 RH |
1161 | } |
1162 | ||
1163 | /* Delete some bytes from a section while relaxing. */ | |
1164 | ||
b34976b6 | 1165 | static bfd_boolean |
252b5132 RH |
1166 | mn10200_elf_relax_delete_bytes (abfd, sec, addr, count) |
1167 | bfd *abfd; | |
1168 | asection *sec; | |
1169 | bfd_vma addr; | |
1170 | int count; | |
1171 | { | |
1172 | Elf_Internal_Shdr *symtab_hdr; | |
9ad5cbcf | 1173 | unsigned int sec_shndx; |
252b5132 RH |
1174 | bfd_byte *contents; |
1175 | Elf_Internal_Rela *irel, *irelend; | |
1176 | Elf_Internal_Rela *irelalign; | |
1177 | bfd_vma toaddr; | |
6cdc0ccc AM |
1178 | Elf_Internal_Sym *isym; |
1179 | Elf_Internal_Sym *isymend; | |
9ad5cbcf AM |
1180 | struct elf_link_hash_entry **sym_hashes; |
1181 | struct elf_link_hash_entry **end_hashes; | |
1182 | unsigned int symcount; | |
252b5132 | 1183 | |
9ad5cbcf | 1184 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
252b5132 RH |
1185 | |
1186 | contents = elf_section_data (sec)->this_hdr.contents; | |
1187 | ||
1188 | /* The deletion must stop at the next ALIGN reloc for an aligment | |
1189 | power larger than the number of bytes we are deleting. */ | |
1190 | ||
1191 | irelalign = NULL; | |
1192 | toaddr = sec->_cooked_size; | |
1193 | ||
1194 | irel = elf_section_data (sec)->relocs; | |
1195 | irelend = irel + sec->reloc_count; | |
1196 | ||
1197 | /* Actually delete the bytes. */ | |
dc810e39 AM |
1198 | memmove (contents + addr, contents + addr + count, |
1199 | (size_t) (toaddr - addr - count)); | |
252b5132 RH |
1200 | sec->_cooked_size -= count; |
1201 | ||
1202 | /* Adjust all the relocs. */ | |
1203 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
1204 | { | |
1205 | /* Get the new reloc address. */ | |
1206 | if ((irel->r_offset > addr | |
1207 | && irel->r_offset < toaddr)) | |
1208 | irel->r_offset -= count; | |
1209 | } | |
1210 | ||
1211 | /* Adjust the local symbols defined in this section. */ | |
6cdc0ccc AM |
1212 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
1213 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1214 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) | |
252b5132 | 1215 | { |
6cdc0ccc AM |
1216 | if (isym->st_shndx == sec_shndx |
1217 | && isym->st_value > addr | |
1218 | && isym->st_value < toaddr) | |
1219 | isym->st_value -= count; | |
252b5132 RH |
1220 | } |
1221 | ||
1222 | /* Now adjust the global symbols defined in this section. */ | |
9ad5cbcf AM |
1223 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
1224 | - symtab_hdr->sh_info); | |
1225 | sym_hashes = elf_sym_hashes (abfd); | |
1226 | end_hashes = sym_hashes + symcount; | |
1227 | for (; sym_hashes < end_hashes; sym_hashes++) | |
252b5132 | 1228 | { |
9ad5cbcf AM |
1229 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
1230 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1231 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1232 | && sym_hash->root.u.def.section == sec | |
1233 | && sym_hash->root.u.def.value > addr | |
1234 | && sym_hash->root.u.def.value < toaddr) | |
252b5132 | 1235 | { |
9ad5cbcf | 1236 | sym_hash->root.u.def.value -= count; |
252b5132 RH |
1237 | } |
1238 | } | |
1239 | ||
b34976b6 | 1240 | return TRUE; |
252b5132 RH |
1241 | } |
1242 | ||
b34976b6 AM |
1243 | /* Return TRUE if a symbol exists at the given address, else return |
1244 | FALSE. */ | |
1245 | static bfd_boolean | |
6cdc0ccc | 1246 | mn10200_elf_symbol_address_p (abfd, sec, isym, addr) |
252b5132 RH |
1247 | bfd *abfd; |
1248 | asection *sec; | |
6cdc0ccc | 1249 | Elf_Internal_Sym *isym; |
252b5132 RH |
1250 | bfd_vma addr; |
1251 | { | |
1252 | Elf_Internal_Shdr *symtab_hdr; | |
9ad5cbcf | 1253 | unsigned int sec_shndx; |
6cdc0ccc | 1254 | Elf_Internal_Sym *isymend; |
9ad5cbcf AM |
1255 | struct elf_link_hash_entry **sym_hashes; |
1256 | struct elf_link_hash_entry **end_hashes; | |
1257 | unsigned int symcount; | |
252b5132 | 1258 | |
9ad5cbcf | 1259 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
252b5132 | 1260 | |
6cdc0ccc | 1261 | /* Examine all the local symbols. */ |
9ad5cbcf | 1262 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
6cdc0ccc | 1263 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) |
252b5132 | 1264 | { |
6cdc0ccc AM |
1265 | if (isym->st_shndx == sec_shndx |
1266 | && isym->st_value == addr) | |
b34976b6 | 1267 | return TRUE; |
252b5132 RH |
1268 | } |
1269 | ||
9ad5cbcf AM |
1270 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
1271 | - symtab_hdr->sh_info); | |
1272 | sym_hashes = elf_sym_hashes (abfd); | |
1273 | end_hashes = sym_hashes + symcount; | |
1274 | for (; sym_hashes < end_hashes; sym_hashes++) | |
252b5132 | 1275 | { |
9ad5cbcf AM |
1276 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
1277 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1278 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1279 | && sym_hash->root.u.def.section == sec | |
1280 | && sym_hash->root.u.def.value == addr) | |
b34976b6 | 1281 | return TRUE; |
252b5132 | 1282 | } |
9ad5cbcf | 1283 | |
b34976b6 | 1284 | return FALSE; |
252b5132 RH |
1285 | } |
1286 | ||
1287 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1288 | which uses mn10200_elf_relocate_section. */ | |
1289 | ||
1290 | static bfd_byte * | |
1291 | mn10200_elf_get_relocated_section_contents (output_bfd, link_info, link_order, | |
1049f94e | 1292 | data, relocatable, symbols) |
252b5132 RH |
1293 | bfd *output_bfd; |
1294 | struct bfd_link_info *link_info; | |
1295 | struct bfd_link_order *link_order; | |
1296 | bfd_byte *data; | |
1049f94e | 1297 | bfd_boolean relocatable; |
252b5132 RH |
1298 | asymbol **symbols; |
1299 | { | |
1300 | Elf_Internal_Shdr *symtab_hdr; | |
1301 | asection *input_section = link_order->u.indirect.section; | |
1302 | bfd *input_bfd = input_section->owner; | |
1303 | asection **sections = NULL; | |
1304 | Elf_Internal_Rela *internal_relocs = NULL; | |
6cdc0ccc | 1305 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
1306 | |
1307 | /* We only need to handle the case of relaxing, or of having a | |
1308 | particular set of section contents, specially. */ | |
1049f94e | 1309 | if (relocatable |
252b5132 RH |
1310 | || elf_section_data (input_section)->this_hdr.contents == NULL) |
1311 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1312 | link_order, data, | |
1049f94e | 1313 | relocatable, |
252b5132 RH |
1314 | symbols); |
1315 | ||
1316 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1317 | ||
1318 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
dc810e39 | 1319 | (size_t) input_section->_raw_size); |
252b5132 RH |
1320 | |
1321 | if ((input_section->flags & SEC_RELOC) != 0 | |
1322 | && input_section->reloc_count > 0) | |
1323 | { | |
6cdc0ccc AM |
1324 | Elf_Internal_Sym *isym; |
1325 | Elf_Internal_Sym *isymend; | |
252b5132 | 1326 | asection **secpp; |
9ad5cbcf | 1327 | bfd_size_type amt; |
252b5132 | 1328 | |
45d6a902 | 1329 | internal_relocs = (_bfd_elf_link_read_relocs |
252b5132 | 1330 | (input_bfd, input_section, (PTR) NULL, |
b34976b6 | 1331 | (Elf_Internal_Rela *) NULL, FALSE)); |
252b5132 RH |
1332 | if (internal_relocs == NULL) |
1333 | goto error_return; | |
1334 | ||
6cdc0ccc AM |
1335 | if (symtab_hdr->sh_info != 0) |
1336 | { | |
1337 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1338 | if (isymbuf == NULL) | |
1339 | isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
1340 | symtab_hdr->sh_info, 0, | |
1341 | NULL, NULL, NULL); | |
1342 | if (isymbuf == NULL) | |
1343 | goto error_return; | |
1344 | } | |
252b5132 | 1345 | |
9ad5cbcf AM |
1346 | amt = symtab_hdr->sh_info; |
1347 | amt *= sizeof (asection *); | |
1348 | sections = (asection **) bfd_malloc (amt); | |
1349 | if (sections == NULL && amt != 0) | |
252b5132 RH |
1350 | goto error_return; |
1351 | ||
6cdc0ccc AM |
1352 | isymend = isymbuf + symtab_hdr->sh_info; |
1353 | for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) | |
252b5132 RH |
1354 | { |
1355 | asection *isec; | |
1356 | ||
6cdc0ccc | 1357 | if (isym->st_shndx == SHN_UNDEF) |
252b5132 | 1358 | isec = bfd_und_section_ptr; |
6cdc0ccc | 1359 | else if (isym->st_shndx == SHN_ABS) |
252b5132 | 1360 | isec = bfd_abs_section_ptr; |
6cdc0ccc | 1361 | else if (isym->st_shndx == SHN_COMMON) |
252b5132 RH |
1362 | isec = bfd_com_section_ptr; |
1363 | else | |
6cdc0ccc | 1364 | isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); |
252b5132 RH |
1365 | |
1366 | *secpp = isec; | |
1367 | } | |
1368 | ||
1369 | if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1370 | input_section, data, internal_relocs, | |
6cdc0ccc | 1371 | isymbuf, sections)) |
252b5132 RH |
1372 | goto error_return; |
1373 | ||
1374 | if (sections != NULL) | |
1375 | free (sections); | |
6cdc0ccc AM |
1376 | if (isymbuf != NULL |
1377 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1378 | free (isymbuf); | |
1379 | if (elf_section_data (input_section)->relocs != internal_relocs) | |
252b5132 | 1380 | free (internal_relocs); |
252b5132 RH |
1381 | } |
1382 | ||
1383 | return data; | |
1384 | ||
1385 | error_return: | |
252b5132 RH |
1386 | if (sections != NULL) |
1387 | free (sections); | |
6cdc0ccc AM |
1388 | if (isymbuf != NULL |
1389 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1390 | free (isymbuf); | |
1391 | if (internal_relocs != NULL | |
1392 | && elf_section_data (input_section)->relocs != internal_relocs) | |
1393 | free (internal_relocs); | |
252b5132 RH |
1394 | return NULL; |
1395 | } | |
1396 | ||
252b5132 RH |
1397 | #define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec |
1398 | #define TARGET_LITTLE_NAME "elf32-mn10200" | |
1399 | #define ELF_ARCH bfd_arch_mn10200 | |
aa4f99bb AO |
1400 | #define ELF_MACHINE_CODE EM_MN10200 |
1401 | #define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200 | |
252b5132 RH |
1402 | #define ELF_MAXPAGESIZE 0x1000 |
1403 | ||
b491616a | 1404 | #define elf_backend_rela_normal 1 |
252b5132 RH |
1405 | #define elf_info_to_howto mn10200_info_to_howto |
1406 | #define elf_info_to_howto_rel 0 | |
1407 | #define elf_backend_relocate_section mn10200_elf_relocate_section | |
1408 | #define bfd_elf32_bfd_relax_section mn10200_elf_relax_section | |
1409 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
1410 | mn10200_elf_get_relocated_section_contents | |
1411 | ||
1412 | #define elf_symbol_leading_char '_' | |
1413 | ||
1414 | #include "elf32-target.h" |