Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Matsushita 10200 specific support for 32-bit ELF |
b2a8e766 | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 |
7898deda | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of BFD, the Binary File Descriptor library. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "bfd.h" | |
22 | #include "sysdep.h" | |
23 | #include "libbfd.h" | |
24 | #include "elf-bfd.h" | |
25 | ||
26 | static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup | |
27 | PARAMS ((bfd *abfd, bfd_reloc_code_real_type code)); | |
28 | static void mn10200_info_to_howto | |
947216bf | 29 | PARAMS ((bfd *, arelent *, Elf_Internal_Rela *)); |
b34976b6 | 30 | static bfd_boolean mn10200_elf_relax_delete_bytes |
252b5132 | 31 | PARAMS ((bfd *, asection *, bfd_vma, int)); |
b34976b6 | 32 | static bfd_boolean mn10200_elf_symbol_address_p |
6cdc0ccc | 33 | PARAMS ((bfd *, asection *, Elf_Internal_Sym *, bfd_vma)); |
917583ad NC |
34 | static bfd_reloc_status_type mn10200_elf_final_link_relocate |
35 | PARAMS ((reloc_howto_type *, bfd *, bfd *, asection *, | |
36 | bfd_byte *, bfd_vma, bfd_vma, bfd_vma, | |
37 | struct bfd_link_info *, asection *, int)); | |
b34976b6 AM |
38 | static bfd_boolean mn10200_elf_relocate_section |
39 | PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *, | |
40 | bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Sym *, | |
41 | asection **)); | |
42 | static bfd_boolean mn10200_elf_relax_section | |
43 | PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *)); | |
917583ad NC |
44 | static bfd_byte * mn10200_elf_get_relocated_section_contents |
45 | PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *, | |
b34976b6 | 46 | bfd_byte *, bfd_boolean, asymbol **)); |
252b5132 | 47 | |
27def10f | 48 | enum reloc_type { |
252b5132 RH |
49 | R_MN10200_NONE = 0, |
50 | R_MN10200_32, | |
51 | R_MN10200_16, | |
52 | R_MN10200_8, | |
53 | R_MN10200_24, | |
54 | R_MN10200_PCREL8, | |
55 | R_MN10200_PCREL16, | |
56 | R_MN10200_PCREL24, | |
57 | R_MN10200_MAX | |
58 | }; | |
59 | ||
27def10f | 60 | static reloc_howto_type elf_mn10200_howto_table[] = { |
252b5132 RH |
61 | /* Dummy relocation. Does nothing. */ |
62 | HOWTO (R_MN10200_NONE, | |
63 | 0, | |
64 | 2, | |
65 | 16, | |
b34976b6 | 66 | FALSE, |
252b5132 RH |
67 | 0, |
68 | complain_overflow_bitfield, | |
69 | bfd_elf_generic_reloc, | |
70 | "R_MN10200_NONE", | |
b34976b6 | 71 | FALSE, |
252b5132 RH |
72 | 0, |
73 | 0, | |
b34976b6 | 74 | FALSE), |
252b5132 RH |
75 | /* Standard 32 bit reloc. */ |
76 | HOWTO (R_MN10200_32, | |
77 | 0, | |
78 | 2, | |
79 | 32, | |
b34976b6 | 80 | FALSE, |
252b5132 RH |
81 | 0, |
82 | complain_overflow_bitfield, | |
83 | bfd_elf_generic_reloc, | |
84 | "R_MN10200_32", | |
b34976b6 | 85 | FALSE, |
252b5132 RH |
86 | 0xffffffff, |
87 | 0xffffffff, | |
b34976b6 | 88 | FALSE), |
252b5132 RH |
89 | /* Standard 16 bit reloc. */ |
90 | HOWTO (R_MN10200_16, | |
91 | 0, | |
92 | 1, | |
93 | 16, | |
b34976b6 | 94 | FALSE, |
252b5132 RH |
95 | 0, |
96 | complain_overflow_bitfield, | |
97 | bfd_elf_generic_reloc, | |
98 | "R_MN10200_16", | |
b34976b6 | 99 | FALSE, |
252b5132 RH |
100 | 0xffff, |
101 | 0xffff, | |
b34976b6 | 102 | FALSE), |
252b5132 RH |
103 | /* Standard 8 bit reloc. */ |
104 | HOWTO (R_MN10200_8, | |
105 | 0, | |
106 | 0, | |
107 | 8, | |
b34976b6 | 108 | FALSE, |
252b5132 RH |
109 | 0, |
110 | complain_overflow_bitfield, | |
111 | bfd_elf_generic_reloc, | |
112 | "R_MN10200_8", | |
b34976b6 | 113 | FALSE, |
252b5132 RH |
114 | 0xff, |
115 | 0xff, | |
b34976b6 | 116 | FALSE), |
252b5132 RH |
117 | /* Standard 24 bit reloc. */ |
118 | HOWTO (R_MN10200_24, | |
119 | 0, | |
120 | 2, | |
121 | 24, | |
b34976b6 | 122 | FALSE, |
252b5132 RH |
123 | 0, |
124 | complain_overflow_bitfield, | |
125 | bfd_elf_generic_reloc, | |
126 | "R_MN10200_24", | |
b34976b6 | 127 | FALSE, |
252b5132 RH |
128 | 0xffffff, |
129 | 0xffffff, | |
b34976b6 | 130 | FALSE), |
252b5132 RH |
131 | /* Simple 8 pc-relative reloc. */ |
132 | HOWTO (R_MN10200_PCREL8, | |
133 | 0, | |
134 | 0, | |
135 | 8, | |
b34976b6 | 136 | TRUE, |
252b5132 RH |
137 | 0, |
138 | complain_overflow_bitfield, | |
139 | bfd_elf_generic_reloc, | |
140 | "R_MN10200_PCREL8", | |
b34976b6 | 141 | FALSE, |
252b5132 RH |
142 | 0xff, |
143 | 0xff, | |
b34976b6 | 144 | TRUE), |
252b5132 RH |
145 | /* Simple 16 pc-relative reloc. */ |
146 | HOWTO (R_MN10200_PCREL16, | |
147 | 0, | |
148 | 1, | |
149 | 16, | |
b34976b6 | 150 | TRUE, |
252b5132 RH |
151 | 0, |
152 | complain_overflow_bitfield, | |
153 | bfd_elf_generic_reloc, | |
154 | "R_MN10200_PCREL16", | |
b34976b6 | 155 | FALSE, |
252b5132 RH |
156 | 0xffff, |
157 | 0xffff, | |
b34976b6 | 158 | TRUE), |
252b5132 RH |
159 | /* Simple 32bit pc-relative reloc with a 1 byte adjustment |
160 | to get the pc-relative offset correct. */ | |
161 | HOWTO (R_MN10200_PCREL24, | |
162 | 0, | |
163 | 2, | |
164 | 24, | |
b34976b6 | 165 | TRUE, |
252b5132 RH |
166 | 0, |
167 | complain_overflow_bitfield, | |
168 | bfd_elf_generic_reloc, | |
169 | "R_MN10200_PCREL24", | |
b34976b6 | 170 | FALSE, |
252b5132 RH |
171 | 0xffffff, |
172 | 0xffffff, | |
b34976b6 | 173 | TRUE), |
252b5132 RH |
174 | }; |
175 | ||
27def10f | 176 | struct mn10200_reloc_map { |
252b5132 RH |
177 | bfd_reloc_code_real_type bfd_reloc_val; |
178 | unsigned char elf_reloc_val; | |
179 | }; | |
180 | ||
27def10f KH |
181 | static const struct mn10200_reloc_map mn10200_reloc_map[] = { |
182 | { BFD_RELOC_NONE , R_MN10200_NONE , }, | |
183 | { BFD_RELOC_32 , R_MN10200_32 , }, | |
184 | { BFD_RELOC_16 , R_MN10200_16 , }, | |
185 | { BFD_RELOC_8 , R_MN10200_8 , }, | |
186 | { BFD_RELOC_24 , R_MN10200_24 , }, | |
187 | { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , }, | |
252b5132 RH |
188 | { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, }, |
189 | { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, }, | |
190 | }; | |
191 | ||
192 | static reloc_howto_type * | |
193 | bfd_elf32_bfd_reloc_type_lookup (abfd, code) | |
5f771d47 | 194 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
195 | bfd_reloc_code_real_type code; |
196 | { | |
197 | unsigned int i; | |
198 | ||
199 | for (i = 0; | |
200 | i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map); | |
201 | i++) | |
202 | { | |
203 | if (mn10200_reloc_map[i].bfd_reloc_val == code) | |
204 | return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val]; | |
205 | } | |
206 | ||
207 | return NULL; | |
208 | } | |
209 | ||
210 | /* Set the howto pointer for an MN10200 ELF reloc. */ | |
211 | ||
212 | static void | |
213 | mn10200_info_to_howto (abfd, cache_ptr, dst) | |
5f771d47 | 214 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 215 | arelent *cache_ptr; |
947216bf | 216 | Elf_Internal_Rela *dst; |
252b5132 RH |
217 | { |
218 | unsigned int r_type; | |
219 | ||
220 | r_type = ELF32_R_TYPE (dst->r_info); | |
221 | BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX); | |
222 | cache_ptr->howto = &elf_mn10200_howto_table[r_type]; | |
223 | } | |
224 | ||
225 | /* Perform a relocation as part of a final link. */ | |
917583ad | 226 | |
252b5132 RH |
227 | static bfd_reloc_status_type |
228 | mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, | |
229 | input_section, contents, offset, value, | |
230 | addend, info, sym_sec, is_local) | |
231 | reloc_howto_type *howto; | |
232 | bfd *input_bfd; | |
5f771d47 | 233 | bfd *output_bfd ATTRIBUTE_UNUSED; |
252b5132 RH |
234 | asection *input_section; |
235 | bfd_byte *contents; | |
236 | bfd_vma offset; | |
237 | bfd_vma value; | |
238 | bfd_vma addend; | |
5f771d47 ILT |
239 | struct bfd_link_info *info ATTRIBUTE_UNUSED; |
240 | asection *sym_sec ATTRIBUTE_UNUSED; | |
241 | int is_local ATTRIBUTE_UNUSED; | |
252b5132 RH |
242 | { |
243 | unsigned long r_type = howto->type; | |
244 | bfd_byte *hit_data = contents + offset; | |
245 | ||
246 | switch (r_type) | |
247 | { | |
248 | ||
249 | case R_MN10200_NONE: | |
250 | return bfd_reloc_ok; | |
251 | ||
252 | case R_MN10200_32: | |
253 | value += addend; | |
254 | bfd_put_32 (input_bfd, value, hit_data); | |
255 | return bfd_reloc_ok; | |
256 | ||
257 | case R_MN10200_16: | |
258 | value += addend; | |
259 | ||
27def10f | 260 | if ((long) value > 0x7fff || (long) value < -0x8000) |
252b5132 RH |
261 | return bfd_reloc_overflow; |
262 | ||
263 | bfd_put_16 (input_bfd, value, hit_data); | |
264 | return bfd_reloc_ok; | |
265 | ||
266 | case R_MN10200_8: | |
267 | value += addend; | |
268 | ||
27def10f | 269 | if ((long) value > 0x7f || (long) value < -0x80) |
252b5132 RH |
270 | return bfd_reloc_overflow; |
271 | ||
272 | bfd_put_8 (input_bfd, value, hit_data); | |
273 | return bfd_reloc_ok; | |
274 | ||
275 | case R_MN10200_24: | |
276 | value += addend; | |
277 | ||
27def10f | 278 | if ((long) value > 0x7fffff || (long) value < -0x800000) |
252b5132 RH |
279 | return bfd_reloc_overflow; |
280 | ||
281 | value &= 0xffffff; | |
282 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
283 | bfd_put_32 (input_bfd, value, hit_data); | |
284 | return bfd_reloc_ok; | |
285 | ||
286 | case R_MN10200_PCREL8: | |
287 | value -= (input_section->output_section->vma | |
288 | + input_section->output_offset); | |
289 | value -= (offset + 1); | |
290 | value += addend; | |
291 | ||
27def10f KH |
292 | if ((long) value > 0xff || (long) value < -0x100) |
293 | return bfd_reloc_overflow; | |
252b5132 RH |
294 | |
295 | bfd_put_8 (input_bfd, value, hit_data); | |
296 | return bfd_reloc_ok; | |
297 | ||
298 | case R_MN10200_PCREL16: | |
299 | value -= (input_section->output_section->vma | |
300 | + input_section->output_offset); | |
301 | value -= (offset + 2); | |
302 | value += addend; | |
303 | ||
27def10f KH |
304 | if ((long) value > 0xffff || (long) value < -0x10000) |
305 | return bfd_reloc_overflow; | |
252b5132 RH |
306 | |
307 | bfd_put_16 (input_bfd, value, hit_data); | |
308 | return bfd_reloc_ok; | |
309 | ||
310 | case R_MN10200_PCREL24: | |
311 | value -= (input_section->output_section->vma | |
312 | + input_section->output_offset); | |
313 | value -= (offset + 3); | |
314 | value += addend; | |
315 | ||
27def10f KH |
316 | if ((long) value > 0xffffff || (long) value < -0x1000000) |
317 | return bfd_reloc_overflow; | |
252b5132 RH |
318 | |
319 | value &= 0xffffff; | |
320 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
321 | bfd_put_32 (input_bfd, value, hit_data); | |
322 | return bfd_reloc_ok; | |
323 | ||
324 | default: | |
325 | return bfd_reloc_notsupported; | |
326 | } | |
327 | } | |
252b5132 RH |
328 | \f |
329 | /* Relocate an MN10200 ELF section. */ | |
b34976b6 | 330 | static bfd_boolean |
252b5132 RH |
331 | mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section, |
332 | contents, relocs, local_syms, local_sections) | |
333 | bfd *output_bfd; | |
334 | struct bfd_link_info *info; | |
335 | bfd *input_bfd; | |
336 | asection *input_section; | |
337 | bfd_byte *contents; | |
338 | Elf_Internal_Rela *relocs; | |
339 | Elf_Internal_Sym *local_syms; | |
340 | asection **local_sections; | |
341 | { | |
342 | Elf_Internal_Shdr *symtab_hdr; | |
343 | struct elf_link_hash_entry **sym_hashes; | |
344 | Elf_Internal_Rela *rel, *relend; | |
345 | ||
1049f94e | 346 | if (info->relocatable) |
b34976b6 | 347 | return TRUE; |
b491616a | 348 | |
252b5132 RH |
349 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; |
350 | sym_hashes = elf_sym_hashes (input_bfd); | |
351 | ||
352 | rel = relocs; | |
353 | relend = relocs + input_section->reloc_count; | |
354 | for (; rel < relend; rel++) | |
355 | { | |
356 | int r_type; | |
357 | reloc_howto_type *howto; | |
358 | unsigned long r_symndx; | |
359 | Elf_Internal_Sym *sym; | |
360 | asection *sec; | |
361 | struct elf_link_hash_entry *h; | |
362 | bfd_vma relocation; | |
363 | bfd_reloc_status_type r; | |
364 | ||
365 | r_symndx = ELF32_R_SYM (rel->r_info); | |
366 | r_type = ELF32_R_TYPE (rel->r_info); | |
367 | howto = elf_mn10200_howto_table + r_type; | |
368 | ||
252b5132 RH |
369 | h = NULL; |
370 | sym = NULL; | |
371 | sec = NULL; | |
372 | if (r_symndx < symtab_hdr->sh_info) | |
373 | { | |
374 | sym = local_syms + r_symndx; | |
375 | sec = local_sections[r_symndx]; | |
8517fae7 | 376 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
252b5132 RH |
377 | } |
378 | else | |
379 | { | |
59c2e50f L |
380 | bfd_boolean unresolved_reloc, warned; |
381 | ||
b2a8e766 AM |
382 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
383 | r_symndx, symtab_hdr, sym_hashes, | |
384 | h, sec, relocation, | |
385 | unresolved_reloc, warned); | |
252b5132 RH |
386 | } |
387 | ||
388 | r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, | |
389 | input_section, | |
390 | contents, rel->r_offset, | |
391 | relocation, rel->r_addend, | |
392 | info, sec, h == NULL); | |
393 | ||
394 | if (r != bfd_reloc_ok) | |
395 | { | |
396 | const char *name; | |
27def10f | 397 | const char *msg = (const char *) 0; |
252b5132 RH |
398 | |
399 | if (h != NULL) | |
400 | name = h->root.root.string; | |
401 | else | |
402 | { | |
403 | name = (bfd_elf_string_from_elf_section | |
404 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
405 | if (name == NULL || *name == '\0') | |
406 | name = bfd_section_name (input_bfd, sec); | |
407 | } | |
408 | ||
409 | switch (r) | |
410 | { | |
411 | case bfd_reloc_overflow: | |
412 | if (! ((*info->callbacks->reloc_overflow) | |
dfeffb9f L |
413 | (info, (h ? &h->root : NULL), name, howto->name, |
414 | (bfd_vma) 0, input_bfd, input_section, | |
415 | rel->r_offset))) | |
b34976b6 | 416 | return FALSE; |
252b5132 RH |
417 | break; |
418 | ||
419 | case bfd_reloc_undefined: | |
420 | if (! ((*info->callbacks->undefined_symbol) | |
421 | (info, name, input_bfd, input_section, | |
b34976b6 AM |
422 | rel->r_offset, TRUE))) |
423 | return FALSE; | |
252b5132 RH |
424 | break; |
425 | ||
426 | case bfd_reloc_outofrange: | |
427 | msg = _("internal error: out of range error"); | |
428 | goto common_error; | |
429 | ||
430 | case bfd_reloc_notsupported: | |
431 | msg = _("internal error: unsupported relocation error"); | |
432 | goto common_error; | |
433 | ||
434 | case bfd_reloc_dangerous: | |
435 | msg = _("internal error: dangerous error"); | |
436 | goto common_error; | |
437 | ||
438 | default: | |
439 | msg = _("internal error: unknown error"); | |
440 | /* fall through */ | |
441 | ||
442 | common_error: | |
443 | if (!((*info->callbacks->warning) | |
444 | (info, msg, name, input_bfd, input_section, | |
445 | rel->r_offset))) | |
b34976b6 | 446 | return FALSE; |
252b5132 RH |
447 | break; |
448 | } | |
449 | } | |
450 | } | |
451 | ||
b34976b6 | 452 | return TRUE; |
252b5132 RH |
453 | } |
454 | ||
455 | /* This function handles relaxing for the mn10200. | |
456 | ||
4cc11e76 | 457 | There are quite a few relaxing opportunities available on the mn10200: |
252b5132 RH |
458 | |
459 | * jsr:24 -> jsr:16 2 bytes | |
460 | ||
461 | * jmp:24 -> jmp:16 2 bytes | |
462 | * jmp:16 -> bra:8 1 byte | |
463 | ||
464 | * If the previous instruction is a conditional branch | |
465 | around the jump/bra, we may be able to reverse its condition | |
466 | and change its target to the jump's target. The jump/bra | |
467 | can then be deleted. 2 bytes | |
468 | ||
469 | * mov abs24 -> mov abs16 2 byte savings | |
470 | ||
471 | * Most instructions which accept imm24 can relax to imm16 2 bytes | |
472 | - Most instructions which accept imm16 can relax to imm8 1 byte | |
473 | ||
474 | * Most instructions which accept d24 can relax to d16 2 bytes | |
475 | - Most instructions which accept d16 can relax to d8 1 byte | |
476 | ||
477 | abs24, imm24, d24 all look the same at the reloc level. It | |
478 | might make the code simpler if we had different relocs for | |
479 | the various relaxable operand types. | |
a7c10850 | 480 | |
252b5132 RH |
481 | We don't handle imm16->imm8 or d16->d8 as they're very rare |
482 | and somewhat more difficult to support. */ | |
483 | ||
b34976b6 | 484 | static bfd_boolean |
252b5132 RH |
485 | mn10200_elf_relax_section (abfd, sec, link_info, again) |
486 | bfd *abfd; | |
487 | asection *sec; | |
488 | struct bfd_link_info *link_info; | |
b34976b6 | 489 | bfd_boolean *again; |
252b5132 RH |
490 | { |
491 | Elf_Internal_Shdr *symtab_hdr; | |
492 | Elf_Internal_Rela *internal_relocs; | |
252b5132 RH |
493 | Elf_Internal_Rela *irel, *irelend; |
494 | bfd_byte *contents = NULL; | |
6cdc0ccc | 495 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
496 | |
497 | /* Assume nothing changes. */ | |
b34976b6 | 498 | *again = FALSE; |
252b5132 | 499 | |
1049f94e | 500 | /* We don't have to do anything for a relocatable link, if |
252b5132 RH |
501 | this section does not have relocs, or if this is not a |
502 | code section. */ | |
1049f94e | 503 | if (link_info->relocatable |
252b5132 RH |
504 | || (sec->flags & SEC_RELOC) == 0 |
505 | || sec->reloc_count == 0 | |
506 | || (sec->flags & SEC_CODE) == 0) | |
b34976b6 | 507 | return TRUE; |
252b5132 | 508 | |
252b5132 RH |
509 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
510 | ||
511 | /* Get a copy of the native relocations. */ | |
45d6a902 | 512 | internal_relocs = (_bfd_elf_link_read_relocs |
252b5132 RH |
513 | (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL, |
514 | link_info->keep_memory)); | |
515 | if (internal_relocs == NULL) | |
516 | goto error_return; | |
252b5132 RH |
517 | |
518 | /* Walk through them looking for relaxing opportunities. */ | |
519 | irelend = internal_relocs + sec->reloc_count; | |
520 | for (irel = internal_relocs; irel < irelend; irel++) | |
521 | { | |
522 | bfd_vma symval; | |
523 | ||
524 | /* If this isn't something that can be relaxed, then ignore | |
525 | this reloc. */ | |
526 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE | |
527 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8 | |
528 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX) | |
529 | continue; | |
530 | ||
531 | /* Get the section contents if we haven't done so already. */ | |
532 | if (contents == NULL) | |
533 | { | |
534 | /* Get cached copy if it exists. */ | |
535 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
536 | contents = elf_section_data (sec)->this_hdr.contents; | |
537 | else | |
538 | { | |
539 | /* Go get them off disk. */ | |
eea6121a | 540 | if (!bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
541 | goto error_return; |
542 | } | |
543 | } | |
544 | ||
6cdc0ccc AM |
545 | /* Read this BFD's local symbols if we haven't done so already. */ |
546 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
252b5132 | 547 | { |
6cdc0ccc AM |
548 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
549 | if (isymbuf == NULL) | |
550 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
551 | symtab_hdr->sh_info, 0, | |
552 | NULL, NULL, NULL); | |
553 | if (isymbuf == NULL) | |
554 | goto error_return; | |
252b5132 RH |
555 | } |
556 | ||
557 | /* Get the value of the symbol referred to by the reloc. */ | |
558 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
559 | { | |
9ad5cbcf | 560 | /* A local symbol. */ |
6cdc0ccc | 561 | Elf_Internal_Sym *isym; |
252b5132 RH |
562 | asection *sym_sec; |
563 | ||
6cdc0ccc AM |
564 | isym = isymbuf + ELF32_R_SYM (irel->r_info); |
565 | if (isym->st_shndx == SHN_UNDEF) | |
9ad5cbcf | 566 | sym_sec = bfd_und_section_ptr; |
6cdc0ccc | 567 | else if (isym->st_shndx == SHN_ABS) |
9ad5cbcf | 568 | sym_sec = bfd_abs_section_ptr; |
6cdc0ccc | 569 | else if (isym->st_shndx == SHN_COMMON) |
9ad5cbcf AM |
570 | sym_sec = bfd_com_section_ptr; |
571 | else | |
6cdc0ccc AM |
572 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
573 | symval = (isym->st_value | |
252b5132 RH |
574 | + sym_sec->output_section->vma |
575 | + sym_sec->output_offset); | |
576 | } | |
577 | else | |
578 | { | |
579 | unsigned long indx; | |
580 | struct elf_link_hash_entry *h; | |
581 | ||
582 | /* An external symbol. */ | |
583 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
584 | h = elf_sym_hashes (abfd)[indx]; | |
585 | BFD_ASSERT (h != NULL); | |
586 | if (h->root.type != bfd_link_hash_defined | |
587 | && h->root.type != bfd_link_hash_defweak) | |
588 | { | |
589 | /* This appears to be a reference to an undefined | |
590 | symbol. Just ignore it--it will be caught by the | |
591 | regular reloc processing. */ | |
592 | continue; | |
593 | } | |
594 | ||
595 | symval = (h->root.u.def.value | |
596 | + h->root.u.def.section->output_section->vma | |
597 | + h->root.u.def.section->output_offset); | |
598 | } | |
599 | ||
600 | /* For simplicity of coding, we are going to modify the section | |
601 | contents, the section relocs, and the BFD symbol table. We | |
602 | must tell the rest of the code not to free up this | |
603 | information. It would be possible to instead create a table | |
604 | of changes which have to be made, as is done in coff-mips.c; | |
605 | that would be more work, but would require less memory when | |
606 | the linker is run. */ | |
607 | ||
252b5132 RH |
608 | /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative |
609 | branch/call. */ | |
610 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24) | |
611 | { | |
612 | bfd_vma value = symval; | |
613 | ||
614 | /* Deal with pc-relative gunk. */ | |
615 | value -= (sec->output_section->vma + sec->output_offset); | |
616 | value -= (irel->r_offset + 3); | |
617 | value += irel->r_addend; | |
618 | ||
619 | /* See if the value will fit in 16 bits, note the high value is | |
620 | 0x7fff + 2 as the target will be two bytes closer if we are | |
621 | able to relax. */ | |
27def10f | 622 | if ((long) value < 0x8001 && (long) value > -0x8000) |
252b5132 RH |
623 | { |
624 | unsigned char code; | |
625 | ||
626 | /* Get the opcode. */ | |
627 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
628 | ||
629 | if (code != 0xe0 && code != 0xe1) | |
630 | continue; | |
631 | ||
632 | /* Note that we've changed the relocs, section contents, etc. */ | |
633 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 634 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 635 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
636 | |
637 | /* Fix the opcode. */ | |
638 | if (code == 0xe0) | |
639 | bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2); | |
640 | else if (code == 0xe1) | |
641 | bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2); | |
642 | ||
643 | /* Fix the relocation's type. */ | |
644 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
645 | R_MN10200_PCREL16); | |
646 | ||
647 | /* The opcode got shorter too, so we have to fix the offset. */ | |
648 | irel->r_offset -= 1; | |
649 | ||
650 | /* Delete two bytes of data. */ | |
651 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
652 | irel->r_offset + 1, 2)) | |
653 | goto error_return; | |
654 | ||
655 | /* That will change things, so, we should relax again. | |
656 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 657 | *again = TRUE; |
252b5132 RH |
658 | } |
659 | } | |
660 | ||
661 | /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative | |
662 | branch. */ | |
663 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16) | |
664 | { | |
665 | bfd_vma value = symval; | |
666 | ||
667 | /* Deal with pc-relative gunk. */ | |
668 | value -= (sec->output_section->vma + sec->output_offset); | |
669 | value -= (irel->r_offset + 2); | |
670 | value += irel->r_addend; | |
671 | ||
672 | /* See if the value will fit in 8 bits, note the high value is | |
673 | 0x7f + 1 as the target will be one bytes closer if we are | |
674 | able to relax. */ | |
27def10f | 675 | if ((long) value < 0x80 && (long) value > -0x80) |
252b5132 RH |
676 | { |
677 | unsigned char code; | |
678 | ||
679 | /* Get the opcode. */ | |
680 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
681 | ||
682 | if (code != 0xfc) | |
683 | continue; | |
684 | ||
685 | /* Note that we've changed the relocs, section contents, etc. */ | |
686 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 687 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 688 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
689 | |
690 | /* Fix the opcode. */ | |
691 | bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1); | |
692 | ||
693 | /* Fix the relocation's type. */ | |
694 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
695 | R_MN10200_PCREL8); | |
696 | ||
697 | /* Delete one byte of data. */ | |
698 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
699 | irel->r_offset + 1, 1)) | |
700 | goto error_return; | |
701 | ||
702 | /* That will change things, so, we should relax again. | |
703 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 704 | *again = TRUE; |
252b5132 RH |
705 | } |
706 | } | |
707 | ||
708 | /* Try to eliminate an unconditional 8 bit pc-relative branch | |
709 | which immediately follows a conditional 8 bit pc-relative | |
710 | branch around the unconditional branch. | |
711 | ||
712 | original: new: | |
713 | bCC lab1 bCC' lab2 | |
714 | bra lab2 | |
715 | lab1: lab1: | |
716 | ||
252b5132 RH |
717 | This happens when the bCC can't reach lab2 at assembly time, |
718 | but due to other relaxations it can reach at link time. */ | |
719 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8) | |
720 | { | |
721 | Elf_Internal_Rela *nrel; | |
722 | bfd_vma value = symval; | |
723 | unsigned char code; | |
724 | ||
725 | /* Deal with pc-relative gunk. */ | |
726 | value -= (sec->output_section->vma + sec->output_offset); | |
727 | value -= (irel->r_offset + 1); | |
728 | value += irel->r_addend; | |
729 | ||
730 | /* Do nothing if this reloc is the last byte in the section. */ | |
eea6121a | 731 | if (irel->r_offset == sec->size) |
252b5132 RH |
732 | continue; |
733 | ||
734 | /* See if the next instruction is an unconditional pc-relative | |
735 | branch, more often than not this test will fail, so we | |
736 | test it first to speed things up. */ | |
737 | code = bfd_get_8 (abfd, contents + irel->r_offset + 1); | |
738 | if (code != 0xea) | |
739 | continue; | |
740 | ||
741 | /* Also make sure the next relocation applies to the next | |
742 | instruction and that it's a pc-relative 8 bit branch. */ | |
743 | nrel = irel + 1; | |
744 | if (nrel == irelend | |
745 | || irel->r_offset + 2 != nrel->r_offset | |
746 | || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8) | |
747 | continue; | |
748 | ||
749 | /* Make sure our destination immediately follows the | |
750 | unconditional branch. */ | |
751 | if (symval != (sec->output_section->vma + sec->output_offset | |
752 | + irel->r_offset + 3)) | |
753 | continue; | |
754 | ||
755 | /* Now make sure we are a conditional branch. This may not | |
a7c10850 | 756 | be necessary, but why take the chance. |
252b5132 RH |
757 | |
758 | Note these checks assume that R_MN10200_PCREL8 relocs | |
759 | only occur on bCC and bCCx insns. If they occured | |
760 | elsewhere, we'd need to know the start of this insn | |
761 | for this check to be accurate. */ | |
762 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
763 | if (code != 0xe0 && code != 0xe1 && code != 0xe2 | |
764 | && code != 0xe3 && code != 0xe4 && code != 0xe5 | |
765 | && code != 0xe6 && code != 0xe7 && code != 0xe8 | |
766 | && code != 0xe9 && code != 0xec && code != 0xed | |
767 | && code != 0xee && code != 0xef && code != 0xfc | |
768 | && code != 0xfd && code != 0xfe && code != 0xff) | |
769 | continue; | |
770 | ||
771 | /* We also have to be sure there is no symbol/label | |
772 | at the unconditional branch. */ | |
6cdc0ccc AM |
773 | if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf, |
774 | irel->r_offset + 1)) | |
252b5132 RH |
775 | continue; |
776 | ||
777 | /* Note that we've changed the relocs, section contents, etc. */ | |
778 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 779 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 780 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
781 | |
782 | /* Reverse the condition of the first branch. */ | |
783 | switch (code) | |
784 | { | |
27def10f KH |
785 | case 0xfc: |
786 | code = 0xfd; | |
787 | break; | |
788 | case 0xfd: | |
789 | code = 0xfc; | |
790 | break; | |
791 | case 0xfe: | |
792 | code = 0xff; | |
793 | break; | |
794 | case 0xff: | |
795 | code = 0xfe; | |
796 | break; | |
797 | case 0xe8: | |
798 | code = 0xe9; | |
799 | break; | |
800 | case 0xe9: | |
801 | code = 0xe8; | |
802 | break; | |
803 | case 0xe0: | |
804 | code = 0xe2; | |
805 | break; | |
806 | case 0xe2: | |
807 | code = 0xe0; | |
808 | break; | |
809 | case 0xe3: | |
810 | code = 0xe1; | |
811 | break; | |
812 | case 0xe1: | |
813 | code = 0xe3; | |
814 | break; | |
815 | case 0xe4: | |
816 | code = 0xe6; | |
817 | break; | |
818 | case 0xe6: | |
819 | code = 0xe4; | |
820 | break; | |
821 | case 0xe7: | |
822 | code = 0xe5; | |
823 | break; | |
824 | case 0xe5: | |
825 | code = 0xe7; | |
826 | break; | |
827 | case 0xec: | |
828 | code = 0xed; | |
829 | break; | |
830 | case 0xed: | |
831 | code = 0xec; | |
832 | break; | |
833 | case 0xee: | |
834 | code = 0xef; | |
835 | break; | |
836 | case 0xef: | |
837 | code = 0xee; | |
838 | break; | |
252b5132 RH |
839 | } |
840 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
a7c10850 | 841 | |
252b5132 RH |
842 | /* Set the reloc type and symbol for the first branch |
843 | from the second branch. */ | |
844 | irel->r_info = nrel->r_info; | |
845 | ||
846 | /* Make the reloc for the second branch a null reloc. */ | |
847 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
848 | R_MN10200_NONE); | |
849 | ||
850 | /* Delete two bytes of data. */ | |
851 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
852 | irel->r_offset + 1, 2)) | |
853 | goto error_return; | |
854 | ||
855 | /* That will change things, so, we should relax again. | |
856 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 857 | *again = TRUE; |
252b5132 RH |
858 | } |
859 | ||
860 | /* Try to turn a 24bit immediate, displacement or absolute address | |
861 | into a 16bit immediate, displacement or absolute address. */ | |
862 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24) | |
863 | { | |
864 | bfd_vma value = symval; | |
865 | ||
a7c10850 | 866 | /* See if the value will fit in 16 bits. |
252b5132 RH |
867 | We allow any 16bit match here. We prune those we can't |
868 | handle below. */ | |
27def10f | 869 | if ((long) value < 0x7fff && (long) value > -0x8000) |
252b5132 RH |
870 | { |
871 | unsigned char code; | |
872 | ||
873 | /* All insns which have 24bit operands are 5 bytes long, | |
874 | the first byte will always be 0xf4, but we double check | |
875 | it just in case. */ | |
876 | ||
877 | /* Get the first opcode. */ | |
878 | code = bfd_get_8 (abfd, contents + irel->r_offset - 2); | |
879 | ||
880 | if (code != 0xf4) | |
881 | continue; | |
882 | ||
883 | /* Get the second opcode. */ | |
884 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
885 | ||
886 | switch (code & 0xfc) | |
887 | { | |
888 | /* mov imm24,dn -> mov imm16,dn */ | |
889 | case 0x70: | |
890 | /* Not safe if the high bit is on as relaxing may | |
891 | move the value out of high mem and thus not fit | |
892 | in a signed 16bit value. */ | |
893 | if (value & 0x8000) | |
894 | continue; | |
895 | ||
4cc11e76 | 896 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 897 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 898 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 899 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
900 | |
901 | /* Fix the opcode. */ | |
902 | bfd_put_8 (abfd, 0xf8 + (code & 0x03), | |
903 | contents + irel->r_offset - 2); | |
904 | ||
905 | /* Fix the relocation's type. */ | |
906 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
907 | R_MN10200_16); | |
908 | ||
909 | /* The opcode got shorter too, so we have to fix the | |
910 | offset. */ | |
911 | irel->r_offset -= 1; | |
912 | ||
913 | /* Delete two bytes of data. */ | |
914 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
915 | irel->r_offset + 1, 2)) | |
916 | goto error_return; | |
917 | ||
918 | /* That will change things, so, we should relax again. | |
919 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 920 | *again = TRUE; |
252b5132 RH |
921 | break; |
922 | ||
a7c10850 | 923 | /* mov imm24,an -> mov imm16,an |
252b5132 RH |
924 | cmp imm24,an -> cmp imm16,an |
925 | mov (abs24),dn -> mov (abs16),dn | |
926 | mov dn,(abs24) -> mov dn,(abs16) | |
927 | movb dn,(abs24) -> movb dn,(abs16) | |
928 | movbu (abs24),dn -> movbu (abs16),dn */ | |
929 | case 0x74: | |
930 | case 0x7c: | |
931 | case 0xc0: | |
932 | case 0x40: | |
933 | case 0x44: | |
934 | case 0xc8: | |
4cc11e76 | 935 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 936 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 937 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 938 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
939 | |
940 | if ((code & 0xfc) == 0x74) | |
941 | code = 0xdc + (code & 0x03); | |
942 | else if ((code & 0xfc) == 0x7c) | |
943 | code = 0xec + (code & 0x03); | |
944 | else if ((code & 0xfc) == 0xc0) | |
945 | code = 0xc8 + (code & 0x03); | |
946 | else if ((code & 0xfc) == 0x40) | |
947 | code = 0xc0 + (code & 0x03); | |
948 | else if ((code & 0xfc) == 0x44) | |
949 | code = 0xc4 + (code & 0x03); | |
950 | else if ((code & 0xfc) == 0xc8) | |
951 | code = 0xcc + (code & 0x03); | |
952 | ||
953 | /* Fix the opcode. */ | |
954 | bfd_put_8 (abfd, code, contents + irel->r_offset - 2); | |
955 | ||
956 | /* Fix the relocation's type. */ | |
957 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
958 | R_MN10200_16); | |
959 | ||
960 | /* The opcode got shorter too, so we have to fix the | |
961 | offset. */ | |
962 | irel->r_offset -= 1; | |
963 | ||
964 | /* Delete two bytes of data. */ | |
965 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
966 | irel->r_offset + 1, 2)) | |
967 | goto error_return; | |
968 | ||
969 | /* That will change things, so, we should relax again. | |
970 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 971 | *again = TRUE; |
252b5132 RH |
972 | break; |
973 | ||
974 | /* cmp imm24,dn -> cmp imm16,dn | |
975 | mov (abs24),an -> mov (abs16),an | |
976 | mov an,(abs24) -> mov an,(abs16) | |
977 | add imm24,dn -> add imm16,dn | |
978 | add imm24,an -> add imm16,an | |
979 | sub imm24,dn -> sub imm16,dn | |
a7c10850 | 980 | sub imm24,an -> sub imm16,an |
252b5132 RH |
981 | And all d24->d16 in memory ops. */ |
982 | case 0x78: | |
983 | case 0xd0: | |
984 | case 0x50: | |
985 | case 0x60: | |
986 | case 0x64: | |
987 | case 0x68: | |
988 | case 0x6c: | |
989 | case 0x80: | |
990 | case 0xf0: | |
991 | case 0x00: | |
992 | case 0x10: | |
993 | case 0xb0: | |
994 | case 0x30: | |
995 | case 0xa0: | |
996 | case 0x20: | |
997 | case 0x90: | |
998 | /* Not safe if the high bit is on as relaxing may | |
999 | move the value out of high mem and thus not fit | |
1000 | in a signed 16bit value. */ | |
1001 | if (((code & 0xfc) == 0x78 | |
27def10f KH |
1002 | || (code & 0xfc) == 0x60 |
1003 | || (code & 0xfc) == 0x64 | |
1004 | || (code & 0xfc) == 0x68 | |
1005 | || (code & 0xfc) == 0x6c | |
1006 | || (code & 0xfc) == 0x80 | |
1007 | || (code & 0xfc) == 0xf0 | |
1008 | || (code & 0xfc) == 0x00 | |
1009 | || (code & 0xfc) == 0x10 | |
1010 | || (code & 0xfc) == 0xb0 | |
1011 | || (code & 0xfc) == 0x30 | |
1012 | || (code & 0xfc) == 0xa0 | |
1013 | || (code & 0xfc) == 0x20 | |
1014 | || (code & 0xfc) == 0x90) | |
1015 | && (value & 0x8000) != 0) | |
252b5132 RH |
1016 | continue; |
1017 | ||
4cc11e76 | 1018 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1019 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1020 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1021 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1022 | |
1023 | /* Fix the opcode. */ | |
1024 | bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2); | |
1025 | ||
1026 | if ((code & 0xfc) == 0x78) | |
1027 | code = 0x48 + (code & 0x03); | |
1028 | else if ((code & 0xfc) == 0xd0) | |
1029 | code = 0x30 + (code & 0x03); | |
1030 | else if ((code & 0xfc) == 0x50) | |
1031 | code = 0x20 + (code & 0x03); | |
1032 | else if ((code & 0xfc) == 0x60) | |
1033 | code = 0x18 + (code & 0x03); | |
1034 | else if ((code & 0xfc) == 0x64) | |
1035 | code = 0x08 + (code & 0x03); | |
1036 | else if ((code & 0xfc) == 0x68) | |
1037 | code = 0x1c + (code & 0x03); | |
1038 | else if ((code & 0xfc) == 0x6c) | |
1039 | code = 0x0c + (code & 0x03); | |
1040 | else if ((code & 0xfc) == 0x80) | |
1041 | code = 0xc0 + (code & 0x07); | |
1042 | else if ((code & 0xfc) == 0xf0) | |
1043 | code = 0xb0 + (code & 0x07); | |
1044 | else if ((code & 0xfc) == 0x00) | |
1045 | code = 0x80 + (code & 0x07); | |
1046 | else if ((code & 0xfc) == 0x10) | |
1047 | code = 0xa0 + (code & 0x07); | |
1048 | else if ((code & 0xfc) == 0xb0) | |
1049 | code = 0x70 + (code & 0x07); | |
1050 | else if ((code & 0xfc) == 0x30) | |
1051 | code = 0x60 + (code & 0x07); | |
1052 | else if ((code & 0xfc) == 0xa0) | |
1053 | code = 0xd0 + (code & 0x07); | |
1054 | else if ((code & 0xfc) == 0x20) | |
1055 | code = 0x90 + (code & 0x07); | |
1056 | else if ((code & 0xfc) == 0x90) | |
1057 | code = 0x50 + (code & 0x07); | |
1058 | ||
1059 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
1060 | ||
1061 | /* Fix the relocation's type. */ | |
1062 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1063 | R_MN10200_16); | |
1064 | ||
1065 | /* Delete one bytes of data. */ | |
1066 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1067 | irel->r_offset + 2, 1)) | |
1068 | goto error_return; | |
1069 | ||
1070 | /* That will change things, so, we should relax again. | |
1071 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1072 | *again = TRUE; |
252b5132 RH |
1073 | break; |
1074 | ||
1075 | /* movb (abs24),dn ->movbu (abs16),dn extxb bn */ | |
1076 | case 0xc4: | |
1077 | /* Note that we've changed the reldection contents, etc. */ | |
1078 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 1079 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1080 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1081 | |
1082 | bfd_put_8 (abfd, 0xcc + (code & 0x03), | |
1083 | contents + irel->r_offset - 2); | |
1084 | ||
1085 | bfd_put_8 (abfd, 0xb8 + (code & 0x03), | |
1086 | contents + irel->r_offset - 1); | |
1087 | ||
1088 | /* Fix the relocation's type. */ | |
1089 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1090 | R_MN10200_16); | |
1091 | ||
1092 | /* The reloc will be applied one byte in front of its | |
1093 | current location. */ | |
1094 | irel->r_offset -= 1; | |
1095 | ||
1096 | /* Delete one bytes of data. */ | |
1097 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1098 | irel->r_offset + 2, 1)) | |
1099 | goto error_return; | |
1100 | ||
1101 | /* That will change things, so, we should relax again. | |
1102 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1103 | *again = TRUE; |
252b5132 RH |
1104 | break; |
1105 | } | |
1106 | } | |
1107 | } | |
1108 | } | |
1109 | ||
6cdc0ccc AM |
1110 | if (isymbuf != NULL |
1111 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
252b5132 RH |
1112 | { |
1113 | if (! link_info->keep_memory) | |
6cdc0ccc | 1114 | free (isymbuf); |
252b5132 RH |
1115 | else |
1116 | { | |
6cdc0ccc AM |
1117 | /* Cache the symbols for elf_link_input_bfd. */ |
1118 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
252b5132 | 1119 | } |
9ad5cbcf AM |
1120 | } |
1121 | ||
6cdc0ccc AM |
1122 | if (contents != NULL |
1123 | && elf_section_data (sec)->this_hdr.contents != contents) | |
252b5132 RH |
1124 | { |
1125 | if (! link_info->keep_memory) | |
6cdc0ccc AM |
1126 | free (contents); |
1127 | else | |
252b5132 | 1128 | { |
6cdc0ccc AM |
1129 | /* Cache the section contents for elf_link_input_bfd. */ |
1130 | elf_section_data (sec)->this_hdr.contents = contents; | |
252b5132 | 1131 | } |
252b5132 RH |
1132 | } |
1133 | ||
6cdc0ccc AM |
1134 | if (internal_relocs != NULL |
1135 | && elf_section_data (sec)->relocs != internal_relocs) | |
1136 | free (internal_relocs); | |
1137 | ||
b34976b6 | 1138 | return TRUE; |
252b5132 RH |
1139 | |
1140 | error_return: | |
6cdc0ccc AM |
1141 | if (isymbuf != NULL |
1142 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1143 | free (isymbuf); | |
1144 | if (contents != NULL | |
1145 | && elf_section_data (sec)->this_hdr.contents != contents) | |
1146 | free (contents); | |
1147 | if (internal_relocs != NULL | |
1148 | && elf_section_data (sec)->relocs != internal_relocs) | |
1149 | free (internal_relocs); | |
9ad5cbcf | 1150 | |
b34976b6 | 1151 | return FALSE; |
252b5132 RH |
1152 | } |
1153 | ||
1154 | /* Delete some bytes from a section while relaxing. */ | |
1155 | ||
b34976b6 | 1156 | static bfd_boolean |
252b5132 RH |
1157 | mn10200_elf_relax_delete_bytes (abfd, sec, addr, count) |
1158 | bfd *abfd; | |
1159 | asection *sec; | |
1160 | bfd_vma addr; | |
1161 | int count; | |
1162 | { | |
1163 | Elf_Internal_Shdr *symtab_hdr; | |
9ad5cbcf | 1164 | unsigned int sec_shndx; |
252b5132 RH |
1165 | bfd_byte *contents; |
1166 | Elf_Internal_Rela *irel, *irelend; | |
1167 | Elf_Internal_Rela *irelalign; | |
1168 | bfd_vma toaddr; | |
6cdc0ccc AM |
1169 | Elf_Internal_Sym *isym; |
1170 | Elf_Internal_Sym *isymend; | |
9ad5cbcf AM |
1171 | struct elf_link_hash_entry **sym_hashes; |
1172 | struct elf_link_hash_entry **end_hashes; | |
1173 | unsigned int symcount; | |
252b5132 | 1174 | |
9ad5cbcf | 1175 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
252b5132 RH |
1176 | |
1177 | contents = elf_section_data (sec)->this_hdr.contents; | |
1178 | ||
1179 | /* The deletion must stop at the next ALIGN reloc for an aligment | |
1180 | power larger than the number of bytes we are deleting. */ | |
1181 | ||
1182 | irelalign = NULL; | |
eea6121a | 1183 | toaddr = sec->size; |
252b5132 RH |
1184 | |
1185 | irel = elf_section_data (sec)->relocs; | |
1186 | irelend = irel + sec->reloc_count; | |
1187 | ||
1188 | /* Actually delete the bytes. */ | |
dc810e39 AM |
1189 | memmove (contents + addr, contents + addr + count, |
1190 | (size_t) (toaddr - addr - count)); | |
eea6121a | 1191 | sec->size -= count; |
252b5132 RH |
1192 | |
1193 | /* Adjust all the relocs. */ | |
1194 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
1195 | { | |
1196 | /* Get the new reloc address. */ | |
1197 | if ((irel->r_offset > addr | |
1198 | && irel->r_offset < toaddr)) | |
1199 | irel->r_offset -= count; | |
1200 | } | |
1201 | ||
1202 | /* Adjust the local symbols defined in this section. */ | |
6cdc0ccc AM |
1203 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
1204 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1205 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) | |
252b5132 | 1206 | { |
6cdc0ccc AM |
1207 | if (isym->st_shndx == sec_shndx |
1208 | && isym->st_value > addr | |
1209 | && isym->st_value < toaddr) | |
1210 | isym->st_value -= count; | |
252b5132 RH |
1211 | } |
1212 | ||
1213 | /* Now adjust the global symbols defined in this section. */ | |
9ad5cbcf AM |
1214 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
1215 | - symtab_hdr->sh_info); | |
1216 | sym_hashes = elf_sym_hashes (abfd); | |
1217 | end_hashes = sym_hashes + symcount; | |
1218 | for (; sym_hashes < end_hashes; sym_hashes++) | |
252b5132 | 1219 | { |
9ad5cbcf AM |
1220 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
1221 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1222 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1223 | && sym_hash->root.u.def.section == sec | |
1224 | && sym_hash->root.u.def.value > addr | |
1225 | && sym_hash->root.u.def.value < toaddr) | |
252b5132 | 1226 | { |
9ad5cbcf | 1227 | sym_hash->root.u.def.value -= count; |
252b5132 RH |
1228 | } |
1229 | } | |
1230 | ||
b34976b6 | 1231 | return TRUE; |
252b5132 RH |
1232 | } |
1233 | ||
b34976b6 AM |
1234 | /* Return TRUE if a symbol exists at the given address, else return |
1235 | FALSE. */ | |
1236 | static bfd_boolean | |
6cdc0ccc | 1237 | mn10200_elf_symbol_address_p (abfd, sec, isym, addr) |
252b5132 RH |
1238 | bfd *abfd; |
1239 | asection *sec; | |
6cdc0ccc | 1240 | Elf_Internal_Sym *isym; |
252b5132 RH |
1241 | bfd_vma addr; |
1242 | { | |
1243 | Elf_Internal_Shdr *symtab_hdr; | |
9ad5cbcf | 1244 | unsigned int sec_shndx; |
6cdc0ccc | 1245 | Elf_Internal_Sym *isymend; |
9ad5cbcf AM |
1246 | struct elf_link_hash_entry **sym_hashes; |
1247 | struct elf_link_hash_entry **end_hashes; | |
1248 | unsigned int symcount; | |
252b5132 | 1249 | |
9ad5cbcf | 1250 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
252b5132 | 1251 | |
6cdc0ccc | 1252 | /* Examine all the local symbols. */ |
9ad5cbcf | 1253 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
6cdc0ccc | 1254 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) |
252b5132 | 1255 | { |
6cdc0ccc AM |
1256 | if (isym->st_shndx == sec_shndx |
1257 | && isym->st_value == addr) | |
b34976b6 | 1258 | return TRUE; |
252b5132 RH |
1259 | } |
1260 | ||
9ad5cbcf AM |
1261 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
1262 | - symtab_hdr->sh_info); | |
1263 | sym_hashes = elf_sym_hashes (abfd); | |
1264 | end_hashes = sym_hashes + symcount; | |
1265 | for (; sym_hashes < end_hashes; sym_hashes++) | |
252b5132 | 1266 | { |
9ad5cbcf AM |
1267 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
1268 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1269 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1270 | && sym_hash->root.u.def.section == sec | |
1271 | && sym_hash->root.u.def.value == addr) | |
b34976b6 | 1272 | return TRUE; |
252b5132 | 1273 | } |
9ad5cbcf | 1274 | |
b34976b6 | 1275 | return FALSE; |
252b5132 RH |
1276 | } |
1277 | ||
1278 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1279 | which uses mn10200_elf_relocate_section. */ | |
1280 | ||
1281 | static bfd_byte * | |
1282 | mn10200_elf_get_relocated_section_contents (output_bfd, link_info, link_order, | |
1049f94e | 1283 | data, relocatable, symbols) |
252b5132 RH |
1284 | bfd *output_bfd; |
1285 | struct bfd_link_info *link_info; | |
1286 | struct bfd_link_order *link_order; | |
1287 | bfd_byte *data; | |
1049f94e | 1288 | bfd_boolean relocatable; |
252b5132 RH |
1289 | asymbol **symbols; |
1290 | { | |
1291 | Elf_Internal_Shdr *symtab_hdr; | |
1292 | asection *input_section = link_order->u.indirect.section; | |
1293 | bfd *input_bfd = input_section->owner; | |
1294 | asection **sections = NULL; | |
1295 | Elf_Internal_Rela *internal_relocs = NULL; | |
6cdc0ccc | 1296 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
1297 | |
1298 | /* We only need to handle the case of relaxing, or of having a | |
1299 | particular set of section contents, specially. */ | |
1049f94e | 1300 | if (relocatable |
252b5132 RH |
1301 | || elf_section_data (input_section)->this_hdr.contents == NULL) |
1302 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1303 | link_order, data, | |
1049f94e | 1304 | relocatable, |
252b5132 RH |
1305 | symbols); |
1306 | ||
1307 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1308 | ||
1309 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
eea6121a | 1310 | (size_t) input_section->size); |
252b5132 RH |
1311 | |
1312 | if ((input_section->flags & SEC_RELOC) != 0 | |
1313 | && input_section->reloc_count > 0) | |
1314 | { | |
6cdc0ccc AM |
1315 | Elf_Internal_Sym *isym; |
1316 | Elf_Internal_Sym *isymend; | |
252b5132 | 1317 | asection **secpp; |
9ad5cbcf | 1318 | bfd_size_type amt; |
252b5132 | 1319 | |
45d6a902 | 1320 | internal_relocs = (_bfd_elf_link_read_relocs |
252b5132 | 1321 | (input_bfd, input_section, (PTR) NULL, |
b34976b6 | 1322 | (Elf_Internal_Rela *) NULL, FALSE)); |
252b5132 RH |
1323 | if (internal_relocs == NULL) |
1324 | goto error_return; | |
1325 | ||
6cdc0ccc AM |
1326 | if (symtab_hdr->sh_info != 0) |
1327 | { | |
1328 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1329 | if (isymbuf == NULL) | |
1330 | isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
1331 | symtab_hdr->sh_info, 0, | |
1332 | NULL, NULL, NULL); | |
1333 | if (isymbuf == NULL) | |
1334 | goto error_return; | |
1335 | } | |
252b5132 | 1336 | |
9ad5cbcf AM |
1337 | amt = symtab_hdr->sh_info; |
1338 | amt *= sizeof (asection *); | |
1339 | sections = (asection **) bfd_malloc (amt); | |
1340 | if (sections == NULL && amt != 0) | |
252b5132 RH |
1341 | goto error_return; |
1342 | ||
6cdc0ccc AM |
1343 | isymend = isymbuf + symtab_hdr->sh_info; |
1344 | for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) | |
252b5132 RH |
1345 | { |
1346 | asection *isec; | |
1347 | ||
6cdc0ccc | 1348 | if (isym->st_shndx == SHN_UNDEF) |
252b5132 | 1349 | isec = bfd_und_section_ptr; |
6cdc0ccc | 1350 | else if (isym->st_shndx == SHN_ABS) |
252b5132 | 1351 | isec = bfd_abs_section_ptr; |
6cdc0ccc | 1352 | else if (isym->st_shndx == SHN_COMMON) |
252b5132 RH |
1353 | isec = bfd_com_section_ptr; |
1354 | else | |
6cdc0ccc | 1355 | isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); |
252b5132 RH |
1356 | |
1357 | *secpp = isec; | |
1358 | } | |
1359 | ||
1360 | if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1361 | input_section, data, internal_relocs, | |
6cdc0ccc | 1362 | isymbuf, sections)) |
252b5132 RH |
1363 | goto error_return; |
1364 | ||
1365 | if (sections != NULL) | |
1366 | free (sections); | |
6cdc0ccc AM |
1367 | if (isymbuf != NULL |
1368 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1369 | free (isymbuf); | |
1370 | if (elf_section_data (input_section)->relocs != internal_relocs) | |
252b5132 | 1371 | free (internal_relocs); |
252b5132 RH |
1372 | } |
1373 | ||
1374 | return data; | |
1375 | ||
1376 | error_return: | |
252b5132 RH |
1377 | if (sections != NULL) |
1378 | free (sections); | |
6cdc0ccc AM |
1379 | if (isymbuf != NULL |
1380 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1381 | free (isymbuf); | |
1382 | if (internal_relocs != NULL | |
1383 | && elf_section_data (input_section)->relocs != internal_relocs) | |
1384 | free (internal_relocs); | |
252b5132 RH |
1385 | return NULL; |
1386 | } | |
1387 | ||
252b5132 RH |
1388 | #define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec |
1389 | #define TARGET_LITTLE_NAME "elf32-mn10200" | |
1390 | #define ELF_ARCH bfd_arch_mn10200 | |
aa4f99bb AO |
1391 | #define ELF_MACHINE_CODE EM_MN10200 |
1392 | #define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200 | |
252b5132 RH |
1393 | #define ELF_MAXPAGESIZE 0x1000 |
1394 | ||
b491616a | 1395 | #define elf_backend_rela_normal 1 |
252b5132 RH |
1396 | #define elf_info_to_howto mn10200_info_to_howto |
1397 | #define elf_info_to_howto_rel 0 | |
1398 | #define elf_backend_relocate_section mn10200_elf_relocate_section | |
1399 | #define bfd_elf32_bfd_relax_section mn10200_elf_relax_section | |
1400 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
1401 | mn10200_elf_get_relocated_section_contents | |
1402 | ||
1403 | #define elf_symbol_leading_char '_' | |
1404 | ||
1405 | #include "elf32-target.h" |