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[deliverable/binutils-gdb.git] / bfd / elf-m10200.c
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252b5132 1/* Matsushita 10200 specific support for 32-bit ELF
ab96bf03 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2007
7898deda 3 Free Software Foundation, Inc.
252b5132
RH
4
5This file is part of BFD, the Binary File Descriptor library.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
3e110533 19Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132
RH
20
21#include "bfd.h"
22#include "sysdep.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25
26static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
27 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
28static void mn10200_info_to_howto
947216bf 29 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
b34976b6 30static bfd_boolean mn10200_elf_relax_delete_bytes
252b5132 31 PARAMS ((bfd *, asection *, bfd_vma, int));
b34976b6 32static bfd_boolean mn10200_elf_symbol_address_p
6cdc0ccc 33 PARAMS ((bfd *, asection *, Elf_Internal_Sym *, bfd_vma));
917583ad
NC
34static bfd_reloc_status_type mn10200_elf_final_link_relocate
35 PARAMS ((reloc_howto_type *, bfd *, bfd *, asection *,
36 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
37 struct bfd_link_info *, asection *, int));
b34976b6
AM
38static bfd_boolean mn10200_elf_relocate_section
39 PARAMS ((bfd *, struct bfd_link_info *, bfd *, asection *,
40 bfd_byte *, Elf_Internal_Rela *, Elf_Internal_Sym *,
41 asection **));
42static bfd_boolean mn10200_elf_relax_section
43 PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *));
917583ad
NC
44static bfd_byte * mn10200_elf_get_relocated_section_contents
45 PARAMS ((bfd *, struct bfd_link_info *, struct bfd_link_order *,
b34976b6 46 bfd_byte *, bfd_boolean, asymbol **));
252b5132 47
27def10f 48enum reloc_type {
252b5132
RH
49 R_MN10200_NONE = 0,
50 R_MN10200_32,
51 R_MN10200_16,
52 R_MN10200_8,
53 R_MN10200_24,
54 R_MN10200_PCREL8,
55 R_MN10200_PCREL16,
56 R_MN10200_PCREL24,
57 R_MN10200_MAX
58};
59
27def10f 60static reloc_howto_type elf_mn10200_howto_table[] = {
252b5132
RH
61 /* Dummy relocation. Does nothing. */
62 HOWTO (R_MN10200_NONE,
63 0,
64 2,
65 16,
b34976b6 66 FALSE,
252b5132
RH
67 0,
68 complain_overflow_bitfield,
69 bfd_elf_generic_reloc,
70 "R_MN10200_NONE",
b34976b6 71 FALSE,
252b5132
RH
72 0,
73 0,
b34976b6 74 FALSE),
252b5132
RH
75 /* Standard 32 bit reloc. */
76 HOWTO (R_MN10200_32,
77 0,
78 2,
79 32,
b34976b6 80 FALSE,
252b5132
RH
81 0,
82 complain_overflow_bitfield,
83 bfd_elf_generic_reloc,
84 "R_MN10200_32",
b34976b6 85 FALSE,
252b5132
RH
86 0xffffffff,
87 0xffffffff,
b34976b6 88 FALSE),
252b5132
RH
89 /* Standard 16 bit reloc. */
90 HOWTO (R_MN10200_16,
91 0,
92 1,
93 16,
b34976b6 94 FALSE,
252b5132
RH
95 0,
96 complain_overflow_bitfield,
97 bfd_elf_generic_reloc,
98 "R_MN10200_16",
b34976b6 99 FALSE,
252b5132
RH
100 0xffff,
101 0xffff,
b34976b6 102 FALSE),
252b5132
RH
103 /* Standard 8 bit reloc. */
104 HOWTO (R_MN10200_8,
105 0,
106 0,
107 8,
b34976b6 108 FALSE,
252b5132
RH
109 0,
110 complain_overflow_bitfield,
111 bfd_elf_generic_reloc,
112 "R_MN10200_8",
b34976b6 113 FALSE,
252b5132
RH
114 0xff,
115 0xff,
b34976b6 116 FALSE),
252b5132
RH
117 /* Standard 24 bit reloc. */
118 HOWTO (R_MN10200_24,
119 0,
120 2,
121 24,
b34976b6 122 FALSE,
252b5132
RH
123 0,
124 complain_overflow_bitfield,
125 bfd_elf_generic_reloc,
126 "R_MN10200_24",
b34976b6 127 FALSE,
252b5132
RH
128 0xffffff,
129 0xffffff,
b34976b6 130 FALSE),
252b5132
RH
131 /* Simple 8 pc-relative reloc. */
132 HOWTO (R_MN10200_PCREL8,
133 0,
134 0,
135 8,
b34976b6 136 TRUE,
252b5132
RH
137 0,
138 complain_overflow_bitfield,
139 bfd_elf_generic_reloc,
140 "R_MN10200_PCREL8",
b34976b6 141 FALSE,
252b5132
RH
142 0xff,
143 0xff,
b34976b6 144 TRUE),
252b5132
RH
145 /* Simple 16 pc-relative reloc. */
146 HOWTO (R_MN10200_PCREL16,
147 0,
148 1,
149 16,
b34976b6 150 TRUE,
252b5132
RH
151 0,
152 complain_overflow_bitfield,
153 bfd_elf_generic_reloc,
154 "R_MN10200_PCREL16",
b34976b6 155 FALSE,
252b5132
RH
156 0xffff,
157 0xffff,
b34976b6 158 TRUE),
252b5132
RH
159 /* Simple 32bit pc-relative reloc with a 1 byte adjustment
160 to get the pc-relative offset correct. */
161 HOWTO (R_MN10200_PCREL24,
162 0,
163 2,
164 24,
b34976b6 165 TRUE,
252b5132
RH
166 0,
167 complain_overflow_bitfield,
168 bfd_elf_generic_reloc,
169 "R_MN10200_PCREL24",
b34976b6 170 FALSE,
252b5132
RH
171 0xffffff,
172 0xffffff,
b34976b6 173 TRUE),
252b5132
RH
174};
175
27def10f 176struct mn10200_reloc_map {
252b5132
RH
177 bfd_reloc_code_real_type bfd_reloc_val;
178 unsigned char elf_reloc_val;
179};
180
27def10f
KH
181static const struct mn10200_reloc_map mn10200_reloc_map[] = {
182 { BFD_RELOC_NONE , R_MN10200_NONE , },
183 { BFD_RELOC_32 , R_MN10200_32 , },
184 { BFD_RELOC_16 , R_MN10200_16 , },
185 { BFD_RELOC_8 , R_MN10200_8 , },
186 { BFD_RELOC_24 , R_MN10200_24 , },
187 { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , },
252b5132
RH
188 { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, },
189 { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, },
190};
191
192static reloc_howto_type *
193bfd_elf32_bfd_reloc_type_lookup (abfd, code)
5f771d47 194 bfd *abfd ATTRIBUTE_UNUSED;
252b5132
RH
195 bfd_reloc_code_real_type code;
196{
197 unsigned int i;
198
199 for (i = 0;
200 i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map);
201 i++)
202 {
203 if (mn10200_reloc_map[i].bfd_reloc_val == code)
204 return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val];
205 }
206
207 return NULL;
208}
209
210/* Set the howto pointer for an MN10200 ELF reloc. */
211
212static void
213mn10200_info_to_howto (abfd, cache_ptr, dst)
5f771d47 214 bfd *abfd ATTRIBUTE_UNUSED;
252b5132 215 arelent *cache_ptr;
947216bf 216 Elf_Internal_Rela *dst;
252b5132
RH
217{
218 unsigned int r_type;
219
220 r_type = ELF32_R_TYPE (dst->r_info);
221 BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX);
222 cache_ptr->howto = &elf_mn10200_howto_table[r_type];
223}
224
225/* Perform a relocation as part of a final link. */
917583ad 226
252b5132
RH
227static bfd_reloc_status_type
228mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
229 input_section, contents, offset, value,
230 addend, info, sym_sec, is_local)
231 reloc_howto_type *howto;
232 bfd *input_bfd;
5f771d47 233 bfd *output_bfd ATTRIBUTE_UNUSED;
252b5132
RH
234 asection *input_section;
235 bfd_byte *contents;
236 bfd_vma offset;
237 bfd_vma value;
238 bfd_vma addend;
5f771d47
ILT
239 struct bfd_link_info *info ATTRIBUTE_UNUSED;
240 asection *sym_sec ATTRIBUTE_UNUSED;
241 int is_local ATTRIBUTE_UNUSED;
252b5132
RH
242{
243 unsigned long r_type = howto->type;
244 bfd_byte *hit_data = contents + offset;
245
246 switch (r_type)
247 {
248
249 case R_MN10200_NONE:
250 return bfd_reloc_ok;
251
252 case R_MN10200_32:
253 value += addend;
254 bfd_put_32 (input_bfd, value, hit_data);
255 return bfd_reloc_ok;
256
257 case R_MN10200_16:
258 value += addend;
259
27def10f 260 if ((long) value > 0x7fff || (long) value < -0x8000)
252b5132
RH
261 return bfd_reloc_overflow;
262
263 bfd_put_16 (input_bfd, value, hit_data);
264 return bfd_reloc_ok;
265
266 case R_MN10200_8:
267 value += addend;
268
27def10f 269 if ((long) value > 0x7f || (long) value < -0x80)
252b5132
RH
270 return bfd_reloc_overflow;
271
272 bfd_put_8 (input_bfd, value, hit_data);
273 return bfd_reloc_ok;
274
275 case R_MN10200_24:
276 value += addend;
277
27def10f 278 if ((long) value > 0x7fffff || (long) value < -0x800000)
252b5132
RH
279 return bfd_reloc_overflow;
280
281 value &= 0xffffff;
282 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
283 bfd_put_32 (input_bfd, value, hit_data);
284 return bfd_reloc_ok;
285
286 case R_MN10200_PCREL8:
287 value -= (input_section->output_section->vma
288 + input_section->output_offset);
289 value -= (offset + 1);
290 value += addend;
291
27def10f
KH
292 if ((long) value > 0xff || (long) value < -0x100)
293 return bfd_reloc_overflow;
252b5132
RH
294
295 bfd_put_8 (input_bfd, value, hit_data);
296 return bfd_reloc_ok;
297
298 case R_MN10200_PCREL16:
299 value -= (input_section->output_section->vma
300 + input_section->output_offset);
301 value -= (offset + 2);
302 value += addend;
303
27def10f
KH
304 if ((long) value > 0xffff || (long) value < -0x10000)
305 return bfd_reloc_overflow;
252b5132
RH
306
307 bfd_put_16 (input_bfd, value, hit_data);
308 return bfd_reloc_ok;
309
310 case R_MN10200_PCREL24:
311 value -= (input_section->output_section->vma
312 + input_section->output_offset);
313 value -= (offset + 3);
314 value += addend;
315
27def10f
KH
316 if ((long) value > 0xffffff || (long) value < -0x1000000)
317 return bfd_reloc_overflow;
252b5132
RH
318
319 value &= 0xffffff;
320 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
321 bfd_put_32 (input_bfd, value, hit_data);
322 return bfd_reloc_ok;
323
324 default:
325 return bfd_reloc_notsupported;
326 }
327}
252b5132
RH
328\f
329/* Relocate an MN10200 ELF section. */
b34976b6 330static bfd_boolean
252b5132
RH
331mn10200_elf_relocate_section (output_bfd, info, input_bfd, input_section,
332 contents, relocs, local_syms, local_sections)
333 bfd *output_bfd;
334 struct bfd_link_info *info;
335 bfd *input_bfd;
336 asection *input_section;
337 bfd_byte *contents;
338 Elf_Internal_Rela *relocs;
339 Elf_Internal_Sym *local_syms;
340 asection **local_sections;
341{
342 Elf_Internal_Shdr *symtab_hdr;
343 struct elf_link_hash_entry **sym_hashes;
344 Elf_Internal_Rela *rel, *relend;
345
346 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
347 sym_hashes = elf_sym_hashes (input_bfd);
348
349 rel = relocs;
350 relend = relocs + input_section->reloc_count;
351 for (; rel < relend; rel++)
352 {
353 int r_type;
354 reloc_howto_type *howto;
355 unsigned long r_symndx;
356 Elf_Internal_Sym *sym;
357 asection *sec;
358 struct elf_link_hash_entry *h;
359 bfd_vma relocation;
360 bfd_reloc_status_type r;
361
362 r_symndx = ELF32_R_SYM (rel->r_info);
363 r_type = ELF32_R_TYPE (rel->r_info);
364 howto = elf_mn10200_howto_table + r_type;
365
252b5132
RH
366 h = NULL;
367 sym = NULL;
368 sec = NULL;
369 if (r_symndx < symtab_hdr->sh_info)
370 {
371 sym = local_syms + r_symndx;
372 sec = local_sections[r_symndx];
8517fae7 373 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
374 }
375 else
376 {
59c2e50f
L
377 bfd_boolean unresolved_reloc, warned;
378
b2a8e766
AM
379 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
380 r_symndx, symtab_hdr, sym_hashes,
381 h, sec, relocation,
382 unresolved_reloc, warned);
252b5132
RH
383 }
384
ab96bf03
AM
385 if (sec != NULL && elf_discarded_section (sec))
386 {
387 /* For relocs against symbols from removed linkonce sections,
388 or sections discarded by a linker script, we just want the
389 section contents zeroed. Avoid any special processing. */
390 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
391 rel->r_info = 0;
392 rel->r_addend = 0;
393 continue;
394 }
395
396 if (info->relocatable)
397 continue;
398
252b5132
RH
399 r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
400 input_section,
401 contents, rel->r_offset,
402 relocation, rel->r_addend,
403 info, sec, h == NULL);
404
405 if (r != bfd_reloc_ok)
406 {
407 const char *name;
27def10f 408 const char *msg = (const char *) 0;
252b5132
RH
409
410 if (h != NULL)
411 name = h->root.root.string;
412 else
413 {
414 name = (bfd_elf_string_from_elf_section
415 (input_bfd, symtab_hdr->sh_link, sym->st_name));
416 if (name == NULL || *name == '\0')
417 name = bfd_section_name (input_bfd, sec);
418 }
419
420 switch (r)
421 {
422 case bfd_reloc_overflow:
423 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
424 (info, (h ? &h->root : NULL), name, howto->name,
425 (bfd_vma) 0, input_bfd, input_section,
426 rel->r_offset)))
b34976b6 427 return FALSE;
252b5132
RH
428 break;
429
430 case bfd_reloc_undefined:
431 if (! ((*info->callbacks->undefined_symbol)
432 (info, name, input_bfd, input_section,
b34976b6
AM
433 rel->r_offset, TRUE)))
434 return FALSE;
252b5132
RH
435 break;
436
437 case bfd_reloc_outofrange:
438 msg = _("internal error: out of range error");
439 goto common_error;
440
441 case bfd_reloc_notsupported:
442 msg = _("internal error: unsupported relocation error");
443 goto common_error;
444
445 case bfd_reloc_dangerous:
446 msg = _("internal error: dangerous error");
447 goto common_error;
448
449 default:
450 msg = _("internal error: unknown error");
451 /* fall through */
452
453 common_error:
454 if (!((*info->callbacks->warning)
455 (info, msg, name, input_bfd, input_section,
456 rel->r_offset)))
b34976b6 457 return FALSE;
252b5132
RH
458 break;
459 }
460 }
461 }
462
b34976b6 463 return TRUE;
252b5132
RH
464}
465
466/* This function handles relaxing for the mn10200.
467
4cc11e76 468 There are quite a few relaxing opportunities available on the mn10200:
252b5132
RH
469
470 * jsr:24 -> jsr:16 2 bytes
471
472 * jmp:24 -> jmp:16 2 bytes
473 * jmp:16 -> bra:8 1 byte
474
475 * If the previous instruction is a conditional branch
476 around the jump/bra, we may be able to reverse its condition
477 and change its target to the jump's target. The jump/bra
478 can then be deleted. 2 bytes
479
480 * mov abs24 -> mov abs16 2 byte savings
481
482 * Most instructions which accept imm24 can relax to imm16 2 bytes
483 - Most instructions which accept imm16 can relax to imm8 1 byte
484
485 * Most instructions which accept d24 can relax to d16 2 bytes
486 - Most instructions which accept d16 can relax to d8 1 byte
487
488 abs24, imm24, d24 all look the same at the reloc level. It
489 might make the code simpler if we had different relocs for
490 the various relaxable operand types.
a7c10850 491
252b5132
RH
492 We don't handle imm16->imm8 or d16->d8 as they're very rare
493 and somewhat more difficult to support. */
494
b34976b6 495static bfd_boolean
252b5132
RH
496mn10200_elf_relax_section (abfd, sec, link_info, again)
497 bfd *abfd;
498 asection *sec;
499 struct bfd_link_info *link_info;
b34976b6 500 bfd_boolean *again;
252b5132
RH
501{
502 Elf_Internal_Shdr *symtab_hdr;
503 Elf_Internal_Rela *internal_relocs;
252b5132
RH
504 Elf_Internal_Rela *irel, *irelend;
505 bfd_byte *contents = NULL;
6cdc0ccc 506 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
507
508 /* Assume nothing changes. */
b34976b6 509 *again = FALSE;
252b5132 510
1049f94e 511 /* We don't have to do anything for a relocatable link, if
252b5132
RH
512 this section does not have relocs, or if this is not a
513 code section. */
1049f94e 514 if (link_info->relocatable
252b5132
RH
515 || (sec->flags & SEC_RELOC) == 0
516 || sec->reloc_count == 0
517 || (sec->flags & SEC_CODE) == 0)
b34976b6 518 return TRUE;
252b5132 519
252b5132
RH
520 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
521
522 /* Get a copy of the native relocations. */
45d6a902 523 internal_relocs = (_bfd_elf_link_read_relocs
252b5132
RH
524 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
525 link_info->keep_memory));
526 if (internal_relocs == NULL)
527 goto error_return;
252b5132
RH
528
529 /* Walk through them looking for relaxing opportunities. */
530 irelend = internal_relocs + sec->reloc_count;
531 for (irel = internal_relocs; irel < irelend; irel++)
532 {
533 bfd_vma symval;
534
535 /* If this isn't something that can be relaxed, then ignore
536 this reloc. */
537 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE
538 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8
539 || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX)
540 continue;
541
542 /* Get the section contents if we haven't done so already. */
543 if (contents == NULL)
544 {
545 /* Get cached copy if it exists. */
546 if (elf_section_data (sec)->this_hdr.contents != NULL)
547 contents = elf_section_data (sec)->this_hdr.contents;
548 else
549 {
550 /* Go get them off disk. */
eea6121a 551 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH
552 goto error_return;
553 }
554 }
555
6cdc0ccc
AM
556 /* Read this BFD's local symbols if we haven't done so already. */
557 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
252b5132 558 {
6cdc0ccc
AM
559 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
560 if (isymbuf == NULL)
561 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
562 symtab_hdr->sh_info, 0,
563 NULL, NULL, NULL);
564 if (isymbuf == NULL)
565 goto error_return;
252b5132
RH
566 }
567
568 /* Get the value of the symbol referred to by the reloc. */
569 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
570 {
9ad5cbcf 571 /* A local symbol. */
6cdc0ccc 572 Elf_Internal_Sym *isym;
252b5132
RH
573 asection *sym_sec;
574
6cdc0ccc
AM
575 isym = isymbuf + ELF32_R_SYM (irel->r_info);
576 if (isym->st_shndx == SHN_UNDEF)
9ad5cbcf 577 sym_sec = bfd_und_section_ptr;
6cdc0ccc 578 else if (isym->st_shndx == SHN_ABS)
9ad5cbcf 579 sym_sec = bfd_abs_section_ptr;
6cdc0ccc 580 else if (isym->st_shndx == SHN_COMMON)
9ad5cbcf
AM
581 sym_sec = bfd_com_section_ptr;
582 else
6cdc0ccc
AM
583 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
584 symval = (isym->st_value
252b5132
RH
585 + sym_sec->output_section->vma
586 + sym_sec->output_offset);
587 }
588 else
589 {
590 unsigned long indx;
591 struct elf_link_hash_entry *h;
592
593 /* An external symbol. */
594 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
595 h = elf_sym_hashes (abfd)[indx];
596 BFD_ASSERT (h != NULL);
597 if (h->root.type != bfd_link_hash_defined
598 && h->root.type != bfd_link_hash_defweak)
599 {
600 /* This appears to be a reference to an undefined
601 symbol. Just ignore it--it will be caught by the
602 regular reloc processing. */
603 continue;
604 }
605
606 symval = (h->root.u.def.value
607 + h->root.u.def.section->output_section->vma
608 + h->root.u.def.section->output_offset);
609 }
610
611 /* For simplicity of coding, we are going to modify the section
612 contents, the section relocs, and the BFD symbol table. We
613 must tell the rest of the code not to free up this
614 information. It would be possible to instead create a table
615 of changes which have to be made, as is done in coff-mips.c;
616 that would be more work, but would require less memory when
617 the linker is run. */
618
252b5132
RH
619 /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative
620 branch/call. */
621 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24)
622 {
623 bfd_vma value = symval;
624
625 /* Deal with pc-relative gunk. */
626 value -= (sec->output_section->vma + sec->output_offset);
627 value -= (irel->r_offset + 3);
628 value += irel->r_addend;
629
630 /* See if the value will fit in 16 bits, note the high value is
631 0x7fff + 2 as the target will be two bytes closer if we are
632 able to relax. */
27def10f 633 if ((long) value < 0x8001 && (long) value > -0x8000)
252b5132
RH
634 {
635 unsigned char code;
636
637 /* Get the opcode. */
638 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
639
640 if (code != 0xe0 && code != 0xe1)
641 continue;
642
643 /* Note that we've changed the relocs, section contents, etc. */
644 elf_section_data (sec)->relocs = internal_relocs;
252b5132 645 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 646 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
647
648 /* Fix the opcode. */
649 if (code == 0xe0)
650 bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2);
651 else if (code == 0xe1)
652 bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2);
653
654 /* Fix the relocation's type. */
655 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
656 R_MN10200_PCREL16);
657
658 /* The opcode got shorter too, so we have to fix the offset. */
659 irel->r_offset -= 1;
660
661 /* Delete two bytes of data. */
662 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
663 irel->r_offset + 1, 2))
664 goto error_return;
665
666 /* That will change things, so, we should relax again.
667 Note that this is not required, and it may be slow. */
b34976b6 668 *again = TRUE;
252b5132
RH
669 }
670 }
671
672 /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative
673 branch. */
674 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16)
675 {
676 bfd_vma value = symval;
677
678 /* Deal with pc-relative gunk. */
679 value -= (sec->output_section->vma + sec->output_offset);
680 value -= (irel->r_offset + 2);
681 value += irel->r_addend;
682
683 /* See if the value will fit in 8 bits, note the high value is
684 0x7f + 1 as the target will be one bytes closer if we are
685 able to relax. */
27def10f 686 if ((long) value < 0x80 && (long) value > -0x80)
252b5132
RH
687 {
688 unsigned char code;
689
690 /* Get the opcode. */
691 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
692
693 if (code != 0xfc)
694 continue;
695
696 /* Note that we've changed the relocs, section contents, etc. */
697 elf_section_data (sec)->relocs = internal_relocs;
252b5132 698 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 699 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
700
701 /* Fix the opcode. */
702 bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1);
703
704 /* Fix the relocation's type. */
705 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
706 R_MN10200_PCREL8);
707
708 /* Delete one byte of data. */
709 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
710 irel->r_offset + 1, 1))
711 goto error_return;
712
713 /* That will change things, so, we should relax again.
714 Note that this is not required, and it may be slow. */
b34976b6 715 *again = TRUE;
252b5132
RH
716 }
717 }
718
719 /* Try to eliminate an unconditional 8 bit pc-relative branch
720 which immediately follows a conditional 8 bit pc-relative
721 branch around the unconditional branch.
722
723 original: new:
724 bCC lab1 bCC' lab2
725 bra lab2
726 lab1: lab1:
727
252b5132
RH
728 This happens when the bCC can't reach lab2 at assembly time,
729 but due to other relaxations it can reach at link time. */
730 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8)
731 {
732 Elf_Internal_Rela *nrel;
733 bfd_vma value = symval;
734 unsigned char code;
735
736 /* Deal with pc-relative gunk. */
737 value -= (sec->output_section->vma + sec->output_offset);
738 value -= (irel->r_offset + 1);
739 value += irel->r_addend;
740
741 /* Do nothing if this reloc is the last byte in the section. */
eea6121a 742 if (irel->r_offset == sec->size)
252b5132
RH
743 continue;
744
745 /* See if the next instruction is an unconditional pc-relative
746 branch, more often than not this test will fail, so we
747 test it first to speed things up. */
748 code = bfd_get_8 (abfd, contents + irel->r_offset + 1);
749 if (code != 0xea)
750 continue;
751
752 /* Also make sure the next relocation applies to the next
753 instruction and that it's a pc-relative 8 bit branch. */
754 nrel = irel + 1;
755 if (nrel == irelend
756 || irel->r_offset + 2 != nrel->r_offset
757 || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8)
758 continue;
759
760 /* Make sure our destination immediately follows the
761 unconditional branch. */
762 if (symval != (sec->output_section->vma + sec->output_offset
763 + irel->r_offset + 3))
764 continue;
765
766 /* Now make sure we are a conditional branch. This may not
a7c10850 767 be necessary, but why take the chance.
252b5132
RH
768
769 Note these checks assume that R_MN10200_PCREL8 relocs
770 only occur on bCC and bCCx insns. If they occured
771 elsewhere, we'd need to know the start of this insn
772 for this check to be accurate. */
773 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
774 if (code != 0xe0 && code != 0xe1 && code != 0xe2
775 && code != 0xe3 && code != 0xe4 && code != 0xe5
776 && code != 0xe6 && code != 0xe7 && code != 0xe8
777 && code != 0xe9 && code != 0xec && code != 0xed
778 && code != 0xee && code != 0xef && code != 0xfc
779 && code != 0xfd && code != 0xfe && code != 0xff)
780 continue;
781
782 /* We also have to be sure there is no symbol/label
783 at the unconditional branch. */
6cdc0ccc
AM
784 if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf,
785 irel->r_offset + 1))
252b5132
RH
786 continue;
787
788 /* Note that we've changed the relocs, section contents, etc. */
789 elf_section_data (sec)->relocs = internal_relocs;
252b5132 790 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 791 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
792
793 /* Reverse the condition of the first branch. */
794 switch (code)
795 {
27def10f
KH
796 case 0xfc:
797 code = 0xfd;
798 break;
799 case 0xfd:
800 code = 0xfc;
801 break;
802 case 0xfe:
803 code = 0xff;
804 break;
805 case 0xff:
806 code = 0xfe;
807 break;
808 case 0xe8:
809 code = 0xe9;
810 break;
811 case 0xe9:
812 code = 0xe8;
813 break;
814 case 0xe0:
815 code = 0xe2;
816 break;
817 case 0xe2:
818 code = 0xe0;
819 break;
820 case 0xe3:
821 code = 0xe1;
822 break;
823 case 0xe1:
824 code = 0xe3;
825 break;
826 case 0xe4:
827 code = 0xe6;
828 break;
829 case 0xe6:
830 code = 0xe4;
831 break;
832 case 0xe7:
833 code = 0xe5;
834 break;
835 case 0xe5:
836 code = 0xe7;
837 break;
838 case 0xec:
839 code = 0xed;
840 break;
841 case 0xed:
842 code = 0xec;
843 break;
844 case 0xee:
845 code = 0xef;
846 break;
847 case 0xef:
848 code = 0xee;
849 break;
252b5132
RH
850 }
851 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
a7c10850 852
252b5132
RH
853 /* Set the reloc type and symbol for the first branch
854 from the second branch. */
855 irel->r_info = nrel->r_info;
856
857 /* Make the reloc for the second branch a null reloc. */
858 nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info),
859 R_MN10200_NONE);
860
861 /* Delete two bytes of data. */
862 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
863 irel->r_offset + 1, 2))
864 goto error_return;
865
866 /* That will change things, so, we should relax again.
867 Note that this is not required, and it may be slow. */
b34976b6 868 *again = TRUE;
252b5132
RH
869 }
870
871 /* Try to turn a 24bit immediate, displacement or absolute address
872 into a 16bit immediate, displacement or absolute address. */
873 if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24)
874 {
875 bfd_vma value = symval;
876
a7c10850 877 /* See if the value will fit in 16 bits.
252b5132
RH
878 We allow any 16bit match here. We prune those we can't
879 handle below. */
27def10f 880 if ((long) value < 0x7fff && (long) value > -0x8000)
252b5132
RH
881 {
882 unsigned char code;
883
884 /* All insns which have 24bit operands are 5 bytes long,
885 the first byte will always be 0xf4, but we double check
886 it just in case. */
887
888 /* Get the first opcode. */
889 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
890
891 if (code != 0xf4)
892 continue;
893
894 /* Get the second opcode. */
895 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
896
897 switch (code & 0xfc)
898 {
899 /* mov imm24,dn -> mov imm16,dn */
900 case 0x70:
901 /* Not safe if the high bit is on as relaxing may
902 move the value out of high mem and thus not fit
903 in a signed 16bit value. */
904 if (value & 0x8000)
905 continue;
906
4cc11e76 907 /* Note that we've changed the relocation contents, etc. */
252b5132 908 elf_section_data (sec)->relocs = internal_relocs;
252b5132 909 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 910 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
911
912 /* Fix the opcode. */
913 bfd_put_8 (abfd, 0xf8 + (code & 0x03),
914 contents + irel->r_offset - 2);
915
916 /* Fix the relocation's type. */
917 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
918 R_MN10200_16);
919
920 /* The opcode got shorter too, so we have to fix the
921 offset. */
922 irel->r_offset -= 1;
923
924 /* Delete two bytes of data. */
925 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
926 irel->r_offset + 1, 2))
927 goto error_return;
928
929 /* That will change things, so, we should relax again.
930 Note that this is not required, and it may be slow. */
b34976b6 931 *again = TRUE;
252b5132
RH
932 break;
933
a7c10850 934 /* mov imm24,an -> mov imm16,an
252b5132
RH
935 cmp imm24,an -> cmp imm16,an
936 mov (abs24),dn -> mov (abs16),dn
937 mov dn,(abs24) -> mov dn,(abs16)
938 movb dn,(abs24) -> movb dn,(abs16)
939 movbu (abs24),dn -> movbu (abs16),dn */
940 case 0x74:
941 case 0x7c:
942 case 0xc0:
943 case 0x40:
944 case 0x44:
945 case 0xc8:
4cc11e76 946 /* Note that we've changed the relocation contents, etc. */
252b5132 947 elf_section_data (sec)->relocs = internal_relocs;
252b5132 948 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 949 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
950
951 if ((code & 0xfc) == 0x74)
952 code = 0xdc + (code & 0x03);
953 else if ((code & 0xfc) == 0x7c)
954 code = 0xec + (code & 0x03);
955 else if ((code & 0xfc) == 0xc0)
956 code = 0xc8 + (code & 0x03);
957 else if ((code & 0xfc) == 0x40)
958 code = 0xc0 + (code & 0x03);
959 else if ((code & 0xfc) == 0x44)
960 code = 0xc4 + (code & 0x03);
961 else if ((code & 0xfc) == 0xc8)
962 code = 0xcc + (code & 0x03);
963
964 /* Fix the opcode. */
965 bfd_put_8 (abfd, code, contents + irel->r_offset - 2);
966
967 /* Fix the relocation's type. */
968 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
969 R_MN10200_16);
970
971 /* The opcode got shorter too, so we have to fix the
972 offset. */
973 irel->r_offset -= 1;
974
975 /* Delete two bytes of data. */
976 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
977 irel->r_offset + 1, 2))
978 goto error_return;
979
980 /* That will change things, so, we should relax again.
981 Note that this is not required, and it may be slow. */
b34976b6 982 *again = TRUE;
252b5132
RH
983 break;
984
985 /* cmp imm24,dn -> cmp imm16,dn
986 mov (abs24),an -> mov (abs16),an
987 mov an,(abs24) -> mov an,(abs16)
988 add imm24,dn -> add imm16,dn
989 add imm24,an -> add imm16,an
990 sub imm24,dn -> sub imm16,dn
a7c10850 991 sub imm24,an -> sub imm16,an
252b5132
RH
992 And all d24->d16 in memory ops. */
993 case 0x78:
994 case 0xd0:
995 case 0x50:
996 case 0x60:
997 case 0x64:
998 case 0x68:
999 case 0x6c:
1000 case 0x80:
1001 case 0xf0:
1002 case 0x00:
1003 case 0x10:
1004 case 0xb0:
1005 case 0x30:
1006 case 0xa0:
1007 case 0x20:
1008 case 0x90:
1009 /* Not safe if the high bit is on as relaxing may
1010 move the value out of high mem and thus not fit
1011 in a signed 16bit value. */
1012 if (((code & 0xfc) == 0x78
27def10f
KH
1013 || (code & 0xfc) == 0x60
1014 || (code & 0xfc) == 0x64
1015 || (code & 0xfc) == 0x68
1016 || (code & 0xfc) == 0x6c
1017 || (code & 0xfc) == 0x80
1018 || (code & 0xfc) == 0xf0
1019 || (code & 0xfc) == 0x00
1020 || (code & 0xfc) == 0x10
1021 || (code & 0xfc) == 0xb0
1022 || (code & 0xfc) == 0x30
1023 || (code & 0xfc) == 0xa0
1024 || (code & 0xfc) == 0x20
1025 || (code & 0xfc) == 0x90)
1026 && (value & 0x8000) != 0)
252b5132
RH
1027 continue;
1028
4cc11e76 1029 /* Note that we've changed the relocation contents, etc. */
252b5132 1030 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1031 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1032 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1033
1034 /* Fix the opcode. */
1035 bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2);
1036
1037 if ((code & 0xfc) == 0x78)
1038 code = 0x48 + (code & 0x03);
1039 else if ((code & 0xfc) == 0xd0)
1040 code = 0x30 + (code & 0x03);
1041 else if ((code & 0xfc) == 0x50)
1042 code = 0x20 + (code & 0x03);
1043 else if ((code & 0xfc) == 0x60)
1044 code = 0x18 + (code & 0x03);
1045 else if ((code & 0xfc) == 0x64)
1046 code = 0x08 + (code & 0x03);
1047 else if ((code & 0xfc) == 0x68)
1048 code = 0x1c + (code & 0x03);
1049 else if ((code & 0xfc) == 0x6c)
1050 code = 0x0c + (code & 0x03);
1051 else if ((code & 0xfc) == 0x80)
1052 code = 0xc0 + (code & 0x07);
1053 else if ((code & 0xfc) == 0xf0)
1054 code = 0xb0 + (code & 0x07);
1055 else if ((code & 0xfc) == 0x00)
1056 code = 0x80 + (code & 0x07);
1057 else if ((code & 0xfc) == 0x10)
1058 code = 0xa0 + (code & 0x07);
1059 else if ((code & 0xfc) == 0xb0)
1060 code = 0x70 + (code & 0x07);
1061 else if ((code & 0xfc) == 0x30)
1062 code = 0x60 + (code & 0x07);
1063 else if ((code & 0xfc) == 0xa0)
1064 code = 0xd0 + (code & 0x07);
1065 else if ((code & 0xfc) == 0x20)
1066 code = 0x90 + (code & 0x07);
1067 else if ((code & 0xfc) == 0x90)
1068 code = 0x50 + (code & 0x07);
1069
1070 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
1071
1072 /* Fix the relocation's type. */
1073 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1074 R_MN10200_16);
1075
1076 /* Delete one bytes of data. */
1077 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1078 irel->r_offset + 2, 1))
1079 goto error_return;
1080
1081 /* That will change things, so, we should relax again.
1082 Note that this is not required, and it may be slow. */
b34976b6 1083 *again = TRUE;
252b5132
RH
1084 break;
1085
1086 /* movb (abs24),dn ->movbu (abs16),dn extxb bn */
1087 case 0xc4:
1088 /* Note that we've changed the reldection contents, etc. */
1089 elf_section_data (sec)->relocs = internal_relocs;
252b5132 1090 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1091 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132
RH
1092
1093 bfd_put_8 (abfd, 0xcc + (code & 0x03),
1094 contents + irel->r_offset - 2);
1095
1096 bfd_put_8 (abfd, 0xb8 + (code & 0x03),
1097 contents + irel->r_offset - 1);
1098
1099 /* Fix the relocation's type. */
1100 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1101 R_MN10200_16);
1102
1103 /* The reloc will be applied one byte in front of its
1104 current location. */
1105 irel->r_offset -= 1;
1106
1107 /* Delete one bytes of data. */
1108 if (!mn10200_elf_relax_delete_bytes (abfd, sec,
1109 irel->r_offset + 2, 1))
1110 goto error_return;
1111
1112 /* That will change things, so, we should relax again.
1113 Note that this is not required, and it may be slow. */
b34976b6 1114 *again = TRUE;
252b5132
RH
1115 break;
1116 }
1117 }
1118 }
1119 }
1120
6cdc0ccc
AM
1121 if (isymbuf != NULL
1122 && symtab_hdr->contents != (unsigned char *) isymbuf)
252b5132
RH
1123 {
1124 if (! link_info->keep_memory)
6cdc0ccc 1125 free (isymbuf);
252b5132
RH
1126 else
1127 {
6cdc0ccc
AM
1128 /* Cache the symbols for elf_link_input_bfd. */
1129 symtab_hdr->contents = (unsigned char *) isymbuf;
252b5132 1130 }
9ad5cbcf
AM
1131 }
1132
6cdc0ccc
AM
1133 if (contents != NULL
1134 && elf_section_data (sec)->this_hdr.contents != contents)
252b5132
RH
1135 {
1136 if (! link_info->keep_memory)
6cdc0ccc
AM
1137 free (contents);
1138 else
252b5132 1139 {
6cdc0ccc
AM
1140 /* Cache the section contents for elf_link_input_bfd. */
1141 elf_section_data (sec)->this_hdr.contents = contents;
252b5132 1142 }
252b5132
RH
1143 }
1144
6cdc0ccc
AM
1145 if (internal_relocs != NULL
1146 && elf_section_data (sec)->relocs != internal_relocs)
1147 free (internal_relocs);
1148
b34976b6 1149 return TRUE;
252b5132
RH
1150
1151 error_return:
6cdc0ccc
AM
1152 if (isymbuf != NULL
1153 && symtab_hdr->contents != (unsigned char *) isymbuf)
1154 free (isymbuf);
1155 if (contents != NULL
1156 && elf_section_data (sec)->this_hdr.contents != contents)
1157 free (contents);
1158 if (internal_relocs != NULL
1159 && elf_section_data (sec)->relocs != internal_relocs)
1160 free (internal_relocs);
9ad5cbcf 1161
b34976b6 1162 return FALSE;
252b5132
RH
1163}
1164
1165/* Delete some bytes from a section while relaxing. */
1166
b34976b6 1167static bfd_boolean
252b5132
RH
1168mn10200_elf_relax_delete_bytes (abfd, sec, addr, count)
1169 bfd *abfd;
1170 asection *sec;
1171 bfd_vma addr;
1172 int count;
1173{
1174 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1175 unsigned int sec_shndx;
252b5132
RH
1176 bfd_byte *contents;
1177 Elf_Internal_Rela *irel, *irelend;
1178 Elf_Internal_Rela *irelalign;
1179 bfd_vma toaddr;
6cdc0ccc
AM
1180 Elf_Internal_Sym *isym;
1181 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1182 struct elf_link_hash_entry **sym_hashes;
1183 struct elf_link_hash_entry **end_hashes;
1184 unsigned int symcount;
252b5132 1185
9ad5cbcf 1186 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132
RH
1187
1188 contents = elf_section_data (sec)->this_hdr.contents;
1189
1190 /* The deletion must stop at the next ALIGN reloc for an aligment
1191 power larger than the number of bytes we are deleting. */
1192
1193 irelalign = NULL;
eea6121a 1194 toaddr = sec->size;
252b5132
RH
1195
1196 irel = elf_section_data (sec)->relocs;
1197 irelend = irel + sec->reloc_count;
1198
1199 /* Actually delete the bytes. */
dc810e39
AM
1200 memmove (contents + addr, contents + addr + count,
1201 (size_t) (toaddr - addr - count));
eea6121a 1202 sec->size -= count;
252b5132
RH
1203
1204 /* Adjust all the relocs. */
1205 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1206 {
1207 /* Get the new reloc address. */
1208 if ((irel->r_offset > addr
1209 && irel->r_offset < toaddr))
1210 irel->r_offset -= count;
1211 }
1212
1213 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1214 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1215 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1216 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1217 {
6cdc0ccc
AM
1218 if (isym->st_shndx == sec_shndx
1219 && isym->st_value > addr
1220 && isym->st_value < toaddr)
1221 isym->st_value -= count;
252b5132
RH
1222 }
1223
1224 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1225 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1226 - symtab_hdr->sh_info);
1227 sym_hashes = elf_sym_hashes (abfd);
1228 end_hashes = sym_hashes + symcount;
1229 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1230 {
9ad5cbcf
AM
1231 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1232 if ((sym_hash->root.type == bfd_link_hash_defined
1233 || sym_hash->root.type == bfd_link_hash_defweak)
1234 && sym_hash->root.u.def.section == sec
1235 && sym_hash->root.u.def.value > addr
1236 && sym_hash->root.u.def.value < toaddr)
252b5132 1237 {
9ad5cbcf 1238 sym_hash->root.u.def.value -= count;
252b5132
RH
1239 }
1240 }
1241
b34976b6 1242 return TRUE;
252b5132
RH
1243}
1244
b34976b6
AM
1245/* Return TRUE if a symbol exists at the given address, else return
1246 FALSE. */
1247static bfd_boolean
6cdc0ccc 1248mn10200_elf_symbol_address_p (abfd, sec, isym, addr)
252b5132
RH
1249 bfd *abfd;
1250 asection *sec;
6cdc0ccc 1251 Elf_Internal_Sym *isym;
252b5132
RH
1252 bfd_vma addr;
1253{
1254 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1255 unsigned int sec_shndx;
6cdc0ccc 1256 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1257 struct elf_link_hash_entry **sym_hashes;
1258 struct elf_link_hash_entry **end_hashes;
1259 unsigned int symcount;
252b5132 1260
9ad5cbcf 1261 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
252b5132 1262
6cdc0ccc 1263 /* Examine all the local symbols. */
9ad5cbcf 1264 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc 1265 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
252b5132 1266 {
6cdc0ccc
AM
1267 if (isym->st_shndx == sec_shndx
1268 && isym->st_value == addr)
b34976b6 1269 return TRUE;
252b5132
RH
1270 }
1271
9ad5cbcf
AM
1272 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1273 - symtab_hdr->sh_info);
1274 sym_hashes = elf_sym_hashes (abfd);
1275 end_hashes = sym_hashes + symcount;
1276 for (; sym_hashes < end_hashes; sym_hashes++)
252b5132 1277 {
9ad5cbcf
AM
1278 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1279 if ((sym_hash->root.type == bfd_link_hash_defined
1280 || sym_hash->root.type == bfd_link_hash_defweak)
1281 && sym_hash->root.u.def.section == sec
1282 && sym_hash->root.u.def.value == addr)
b34976b6 1283 return TRUE;
252b5132 1284 }
9ad5cbcf 1285
b34976b6 1286 return FALSE;
252b5132
RH
1287}
1288
1289/* This is a version of bfd_generic_get_relocated_section_contents
1290 which uses mn10200_elf_relocate_section. */
1291
1292static bfd_byte *
1293mn10200_elf_get_relocated_section_contents (output_bfd, link_info, link_order,
1049f94e 1294 data, relocatable, symbols)
252b5132
RH
1295 bfd *output_bfd;
1296 struct bfd_link_info *link_info;
1297 struct bfd_link_order *link_order;
1298 bfd_byte *data;
1049f94e 1299 bfd_boolean relocatable;
252b5132
RH
1300 asymbol **symbols;
1301{
1302 Elf_Internal_Shdr *symtab_hdr;
1303 asection *input_section = link_order->u.indirect.section;
1304 bfd *input_bfd = input_section->owner;
1305 asection **sections = NULL;
1306 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1307 Elf_Internal_Sym *isymbuf = NULL;
252b5132
RH
1308
1309 /* We only need to handle the case of relaxing, or of having a
1310 particular set of section contents, specially. */
1049f94e 1311 if (relocatable
252b5132
RH
1312 || elf_section_data (input_section)->this_hdr.contents == NULL)
1313 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1314 link_order, data,
1049f94e 1315 relocatable,
252b5132
RH
1316 symbols);
1317
1318 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1319
1320 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1321 (size_t) input_section->size);
252b5132
RH
1322
1323 if ((input_section->flags & SEC_RELOC) != 0
1324 && input_section->reloc_count > 0)
1325 {
6cdc0ccc
AM
1326 Elf_Internal_Sym *isym;
1327 Elf_Internal_Sym *isymend;
252b5132 1328 asection **secpp;
9ad5cbcf 1329 bfd_size_type amt;
252b5132 1330
45d6a902 1331 internal_relocs = (_bfd_elf_link_read_relocs
252b5132 1332 (input_bfd, input_section, (PTR) NULL,
b34976b6 1333 (Elf_Internal_Rela *) NULL, FALSE));
252b5132
RH
1334 if (internal_relocs == NULL)
1335 goto error_return;
1336
6cdc0ccc
AM
1337 if (symtab_hdr->sh_info != 0)
1338 {
1339 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1340 if (isymbuf == NULL)
1341 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1342 symtab_hdr->sh_info, 0,
1343 NULL, NULL, NULL);
1344 if (isymbuf == NULL)
1345 goto error_return;
1346 }
252b5132 1347
9ad5cbcf
AM
1348 amt = symtab_hdr->sh_info;
1349 amt *= sizeof (asection *);
1350 sections = (asection **) bfd_malloc (amt);
1351 if (sections == NULL && amt != 0)
252b5132
RH
1352 goto error_return;
1353
6cdc0ccc
AM
1354 isymend = isymbuf + symtab_hdr->sh_info;
1355 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
252b5132
RH
1356 {
1357 asection *isec;
1358
6cdc0ccc 1359 if (isym->st_shndx == SHN_UNDEF)
252b5132 1360 isec = bfd_und_section_ptr;
6cdc0ccc 1361 else if (isym->st_shndx == SHN_ABS)
252b5132 1362 isec = bfd_abs_section_ptr;
6cdc0ccc 1363 else if (isym->st_shndx == SHN_COMMON)
252b5132
RH
1364 isec = bfd_com_section_ptr;
1365 else
6cdc0ccc 1366 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
252b5132
RH
1367
1368 *secpp = isec;
1369 }
1370
1371 if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd,
1372 input_section, data, internal_relocs,
6cdc0ccc 1373 isymbuf, sections))
252b5132
RH
1374 goto error_return;
1375
1376 if (sections != NULL)
1377 free (sections);
6cdc0ccc
AM
1378 if (isymbuf != NULL
1379 && symtab_hdr->contents != (unsigned char *) isymbuf)
1380 free (isymbuf);
1381 if (elf_section_data (input_section)->relocs != internal_relocs)
252b5132 1382 free (internal_relocs);
252b5132
RH
1383 }
1384
1385 return data;
1386
1387 error_return:
252b5132
RH
1388 if (sections != NULL)
1389 free (sections);
6cdc0ccc
AM
1390 if (isymbuf != NULL
1391 && symtab_hdr->contents != (unsigned char *) isymbuf)
1392 free (isymbuf);
1393 if (internal_relocs != NULL
1394 && elf_section_data (input_section)->relocs != internal_relocs)
1395 free (internal_relocs);
252b5132
RH
1396 return NULL;
1397}
1398
252b5132
RH
1399#define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec
1400#define TARGET_LITTLE_NAME "elf32-mn10200"
1401#define ELF_ARCH bfd_arch_mn10200
aa4f99bb
AO
1402#define ELF_MACHINE_CODE EM_MN10200
1403#define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200
252b5132
RH
1404#define ELF_MAXPAGESIZE 0x1000
1405
b491616a 1406#define elf_backend_rela_normal 1
252b5132
RH
1407#define elf_info_to_howto mn10200_info_to_howto
1408#define elf_info_to_howto_rel 0
1409#define elf_backend_relocate_section mn10200_elf_relocate_section
1410#define bfd_elf32_bfd_relax_section mn10200_elf_relax_section
1411#define bfd_elf32_bfd_get_relocated_section_contents \
1412 mn10200_elf_get_relocated_section_contents
1413
1414#define elf_symbol_leading_char '_'
1415
1416#include "elf32-target.h"
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