Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Matsushita 10200 specific support for 32-bit ELF |
c7e2358a | 2 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
dbaa2011 | 3 | 2007, 2010, 2012 |
7898deda | 4 | Free Software Foundation, Inc. |
252b5132 | 5 | |
cd123cb7 | 6 | This file is part of BFD, the Binary File Descriptor library. |
252b5132 | 7 | |
cd123cb7 NC |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
252b5132 | 12 | |
cd123cb7 NC |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
252b5132 | 17 | |
cd123cb7 NC |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
21 | MA 02110-1301, USA. */ | |
252b5132 | 22 | |
252b5132 | 23 | #include "sysdep.h" |
3db64b00 | 24 | #include "bfd.h" |
252b5132 RH |
25 | #include "libbfd.h" |
26 | #include "elf-bfd.h" | |
27 | ||
2c3fc389 NC |
28 | static bfd_boolean |
29 | mn10200_elf_relax_delete_bytes (bfd *, asection *, bfd_vma, int); | |
30 | static bfd_boolean | |
31 | mn10200_elf_symbol_address_p (bfd *, asection *, Elf_Internal_Sym *, bfd_vma); | |
32 | ||
33 | enum reloc_type | |
34 | { | |
252b5132 RH |
35 | R_MN10200_NONE = 0, |
36 | R_MN10200_32, | |
37 | R_MN10200_16, | |
38 | R_MN10200_8, | |
39 | R_MN10200_24, | |
40 | R_MN10200_PCREL8, | |
41 | R_MN10200_PCREL16, | |
42 | R_MN10200_PCREL24, | |
43 | R_MN10200_MAX | |
44 | }; | |
45 | ||
2c3fc389 NC |
46 | static reloc_howto_type elf_mn10200_howto_table[] = |
47 | { | |
252b5132 RH |
48 | /* Dummy relocation. Does nothing. */ |
49 | HOWTO (R_MN10200_NONE, | |
50 | 0, | |
51 | 2, | |
52 | 16, | |
b34976b6 | 53 | FALSE, |
252b5132 RH |
54 | 0, |
55 | complain_overflow_bitfield, | |
56 | bfd_elf_generic_reloc, | |
57 | "R_MN10200_NONE", | |
b34976b6 | 58 | FALSE, |
252b5132 RH |
59 | 0, |
60 | 0, | |
b34976b6 | 61 | FALSE), |
252b5132 RH |
62 | /* Standard 32 bit reloc. */ |
63 | HOWTO (R_MN10200_32, | |
64 | 0, | |
65 | 2, | |
66 | 32, | |
b34976b6 | 67 | FALSE, |
252b5132 RH |
68 | 0, |
69 | complain_overflow_bitfield, | |
70 | bfd_elf_generic_reloc, | |
71 | "R_MN10200_32", | |
b34976b6 | 72 | FALSE, |
252b5132 RH |
73 | 0xffffffff, |
74 | 0xffffffff, | |
b34976b6 | 75 | FALSE), |
252b5132 RH |
76 | /* Standard 16 bit reloc. */ |
77 | HOWTO (R_MN10200_16, | |
78 | 0, | |
79 | 1, | |
80 | 16, | |
b34976b6 | 81 | FALSE, |
252b5132 RH |
82 | 0, |
83 | complain_overflow_bitfield, | |
84 | bfd_elf_generic_reloc, | |
85 | "R_MN10200_16", | |
b34976b6 | 86 | FALSE, |
252b5132 RH |
87 | 0xffff, |
88 | 0xffff, | |
b34976b6 | 89 | FALSE), |
252b5132 RH |
90 | /* Standard 8 bit reloc. */ |
91 | HOWTO (R_MN10200_8, | |
92 | 0, | |
93 | 0, | |
94 | 8, | |
b34976b6 | 95 | FALSE, |
252b5132 RH |
96 | 0, |
97 | complain_overflow_bitfield, | |
98 | bfd_elf_generic_reloc, | |
99 | "R_MN10200_8", | |
b34976b6 | 100 | FALSE, |
252b5132 RH |
101 | 0xff, |
102 | 0xff, | |
b34976b6 | 103 | FALSE), |
252b5132 RH |
104 | /* Standard 24 bit reloc. */ |
105 | HOWTO (R_MN10200_24, | |
106 | 0, | |
107 | 2, | |
108 | 24, | |
b34976b6 | 109 | FALSE, |
252b5132 RH |
110 | 0, |
111 | complain_overflow_bitfield, | |
112 | bfd_elf_generic_reloc, | |
113 | "R_MN10200_24", | |
b34976b6 | 114 | FALSE, |
252b5132 RH |
115 | 0xffffff, |
116 | 0xffffff, | |
b34976b6 | 117 | FALSE), |
252b5132 RH |
118 | /* Simple 8 pc-relative reloc. */ |
119 | HOWTO (R_MN10200_PCREL8, | |
120 | 0, | |
121 | 0, | |
122 | 8, | |
b34976b6 | 123 | TRUE, |
252b5132 RH |
124 | 0, |
125 | complain_overflow_bitfield, | |
126 | bfd_elf_generic_reloc, | |
127 | "R_MN10200_PCREL8", | |
b34976b6 | 128 | FALSE, |
252b5132 RH |
129 | 0xff, |
130 | 0xff, | |
b34976b6 | 131 | TRUE), |
252b5132 RH |
132 | /* Simple 16 pc-relative reloc. */ |
133 | HOWTO (R_MN10200_PCREL16, | |
134 | 0, | |
135 | 1, | |
136 | 16, | |
b34976b6 | 137 | TRUE, |
252b5132 RH |
138 | 0, |
139 | complain_overflow_bitfield, | |
140 | bfd_elf_generic_reloc, | |
141 | "R_MN10200_PCREL16", | |
b34976b6 | 142 | FALSE, |
252b5132 RH |
143 | 0xffff, |
144 | 0xffff, | |
b34976b6 | 145 | TRUE), |
252b5132 RH |
146 | /* Simple 32bit pc-relative reloc with a 1 byte adjustment |
147 | to get the pc-relative offset correct. */ | |
148 | HOWTO (R_MN10200_PCREL24, | |
149 | 0, | |
150 | 2, | |
151 | 24, | |
b34976b6 | 152 | TRUE, |
252b5132 RH |
153 | 0, |
154 | complain_overflow_bitfield, | |
155 | bfd_elf_generic_reloc, | |
156 | "R_MN10200_PCREL24", | |
b34976b6 | 157 | FALSE, |
252b5132 RH |
158 | 0xffffff, |
159 | 0xffffff, | |
b34976b6 | 160 | TRUE), |
252b5132 RH |
161 | }; |
162 | ||
2c3fc389 NC |
163 | struct mn10200_reloc_map |
164 | { | |
252b5132 RH |
165 | bfd_reloc_code_real_type bfd_reloc_val; |
166 | unsigned char elf_reloc_val; | |
167 | }; | |
168 | ||
2c3fc389 NC |
169 | static const struct mn10200_reloc_map mn10200_reloc_map[] = |
170 | { | |
27def10f KH |
171 | { BFD_RELOC_NONE , R_MN10200_NONE , }, |
172 | { BFD_RELOC_32 , R_MN10200_32 , }, | |
173 | { BFD_RELOC_16 , R_MN10200_16 , }, | |
174 | { BFD_RELOC_8 , R_MN10200_8 , }, | |
175 | { BFD_RELOC_24 , R_MN10200_24 , }, | |
176 | { BFD_RELOC_8_PCREL , R_MN10200_PCREL8 , }, | |
252b5132 RH |
177 | { BFD_RELOC_16_PCREL, R_MN10200_PCREL16, }, |
178 | { BFD_RELOC_24_PCREL, R_MN10200_PCREL24, }, | |
179 | }; | |
180 | ||
181 | static reloc_howto_type * | |
2c3fc389 NC |
182 | bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, |
183 | bfd_reloc_code_real_type code) | |
252b5132 RH |
184 | { |
185 | unsigned int i; | |
186 | ||
187 | for (i = 0; | |
188 | i < sizeof (mn10200_reloc_map) / sizeof (struct mn10200_reloc_map); | |
189 | i++) | |
190 | { | |
191 | if (mn10200_reloc_map[i].bfd_reloc_val == code) | |
192 | return &elf_mn10200_howto_table[mn10200_reloc_map[i].elf_reloc_val]; | |
193 | } | |
194 | ||
195 | return NULL; | |
196 | } | |
197 | ||
157090f7 AM |
198 | static reloc_howto_type * |
199 | bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, | |
200 | const char *r_name) | |
201 | { | |
202 | unsigned int i; | |
203 | ||
204 | for (i = 0; | |
205 | i < (sizeof (elf_mn10200_howto_table) | |
206 | / sizeof (elf_mn10200_howto_table[0])); | |
207 | i++) | |
208 | if (elf_mn10200_howto_table[i].name != NULL | |
209 | && strcasecmp (elf_mn10200_howto_table[i].name, r_name) == 0) | |
210 | return &elf_mn10200_howto_table[i]; | |
211 | ||
212 | return NULL; | |
213 | } | |
214 | ||
252b5132 RH |
215 | /* Set the howto pointer for an MN10200 ELF reloc. */ |
216 | ||
217 | static void | |
2c3fc389 NC |
218 | mn10200_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, |
219 | arelent *cache_ptr, | |
220 | Elf_Internal_Rela *dst) | |
252b5132 RH |
221 | { |
222 | unsigned int r_type; | |
223 | ||
224 | r_type = ELF32_R_TYPE (dst->r_info); | |
225 | BFD_ASSERT (r_type < (unsigned int) R_MN10200_MAX); | |
226 | cache_ptr->howto = &elf_mn10200_howto_table[r_type]; | |
227 | } | |
228 | ||
229 | /* Perform a relocation as part of a final link. */ | |
917583ad | 230 | |
252b5132 | 231 | static bfd_reloc_status_type |
2c3fc389 NC |
232 | mn10200_elf_final_link_relocate (reloc_howto_type *howto, |
233 | bfd *input_bfd, | |
234 | bfd *output_bfd ATTRIBUTE_UNUSED, | |
235 | asection *input_section, | |
236 | bfd_byte *contents, | |
237 | bfd_vma offset, | |
238 | bfd_vma value, | |
239 | bfd_vma addend, | |
240 | struct bfd_link_info *info ATTRIBUTE_UNUSED, | |
241 | asection *sym_sec ATTRIBUTE_UNUSED, | |
242 | int is_local ATTRIBUTE_UNUSED) | |
252b5132 RH |
243 | { |
244 | unsigned long r_type = howto->type; | |
245 | bfd_byte *hit_data = contents + offset; | |
246 | ||
247 | switch (r_type) | |
248 | { | |
249 | ||
250 | case R_MN10200_NONE: | |
251 | return bfd_reloc_ok; | |
252 | ||
253 | case R_MN10200_32: | |
254 | value += addend; | |
255 | bfd_put_32 (input_bfd, value, hit_data); | |
256 | return bfd_reloc_ok; | |
257 | ||
258 | case R_MN10200_16: | |
259 | value += addend; | |
260 | ||
27def10f | 261 | if ((long) value > 0x7fff || (long) value < -0x8000) |
252b5132 RH |
262 | return bfd_reloc_overflow; |
263 | ||
264 | bfd_put_16 (input_bfd, value, hit_data); | |
265 | return bfd_reloc_ok; | |
266 | ||
267 | case R_MN10200_8: | |
268 | value += addend; | |
269 | ||
27def10f | 270 | if ((long) value > 0x7f || (long) value < -0x80) |
252b5132 RH |
271 | return bfd_reloc_overflow; |
272 | ||
273 | bfd_put_8 (input_bfd, value, hit_data); | |
274 | return bfd_reloc_ok; | |
275 | ||
276 | case R_MN10200_24: | |
277 | value += addend; | |
278 | ||
27def10f | 279 | if ((long) value > 0x7fffff || (long) value < -0x800000) |
252b5132 RH |
280 | return bfd_reloc_overflow; |
281 | ||
282 | value &= 0xffffff; | |
283 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
284 | bfd_put_32 (input_bfd, value, hit_data); | |
285 | return bfd_reloc_ok; | |
286 | ||
287 | case R_MN10200_PCREL8: | |
288 | value -= (input_section->output_section->vma | |
289 | + input_section->output_offset); | |
290 | value -= (offset + 1); | |
291 | value += addend; | |
292 | ||
27def10f KH |
293 | if ((long) value > 0xff || (long) value < -0x100) |
294 | return bfd_reloc_overflow; | |
252b5132 RH |
295 | |
296 | bfd_put_8 (input_bfd, value, hit_data); | |
297 | return bfd_reloc_ok; | |
298 | ||
299 | case R_MN10200_PCREL16: | |
300 | value -= (input_section->output_section->vma | |
301 | + input_section->output_offset); | |
302 | value -= (offset + 2); | |
303 | value += addend; | |
304 | ||
27def10f KH |
305 | if ((long) value > 0xffff || (long) value < -0x10000) |
306 | return bfd_reloc_overflow; | |
252b5132 RH |
307 | |
308 | bfd_put_16 (input_bfd, value, hit_data); | |
309 | return bfd_reloc_ok; | |
310 | ||
311 | case R_MN10200_PCREL24: | |
312 | value -= (input_section->output_section->vma | |
313 | + input_section->output_offset); | |
314 | value -= (offset + 3); | |
315 | value += addend; | |
316 | ||
27def10f KH |
317 | if ((long) value > 0xffffff || (long) value < -0x1000000) |
318 | return bfd_reloc_overflow; | |
252b5132 RH |
319 | |
320 | value &= 0xffffff; | |
321 | value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000); | |
322 | bfd_put_32 (input_bfd, value, hit_data); | |
323 | return bfd_reloc_ok; | |
324 | ||
325 | default: | |
326 | return bfd_reloc_notsupported; | |
327 | } | |
328 | } | |
252b5132 RH |
329 | \f |
330 | /* Relocate an MN10200 ELF section. */ | |
b34976b6 | 331 | static bfd_boolean |
2c3fc389 NC |
332 | mn10200_elf_relocate_section (bfd *output_bfd, |
333 | struct bfd_link_info *info, | |
334 | bfd *input_bfd, | |
335 | asection *input_section, | |
336 | bfd_byte *contents, | |
337 | Elf_Internal_Rela *relocs, | |
338 | Elf_Internal_Sym *local_syms, | |
339 | asection **local_sections) | |
252b5132 RH |
340 | { |
341 | Elf_Internal_Shdr *symtab_hdr; | |
342 | struct elf_link_hash_entry **sym_hashes; | |
343 | Elf_Internal_Rela *rel, *relend; | |
344 | ||
345 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
346 | sym_hashes = elf_sym_hashes (input_bfd); | |
347 | ||
348 | rel = relocs; | |
349 | relend = relocs + input_section->reloc_count; | |
350 | for (; rel < relend; rel++) | |
351 | { | |
352 | int r_type; | |
353 | reloc_howto_type *howto; | |
354 | unsigned long r_symndx; | |
355 | Elf_Internal_Sym *sym; | |
356 | asection *sec; | |
357 | struct elf_link_hash_entry *h; | |
358 | bfd_vma relocation; | |
359 | bfd_reloc_status_type r; | |
360 | ||
361 | r_symndx = ELF32_R_SYM (rel->r_info); | |
362 | r_type = ELF32_R_TYPE (rel->r_info); | |
363 | howto = elf_mn10200_howto_table + r_type; | |
364 | ||
252b5132 RH |
365 | h = NULL; |
366 | sym = NULL; | |
367 | sec = NULL; | |
368 | if (r_symndx < symtab_hdr->sh_info) | |
369 | { | |
370 | sym = local_syms + r_symndx; | |
371 | sec = local_sections[r_symndx]; | |
8517fae7 | 372 | relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); |
252b5132 RH |
373 | } |
374 | else | |
375 | { | |
59c2e50f L |
376 | bfd_boolean unresolved_reloc, warned; |
377 | ||
b2a8e766 AM |
378 | RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, |
379 | r_symndx, symtab_hdr, sym_hashes, | |
380 | h, sec, relocation, | |
381 | unresolved_reloc, warned); | |
252b5132 RH |
382 | } |
383 | ||
dbaa2011 | 384 | if (sec != NULL && discarded_section (sec)) |
e4067dbb | 385 | RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, |
545fd46b | 386 | rel, 1, relend, howto, 0, contents); |
ab96bf03 AM |
387 | |
388 | if (info->relocatable) | |
389 | continue; | |
390 | ||
252b5132 RH |
391 | r = mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd, |
392 | input_section, | |
393 | contents, rel->r_offset, | |
394 | relocation, rel->r_addend, | |
395 | info, sec, h == NULL); | |
396 | ||
397 | if (r != bfd_reloc_ok) | |
398 | { | |
399 | const char *name; | |
27def10f | 400 | const char *msg = (const char *) 0; |
252b5132 RH |
401 | |
402 | if (h != NULL) | |
403 | name = h->root.root.string; | |
404 | else | |
405 | { | |
406 | name = (bfd_elf_string_from_elf_section | |
407 | (input_bfd, symtab_hdr->sh_link, sym->st_name)); | |
408 | if (name == NULL || *name == '\0') | |
409 | name = bfd_section_name (input_bfd, sec); | |
410 | } | |
411 | ||
412 | switch (r) | |
413 | { | |
414 | case bfd_reloc_overflow: | |
415 | if (! ((*info->callbacks->reloc_overflow) | |
dfeffb9f L |
416 | (info, (h ? &h->root : NULL), name, howto->name, |
417 | (bfd_vma) 0, input_bfd, input_section, | |
418 | rel->r_offset))) | |
b34976b6 | 419 | return FALSE; |
252b5132 RH |
420 | break; |
421 | ||
422 | case bfd_reloc_undefined: | |
423 | if (! ((*info->callbacks->undefined_symbol) | |
424 | (info, name, input_bfd, input_section, | |
b34976b6 AM |
425 | rel->r_offset, TRUE))) |
426 | return FALSE; | |
252b5132 RH |
427 | break; |
428 | ||
429 | case bfd_reloc_outofrange: | |
430 | msg = _("internal error: out of range error"); | |
431 | goto common_error; | |
432 | ||
433 | case bfd_reloc_notsupported: | |
434 | msg = _("internal error: unsupported relocation error"); | |
435 | goto common_error; | |
436 | ||
437 | case bfd_reloc_dangerous: | |
438 | msg = _("internal error: dangerous error"); | |
439 | goto common_error; | |
440 | ||
441 | default: | |
442 | msg = _("internal error: unknown error"); | |
443 | /* fall through */ | |
444 | ||
445 | common_error: | |
446 | if (!((*info->callbacks->warning) | |
447 | (info, msg, name, input_bfd, input_section, | |
448 | rel->r_offset))) | |
b34976b6 | 449 | return FALSE; |
252b5132 RH |
450 | break; |
451 | } | |
452 | } | |
453 | } | |
454 | ||
b34976b6 | 455 | return TRUE; |
252b5132 RH |
456 | } |
457 | ||
2c3fc389 NC |
458 | /* Delete some bytes from a section while relaxing. */ |
459 | ||
460 | static bfd_boolean | |
461 | mn10200_elf_relax_delete_bytes (bfd *abfd, asection *sec, | |
462 | bfd_vma addr, int count) | |
463 | { | |
464 | Elf_Internal_Shdr *symtab_hdr; | |
465 | unsigned int sec_shndx; | |
466 | bfd_byte *contents; | |
467 | Elf_Internal_Rela *irel, *irelend; | |
468 | bfd_vma toaddr; | |
469 | Elf_Internal_Sym *isym; | |
470 | Elf_Internal_Sym *isymend; | |
471 | struct elf_link_hash_entry **sym_hashes; | |
472 | struct elf_link_hash_entry **end_hashes; | |
473 | unsigned int symcount; | |
474 | ||
475 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); | |
476 | ||
477 | contents = elf_section_data (sec)->this_hdr.contents; | |
478 | ||
479 | toaddr = sec->size; | |
480 | ||
481 | irel = elf_section_data (sec)->relocs; | |
482 | irelend = irel + sec->reloc_count; | |
483 | ||
484 | /* Actually delete the bytes. */ | |
485 | memmove (contents + addr, contents + addr + count, | |
486 | (size_t) (toaddr - addr - count)); | |
487 | sec->size -= count; | |
488 | ||
489 | /* Adjust all the relocs. */ | |
490 | for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++) | |
491 | { | |
492 | /* Get the new reloc address. */ | |
493 | if ((irel->r_offset > addr | |
494 | && irel->r_offset < toaddr)) | |
495 | irel->r_offset -= count; | |
496 | } | |
497 | ||
498 | /* Adjust the local symbols defined in this section. */ | |
499 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; | |
500 | isym = (Elf_Internal_Sym *) symtab_hdr->contents; | |
501 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) | |
502 | { | |
503 | if (isym->st_shndx == sec_shndx | |
504 | && isym->st_value > addr | |
505 | && isym->st_value < toaddr) | |
506 | isym->st_value -= count; | |
507 | } | |
508 | ||
509 | /* Now adjust the global symbols defined in this section. */ | |
510 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) | |
511 | - symtab_hdr->sh_info); | |
512 | sym_hashes = elf_sym_hashes (abfd); | |
513 | end_hashes = sym_hashes + symcount; | |
514 | for (; sym_hashes < end_hashes; sym_hashes++) | |
515 | { | |
516 | struct elf_link_hash_entry *sym_hash = *sym_hashes; | |
517 | if ((sym_hash->root.type == bfd_link_hash_defined | |
518 | || sym_hash->root.type == bfd_link_hash_defweak) | |
519 | && sym_hash->root.u.def.section == sec | |
520 | && sym_hash->root.u.def.value > addr | |
521 | && sym_hash->root.u.def.value < toaddr) | |
522 | { | |
523 | sym_hash->root.u.def.value -= count; | |
524 | } | |
525 | } | |
526 | ||
527 | return TRUE; | |
528 | } | |
529 | ||
252b5132 RH |
530 | /* This function handles relaxing for the mn10200. |
531 | ||
4cc11e76 | 532 | There are quite a few relaxing opportunities available on the mn10200: |
252b5132 RH |
533 | |
534 | * jsr:24 -> jsr:16 2 bytes | |
535 | ||
536 | * jmp:24 -> jmp:16 2 bytes | |
537 | * jmp:16 -> bra:8 1 byte | |
538 | ||
539 | * If the previous instruction is a conditional branch | |
540 | around the jump/bra, we may be able to reverse its condition | |
541 | and change its target to the jump's target. The jump/bra | |
542 | can then be deleted. 2 bytes | |
543 | ||
544 | * mov abs24 -> mov abs16 2 byte savings | |
545 | ||
546 | * Most instructions which accept imm24 can relax to imm16 2 bytes | |
547 | - Most instructions which accept imm16 can relax to imm8 1 byte | |
548 | ||
549 | * Most instructions which accept d24 can relax to d16 2 bytes | |
550 | - Most instructions which accept d16 can relax to d8 1 byte | |
551 | ||
552 | abs24, imm24, d24 all look the same at the reloc level. It | |
553 | might make the code simpler if we had different relocs for | |
554 | the various relaxable operand types. | |
a7c10850 | 555 | |
252b5132 RH |
556 | We don't handle imm16->imm8 or d16->d8 as they're very rare |
557 | and somewhat more difficult to support. */ | |
558 | ||
b34976b6 | 559 | static bfd_boolean |
2c3fc389 NC |
560 | mn10200_elf_relax_section (bfd *abfd, |
561 | asection *sec, | |
562 | struct bfd_link_info *link_info, | |
563 | bfd_boolean *again) | |
252b5132 RH |
564 | { |
565 | Elf_Internal_Shdr *symtab_hdr; | |
566 | Elf_Internal_Rela *internal_relocs; | |
252b5132 RH |
567 | Elf_Internal_Rela *irel, *irelend; |
568 | bfd_byte *contents = NULL; | |
6cdc0ccc | 569 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
570 | |
571 | /* Assume nothing changes. */ | |
b34976b6 | 572 | *again = FALSE; |
252b5132 | 573 | |
1049f94e | 574 | /* We don't have to do anything for a relocatable link, if |
252b5132 RH |
575 | this section does not have relocs, or if this is not a |
576 | code section. */ | |
1049f94e | 577 | if (link_info->relocatable |
252b5132 RH |
578 | || (sec->flags & SEC_RELOC) == 0 |
579 | || sec->reloc_count == 0 | |
580 | || (sec->flags & SEC_CODE) == 0) | |
b34976b6 | 581 | return TRUE; |
252b5132 | 582 | |
252b5132 RH |
583 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
584 | ||
585 | /* Get a copy of the native relocations. */ | |
45d6a902 | 586 | internal_relocs = (_bfd_elf_link_read_relocs |
2c3fc389 | 587 | (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, |
252b5132 RH |
588 | link_info->keep_memory)); |
589 | if (internal_relocs == NULL) | |
590 | goto error_return; | |
252b5132 RH |
591 | |
592 | /* Walk through them looking for relaxing opportunities. */ | |
593 | irelend = internal_relocs + sec->reloc_count; | |
594 | for (irel = internal_relocs; irel < irelend; irel++) | |
595 | { | |
596 | bfd_vma symval; | |
597 | ||
598 | /* If this isn't something that can be relaxed, then ignore | |
599 | this reloc. */ | |
600 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_NONE | |
601 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_8 | |
602 | || ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_MAX) | |
603 | continue; | |
604 | ||
605 | /* Get the section contents if we haven't done so already. */ | |
606 | if (contents == NULL) | |
607 | { | |
608 | /* Get cached copy if it exists. */ | |
609 | if (elf_section_data (sec)->this_hdr.contents != NULL) | |
610 | contents = elf_section_data (sec)->this_hdr.contents; | |
611 | else | |
612 | { | |
613 | /* Go get them off disk. */ | |
eea6121a | 614 | if (!bfd_malloc_and_get_section (abfd, sec, &contents)) |
252b5132 RH |
615 | goto error_return; |
616 | } | |
617 | } | |
618 | ||
6cdc0ccc AM |
619 | /* Read this BFD's local symbols if we haven't done so already. */ |
620 | if (isymbuf == NULL && symtab_hdr->sh_info != 0) | |
252b5132 | 621 | { |
6cdc0ccc AM |
622 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; |
623 | if (isymbuf == NULL) | |
624 | isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr, | |
625 | symtab_hdr->sh_info, 0, | |
626 | NULL, NULL, NULL); | |
627 | if (isymbuf == NULL) | |
628 | goto error_return; | |
252b5132 RH |
629 | } |
630 | ||
631 | /* Get the value of the symbol referred to by the reloc. */ | |
632 | if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info) | |
633 | { | |
9ad5cbcf | 634 | /* A local symbol. */ |
6cdc0ccc | 635 | Elf_Internal_Sym *isym; |
252b5132 RH |
636 | asection *sym_sec; |
637 | ||
6cdc0ccc AM |
638 | isym = isymbuf + ELF32_R_SYM (irel->r_info); |
639 | if (isym->st_shndx == SHN_UNDEF) | |
9ad5cbcf | 640 | sym_sec = bfd_und_section_ptr; |
6cdc0ccc | 641 | else if (isym->st_shndx == SHN_ABS) |
9ad5cbcf | 642 | sym_sec = bfd_abs_section_ptr; |
6cdc0ccc | 643 | else if (isym->st_shndx == SHN_COMMON) |
9ad5cbcf AM |
644 | sym_sec = bfd_com_section_ptr; |
645 | else | |
6cdc0ccc AM |
646 | sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx); |
647 | symval = (isym->st_value | |
252b5132 RH |
648 | + sym_sec->output_section->vma |
649 | + sym_sec->output_offset); | |
650 | } | |
651 | else | |
652 | { | |
653 | unsigned long indx; | |
654 | struct elf_link_hash_entry *h; | |
655 | ||
656 | /* An external symbol. */ | |
657 | indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info; | |
658 | h = elf_sym_hashes (abfd)[indx]; | |
659 | BFD_ASSERT (h != NULL); | |
660 | if (h->root.type != bfd_link_hash_defined | |
661 | && h->root.type != bfd_link_hash_defweak) | |
662 | { | |
663 | /* This appears to be a reference to an undefined | |
664 | symbol. Just ignore it--it will be caught by the | |
665 | regular reloc processing. */ | |
666 | continue; | |
667 | } | |
668 | ||
669 | symval = (h->root.u.def.value | |
670 | + h->root.u.def.section->output_section->vma | |
671 | + h->root.u.def.section->output_offset); | |
672 | } | |
673 | ||
674 | /* For simplicity of coding, we are going to modify the section | |
675 | contents, the section relocs, and the BFD symbol table. We | |
676 | must tell the rest of the code not to free up this | |
677 | information. It would be possible to instead create a table | |
678 | of changes which have to be made, as is done in coff-mips.c; | |
679 | that would be more work, but would require less memory when | |
680 | the linker is run. */ | |
681 | ||
252b5132 RH |
682 | /* Try to turn a 24bit pc-relative branch/call into a 16bit pc-relative |
683 | branch/call. */ | |
684 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL24) | |
685 | { | |
686 | bfd_vma value = symval; | |
687 | ||
688 | /* Deal with pc-relative gunk. */ | |
689 | value -= (sec->output_section->vma + sec->output_offset); | |
690 | value -= (irel->r_offset + 3); | |
691 | value += irel->r_addend; | |
692 | ||
693 | /* See if the value will fit in 16 bits, note the high value is | |
694 | 0x7fff + 2 as the target will be two bytes closer if we are | |
695 | able to relax. */ | |
27def10f | 696 | if ((long) value < 0x8001 && (long) value > -0x8000) |
252b5132 RH |
697 | { |
698 | unsigned char code; | |
699 | ||
700 | /* Get the opcode. */ | |
701 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
702 | ||
703 | if (code != 0xe0 && code != 0xe1) | |
704 | continue; | |
705 | ||
706 | /* Note that we've changed the relocs, section contents, etc. */ | |
707 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 708 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 709 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
710 | |
711 | /* Fix the opcode. */ | |
712 | if (code == 0xe0) | |
713 | bfd_put_8 (abfd, 0xfc, contents + irel->r_offset - 2); | |
714 | else if (code == 0xe1) | |
715 | bfd_put_8 (abfd, 0xfd, contents + irel->r_offset - 2); | |
716 | ||
717 | /* Fix the relocation's type. */ | |
718 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
719 | R_MN10200_PCREL16); | |
720 | ||
721 | /* The opcode got shorter too, so we have to fix the offset. */ | |
722 | irel->r_offset -= 1; | |
723 | ||
724 | /* Delete two bytes of data. */ | |
725 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
726 | irel->r_offset + 1, 2)) | |
727 | goto error_return; | |
728 | ||
729 | /* That will change things, so, we should relax again. | |
730 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 731 | *again = TRUE; |
252b5132 RH |
732 | } |
733 | } | |
734 | ||
735 | /* Try to turn a 16bit pc-relative branch into a 8bit pc-relative | |
736 | branch. */ | |
737 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL16) | |
738 | { | |
739 | bfd_vma value = symval; | |
740 | ||
741 | /* Deal with pc-relative gunk. */ | |
742 | value -= (sec->output_section->vma + sec->output_offset); | |
743 | value -= (irel->r_offset + 2); | |
744 | value += irel->r_addend; | |
745 | ||
746 | /* See if the value will fit in 8 bits, note the high value is | |
747 | 0x7f + 1 as the target will be one bytes closer if we are | |
748 | able to relax. */ | |
27def10f | 749 | if ((long) value < 0x80 && (long) value > -0x80) |
252b5132 RH |
750 | { |
751 | unsigned char code; | |
752 | ||
753 | /* Get the opcode. */ | |
754 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
755 | ||
756 | if (code != 0xfc) | |
757 | continue; | |
758 | ||
759 | /* Note that we've changed the relocs, section contents, etc. */ | |
760 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 761 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 762 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
763 | |
764 | /* Fix the opcode. */ | |
765 | bfd_put_8 (abfd, 0xea, contents + irel->r_offset - 1); | |
766 | ||
767 | /* Fix the relocation's type. */ | |
768 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
769 | R_MN10200_PCREL8); | |
770 | ||
771 | /* Delete one byte of data. */ | |
772 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
773 | irel->r_offset + 1, 1)) | |
774 | goto error_return; | |
775 | ||
776 | /* That will change things, so, we should relax again. | |
777 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 778 | *again = TRUE; |
252b5132 RH |
779 | } |
780 | } | |
781 | ||
782 | /* Try to eliminate an unconditional 8 bit pc-relative branch | |
783 | which immediately follows a conditional 8 bit pc-relative | |
784 | branch around the unconditional branch. | |
785 | ||
786 | original: new: | |
787 | bCC lab1 bCC' lab2 | |
788 | bra lab2 | |
789 | lab1: lab1: | |
790 | ||
252b5132 RH |
791 | This happens when the bCC can't reach lab2 at assembly time, |
792 | but due to other relaxations it can reach at link time. */ | |
793 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_PCREL8) | |
794 | { | |
795 | Elf_Internal_Rela *nrel; | |
796 | bfd_vma value = symval; | |
797 | unsigned char code; | |
798 | ||
799 | /* Deal with pc-relative gunk. */ | |
800 | value -= (sec->output_section->vma + sec->output_offset); | |
801 | value -= (irel->r_offset + 1); | |
802 | value += irel->r_addend; | |
803 | ||
804 | /* Do nothing if this reloc is the last byte in the section. */ | |
eea6121a | 805 | if (irel->r_offset == sec->size) |
252b5132 RH |
806 | continue; |
807 | ||
808 | /* See if the next instruction is an unconditional pc-relative | |
809 | branch, more often than not this test will fail, so we | |
810 | test it first to speed things up. */ | |
811 | code = bfd_get_8 (abfd, contents + irel->r_offset + 1); | |
812 | if (code != 0xea) | |
813 | continue; | |
814 | ||
815 | /* Also make sure the next relocation applies to the next | |
816 | instruction and that it's a pc-relative 8 bit branch. */ | |
817 | nrel = irel + 1; | |
818 | if (nrel == irelend | |
819 | || irel->r_offset + 2 != nrel->r_offset | |
820 | || ELF32_R_TYPE (nrel->r_info) != (int) R_MN10200_PCREL8) | |
821 | continue; | |
822 | ||
823 | /* Make sure our destination immediately follows the | |
824 | unconditional branch. */ | |
825 | if (symval != (sec->output_section->vma + sec->output_offset | |
826 | + irel->r_offset + 3)) | |
827 | continue; | |
828 | ||
829 | /* Now make sure we are a conditional branch. This may not | |
a7c10850 | 830 | be necessary, but why take the chance. |
252b5132 RH |
831 | |
832 | Note these checks assume that R_MN10200_PCREL8 relocs | |
833 | only occur on bCC and bCCx insns. If they occured | |
834 | elsewhere, we'd need to know the start of this insn | |
835 | for this check to be accurate. */ | |
836 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
837 | if (code != 0xe0 && code != 0xe1 && code != 0xe2 | |
838 | && code != 0xe3 && code != 0xe4 && code != 0xe5 | |
839 | && code != 0xe6 && code != 0xe7 && code != 0xe8 | |
840 | && code != 0xe9 && code != 0xec && code != 0xed | |
841 | && code != 0xee && code != 0xef && code != 0xfc | |
842 | && code != 0xfd && code != 0xfe && code != 0xff) | |
843 | continue; | |
844 | ||
845 | /* We also have to be sure there is no symbol/label | |
846 | at the unconditional branch. */ | |
6cdc0ccc AM |
847 | if (mn10200_elf_symbol_address_p (abfd, sec, isymbuf, |
848 | irel->r_offset + 1)) | |
252b5132 RH |
849 | continue; |
850 | ||
851 | /* Note that we've changed the relocs, section contents, etc. */ | |
852 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 853 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 854 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
855 | |
856 | /* Reverse the condition of the first branch. */ | |
857 | switch (code) | |
858 | { | |
27def10f KH |
859 | case 0xfc: |
860 | code = 0xfd; | |
861 | break; | |
862 | case 0xfd: | |
863 | code = 0xfc; | |
864 | break; | |
865 | case 0xfe: | |
866 | code = 0xff; | |
867 | break; | |
868 | case 0xff: | |
869 | code = 0xfe; | |
870 | break; | |
871 | case 0xe8: | |
872 | code = 0xe9; | |
873 | break; | |
874 | case 0xe9: | |
875 | code = 0xe8; | |
876 | break; | |
877 | case 0xe0: | |
878 | code = 0xe2; | |
879 | break; | |
880 | case 0xe2: | |
881 | code = 0xe0; | |
882 | break; | |
883 | case 0xe3: | |
884 | code = 0xe1; | |
885 | break; | |
886 | case 0xe1: | |
887 | code = 0xe3; | |
888 | break; | |
889 | case 0xe4: | |
890 | code = 0xe6; | |
891 | break; | |
892 | case 0xe6: | |
893 | code = 0xe4; | |
894 | break; | |
895 | case 0xe7: | |
896 | code = 0xe5; | |
897 | break; | |
898 | case 0xe5: | |
899 | code = 0xe7; | |
900 | break; | |
901 | case 0xec: | |
902 | code = 0xed; | |
903 | break; | |
904 | case 0xed: | |
905 | code = 0xec; | |
906 | break; | |
907 | case 0xee: | |
908 | code = 0xef; | |
909 | break; | |
910 | case 0xef: | |
911 | code = 0xee; | |
912 | break; | |
252b5132 RH |
913 | } |
914 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
a7c10850 | 915 | |
252b5132 RH |
916 | /* Set the reloc type and symbol for the first branch |
917 | from the second branch. */ | |
918 | irel->r_info = nrel->r_info; | |
919 | ||
920 | /* Make the reloc for the second branch a null reloc. */ | |
921 | nrel->r_info = ELF32_R_INFO (ELF32_R_SYM (nrel->r_info), | |
922 | R_MN10200_NONE); | |
923 | ||
924 | /* Delete two bytes of data. */ | |
925 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
926 | irel->r_offset + 1, 2)) | |
927 | goto error_return; | |
928 | ||
929 | /* That will change things, so, we should relax again. | |
930 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 931 | *again = TRUE; |
252b5132 RH |
932 | } |
933 | ||
934 | /* Try to turn a 24bit immediate, displacement or absolute address | |
935 | into a 16bit immediate, displacement or absolute address. */ | |
936 | if (ELF32_R_TYPE (irel->r_info) == (int) R_MN10200_24) | |
937 | { | |
938 | bfd_vma value = symval; | |
939 | ||
a7c10850 | 940 | /* See if the value will fit in 16 bits. |
252b5132 RH |
941 | We allow any 16bit match here. We prune those we can't |
942 | handle below. */ | |
27def10f | 943 | if ((long) value < 0x7fff && (long) value > -0x8000) |
252b5132 RH |
944 | { |
945 | unsigned char code; | |
946 | ||
947 | /* All insns which have 24bit operands are 5 bytes long, | |
948 | the first byte will always be 0xf4, but we double check | |
949 | it just in case. */ | |
950 | ||
951 | /* Get the first opcode. */ | |
952 | code = bfd_get_8 (abfd, contents + irel->r_offset - 2); | |
953 | ||
954 | if (code != 0xf4) | |
955 | continue; | |
956 | ||
957 | /* Get the second opcode. */ | |
958 | code = bfd_get_8 (abfd, contents + irel->r_offset - 1); | |
959 | ||
960 | switch (code & 0xfc) | |
961 | { | |
962 | /* mov imm24,dn -> mov imm16,dn */ | |
963 | case 0x70: | |
964 | /* Not safe if the high bit is on as relaxing may | |
965 | move the value out of high mem and thus not fit | |
966 | in a signed 16bit value. */ | |
967 | if (value & 0x8000) | |
968 | continue; | |
969 | ||
4cc11e76 | 970 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 971 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 972 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 973 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
974 | |
975 | /* Fix the opcode. */ | |
976 | bfd_put_8 (abfd, 0xf8 + (code & 0x03), | |
977 | contents + irel->r_offset - 2); | |
978 | ||
979 | /* Fix the relocation's type. */ | |
980 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
981 | R_MN10200_16); | |
982 | ||
983 | /* The opcode got shorter too, so we have to fix the | |
984 | offset. */ | |
985 | irel->r_offset -= 1; | |
986 | ||
987 | /* Delete two bytes of data. */ | |
988 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
989 | irel->r_offset + 1, 2)) | |
990 | goto error_return; | |
991 | ||
992 | /* That will change things, so, we should relax again. | |
993 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 994 | *again = TRUE; |
252b5132 RH |
995 | break; |
996 | ||
a7c10850 | 997 | /* mov imm24,an -> mov imm16,an |
252b5132 RH |
998 | cmp imm24,an -> cmp imm16,an |
999 | mov (abs24),dn -> mov (abs16),dn | |
1000 | mov dn,(abs24) -> mov dn,(abs16) | |
1001 | movb dn,(abs24) -> movb dn,(abs16) | |
1002 | movbu (abs24),dn -> movbu (abs16),dn */ | |
1003 | case 0x74: | |
1004 | case 0x7c: | |
1005 | case 0xc0: | |
1006 | case 0x40: | |
1007 | case 0x44: | |
1008 | case 0xc8: | |
4cc11e76 | 1009 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1010 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1011 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1012 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1013 | |
1014 | if ((code & 0xfc) == 0x74) | |
1015 | code = 0xdc + (code & 0x03); | |
1016 | else if ((code & 0xfc) == 0x7c) | |
1017 | code = 0xec + (code & 0x03); | |
1018 | else if ((code & 0xfc) == 0xc0) | |
1019 | code = 0xc8 + (code & 0x03); | |
1020 | else if ((code & 0xfc) == 0x40) | |
1021 | code = 0xc0 + (code & 0x03); | |
1022 | else if ((code & 0xfc) == 0x44) | |
1023 | code = 0xc4 + (code & 0x03); | |
1024 | else if ((code & 0xfc) == 0xc8) | |
1025 | code = 0xcc + (code & 0x03); | |
1026 | ||
1027 | /* Fix the opcode. */ | |
1028 | bfd_put_8 (abfd, code, contents + irel->r_offset - 2); | |
1029 | ||
1030 | /* Fix the relocation's type. */ | |
1031 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1032 | R_MN10200_16); | |
1033 | ||
1034 | /* The opcode got shorter too, so we have to fix the | |
1035 | offset. */ | |
1036 | irel->r_offset -= 1; | |
1037 | ||
1038 | /* Delete two bytes of data. */ | |
1039 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1040 | irel->r_offset + 1, 2)) | |
1041 | goto error_return; | |
1042 | ||
1043 | /* That will change things, so, we should relax again. | |
1044 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1045 | *again = TRUE; |
252b5132 RH |
1046 | break; |
1047 | ||
1048 | /* cmp imm24,dn -> cmp imm16,dn | |
1049 | mov (abs24),an -> mov (abs16),an | |
1050 | mov an,(abs24) -> mov an,(abs16) | |
1051 | add imm24,dn -> add imm16,dn | |
1052 | add imm24,an -> add imm16,an | |
1053 | sub imm24,dn -> sub imm16,dn | |
a7c10850 | 1054 | sub imm24,an -> sub imm16,an |
252b5132 RH |
1055 | And all d24->d16 in memory ops. */ |
1056 | case 0x78: | |
1057 | case 0xd0: | |
1058 | case 0x50: | |
1059 | case 0x60: | |
1060 | case 0x64: | |
1061 | case 0x68: | |
1062 | case 0x6c: | |
1063 | case 0x80: | |
1064 | case 0xf0: | |
1065 | case 0x00: | |
1066 | case 0x10: | |
1067 | case 0xb0: | |
1068 | case 0x30: | |
1069 | case 0xa0: | |
1070 | case 0x20: | |
1071 | case 0x90: | |
1072 | /* Not safe if the high bit is on as relaxing may | |
1073 | move the value out of high mem and thus not fit | |
1074 | in a signed 16bit value. */ | |
1075 | if (((code & 0xfc) == 0x78 | |
27def10f KH |
1076 | || (code & 0xfc) == 0x60 |
1077 | || (code & 0xfc) == 0x64 | |
1078 | || (code & 0xfc) == 0x68 | |
1079 | || (code & 0xfc) == 0x6c | |
1080 | || (code & 0xfc) == 0x80 | |
1081 | || (code & 0xfc) == 0xf0 | |
1082 | || (code & 0xfc) == 0x00 | |
1083 | || (code & 0xfc) == 0x10 | |
1084 | || (code & 0xfc) == 0xb0 | |
1085 | || (code & 0xfc) == 0x30 | |
1086 | || (code & 0xfc) == 0xa0 | |
1087 | || (code & 0xfc) == 0x20 | |
1088 | || (code & 0xfc) == 0x90) | |
1089 | && (value & 0x8000) != 0) | |
252b5132 RH |
1090 | continue; |
1091 | ||
4cc11e76 | 1092 | /* Note that we've changed the relocation contents, etc. */ |
252b5132 | 1093 | elf_section_data (sec)->relocs = internal_relocs; |
252b5132 | 1094 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1095 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1096 | |
1097 | /* Fix the opcode. */ | |
1098 | bfd_put_8 (abfd, 0xf7, contents + irel->r_offset - 2); | |
1099 | ||
1100 | if ((code & 0xfc) == 0x78) | |
1101 | code = 0x48 + (code & 0x03); | |
1102 | else if ((code & 0xfc) == 0xd0) | |
1103 | code = 0x30 + (code & 0x03); | |
1104 | else if ((code & 0xfc) == 0x50) | |
1105 | code = 0x20 + (code & 0x03); | |
1106 | else if ((code & 0xfc) == 0x60) | |
1107 | code = 0x18 + (code & 0x03); | |
1108 | else if ((code & 0xfc) == 0x64) | |
1109 | code = 0x08 + (code & 0x03); | |
1110 | else if ((code & 0xfc) == 0x68) | |
1111 | code = 0x1c + (code & 0x03); | |
1112 | else if ((code & 0xfc) == 0x6c) | |
1113 | code = 0x0c + (code & 0x03); | |
1114 | else if ((code & 0xfc) == 0x80) | |
1115 | code = 0xc0 + (code & 0x07); | |
1116 | else if ((code & 0xfc) == 0xf0) | |
1117 | code = 0xb0 + (code & 0x07); | |
1118 | else if ((code & 0xfc) == 0x00) | |
1119 | code = 0x80 + (code & 0x07); | |
1120 | else if ((code & 0xfc) == 0x10) | |
1121 | code = 0xa0 + (code & 0x07); | |
1122 | else if ((code & 0xfc) == 0xb0) | |
1123 | code = 0x70 + (code & 0x07); | |
1124 | else if ((code & 0xfc) == 0x30) | |
1125 | code = 0x60 + (code & 0x07); | |
1126 | else if ((code & 0xfc) == 0xa0) | |
1127 | code = 0xd0 + (code & 0x07); | |
1128 | else if ((code & 0xfc) == 0x20) | |
1129 | code = 0x90 + (code & 0x07); | |
1130 | else if ((code & 0xfc) == 0x90) | |
1131 | code = 0x50 + (code & 0x07); | |
1132 | ||
1133 | bfd_put_8 (abfd, code, contents + irel->r_offset - 1); | |
1134 | ||
1135 | /* Fix the relocation's type. */ | |
1136 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1137 | R_MN10200_16); | |
1138 | ||
1139 | /* Delete one bytes of data. */ | |
1140 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1141 | irel->r_offset + 2, 1)) | |
1142 | goto error_return; | |
1143 | ||
1144 | /* That will change things, so, we should relax again. | |
1145 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1146 | *again = TRUE; |
252b5132 RH |
1147 | break; |
1148 | ||
1149 | /* movb (abs24),dn ->movbu (abs16),dn extxb bn */ | |
1150 | case 0xc4: | |
1151 | /* Note that we've changed the reldection contents, etc. */ | |
1152 | elf_section_data (sec)->relocs = internal_relocs; | |
252b5132 | 1153 | elf_section_data (sec)->this_hdr.contents = contents; |
6cdc0ccc | 1154 | symtab_hdr->contents = (unsigned char *) isymbuf; |
252b5132 RH |
1155 | |
1156 | bfd_put_8 (abfd, 0xcc + (code & 0x03), | |
1157 | contents + irel->r_offset - 2); | |
1158 | ||
1159 | bfd_put_8 (abfd, 0xb8 + (code & 0x03), | |
1160 | contents + irel->r_offset - 1); | |
1161 | ||
1162 | /* Fix the relocation's type. */ | |
1163 | irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), | |
1164 | R_MN10200_16); | |
1165 | ||
1166 | /* The reloc will be applied one byte in front of its | |
1167 | current location. */ | |
1168 | irel->r_offset -= 1; | |
1169 | ||
1170 | /* Delete one bytes of data. */ | |
1171 | if (!mn10200_elf_relax_delete_bytes (abfd, sec, | |
1172 | irel->r_offset + 2, 1)) | |
1173 | goto error_return; | |
1174 | ||
1175 | /* That will change things, so, we should relax again. | |
1176 | Note that this is not required, and it may be slow. */ | |
b34976b6 | 1177 | *again = TRUE; |
252b5132 RH |
1178 | break; |
1179 | } | |
1180 | } | |
1181 | } | |
1182 | } | |
1183 | ||
6cdc0ccc AM |
1184 | if (isymbuf != NULL |
1185 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
252b5132 RH |
1186 | { |
1187 | if (! link_info->keep_memory) | |
6cdc0ccc | 1188 | free (isymbuf); |
252b5132 RH |
1189 | else |
1190 | { | |
6cdc0ccc AM |
1191 | /* Cache the symbols for elf_link_input_bfd. */ |
1192 | symtab_hdr->contents = (unsigned char *) isymbuf; | |
252b5132 | 1193 | } |
9ad5cbcf AM |
1194 | } |
1195 | ||
6cdc0ccc AM |
1196 | if (contents != NULL |
1197 | && elf_section_data (sec)->this_hdr.contents != contents) | |
252b5132 RH |
1198 | { |
1199 | if (! link_info->keep_memory) | |
6cdc0ccc AM |
1200 | free (contents); |
1201 | else | |
252b5132 | 1202 | { |
6cdc0ccc AM |
1203 | /* Cache the section contents for elf_link_input_bfd. */ |
1204 | elf_section_data (sec)->this_hdr.contents = contents; | |
252b5132 | 1205 | } |
252b5132 RH |
1206 | } |
1207 | ||
6cdc0ccc AM |
1208 | if (internal_relocs != NULL |
1209 | && elf_section_data (sec)->relocs != internal_relocs) | |
1210 | free (internal_relocs); | |
1211 | ||
b34976b6 | 1212 | return TRUE; |
252b5132 RH |
1213 | |
1214 | error_return: | |
6cdc0ccc AM |
1215 | if (isymbuf != NULL |
1216 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1217 | free (isymbuf); | |
1218 | if (contents != NULL | |
1219 | && elf_section_data (sec)->this_hdr.contents != contents) | |
1220 | free (contents); | |
1221 | if (internal_relocs != NULL | |
1222 | && elf_section_data (sec)->relocs != internal_relocs) | |
1223 | free (internal_relocs); | |
9ad5cbcf | 1224 | |
b34976b6 | 1225 | return FALSE; |
252b5132 RH |
1226 | } |
1227 | ||
b34976b6 AM |
1228 | /* Return TRUE if a symbol exists at the given address, else return |
1229 | FALSE. */ | |
1230 | static bfd_boolean | |
2c3fc389 NC |
1231 | mn10200_elf_symbol_address_p (bfd *abfd, |
1232 | asection *sec, | |
1233 | Elf_Internal_Sym *isym, | |
1234 | bfd_vma addr) | |
252b5132 RH |
1235 | { |
1236 | Elf_Internal_Shdr *symtab_hdr; | |
9ad5cbcf | 1237 | unsigned int sec_shndx; |
6cdc0ccc | 1238 | Elf_Internal_Sym *isymend; |
9ad5cbcf AM |
1239 | struct elf_link_hash_entry **sym_hashes; |
1240 | struct elf_link_hash_entry **end_hashes; | |
1241 | unsigned int symcount; | |
252b5132 | 1242 | |
9ad5cbcf | 1243 | sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); |
252b5132 | 1244 | |
6cdc0ccc | 1245 | /* Examine all the local symbols. */ |
9ad5cbcf | 1246 | symtab_hdr = &elf_tdata (abfd)->symtab_hdr; |
6cdc0ccc | 1247 | for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++) |
252b5132 | 1248 | { |
6cdc0ccc AM |
1249 | if (isym->st_shndx == sec_shndx |
1250 | && isym->st_value == addr) | |
b34976b6 | 1251 | return TRUE; |
252b5132 RH |
1252 | } |
1253 | ||
9ad5cbcf AM |
1254 | symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) |
1255 | - symtab_hdr->sh_info); | |
1256 | sym_hashes = elf_sym_hashes (abfd); | |
1257 | end_hashes = sym_hashes + symcount; | |
1258 | for (; sym_hashes < end_hashes; sym_hashes++) | |
252b5132 | 1259 | { |
9ad5cbcf AM |
1260 | struct elf_link_hash_entry *sym_hash = *sym_hashes; |
1261 | if ((sym_hash->root.type == bfd_link_hash_defined | |
1262 | || sym_hash->root.type == bfd_link_hash_defweak) | |
1263 | && sym_hash->root.u.def.section == sec | |
1264 | && sym_hash->root.u.def.value == addr) | |
b34976b6 | 1265 | return TRUE; |
252b5132 | 1266 | } |
9ad5cbcf | 1267 | |
b34976b6 | 1268 | return FALSE; |
252b5132 RH |
1269 | } |
1270 | ||
1271 | /* This is a version of bfd_generic_get_relocated_section_contents | |
1272 | which uses mn10200_elf_relocate_section. */ | |
1273 | ||
1274 | static bfd_byte * | |
2c3fc389 NC |
1275 | mn10200_elf_get_relocated_section_contents (bfd *output_bfd, |
1276 | struct bfd_link_info *link_info, | |
1277 | struct bfd_link_order *link_order, | |
1278 | bfd_byte *data, | |
1279 | bfd_boolean relocatable, | |
1280 | asymbol **symbols) | |
252b5132 RH |
1281 | { |
1282 | Elf_Internal_Shdr *symtab_hdr; | |
1283 | asection *input_section = link_order->u.indirect.section; | |
1284 | bfd *input_bfd = input_section->owner; | |
1285 | asection **sections = NULL; | |
1286 | Elf_Internal_Rela *internal_relocs = NULL; | |
6cdc0ccc | 1287 | Elf_Internal_Sym *isymbuf = NULL; |
252b5132 RH |
1288 | |
1289 | /* We only need to handle the case of relaxing, or of having a | |
1290 | particular set of section contents, specially. */ | |
1049f94e | 1291 | if (relocatable |
252b5132 RH |
1292 | || elf_section_data (input_section)->this_hdr.contents == NULL) |
1293 | return bfd_generic_get_relocated_section_contents (output_bfd, link_info, | |
1294 | link_order, data, | |
1049f94e | 1295 | relocatable, |
252b5132 RH |
1296 | symbols); |
1297 | ||
1298 | symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; | |
1299 | ||
1300 | memcpy (data, elf_section_data (input_section)->this_hdr.contents, | |
eea6121a | 1301 | (size_t) input_section->size); |
252b5132 RH |
1302 | |
1303 | if ((input_section->flags & SEC_RELOC) != 0 | |
1304 | && input_section->reloc_count > 0) | |
1305 | { | |
6cdc0ccc AM |
1306 | Elf_Internal_Sym *isym; |
1307 | Elf_Internal_Sym *isymend; | |
252b5132 | 1308 | asection **secpp; |
9ad5cbcf | 1309 | bfd_size_type amt; |
252b5132 | 1310 | |
45d6a902 | 1311 | internal_relocs = (_bfd_elf_link_read_relocs |
2c3fc389 | 1312 | (input_bfd, input_section, NULL, |
b34976b6 | 1313 | (Elf_Internal_Rela *) NULL, FALSE)); |
252b5132 RH |
1314 | if (internal_relocs == NULL) |
1315 | goto error_return; | |
1316 | ||
6cdc0ccc AM |
1317 | if (symtab_hdr->sh_info != 0) |
1318 | { | |
1319 | isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; | |
1320 | if (isymbuf == NULL) | |
1321 | isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, | |
1322 | symtab_hdr->sh_info, 0, | |
1323 | NULL, NULL, NULL); | |
1324 | if (isymbuf == NULL) | |
1325 | goto error_return; | |
1326 | } | |
252b5132 | 1327 | |
9ad5cbcf AM |
1328 | amt = symtab_hdr->sh_info; |
1329 | amt *= sizeof (asection *); | |
1330 | sections = (asection **) bfd_malloc (amt); | |
1331 | if (sections == NULL && amt != 0) | |
252b5132 RH |
1332 | goto error_return; |
1333 | ||
6cdc0ccc AM |
1334 | isymend = isymbuf + symtab_hdr->sh_info; |
1335 | for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp) | |
252b5132 RH |
1336 | { |
1337 | asection *isec; | |
1338 | ||
6cdc0ccc | 1339 | if (isym->st_shndx == SHN_UNDEF) |
252b5132 | 1340 | isec = bfd_und_section_ptr; |
6cdc0ccc | 1341 | else if (isym->st_shndx == SHN_ABS) |
252b5132 | 1342 | isec = bfd_abs_section_ptr; |
6cdc0ccc | 1343 | else if (isym->st_shndx == SHN_COMMON) |
252b5132 RH |
1344 | isec = bfd_com_section_ptr; |
1345 | else | |
6cdc0ccc | 1346 | isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx); |
252b5132 RH |
1347 | |
1348 | *secpp = isec; | |
1349 | } | |
1350 | ||
1351 | if (! mn10200_elf_relocate_section (output_bfd, link_info, input_bfd, | |
1352 | input_section, data, internal_relocs, | |
6cdc0ccc | 1353 | isymbuf, sections)) |
252b5132 RH |
1354 | goto error_return; |
1355 | ||
1356 | if (sections != NULL) | |
1357 | free (sections); | |
6cdc0ccc AM |
1358 | if (isymbuf != NULL |
1359 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1360 | free (isymbuf); | |
1361 | if (elf_section_data (input_section)->relocs != internal_relocs) | |
252b5132 | 1362 | free (internal_relocs); |
252b5132 RH |
1363 | } |
1364 | ||
1365 | return data; | |
1366 | ||
1367 | error_return: | |
252b5132 RH |
1368 | if (sections != NULL) |
1369 | free (sections); | |
6cdc0ccc AM |
1370 | if (isymbuf != NULL |
1371 | && symtab_hdr->contents != (unsigned char *) isymbuf) | |
1372 | free (isymbuf); | |
1373 | if (internal_relocs != NULL | |
1374 | && elf_section_data (input_section)->relocs != internal_relocs) | |
1375 | free (internal_relocs); | |
252b5132 RH |
1376 | return NULL; |
1377 | } | |
1378 | ||
252b5132 RH |
1379 | #define TARGET_LITTLE_SYM bfd_elf32_mn10200_vec |
1380 | #define TARGET_LITTLE_NAME "elf32-mn10200" | |
1381 | #define ELF_ARCH bfd_arch_mn10200 | |
aa4f99bb AO |
1382 | #define ELF_MACHINE_CODE EM_MN10200 |
1383 | #define ELF_MACHINE_ALT1 EM_CYGNUS_MN10200 | |
252b5132 RH |
1384 | #define ELF_MAXPAGESIZE 0x1000 |
1385 | ||
b491616a | 1386 | #define elf_backend_rela_normal 1 |
252b5132 RH |
1387 | #define elf_info_to_howto mn10200_info_to_howto |
1388 | #define elf_info_to_howto_rel 0 | |
1389 | #define elf_backend_relocate_section mn10200_elf_relocate_section | |
1390 | #define bfd_elf32_bfd_relax_section mn10200_elf_relax_section | |
1391 | #define bfd_elf32_bfd_get_relocated_section_contents \ | |
1392 | mn10200_elf_get_relocated_section_contents | |
1393 | ||
1394 | #define elf_symbol_leading_char '_' | |
1395 | ||
1396 | #include "elf32-target.h" |